Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Derived from arch/i386/kernel/irq.c |
3 | * Copyright (C) 1992 Linus Torvalds | |
4 | * Adapted from arch/i386 by Gary Thomas | |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
6 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
7 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
8 | * Adapted for Power Macintosh by Paul Mackerras |
9 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
756e7104 | 10 | * |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version | |
14 | * 2 of the License, or (at your option) any later version. | |
15 | * | |
16 | * This file contains the code used by various IRQ handling routines: | |
17 | * asking for different IRQ's should be done through these routines | |
18 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
19 | * shouldn't result in any weird surprises, and installing new handlers | |
20 | * should be easier. | |
756e7104 SR |
21 | * |
22 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
23 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
24 | * mask register (of which only 16 are defined), hence the weird shifting | |
25 | * and complement of the cached_irq_mask. I want to be able to stuff | |
26 | * this right into the SIU SMASK register. | |
27 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
28 | * to reduce code space and undefined function references. | |
1da177e4 LT |
29 | */ |
30 | ||
0ebfff14 BH |
31 | #undef DEBUG |
32 | ||
1da177e4 LT |
33 | #include <linux/module.h> |
34 | #include <linux/threads.h> | |
35 | #include <linux/kernel_stat.h> | |
36 | #include <linux/signal.h> | |
37 | #include <linux/sched.h> | |
756e7104 | 38 | #include <linux/ptrace.h> |
1da177e4 LT |
39 | #include <linux/ioport.h> |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/timex.h> | |
1da177e4 LT |
42 | #include <linux/init.h> |
43 | #include <linux/slab.h> | |
1da177e4 LT |
44 | #include <linux/delay.h> |
45 | #include <linux/irq.h> | |
756e7104 SR |
46 | #include <linux/seq_file.h> |
47 | #include <linux/cpumask.h> | |
1da177e4 LT |
48 | #include <linux/profile.h> |
49 | #include <linux/bitops.h> | |
0ebfff14 BH |
50 | #include <linux/list.h> |
51 | #include <linux/radix-tree.h> | |
52 | #include <linux/mutex.h> | |
53 | #include <linux/bootmem.h> | |
45934c47 | 54 | #include <linux/pci.h> |
60b332e7 | 55 | #include <linux/debugfs.h> |
cdd6c482 | 56 | #include <linux/perf_event.h> |
1da177e4 LT |
57 | |
58 | #include <asm/uaccess.h> | |
59 | #include <asm/system.h> | |
60 | #include <asm/io.h> | |
61 | #include <asm/pgtable.h> | |
62 | #include <asm/irq.h> | |
63 | #include <asm/cache.h> | |
64 | #include <asm/prom.h> | |
65 | #include <asm/ptrace.h> | |
1da177e4 | 66 | #include <asm/machdep.h> |
0ebfff14 | 67 | #include <asm/udbg.h> |
d04c56f7 | 68 | #ifdef CONFIG_PPC64 |
1da177e4 | 69 | #include <asm/paca.h> |
d04c56f7 | 70 | #include <asm/firmware.h> |
0874dd40 | 71 | #include <asm/lv1call.h> |
756e7104 | 72 | #endif |
1da177e4 | 73 | |
868accb7 | 74 | int __irq_offset_value; |
756e7104 SR |
75 | static int ppc_spurious_interrupts; |
76 | ||
756e7104 | 77 | #ifdef CONFIG_PPC32 |
b9e5b4e6 BH |
78 | EXPORT_SYMBOL(__irq_offset_value); |
79 | atomic_t ppc_n_lost_interrupts; | |
756e7104 | 80 | |
756e7104 SR |
81 | #ifdef CONFIG_TAU_INT |
82 | extern int tau_initialized; | |
83 | extern int tau_interrupts(int); | |
84 | #endif | |
b9e5b4e6 | 85 | #endif /* CONFIG_PPC32 */ |
756e7104 | 86 | |
756e7104 | 87 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
88 | EXPORT_SYMBOL(irq_desc); |
89 | ||
90 | int distribute_irqs = 1; | |
d04c56f7 | 91 | |
4e491d14 | 92 | static inline notrace unsigned long get_hard_enabled(void) |
ef2b343e HD |
93 | { |
94 | unsigned long enabled; | |
95 | ||
96 | __asm__ __volatile__("lbz %0,%1(13)" | |
97 | : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled))); | |
98 | ||
99 | return enabled; | |
100 | } | |
101 | ||
4e491d14 | 102 | static inline notrace void set_soft_enabled(unsigned long enable) |
ef2b343e HD |
103 | { |
104 | __asm__ __volatile__("stb %0,%1(13)" | |
105 | : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); | |
106 | } | |
107 | ||
4e491d14 | 108 | notrace void raw_local_irq_restore(unsigned long en) |
d04c56f7 | 109 | { |
ef2b343e HD |
110 | /* |
111 | * get_paca()->soft_enabled = en; | |
112 | * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1? | |
113 | * That was allowed before, and in such a case we do need to take care | |
114 | * that gcc will set soft_enabled directly via r13, not choose to use | |
115 | * an intermediate register, lest we're preempted to a different cpu. | |
116 | */ | |
117 | set_soft_enabled(en); | |
d04c56f7 PM |
118 | if (!en) |
119 | return; | |
120 | ||
94491685 | 121 | #ifdef CONFIG_PPC_STD_MMU_64 |
d04c56f7 | 122 | if (firmware_has_feature(FW_FEATURE_ISERIES)) { |
ef2b343e HD |
123 | /* |
124 | * Do we need to disable preemption here? Not really: in the | |
125 | * unlikely event that we're preempted to a different cpu in | |
126 | * between getting r13, loading its lppaca_ptr, and loading | |
127 | * its any_int, we might call iseries_handle_interrupts without | |
128 | * an interrupt pending on the new cpu, but that's no disaster, | |
129 | * is it? And the business of preempting us off the old cpu | |
130 | * would itself involve a local_irq_restore which handles the | |
131 | * interrupt to that cpu. | |
132 | * | |
133 | * But use "local_paca->lppaca_ptr" instead of "get_lppaca()" | |
134 | * to avoid any preemption checking added into get_paca(). | |
135 | */ | |
136 | if (local_paca->lppaca_ptr->int_dword.any_int) | |
d04c56f7 | 137 | iseries_handle_interrupts(); |
d04c56f7 | 138 | } |
94491685 | 139 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
d04c56f7 | 140 | |
cdd6c482 IM |
141 | if (test_perf_event_pending()) { |
142 | clear_perf_event_pending(); | |
143 | perf_event_do_pending(); | |
b6c5a71d | 144 | } |
93a6d3ce | 145 | |
ef2b343e HD |
146 | /* |
147 | * if (get_paca()->hard_enabled) return; | |
148 | * But again we need to take care that gcc gets hard_enabled directly | |
149 | * via r13, not choose to use an intermediate register, lest we're | |
150 | * preempted to a different cpu in between the two instructions. | |
151 | */ | |
152 | if (get_hard_enabled()) | |
d04c56f7 | 153 | return; |
ef2b343e HD |
154 | |
155 | /* | |
156 | * Need to hard-enable interrupts here. Since currently disabled, | |
157 | * no need to take further asm precautions against preemption; but | |
158 | * use local_paca instead of get_paca() to avoid preemption checking. | |
159 | */ | |
160 | local_paca->hard_enabled = en; | |
d04c56f7 PM |
161 | if ((int)mfspr(SPRN_DEC) < 0) |
162 | mtspr(SPRN_DEC, 1); | |
0874dd40 TS |
163 | |
164 | /* | |
165 | * Force the delivery of pending soft-disabled interrupts on PS3. | |
166 | * Any HV call will have this side effect. | |
167 | */ | |
168 | if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { | |
169 | u64 tmp; | |
170 | lv1_get_version_info(&tmp); | |
171 | } | |
172 | ||
e1fa2e13 | 173 | __hard_irq_enable(); |
d04c56f7 | 174 | } |
945feb17 | 175 | EXPORT_SYMBOL(raw_local_irq_restore); |
756e7104 | 176 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
177 | |
178 | int show_interrupts(struct seq_file *p, void *v) | |
179 | { | |
756e7104 SR |
180 | int i = *(loff_t *)v, j; |
181 | struct irqaction *action; | |
97f7d6bc | 182 | struct irq_desc *desc; |
1da177e4 LT |
183 | unsigned long flags; |
184 | ||
185 | if (i == 0) { | |
756e7104 SR |
186 | seq_puts(p, " "); |
187 | for_each_online_cpu(j) | |
188 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
189 | seq_putc(p, '\n'); |
190 | } | |
191 | ||
192 | if (i < NR_IRQS) { | |
193 | desc = get_irq_desc(i); | |
194 | spin_lock_irqsave(&desc->lock, flags); | |
195 | action = desc->action; | |
196 | if (!action || !action->handler) | |
197 | goto skip; | |
198 | seq_printf(p, "%3d: ", i); | |
199 | #ifdef CONFIG_SMP | |
756e7104 | 200 | for_each_online_cpu(j) |
dee4102a | 201 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); |
1da177e4 LT |
202 | #else |
203 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
204 | #endif /* CONFIG_SMP */ | |
d1bef4ed IM |
205 | if (desc->chip) |
206 | seq_printf(p, " %s ", desc->chip->typename); | |
1da177e4 | 207 | else |
756e7104 | 208 | seq_puts(p, " None "); |
1da177e4 | 209 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
210 | seq_printf(p, " %s", action->name); |
211 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
212 | seq_printf(p, ", %s", action->name); |
213 | seq_putc(p, '\n'); | |
214 | skip: | |
215 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 | 216 | } else if (i == NR_IRQS) { |
9c4cb825 | 217 | #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT) |
756e7104 SR |
218 | if (tau_initialized){ |
219 | seq_puts(p, "TAU: "); | |
394e3902 AM |
220 | for_each_online_cpu(j) |
221 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
756e7104 SR |
222 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); |
223 | } | |
9c4cb825 | 224 | #endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/ |
1da177e4 | 225 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 226 | } |
1da177e4 LT |
227 | return 0; |
228 | } | |
229 | ||
230 | #ifdef CONFIG_HOTPLUG_CPU | |
231 | void fixup_irqs(cpumask_t map) | |
232 | { | |
233 | unsigned int irq; | |
234 | static int warned; | |
235 | ||
236 | for_each_irq(irq) { | |
237 | cpumask_t mask; | |
238 | ||
239 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
240 | continue; | |
241 | ||
e65e49d0 | 242 | cpumask_and(&mask, irq_desc[irq].affinity, &map); |
1da177e4 LT |
243 | if (any_online_cpu(mask) == NR_CPUS) { |
244 | printk("Breaking affinity for irq %i\n", irq); | |
245 | mask = map; | |
246 | } | |
d1bef4ed | 247 | if (irq_desc[irq].chip->set_affinity) |
0de26520 | 248 | irq_desc[irq].chip->set_affinity(irq, &mask); |
1da177e4 LT |
249 | else if (irq_desc[irq].action && !(warned++)) |
250 | printk("Cannot set affinity for irq %i\n", irq); | |
251 | } | |
252 | ||
253 | local_irq_enable(); | |
254 | mdelay(1); | |
255 | local_irq_disable(); | |
256 | } | |
257 | #endif | |
258 | ||
f2694ba5 ME |
259 | #ifdef CONFIG_IRQSTACKS |
260 | static inline void handle_one_irq(unsigned int irq) | |
261 | { | |
262 | struct thread_info *curtp, *irqtp; | |
263 | unsigned long saved_sp_limit; | |
264 | struct irq_desc *desc; | |
f2694ba5 ME |
265 | |
266 | /* Switch to the irq stack to handle this */ | |
267 | curtp = current_thread_info(); | |
268 | irqtp = hardirq_ctx[smp_processor_id()]; | |
269 | ||
270 | if (curtp == irqtp) { | |
271 | /* We're already on the irq stack, just handle it */ | |
272 | generic_handle_irq(irq); | |
273 | return; | |
274 | } | |
275 | ||
276 | desc = irq_desc + irq; | |
277 | saved_sp_limit = current->thread.ksp_limit; | |
278 | ||
f2694ba5 ME |
279 | irqtp->task = curtp->task; |
280 | irqtp->flags = 0; | |
281 | ||
282 | /* Copy the softirq bits in preempt_count so that the | |
283 | * softirq checks work in the hardirq context. */ | |
284 | irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) | | |
285 | (curtp->preempt_count & SOFTIRQ_MASK); | |
286 | ||
287 | current->thread.ksp_limit = (unsigned long)irqtp + | |
288 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
289 | ||
835363e6 | 290 | call_handle_irq(irq, desc, irqtp, desc->handle_irq); |
f2694ba5 ME |
291 | current->thread.ksp_limit = saved_sp_limit; |
292 | irqtp->task = NULL; | |
293 | ||
294 | /* Set any flag that may have been set on the | |
295 | * alternate stack | |
296 | */ | |
297 | if (irqtp->flags) | |
298 | set_bits(irqtp->flags, &curtp->flags); | |
299 | } | |
300 | #else | |
301 | static inline void handle_one_irq(unsigned int irq) | |
302 | { | |
303 | generic_handle_irq(irq); | |
304 | } | |
305 | #endif | |
306 | ||
d7cb10d6 ME |
307 | static inline void check_stack_overflow(void) |
308 | { | |
309 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
310 | long sp; | |
311 | ||
312 | sp = __get_SP() & (THREAD_SIZE-1); | |
313 | ||
314 | /* check for stack overflow: is there less than 2KB free? */ | |
315 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
316 | printk("do_IRQ: stack overflow: %ld\n", | |
317 | sp - sizeof(struct thread_info)); | |
318 | dump_stack(); | |
319 | } | |
320 | #endif | |
321 | } | |
322 | ||
1da177e4 LT |
323 | void do_IRQ(struct pt_regs *regs) |
324 | { | |
7d12e780 | 325 | struct pt_regs *old_regs = set_irq_regs(regs); |
0ebfff14 | 326 | unsigned int irq; |
1da177e4 | 327 | |
4b218e9b | 328 | irq_enter(); |
1da177e4 | 329 | |
d7cb10d6 | 330 | check_stack_overflow(); |
1da177e4 | 331 | |
35a84c2f | 332 | irq = ppc_md.get_irq(); |
1da177e4 | 333 | |
f2694ba5 ME |
334 | if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) |
335 | handle_one_irq(irq); | |
336 | else if (irq != NO_IRQ_IGNORE) | |
e199500c SR |
337 | /* That's not SMP safe ... but who cares ? */ |
338 | ppc_spurious_interrupts++; | |
339 | ||
4b218e9b | 340 | irq_exit(); |
7d12e780 | 341 | set_irq_regs(old_regs); |
756e7104 | 342 | |
e199500c | 343 | #ifdef CONFIG_PPC_ISERIES |
b06a3183 SR |
344 | if (firmware_has_feature(FW_FEATURE_ISERIES) && |
345 | get_lppaca()->int_dword.fields.decr_int) { | |
3356bb9f DG |
346 | get_lppaca()->int_dword.fields.decr_int = 0; |
347 | /* Signal a fake decrementer interrupt */ | |
348 | timer_interrupt(regs); | |
e199500c SR |
349 | } |
350 | #endif | |
351 | } | |
1da177e4 LT |
352 | |
353 | void __init init_IRQ(void) | |
354 | { | |
70584578 SR |
355 | if (ppc_md.init_IRQ) |
356 | ppc_md.init_IRQ(); | |
bcf0b088 KG |
357 | |
358 | exc_lvl_ctx_init(); | |
359 | ||
1da177e4 LT |
360 | irq_ctx_init(); |
361 | } | |
362 | ||
bcf0b088 KG |
363 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
364 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | |
365 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | |
366 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |
367 | ||
368 | void exc_lvl_ctx_init(void) | |
369 | { | |
370 | struct thread_info *tp; | |
371 | int i; | |
372 | ||
373 | for_each_possible_cpu(i) { | |
374 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | |
375 | tp = critirq_ctx[i]; | |
376 | tp->cpu = i; | |
377 | tp->preempt_count = 0; | |
378 | ||
379 | #ifdef CONFIG_BOOKE | |
380 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | |
381 | tp = dbgirq_ctx[i]; | |
382 | tp->cpu = i; | |
383 | tp->preempt_count = 0; | |
384 | ||
385 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | |
386 | tp = mcheckirq_ctx[i]; | |
387 | tp->cpu = i; | |
388 | tp->preempt_count = HARDIRQ_OFFSET; | |
389 | #endif | |
390 | } | |
391 | } | |
392 | #endif | |
1da177e4 | 393 | |
1da177e4 | 394 | #ifdef CONFIG_IRQSTACKS |
22722051 AM |
395 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
396 | struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly; | |
1da177e4 LT |
397 | |
398 | void irq_ctx_init(void) | |
399 | { | |
400 | struct thread_info *tp; | |
401 | int i; | |
402 | ||
0e551954 | 403 | for_each_possible_cpu(i) { |
1da177e4 LT |
404 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); |
405 | tp = softirq_ctx[i]; | |
406 | tp->cpu = i; | |
e6768a4f | 407 | tp->preempt_count = 0; |
1da177e4 LT |
408 | |
409 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
410 | tp = hardirq_ctx[i]; | |
411 | tp->cpu = i; | |
412 | tp->preempt_count = HARDIRQ_OFFSET; | |
413 | } | |
414 | } | |
415 | ||
c6622f63 PM |
416 | static inline void do_softirq_onstack(void) |
417 | { | |
418 | struct thread_info *curtp, *irqtp; | |
85218827 | 419 | unsigned long saved_sp_limit = current->thread.ksp_limit; |
c6622f63 PM |
420 | |
421 | curtp = current_thread_info(); | |
422 | irqtp = softirq_ctx[smp_processor_id()]; | |
423 | irqtp->task = curtp->task; | |
85218827 KG |
424 | current->thread.ksp_limit = (unsigned long)irqtp + |
425 | _ALIGN_UP(sizeof(struct thread_info), 16); | |
c6622f63 | 426 | call_do_softirq(irqtp); |
85218827 | 427 | current->thread.ksp_limit = saved_sp_limit; |
c6622f63 PM |
428 | irqtp->task = NULL; |
429 | } | |
1da177e4 | 430 | |
c6622f63 PM |
431 | #else |
432 | #define do_softirq_onstack() __do_softirq() | |
433 | #endif /* CONFIG_IRQSTACKS */ | |
434 | ||
1da177e4 LT |
435 | void do_softirq(void) |
436 | { | |
437 | unsigned long flags; | |
1da177e4 LT |
438 | |
439 | if (in_interrupt()) | |
1da177e4 LT |
440 | return; |
441 | ||
1da177e4 | 442 | local_irq_save(flags); |
1da177e4 | 443 | |
912b2539 | 444 | if (local_softirq_pending()) |
c6622f63 | 445 | do_softirq_onstack(); |
1da177e4 LT |
446 | |
447 | local_irq_restore(flags); | |
1da177e4 | 448 | } |
1da177e4 | 449 | |
1da177e4 | 450 | |
1da177e4 | 451 | /* |
0ebfff14 | 452 | * IRQ controller and virtual interrupts |
1da177e4 LT |
453 | */ |
454 | ||
0ebfff14 | 455 | static LIST_HEAD(irq_hosts); |
057b184a | 456 | static DEFINE_SPINLOCK(irq_big_lock); |
967e012e | 457 | static unsigned int revmap_trees_allocated; |
150c6c8f | 458 | static DEFINE_MUTEX(revmap_trees_mutex); |
0ebfff14 BH |
459 | struct irq_map_entry irq_map[NR_IRQS]; |
460 | static unsigned int irq_virq_count = NR_IRQS; | |
461 | static struct irq_host *irq_default_host; | |
1da177e4 | 462 | |
35923f12 OJ |
463 | irq_hw_number_t virq_to_hw(unsigned int virq) |
464 | { | |
465 | return irq_map[virq].hwirq; | |
466 | } | |
467 | EXPORT_SYMBOL_GPL(virq_to_hw); | |
468 | ||
68158006 ME |
469 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
470 | { | |
471 | return h->of_node != NULL && h->of_node == np; | |
472 | } | |
473 | ||
5669c3cf | 474 | struct irq_host *irq_alloc_host(struct device_node *of_node, |
52964f87 ME |
475 | unsigned int revmap_type, |
476 | unsigned int revmap_arg, | |
477 | struct irq_host_ops *ops, | |
478 | irq_hw_number_t inval_irq) | |
1da177e4 | 479 | { |
0ebfff14 BH |
480 | struct irq_host *host; |
481 | unsigned int size = sizeof(struct irq_host); | |
482 | unsigned int i; | |
483 | unsigned int *rmap; | |
484 | unsigned long flags; | |
485 | ||
486 | /* Allocate structure and revmap table if using linear mapping */ | |
487 | if (revmap_type == IRQ_HOST_MAP_LINEAR) | |
488 | size += revmap_arg * sizeof(unsigned int); | |
5669c3cf | 489 | host = zalloc_maybe_bootmem(size, GFP_KERNEL); |
0ebfff14 BH |
490 | if (host == NULL) |
491 | return NULL; | |
7d01c880 | 492 | |
0ebfff14 BH |
493 | /* Fill structure */ |
494 | host->revmap_type = revmap_type; | |
495 | host->inval_irq = inval_irq; | |
496 | host->ops = ops; | |
19fc65b5 | 497 | host->of_node = of_node_get(of_node); |
7d01c880 | 498 | |
68158006 ME |
499 | if (host->ops->match == NULL) |
500 | host->ops->match = default_irq_host_match; | |
7d01c880 | 501 | |
0ebfff14 BH |
502 | spin_lock_irqsave(&irq_big_lock, flags); |
503 | ||
504 | /* If it's a legacy controller, check for duplicates and | |
505 | * mark it as allocated (we use irq 0 host pointer for that | |
506 | */ | |
507 | if (revmap_type == IRQ_HOST_MAP_LEGACY) { | |
508 | if (irq_map[0].host != NULL) { | |
509 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
510 | /* If we are early boot, we can't free the structure, | |
511 | * too bad... | |
512 | * this will be fixed once slab is made available early | |
513 | * instead of the current cruft | |
514 | */ | |
515 | if (mem_init_done) | |
516 | kfree(host); | |
517 | return NULL; | |
518 | } | |
519 | irq_map[0].host = host; | |
520 | } | |
521 | ||
522 | list_add(&host->link, &irq_hosts); | |
523 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
524 | ||
525 | /* Additional setups per revmap type */ | |
526 | switch(revmap_type) { | |
527 | case IRQ_HOST_MAP_LEGACY: | |
528 | /* 0 is always the invalid number for legacy */ | |
529 | host->inval_irq = 0; | |
530 | /* setup us as the host for all legacy interrupts */ | |
531 | for (i = 1; i < NUM_ISA_INTERRUPTS; i++) { | |
7866291d | 532 | irq_map[i].hwirq = i; |
0ebfff14 BH |
533 | smp_wmb(); |
534 | irq_map[i].host = host; | |
535 | smp_wmb(); | |
536 | ||
6e99e458 BH |
537 | /* Clear norequest flags */ |
538 | get_irq_desc(i)->status &= ~IRQ_NOREQUEST; | |
0ebfff14 BH |
539 | |
540 | /* Legacy flags are left to default at this point, | |
541 | * one can then use irq_create_mapping() to | |
c03983ac | 542 | * explicitly change them |
0ebfff14 | 543 | */ |
6e99e458 | 544 | ops->map(host, i, i); |
0ebfff14 BH |
545 | } |
546 | break; | |
547 | case IRQ_HOST_MAP_LINEAR: | |
548 | rmap = (unsigned int *)(host + 1); | |
549 | for (i = 0; i < revmap_arg; i++) | |
f5921697 | 550 | rmap[i] = NO_IRQ; |
0ebfff14 BH |
551 | host->revmap_data.linear.size = revmap_arg; |
552 | smp_wmb(); | |
553 | host->revmap_data.linear.revmap = rmap; | |
554 | break; | |
555 | default: | |
556 | break; | |
557 | } | |
558 | ||
559 | pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host); | |
560 | ||
561 | return host; | |
1da177e4 LT |
562 | } |
563 | ||
0ebfff14 | 564 | struct irq_host *irq_find_host(struct device_node *node) |
1da177e4 | 565 | { |
0ebfff14 BH |
566 | struct irq_host *h, *found = NULL; |
567 | unsigned long flags; | |
568 | ||
569 | /* We might want to match the legacy controller last since | |
570 | * it might potentially be set to match all interrupts in | |
571 | * the absence of a device node. This isn't a problem so far | |
572 | * yet though... | |
573 | */ | |
574 | spin_lock_irqsave(&irq_big_lock, flags); | |
575 | list_for_each_entry(h, &irq_hosts, link) | |
68158006 | 576 | if (h->ops->match(h, node)) { |
0ebfff14 BH |
577 | found = h; |
578 | break; | |
579 | } | |
580 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
581 | return found; | |
582 | } | |
583 | EXPORT_SYMBOL_GPL(irq_find_host); | |
584 | ||
585 | void irq_set_default_host(struct irq_host *host) | |
586 | { | |
587 | pr_debug("irq: Default host set to @0x%p\n", host); | |
1da177e4 | 588 | |
0ebfff14 BH |
589 | irq_default_host = host; |
590 | } | |
1da177e4 | 591 | |
0ebfff14 BH |
592 | void irq_set_virq_count(unsigned int count) |
593 | { | |
594 | pr_debug("irq: Trying to set virq count to %d\n", count); | |
fef1c772 | 595 | |
0ebfff14 BH |
596 | BUG_ON(count < NUM_ISA_INTERRUPTS); |
597 | if (count < NR_IRQS) | |
598 | irq_virq_count = count; | |
599 | } | |
600 | ||
6fde40f3 ME |
601 | static int irq_setup_virq(struct irq_host *host, unsigned int virq, |
602 | irq_hw_number_t hwirq) | |
603 | { | |
604 | /* Clear IRQ_NOREQUEST flag */ | |
605 | get_irq_desc(virq)->status &= ~IRQ_NOREQUEST; | |
606 | ||
607 | /* map it */ | |
608 | smp_wmb(); | |
609 | irq_map[virq].hwirq = hwirq; | |
610 | smp_mb(); | |
611 | ||
612 | if (host->ops->map(host, virq, hwirq)) { | |
613 | pr_debug("irq: -> mapping failed, freeing\n"); | |
614 | irq_free_virt(virq, 1); | |
615 | return -1; | |
616 | } | |
617 | ||
618 | return 0; | |
619 | } | |
8ec8f2e8 | 620 | |
ee51de56 ME |
621 | unsigned int irq_create_direct_mapping(struct irq_host *host) |
622 | { | |
623 | unsigned int virq; | |
624 | ||
625 | if (host == NULL) | |
626 | host = irq_default_host; | |
627 | ||
628 | BUG_ON(host == NULL); | |
629 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP); | |
630 | ||
631 | virq = irq_alloc_virt(host, 1, 0); | |
632 | if (virq == NO_IRQ) { | |
633 | pr_debug("irq: create_direct virq allocation failed\n"); | |
634 | return NO_IRQ; | |
635 | } | |
636 | ||
637 | pr_debug("irq: create_direct obtained virq %d\n", virq); | |
638 | ||
639 | if (irq_setup_virq(host, virq, virq)) | |
640 | return NO_IRQ; | |
641 | ||
642 | return virq; | |
643 | } | |
644 | ||
0ebfff14 | 645 | unsigned int irq_create_mapping(struct irq_host *host, |
6e99e458 | 646 | irq_hw_number_t hwirq) |
0ebfff14 BH |
647 | { |
648 | unsigned int virq, hint; | |
649 | ||
6e99e458 | 650 | pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq); |
0ebfff14 BH |
651 | |
652 | /* Look for default host if nececssary */ | |
653 | if (host == NULL) | |
654 | host = irq_default_host; | |
655 | if (host == NULL) { | |
656 | printk(KERN_WARNING "irq_create_mapping called for" | |
657 | " NULL host, hwirq=%lx\n", hwirq); | |
658 | WARN_ON(1); | |
659 | return NO_IRQ; | |
1da177e4 | 660 | } |
0ebfff14 | 661 | pr_debug("irq: -> using host @%p\n", host); |
1da177e4 | 662 | |
0ebfff14 BH |
663 | /* Check if mapping already exist, if it does, call |
664 | * host->ops->map() to update the flags | |
665 | */ | |
666 | virq = irq_find_mapping(host, hwirq); | |
f5921697 | 667 | if (virq != NO_IRQ) { |
acc900ef IK |
668 | if (host->ops->remap) |
669 | host->ops->remap(host, virq, hwirq); | |
0ebfff14 | 670 | pr_debug("irq: -> existing mapping on virq %d\n", virq); |
0ebfff14 | 671 | return virq; |
1da177e4 LT |
672 | } |
673 | ||
0ebfff14 BH |
674 | /* Get a virtual interrupt number */ |
675 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) { | |
676 | /* Handle legacy */ | |
677 | virq = (unsigned int)hwirq; | |
678 | if (virq == 0 || virq >= NUM_ISA_INTERRUPTS) | |
679 | return NO_IRQ; | |
680 | return virq; | |
681 | } else { | |
682 | /* Allocate a virtual interrupt number */ | |
683 | hint = hwirq % irq_virq_count; | |
684 | virq = irq_alloc_virt(host, 1, hint); | |
685 | if (virq == NO_IRQ) { | |
686 | pr_debug("irq: -> virq allocation failed\n"); | |
687 | return NO_IRQ; | |
688 | } | |
689 | } | |
0ebfff14 | 690 | |
6fde40f3 | 691 | if (irq_setup_virq(host, virq, hwirq)) |
0ebfff14 | 692 | return NO_IRQ; |
6fde40f3 | 693 | |
c7d07fdd ME |
694 | printk(KERN_DEBUG "irq: irq %lu on host %s mapped to virtual irq %u\n", |
695 | hwirq, host->of_node ? host->of_node->full_name : "null", virq); | |
696 | ||
1da177e4 | 697 | return virq; |
0ebfff14 BH |
698 | } |
699 | EXPORT_SYMBOL_GPL(irq_create_mapping); | |
700 | ||
f3d2ab41 AV |
701 | unsigned int irq_create_of_mapping(struct device_node *controller, |
702 | u32 *intspec, unsigned int intsize) | |
0ebfff14 BH |
703 | { |
704 | struct irq_host *host; | |
705 | irq_hw_number_t hwirq; | |
6e99e458 BH |
706 | unsigned int type = IRQ_TYPE_NONE; |
707 | unsigned int virq; | |
1da177e4 | 708 | |
0ebfff14 BH |
709 | if (controller == NULL) |
710 | host = irq_default_host; | |
711 | else | |
712 | host = irq_find_host(controller); | |
6e99e458 BH |
713 | if (host == NULL) { |
714 | printk(KERN_WARNING "irq: no irq host found for %s !\n", | |
715 | controller->full_name); | |
0ebfff14 | 716 | return NO_IRQ; |
6e99e458 | 717 | } |
0ebfff14 BH |
718 | |
719 | /* If host has no translation, then we assume interrupt line */ | |
720 | if (host->ops->xlate == NULL) | |
721 | hwirq = intspec[0]; | |
722 | else { | |
723 | if (host->ops->xlate(host, controller, intspec, intsize, | |
6e99e458 | 724 | &hwirq, &type)) |
0ebfff14 | 725 | return NO_IRQ; |
1da177e4 | 726 | } |
0ebfff14 | 727 | |
6e99e458 BH |
728 | /* Create mapping */ |
729 | virq = irq_create_mapping(host, hwirq); | |
730 | if (virq == NO_IRQ) | |
731 | return virq; | |
732 | ||
733 | /* Set type if specified and different than the current one */ | |
734 | if (type != IRQ_TYPE_NONE && | |
735 | type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK)) | |
736 | set_irq_type(virq, type); | |
737 | return virq; | |
1da177e4 | 738 | } |
0ebfff14 | 739 | EXPORT_SYMBOL_GPL(irq_create_of_mapping); |
1da177e4 | 740 | |
0ebfff14 | 741 | unsigned int irq_of_parse_and_map(struct device_node *dev, int index) |
1da177e4 | 742 | { |
0ebfff14 | 743 | struct of_irq oirq; |
1da177e4 | 744 | |
0ebfff14 BH |
745 | if (of_irq_map_one(dev, index, &oirq)) |
746 | return NO_IRQ; | |
1da177e4 | 747 | |
0ebfff14 BH |
748 | return irq_create_of_mapping(oirq.controller, oirq.specifier, |
749 | oirq.size); | |
750 | } | |
751 | EXPORT_SYMBOL_GPL(irq_of_parse_and_map); | |
1da177e4 | 752 | |
0ebfff14 BH |
753 | void irq_dispose_mapping(unsigned int virq) |
754 | { | |
5414c6be | 755 | struct irq_host *host; |
0ebfff14 | 756 | irq_hw_number_t hwirq; |
1da177e4 | 757 | |
5414c6be ME |
758 | if (virq == NO_IRQ) |
759 | return; | |
760 | ||
761 | host = irq_map[virq].host; | |
0ebfff14 BH |
762 | WARN_ON (host == NULL); |
763 | if (host == NULL) | |
764 | return; | |
1da177e4 | 765 | |
0ebfff14 BH |
766 | /* Never unmap legacy interrupts */ |
767 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
768 | return; | |
1da177e4 | 769 | |
0ebfff14 BH |
770 | /* remove chip and handler */ |
771 | set_irq_chip_and_handler(virq, NULL, NULL); | |
772 | ||
773 | /* Make sure it's completed */ | |
774 | synchronize_irq(virq); | |
775 | ||
776 | /* Tell the PIC about it */ | |
777 | if (host->ops->unmap) | |
778 | host->ops->unmap(host, virq); | |
779 | smp_mb(); | |
780 | ||
781 | /* Clear reverse map */ | |
782 | hwirq = irq_map[virq].hwirq; | |
783 | switch(host->revmap_type) { | |
784 | case IRQ_HOST_MAP_LINEAR: | |
785 | if (hwirq < host->revmap_data.linear.size) | |
f5921697 | 786 | host->revmap_data.linear.revmap[hwirq] = NO_IRQ; |
0ebfff14 BH |
787 | break; |
788 | case IRQ_HOST_MAP_TREE: | |
967e012e SD |
789 | /* |
790 | * Check if radix tree allocated yet, if not then nothing to | |
791 | * remove. | |
792 | */ | |
793 | smp_rmb(); | |
794 | if (revmap_trees_allocated < 1) | |
0ebfff14 | 795 | break; |
150c6c8f | 796 | mutex_lock(&revmap_trees_mutex); |
0ebfff14 | 797 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
150c6c8f | 798 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 BH |
799 | break; |
800 | } | |
1da177e4 | 801 | |
0ebfff14 BH |
802 | /* Destroy map */ |
803 | smp_mb(); | |
804 | irq_map[virq].hwirq = host->inval_irq; | |
1da177e4 | 805 | |
0ebfff14 BH |
806 | /* Set some flags */ |
807 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | |
1da177e4 | 808 | |
0ebfff14 BH |
809 | /* Free it */ |
810 | irq_free_virt(virq, 1); | |
1da177e4 | 811 | } |
0ebfff14 | 812 | EXPORT_SYMBOL_GPL(irq_dispose_mapping); |
1da177e4 | 813 | |
0ebfff14 BH |
814 | unsigned int irq_find_mapping(struct irq_host *host, |
815 | irq_hw_number_t hwirq) | |
816 | { | |
817 | unsigned int i; | |
818 | unsigned int hint = hwirq % irq_virq_count; | |
819 | ||
820 | /* Look for default host if nececssary */ | |
821 | if (host == NULL) | |
822 | host = irq_default_host; | |
823 | if (host == NULL) | |
824 | return NO_IRQ; | |
825 | ||
826 | /* legacy -> bail early */ | |
827 | if (host->revmap_type == IRQ_HOST_MAP_LEGACY) | |
828 | return hwirq; | |
829 | ||
830 | /* Slow path does a linear search of the map */ | |
831 | if (hint < NUM_ISA_INTERRUPTS) | |
832 | hint = NUM_ISA_INTERRUPTS; | |
833 | i = hint; | |
834 | do { | |
835 | if (irq_map[i].host == host && | |
836 | irq_map[i].hwirq == hwirq) | |
837 | return i; | |
838 | i++; | |
839 | if (i >= irq_virq_count) | |
840 | i = NUM_ISA_INTERRUPTS; | |
841 | } while(i != hint); | |
842 | return NO_IRQ; | |
843 | } | |
844 | EXPORT_SYMBOL_GPL(irq_find_mapping); | |
1da177e4 | 845 | |
0ebfff14 | 846 | |
967e012e SD |
847 | unsigned int irq_radix_revmap_lookup(struct irq_host *host, |
848 | irq_hw_number_t hwirq) | |
1da177e4 | 849 | { |
0ebfff14 BH |
850 | struct irq_map_entry *ptr; |
851 | unsigned int virq; | |
1da177e4 | 852 | |
0ebfff14 | 853 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); |
1da177e4 | 854 | |
967e012e SD |
855 | /* |
856 | * Check if the radix tree exists and has bee initialized. | |
857 | * If not, we fallback to slow mode | |
0ebfff14 | 858 | */ |
967e012e | 859 | if (revmap_trees_allocated < 2) |
0ebfff14 BH |
860 | return irq_find_mapping(host, hwirq); |
861 | ||
0ebfff14 | 862 | /* Now try to resolve */ |
150c6c8f SD |
863 | /* |
864 | * No rcu_read_lock(ing) needed, the ptr returned can't go under us | |
865 | * as it's referencing an entry in the static irq_map table. | |
866 | */ | |
967e012e | 867 | ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq); |
8ec8f2e8 | 868 | |
967e012e SD |
869 | /* |
870 | * If found in radix tree, then fine. | |
871 | * Else fallback to linear lookup - this should not happen in practice | |
872 | * as it means that we failed to insert the node in the radix tree. | |
873 | */ | |
874 | if (ptr) | |
0ebfff14 | 875 | virq = ptr - irq_map; |
967e012e SD |
876 | else |
877 | virq = irq_find_mapping(host, hwirq); | |
878 | ||
879 | return virq; | |
880 | } | |
881 | ||
882 | void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq, | |
883 | irq_hw_number_t hwirq) | |
884 | { | |
967e012e SD |
885 | |
886 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE); | |
887 | ||
888 | /* | |
889 | * Check if the radix tree exists yet. | |
890 | * If not, then the irq will be inserted into the tree when it gets | |
891 | * initialized. | |
892 | */ | |
893 | smp_rmb(); | |
894 | if (revmap_trees_allocated < 1) | |
895 | return; | |
0ebfff14 | 896 | |
8ec8f2e8 | 897 | if (virq != NO_IRQ) { |
150c6c8f | 898 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
899 | radix_tree_insert(&host->revmap_data.tree, hwirq, |
900 | &irq_map[virq]); | |
150c6c8f | 901 | mutex_unlock(&revmap_trees_mutex); |
8ec8f2e8 | 902 | } |
1da177e4 LT |
903 | } |
904 | ||
0ebfff14 BH |
905 | unsigned int irq_linear_revmap(struct irq_host *host, |
906 | irq_hw_number_t hwirq) | |
c6622f63 | 907 | { |
0ebfff14 | 908 | unsigned int *revmap; |
c6622f63 | 909 | |
0ebfff14 BH |
910 | WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR); |
911 | ||
912 | /* Check revmap bounds */ | |
913 | if (unlikely(hwirq >= host->revmap_data.linear.size)) | |
914 | return irq_find_mapping(host, hwirq); | |
915 | ||
916 | /* Check if revmap was allocated */ | |
917 | revmap = host->revmap_data.linear.revmap; | |
918 | if (unlikely(revmap == NULL)) | |
919 | return irq_find_mapping(host, hwirq); | |
920 | ||
921 | /* Fill up revmap with slow path if no mapping found */ | |
922 | if (unlikely(revmap[hwirq] == NO_IRQ)) | |
923 | revmap[hwirq] = irq_find_mapping(host, hwirq); | |
924 | ||
925 | return revmap[hwirq]; | |
c6622f63 PM |
926 | } |
927 | ||
0ebfff14 BH |
928 | unsigned int irq_alloc_virt(struct irq_host *host, |
929 | unsigned int count, | |
930 | unsigned int hint) | |
931 | { | |
932 | unsigned long flags; | |
933 | unsigned int i, j, found = NO_IRQ; | |
c6622f63 | 934 | |
0ebfff14 BH |
935 | if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) |
936 | return NO_IRQ; | |
937 | ||
938 | spin_lock_irqsave(&irq_big_lock, flags); | |
939 | ||
940 | /* Use hint for 1 interrupt if any */ | |
941 | if (count == 1 && hint >= NUM_ISA_INTERRUPTS && | |
942 | hint < irq_virq_count && irq_map[hint].host == NULL) { | |
943 | found = hint; | |
944 | goto hint_found; | |
945 | } | |
946 | ||
947 | /* Look for count consecutive numbers in the allocatable | |
948 | * (non-legacy) space | |
949 | */ | |
e1251465 ME |
950 | for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) { |
951 | if (irq_map[i].host != NULL) | |
952 | j = 0; | |
953 | else | |
954 | j++; | |
955 | ||
956 | if (j == count) { | |
957 | found = i - count + 1; | |
958 | break; | |
959 | } | |
0ebfff14 BH |
960 | } |
961 | if (found == NO_IRQ) { | |
962 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
963 | return NO_IRQ; | |
964 | } | |
965 | hint_found: | |
966 | for (i = found; i < (found + count); i++) { | |
967 | irq_map[i].hwirq = host->inval_irq; | |
968 | smp_wmb(); | |
969 | irq_map[i].host = host; | |
970 | } | |
971 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
972 | return found; | |
973 | } | |
974 | ||
975 | void irq_free_virt(unsigned int virq, unsigned int count) | |
1da177e4 LT |
976 | { |
977 | unsigned long flags; | |
0ebfff14 | 978 | unsigned int i; |
1da177e4 | 979 | |
0ebfff14 BH |
980 | WARN_ON (virq < NUM_ISA_INTERRUPTS); |
981 | WARN_ON (count == 0 || (virq + count) > irq_virq_count); | |
1da177e4 | 982 | |
0ebfff14 BH |
983 | spin_lock_irqsave(&irq_big_lock, flags); |
984 | for (i = virq; i < (virq + count); i++) { | |
985 | struct irq_host *host; | |
1da177e4 | 986 | |
0ebfff14 BH |
987 | if (i < NUM_ISA_INTERRUPTS || |
988 | (virq + count) > irq_virq_count) | |
989 | continue; | |
1da177e4 | 990 | |
0ebfff14 BH |
991 | host = irq_map[i].host; |
992 | irq_map[i].hwirq = host->inval_irq; | |
993 | smp_wmb(); | |
994 | irq_map[i].host = NULL; | |
995 | } | |
996 | spin_unlock_irqrestore(&irq_big_lock, flags); | |
1da177e4 | 997 | } |
0ebfff14 BH |
998 | |
999 | void irq_early_init(void) | |
1000 | { | |
1001 | unsigned int i; | |
1002 | ||
1003 | for (i = 0; i < NR_IRQS; i++) | |
1004 | get_irq_desc(i)->status |= IRQ_NOREQUEST; | |
1005 | } | |
1006 | ||
1007 | /* We need to create the radix trees late */ | |
1008 | static int irq_late_init(void) | |
1009 | { | |
1010 | struct irq_host *h; | |
967e012e | 1011 | unsigned int i; |
0ebfff14 | 1012 | |
967e012e SD |
1013 | /* |
1014 | * No mutual exclusion with respect to accessors of the tree is needed | |
1015 | * here as the synchronization is done via the state variable | |
1016 | * revmap_trees_allocated. | |
1017 | */ | |
0ebfff14 BH |
1018 | list_for_each_entry(h, &irq_hosts, link) { |
1019 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | |
967e012e SD |
1020 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL); |
1021 | } | |
1022 | ||
1023 | /* | |
1024 | * Make sure the radix trees inits are visible before setting | |
1025 | * the flag | |
1026 | */ | |
1027 | smp_wmb(); | |
1028 | revmap_trees_allocated = 1; | |
1029 | ||
1030 | /* | |
1031 | * Insert the reverse mapping for those interrupts already present | |
1032 | * in irq_map[]. | |
1033 | */ | |
150c6c8f | 1034 | mutex_lock(&revmap_trees_mutex); |
967e012e SD |
1035 | for (i = 0; i < irq_virq_count; i++) { |
1036 | if (irq_map[i].host && | |
1037 | (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE)) | |
1038 | radix_tree_insert(&irq_map[i].host->revmap_data.tree, | |
1039 | irq_map[i].hwirq, &irq_map[i]); | |
0ebfff14 | 1040 | } |
150c6c8f | 1041 | mutex_unlock(&revmap_trees_mutex); |
0ebfff14 | 1042 | |
967e012e SD |
1043 | /* |
1044 | * Make sure the radix trees insertions are visible before setting | |
1045 | * the flag | |
1046 | */ | |
1047 | smp_wmb(); | |
1048 | revmap_trees_allocated = 2; | |
1049 | ||
0ebfff14 BH |
1050 | return 0; |
1051 | } | |
1052 | arch_initcall(irq_late_init); | |
1053 | ||
60b332e7 ME |
1054 | #ifdef CONFIG_VIRQ_DEBUG |
1055 | static int virq_debug_show(struct seq_file *m, void *private) | |
1056 | { | |
1057 | unsigned long flags; | |
97f7d6bc | 1058 | struct irq_desc *desc; |
60b332e7 ME |
1059 | const char *p; |
1060 | char none[] = "none"; | |
1061 | int i; | |
1062 | ||
1063 | seq_printf(m, "%-5s %-7s %-15s %s\n", "virq", "hwirq", | |
1064 | "chip name", "host name"); | |
1065 | ||
1066 | for (i = 1; i < NR_IRQS; i++) { | |
1067 | desc = get_irq_desc(i); | |
1068 | spin_lock_irqsave(&desc->lock, flags); | |
1069 | ||
1070 | if (desc->action && desc->action->handler) { | |
1071 | seq_printf(m, "%5d ", i); | |
1072 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | |
1073 | ||
1074 | if (desc->chip && desc->chip->typename) | |
1075 | p = desc->chip->typename; | |
1076 | else | |
1077 | p = none; | |
1078 | seq_printf(m, "%-15s ", p); | |
1079 | ||
1080 | if (irq_map[i].host && irq_map[i].host->of_node) | |
1081 | p = irq_map[i].host->of_node->full_name; | |
1082 | else | |
1083 | p = none; | |
1084 | seq_printf(m, "%s\n", p); | |
1085 | } | |
1086 | ||
1087 | spin_unlock_irqrestore(&desc->lock, flags); | |
1088 | } | |
1089 | ||
1090 | return 0; | |
1091 | } | |
1092 | ||
1093 | static int virq_debug_open(struct inode *inode, struct file *file) | |
1094 | { | |
1095 | return single_open(file, virq_debug_show, inode->i_private); | |
1096 | } | |
1097 | ||
1098 | static const struct file_operations virq_debug_fops = { | |
1099 | .open = virq_debug_open, | |
1100 | .read = seq_read, | |
1101 | .llseek = seq_lseek, | |
1102 | .release = single_release, | |
1103 | }; | |
1104 | ||
1105 | static int __init irq_debugfs_init(void) | |
1106 | { | |
1107 | if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root, | |
476ff8a0 | 1108 | NULL, &virq_debug_fops) == NULL) |
60b332e7 ME |
1109 | return -ENOMEM; |
1110 | ||
1111 | return 0; | |
1112 | } | |
1113 | __initcall(irq_debugfs_init); | |
1114 | #endif /* CONFIG_VIRQ_DEBUG */ | |
1115 | ||
c6622f63 | 1116 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
1117 | static int __init setup_noirqdistrib(char *str) |
1118 | { | |
1119 | distribute_irqs = 0; | |
1120 | return 1; | |
1121 | } | |
1122 | ||
1123 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 1124 | #endif /* CONFIG_PPC64 */ |