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1da177e4 LT |
1 | /* |
2 | * arch/ppc/kernel/irq.c | |
3 | * | |
4 | * Derived from arch/i386/kernel/irq.c | |
5 | * Copyright (C) 1992 Linus Torvalds | |
6 | * Adapted from arch/i386 by Gary Thomas | |
7 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
756e7104 SR |
8 | * Updated and modified by Cort Dougan <cort@fsmlabs.com> |
9 | * Copyright (C) 1996-2001 Cort Dougan | |
1da177e4 LT |
10 | * Adapted for Power Macintosh by Paul Mackerras |
11 | * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) | |
12 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | |
756e7104 | 13 | * |
1da177e4 LT |
14 | * This program is free software; you can redistribute it and/or |
15 | * modify it under the terms of the GNU General Public License | |
16 | * as published by the Free Software Foundation; either version | |
17 | * 2 of the License, or (at your option) any later version. | |
18 | * | |
19 | * This file contains the code used by various IRQ handling routines: | |
20 | * asking for different IRQ's should be done through these routines | |
21 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
22 | * shouldn't result in any weird surprises, and installing new handlers | |
23 | * should be easier. | |
756e7104 SR |
24 | * |
25 | * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the | |
26 | * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit | |
27 | * mask register (of which only 16 are defined), hence the weird shifting | |
28 | * and complement of the cached_irq_mask. I want to be able to stuff | |
29 | * this right into the SIU SMASK register. | |
30 | * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx | |
31 | * to reduce code space and undefined function references. | |
1da177e4 LT |
32 | */ |
33 | ||
34 | #include <linux/errno.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/threads.h> | |
37 | #include <linux/kernel_stat.h> | |
38 | #include <linux/signal.h> | |
39 | #include <linux/sched.h> | |
756e7104 | 40 | #include <linux/ptrace.h> |
1da177e4 LT |
41 | #include <linux/ioport.h> |
42 | #include <linux/interrupt.h> | |
43 | #include <linux/timex.h> | |
44 | #include <linux/config.h> | |
45 | #include <linux/init.h> | |
46 | #include <linux/slab.h> | |
47 | #include <linux/pci.h> | |
48 | #include <linux/delay.h> | |
49 | #include <linux/irq.h> | |
50 | #include <linux/proc_fs.h> | |
51 | #include <linux/random.h> | |
756e7104 SR |
52 | #include <linux/seq_file.h> |
53 | #include <linux/cpumask.h> | |
1da177e4 LT |
54 | #include <linux/profile.h> |
55 | #include <linux/bitops.h> | |
756e7104 SR |
56 | #ifdef CONFIG_PPC64 |
57 | #include <linux/kallsyms.h> | |
58 | #endif | |
1da177e4 LT |
59 | |
60 | #include <asm/uaccess.h> | |
61 | #include <asm/system.h> | |
62 | #include <asm/io.h> | |
63 | #include <asm/pgtable.h> | |
64 | #include <asm/irq.h> | |
65 | #include <asm/cache.h> | |
66 | #include <asm/prom.h> | |
67 | #include <asm/ptrace.h> | |
1da177e4 | 68 | #include <asm/machdep.h> |
756e7104 SR |
69 | #ifdef CONFIG_PPC64 |
70 | #include <asm/iseries/it_lp_queue.h> | |
1da177e4 | 71 | #include <asm/paca.h> |
756e7104 | 72 | #endif |
1da177e4 | 73 | |
868accb7 SR |
74 | int __irq_offset_value; |
75 | #ifdef CONFIG_PPC32 | |
76 | EXPORT_SYMBOL(__irq_offset_value); | |
77 | #endif | |
78 | ||
756e7104 SR |
79 | static int ppc_spurious_interrupts; |
80 | ||
756e7104 SR |
81 | #ifdef CONFIG_PPC32 |
82 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | |
83 | ||
84 | unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; | |
85 | atomic_t ppc_n_lost_interrupts; | |
86 | ||
87 | #ifdef CONFIG_TAU_INT | |
88 | extern int tau_initialized; | |
89 | extern int tau_interrupts(int); | |
90 | #endif | |
91 | ||
92 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
93 | extern atomic_t ipi_recv; | |
94 | extern atomic_t ipi_sent; | |
95 | #endif | |
96 | #endif /* CONFIG_PPC32 */ | |
97 | ||
98 | #ifdef CONFIG_PPC64 | |
1da177e4 LT |
99 | EXPORT_SYMBOL(irq_desc); |
100 | ||
101 | int distribute_irqs = 1; | |
1da177e4 | 102 | u64 ppc64_interrupt_controller; |
756e7104 | 103 | #endif /* CONFIG_PPC64 */ |
1da177e4 LT |
104 | |
105 | int show_interrupts(struct seq_file *p, void *v) | |
106 | { | |
756e7104 SR |
107 | int i = *(loff_t *)v, j; |
108 | struct irqaction *action; | |
1da177e4 LT |
109 | irq_desc_t *desc; |
110 | unsigned long flags; | |
111 | ||
112 | if (i == 0) { | |
756e7104 SR |
113 | seq_puts(p, " "); |
114 | for_each_online_cpu(j) | |
115 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
116 | seq_putc(p, '\n'); |
117 | } | |
118 | ||
119 | if (i < NR_IRQS) { | |
120 | desc = get_irq_desc(i); | |
121 | spin_lock_irqsave(&desc->lock, flags); | |
122 | action = desc->action; | |
123 | if (!action || !action->handler) | |
124 | goto skip; | |
125 | seq_printf(p, "%3d: ", i); | |
126 | #ifdef CONFIG_SMP | |
756e7104 SR |
127 | for_each_online_cpu(j) |
128 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | |
1da177e4 LT |
129 | #else |
130 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
131 | #endif /* CONFIG_SMP */ | |
132 | if (desc->handler) | |
756e7104 | 133 | seq_printf(p, " %s ", desc->handler->typename); |
1da177e4 | 134 | else |
756e7104 | 135 | seq_puts(p, " None "); |
1da177e4 | 136 | seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); |
756e7104 SR |
137 | seq_printf(p, " %s", action->name); |
138 | for (action = action->next; action; action = action->next) | |
1da177e4 LT |
139 | seq_printf(p, ", %s", action->name); |
140 | seq_putc(p, '\n'); | |
141 | skip: | |
142 | spin_unlock_irqrestore(&desc->lock, flags); | |
756e7104 SR |
143 | } else if (i == NR_IRQS) { |
144 | #ifdef CONFIG_PPC32 | |
145 | #ifdef CONFIG_TAU_INT | |
146 | if (tau_initialized){ | |
147 | seq_puts(p, "TAU: "); | |
148 | for (j = 0; j < NR_CPUS; j++) | |
149 | if (cpu_online(j)) | |
150 | seq_printf(p, "%10u ", tau_interrupts(j)); | |
151 | seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); | |
152 | } | |
153 | #endif | |
154 | #if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE) | |
155 | /* should this be per processor send/receive? */ | |
156 | seq_printf(p, "IPI (recv/sent): %10u/%u\n", | |
157 | atomic_read(&ipi_recv), atomic_read(&ipi_sent)); | |
158 | #endif | |
159 | #endif /* CONFIG_PPC32 */ | |
1da177e4 | 160 | seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); |
756e7104 | 161 | } |
1da177e4 LT |
162 | return 0; |
163 | } | |
164 | ||
165 | #ifdef CONFIG_HOTPLUG_CPU | |
166 | void fixup_irqs(cpumask_t map) | |
167 | { | |
168 | unsigned int irq; | |
169 | static int warned; | |
170 | ||
171 | for_each_irq(irq) { | |
172 | cpumask_t mask; | |
173 | ||
174 | if (irq_desc[irq].status & IRQ_PER_CPU) | |
175 | continue; | |
176 | ||
177 | cpus_and(mask, irq_affinity[irq], map); | |
178 | if (any_online_cpu(mask) == NR_CPUS) { | |
179 | printk("Breaking affinity for irq %i\n", irq); | |
180 | mask = map; | |
181 | } | |
182 | if (irq_desc[irq].handler->set_affinity) | |
183 | irq_desc[irq].handler->set_affinity(irq, mask); | |
184 | else if (irq_desc[irq].action && !(warned++)) | |
185 | printk("Cannot set affinity for irq %i\n", irq); | |
186 | } | |
187 | ||
188 | local_irq_enable(); | |
189 | mdelay(1); | |
190 | local_irq_disable(); | |
191 | } | |
192 | #endif | |
193 | ||
1da177e4 LT |
194 | void do_IRQ(struct pt_regs *regs) |
195 | { | |
196 | int irq; | |
b709c083 SR |
197 | #ifdef CONFIG_IRQSTACKS |
198 | struct thread_info *curtp, *irqtp; | |
199 | #endif | |
1da177e4 | 200 | |
756e7104 | 201 | irq_enter(); |
1da177e4 LT |
202 | |
203 | #ifdef CONFIG_DEBUG_STACKOVERFLOW | |
204 | /* Debugging check for stack overflow: is there less than 2KB free? */ | |
205 | { | |
206 | long sp; | |
207 | ||
208 | sp = __get_SP() & (THREAD_SIZE-1); | |
209 | ||
210 | if (unlikely(sp < (sizeof(struct thread_info) + 2048))) { | |
211 | printk("do_IRQ: stack overflow: %ld\n", | |
212 | sp - sizeof(struct thread_info)); | |
213 | dump_stack(); | |
214 | } | |
215 | } | |
216 | #endif | |
217 | ||
756e7104 SR |
218 | /* |
219 | * Every platform is required to implement ppc_md.get_irq. | |
220 | * This function will either return an irq number or -1 to | |
221 | * indicate there are no more pending. | |
222 | * The value -2 is for buggy hardware and means that this IRQ | |
223 | * has already been handled. -- Tom | |
224 | */ | |
1da177e4 LT |
225 | irq = ppc_md.get_irq(regs); |
226 | ||
b709c083 SR |
227 | if (irq >= 0) { |
228 | #ifdef CONFIG_IRQSTACKS | |
229 | /* Switch to the irq stack to handle this */ | |
230 | curtp = current_thread_info(); | |
231 | irqtp = hardirq_ctx[smp_processor_id()]; | |
232 | if (curtp != irqtp) { | |
233 | irqtp->task = curtp->task; | |
234 | irqtp->flags = 0; | |
d4be4f37 | 235 | call___do_IRQ(irq, regs, irqtp); |
b709c083 SR |
236 | irqtp->task = NULL; |
237 | if (irqtp->flags) | |
238 | set_bits(irqtp->flags, &curtp->flags); | |
239 | } else | |
240 | #endif | |
d4be4f37 | 241 | __do_IRQ(irq, regs); |
e199500c SR |
242 | } else if (irq != -2) |
243 | /* That's not SMP safe ... but who cares ? */ | |
244 | ppc_spurious_interrupts++; | |
245 | ||
756e7104 | 246 | irq_exit(); |
756e7104 | 247 | |
e199500c SR |
248 | #ifdef CONFIG_PPC_ISERIES |
249 | { | |
250 | struct paca_struct *lpaca = get_paca(); | |
251 | ||
252 | if (lpaca->lppaca.int_dword.fields.decr_int) { | |
253 | lpaca->lppaca.int_dword.fields.decr_int = 0; | |
254 | /* Signal a fake decrementer interrupt */ | |
255 | timer_interrupt(regs); | |
256 | } | |
257 | } | |
258 | #endif | |
259 | } | |
1da177e4 LT |
260 | |
261 | void __init init_IRQ(void) | |
262 | { | |
756e7104 | 263 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
264 | static int once = 0; |
265 | ||
266 | if (once) | |
267 | return; | |
268 | ||
269 | once++; | |
270 | ||
756e7104 | 271 | #endif |
1da177e4 | 272 | ppc_md.init_IRQ(); |
756e7104 | 273 | #ifdef CONFIG_PPC64 |
1da177e4 | 274 | irq_ctx_init(); |
756e7104 | 275 | #endif |
1da177e4 LT |
276 | } |
277 | ||
756e7104 | 278 | #ifdef CONFIG_PPC64 |
1da177e4 LT |
279 | /* |
280 | * Virtual IRQ mapping code, used on systems with XICS interrupt controllers. | |
281 | */ | |
282 | ||
283 | #define UNDEFINED_IRQ 0xffffffff | |
284 | unsigned int virt_irq_to_real_map[NR_IRQS]; | |
285 | ||
286 | /* | |
287 | * Don't use virtual irqs 0, 1, 2 for devices. | |
288 | * The pcnet32 driver considers interrupt numbers < 2 to be invalid, | |
289 | * and 2 is the XICS IPI interrupt. | |
290 | * We limit virtual irqs to 17 less than NR_IRQS so that when we | |
291 | * offset them by 16 (to reserve the first 16 for ISA interrupts) | |
292 | * we don't end up with an interrupt number >= NR_IRQS. | |
293 | */ | |
294 | #define MIN_VIRT_IRQ 3 | |
295 | #define MAX_VIRT_IRQ (NR_IRQS - NUM_ISA_INTERRUPTS - 1) | |
296 | #define NR_VIRT_IRQS (MAX_VIRT_IRQ - MIN_VIRT_IRQ + 1) | |
297 | ||
298 | void | |
299 | virt_irq_init(void) | |
300 | { | |
301 | int i; | |
302 | for (i = 0; i < NR_IRQS; i++) | |
303 | virt_irq_to_real_map[i] = UNDEFINED_IRQ; | |
304 | } | |
305 | ||
306 | /* Create a mapping for a real_irq if it doesn't already exist. | |
307 | * Return the virtual irq as a convenience. | |
308 | */ | |
309 | int virt_irq_create_mapping(unsigned int real_irq) | |
310 | { | |
311 | unsigned int virq, first_virq; | |
312 | static int warned; | |
313 | ||
314 | if (ppc64_interrupt_controller == IC_OPEN_PIC) | |
315 | return real_irq; /* no mapping for openpic (for now) */ | |
316 | ||
f3f66f59 | 317 | if (ppc64_interrupt_controller == IC_CELL_PIC) |
fef1c772 AB |
318 | return real_irq; /* no mapping for iic either */ |
319 | ||
1da177e4 LT |
320 | /* don't map interrupts < MIN_VIRT_IRQ */ |
321 | if (real_irq < MIN_VIRT_IRQ) { | |
322 | virt_irq_to_real_map[real_irq] = real_irq; | |
323 | return real_irq; | |
324 | } | |
325 | ||
326 | /* map to a number between MIN_VIRT_IRQ and MAX_VIRT_IRQ */ | |
327 | virq = real_irq; | |
328 | if (virq > MAX_VIRT_IRQ) | |
329 | virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ; | |
330 | ||
331 | /* search for this number or a free slot */ | |
332 | first_virq = virq; | |
333 | while (virt_irq_to_real_map[virq] != UNDEFINED_IRQ) { | |
334 | if (virt_irq_to_real_map[virq] == real_irq) | |
335 | return virq; | |
336 | if (++virq > MAX_VIRT_IRQ) | |
337 | virq = MIN_VIRT_IRQ; | |
338 | if (virq == first_virq) | |
339 | goto nospace; /* oops, no free slots */ | |
340 | } | |
341 | ||
342 | virt_irq_to_real_map[virq] = real_irq; | |
343 | return virq; | |
344 | ||
345 | nospace: | |
346 | if (!warned) { | |
347 | printk(KERN_CRIT "Interrupt table is full\n"); | |
348 | printk(KERN_CRIT "Increase NR_IRQS (currently %d) " | |
349 | "in your kernel sources and rebuild.\n", NR_IRQS); | |
350 | warned = 1; | |
351 | } | |
352 | return NO_IRQ; | |
353 | } | |
354 | ||
355 | /* | |
356 | * In most cases will get a hit on the very first slot checked in the | |
357 | * virt_irq_to_real_map. Only when there are a large number of | |
358 | * IRQs will this be expensive. | |
359 | */ | |
360 | unsigned int real_irq_to_virt_slowpath(unsigned int real_irq) | |
361 | { | |
362 | unsigned int virq; | |
363 | unsigned int first_virq; | |
364 | ||
365 | virq = real_irq; | |
366 | ||
367 | if (virq > MAX_VIRT_IRQ) | |
368 | virq = (virq % NR_VIRT_IRQS) + MIN_VIRT_IRQ; | |
369 | ||
370 | first_virq = virq; | |
371 | ||
372 | do { | |
373 | if (virt_irq_to_real_map[virq] == real_irq) | |
374 | return virq; | |
375 | ||
376 | virq++; | |
377 | ||
378 | if (virq >= MAX_VIRT_IRQ) | |
379 | virq = 0; | |
380 | ||
381 | } while (first_virq != virq); | |
382 | ||
383 | return NO_IRQ; | |
384 | ||
385 | } | |
386 | ||
1da177e4 LT |
387 | #ifdef CONFIG_IRQSTACKS |
388 | struct thread_info *softirq_ctx[NR_CPUS]; | |
389 | struct thread_info *hardirq_ctx[NR_CPUS]; | |
390 | ||
391 | void irq_ctx_init(void) | |
392 | { | |
393 | struct thread_info *tp; | |
394 | int i; | |
395 | ||
396 | for_each_cpu(i) { | |
397 | memset((void *)softirq_ctx[i], 0, THREAD_SIZE); | |
398 | tp = softirq_ctx[i]; | |
399 | tp->cpu = i; | |
400 | tp->preempt_count = SOFTIRQ_OFFSET; | |
401 | ||
402 | memset((void *)hardirq_ctx[i], 0, THREAD_SIZE); | |
403 | tp = hardirq_ctx[i]; | |
404 | tp->cpu = i; | |
405 | tp->preempt_count = HARDIRQ_OFFSET; | |
406 | } | |
407 | } | |
408 | ||
409 | void do_softirq(void) | |
410 | { | |
411 | unsigned long flags; | |
412 | struct thread_info *curtp, *irqtp; | |
413 | ||
414 | if (in_interrupt()) | |
415 | return; | |
416 | ||
417 | local_irq_save(flags); | |
418 | ||
419 | if (local_softirq_pending()) { | |
420 | curtp = current_thread_info(); | |
421 | irqtp = softirq_ctx[smp_processor_id()]; | |
422 | irqtp->task = curtp->task; | |
423 | call_do_softirq(irqtp); | |
424 | irqtp->task = NULL; | |
425 | } | |
426 | ||
427 | local_irq_restore(flags); | |
428 | } | |
429 | EXPORT_SYMBOL(do_softirq); | |
430 | ||
431 | #endif /* CONFIG_IRQSTACKS */ | |
432 | ||
433 | static int __init setup_noirqdistrib(char *str) | |
434 | { | |
435 | distribute_irqs = 0; | |
436 | return 1; | |
437 | } | |
438 | ||
439 | __setup("noirqdistrib", setup_noirqdistrib); | |
756e7104 | 440 | #endif /* CONFIG_PPC64 */ |