powerpc: Respect nr_cpu_ids when calling set_cpu_possible and set_cpu_present
[deliverable/linux.git] / arch / powerpc / kernel / paca.c
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1da177e4
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1/*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
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10#include <linux/threads.h>
11#include <linux/module.h>
95f72d1e 12#include <linux/memblock.h>
1da177e4 13
1426d5a3 14#include <asm/firmware.h>
1da177e4 15#include <asm/lppaca.h>
1da177e4 16#include <asm/paca.h>
549e8152 17#include <asm/sections.h>
dce6670a 18#include <asm/pgtable.h>
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19#include <asm/iseries/lpar_map.h>
20#include <asm/iseries/hv_types.h>
1fc711f7 21#include <asm/kexec.h>
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22
23/* This symbol is provided by the linker - let it fill in the paca
24 * field correctly */
25extern unsigned long __toc_start;
26
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27#ifdef CONFIG_PPC_BOOK3S
28
3356bb9f 29/*
30ff2e87 30 * The structure which the hypervisor knows about - this structure
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31 * should not cross a page boundary. The vpa_init/register_vpa call
32 * is now known to fail if the lppaca structure crosses a page
30ff2e87
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33 * boundary. The lppaca is also used on legacy iSeries and POWER5
34 * pSeries boxes. The lppaca is 640 bytes long, and cannot readily
35 * change since the hypervisor knows its layout, so a 1kB alignment
36 * will suffice to ensure that it doesn't cross a page boundary.
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37 */
38struct lppaca lppaca[] = {
93c22703 39 [0 ... (NR_LPPACAS-1)] = {
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40 .desc = 0xd397d781, /* "LpPa" */
41 .size = sizeof(struct lppaca),
42 .dyn_proc_status = 2,
43 .decr_val = 0x00ff0000,
44 .fpregs_in_use = 1,
45 .end_of_quantum = 0xfffffffffffffffful,
46 .slb_count = 64,
47 .vmxregs_in_use = 0,
40900194 48 .page_ins = 0,
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49 },
50};
51
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52static struct lppaca *extra_lppacas;
53static long __initdata lppaca_size;
54
55static void allocate_lppacas(int nr_cpus, unsigned long limit)
56{
57 if (nr_cpus <= NR_LPPACAS)
58 return;
59
60 lppaca_size = PAGE_ALIGN(sizeof(struct lppaca) *
61 (nr_cpus - NR_LPPACAS));
62 extra_lppacas = __va(memblock_alloc_base(lppaca_size,
63 PAGE_SIZE, limit));
64}
65
66static struct lppaca *new_lppaca(int cpu)
67{
68 struct lppaca *lp;
69
70 if (cpu < NR_LPPACAS)
71 return &lppaca[cpu];
72
73 lp = extra_lppacas + (cpu - NR_LPPACAS);
74 *lp = lppaca[0];
75
76 return lp;
77}
78
79static void free_lppacas(void)
80{
81 long new_size = 0, nr;
82
83 if (!lppaca_size)
84 return;
85 nr = num_possible_cpus() - NR_LPPACAS;
86 if (nr > 0)
87 new_size = PAGE_ALIGN(nr * sizeof(struct lppaca));
88 if (new_size >= lppaca_size)
89 return;
90
91 memblock_free(__pa(extra_lppacas) + new_size, lppaca_size - new_size);
92 lppaca_size = new_size;
93}
94
95#else
96
3c4b7644 97static inline void allocate_lppacas(int nr_cpus, unsigned long limit) { }
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98static inline void free_lppacas(void) { }
99
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100#endif /* CONFIG_PPC_BOOK3S */
101
102#ifdef CONFIG_PPC_STD_MMU_64
103
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104/*
105 * 3 persistent SLBs are registered here. The buffer will be zero
106 * initially, hence will all be invaild until we actually write them.
107 */
108struct slb_shadow slb_shadow[] __cacheline_aligned = {
109 [0 ... (NR_CPUS-1)] = {
110 .persistent = SLB_NUM_BOLTED,
111 .buffer_length = sizeof(struct slb_shadow),
112 },
113};
114
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115#endif /* CONFIG_PPC_STD_MMU_64 */
116
8882a4da 117/* The Paca is an array with one entry per processor. Each contains an
1da177e4 118 * lppaca, which contains the information shared between the
1888e7b5 119 * hypervisor and Linux.
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120 * On systems with hardware multi-threading, there are two threads
121 * per processor. The Paca array must contain an entry for each thread.
122 * The VPD Areas will give a max logical processors = 2 * max physical
123 * processors. The processor VPD array needs one entry per physical
124 * processor (not thread).
125 */
1426d5a3 126struct paca_struct *paca;
1da177e4 127EXPORT_SYMBOL(paca);
90035fe3 128
1426d5a3 129struct paca_struct boot_paca;
90035fe3 130
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131void __init initialise_paca(struct paca_struct *new_paca, int cpu)
132{
133 /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
134 * of the TOC can be addressed using a single machine instruction.
135 */
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136 unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
137
91c60b5b 138#ifdef CONFIG_PPC_BOOK3S
93c22703 139 new_paca->lppaca_ptr = new_lppaca(cpu);
dce6670a 140#else
1426d5a3 141 new_paca->kernel_pgd = swapper_pg_dir;
91c60b5b 142#endif
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143 new_paca->lock_token = 0x8000;
144 new_paca->paca_index = cpu;
145 new_paca->kernel_toc = kernel_toc;
146 new_paca->kernelbase = (unsigned long) _stext;
147 new_paca->kernel_msr = MSR_KERNEL;
148 new_paca->hw_cpu_id = 0xffff;
1fc711f7 149 new_paca->kexec_state = KEXEC_STATE_NONE;
1426d5a3 150 new_paca->__current = &init_task;
91c60b5b 151#ifdef CONFIG_PPC_STD_MMU_64
1426d5a3 152 new_paca->slb_shadow_ptr = &slb_shadow[cpu];
91c60b5b 153#endif /* CONFIG_PPC_STD_MMU_64 */
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154}
155
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156/* Put the paca pointer into r13 and SPRG_PACA */
157void setup_paca(struct paca_struct *new_paca)
158{
2dd60d79 159 /* Setup r13 */
fc53b420 160 local_paca = new_paca;
2dd60d79 161
fc53b420 162#ifdef CONFIG_PPC_BOOK3E
2dd60d79 163 /* On Book3E, initialize the TLB miss exception frames */
fc53b420 164 mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
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165#else
166 /* In HV mode, we setup both HPACA and PACA to avoid problems
167 * if we do a GET_PACA() before the feature fixups have been
168 * applied
169 */
170 if (cpu_has_feature(CPU_FTR_HVMODE_206))
171 mtspr(SPRN_SPRG_HPACA, local_paca);
fc53b420 172#endif
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173 mtspr(SPRN_SPRG_PACA, local_paca);
174
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175}
176
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177static int __initdata paca_size;
178
179void __init allocate_pacas(void)
180{
181 int nr_cpus, cpu, limit;
182
183 /*
184 * We can't take SLB misses on the paca, and we want to access them
185 * in real mode, so allocate them within the RMA and also within
186 * the first segment. On iSeries they must be within the area mapped
187 * by the HV, which is HvPagesToMap * HVPAGESIZE bytes.
188 */
cd3db0c4 189 limit = min(0x10000000ULL, ppc64_rma_size);
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190 if (firmware_has_feature(FW_FEATURE_ISERIES))
191 limit = min(limit, HvPagesToMap * HVPAGESIZE);
192
193 nr_cpus = NR_CPUS;
194 /* On iSeries we know we can never have more than 64 cpus */
195 if (firmware_has_feature(FW_FEATURE_ISERIES))
196 nr_cpus = min(64, nr_cpus);
197
198 paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpus);
199
95f72d1e 200 paca = __va(memblock_alloc_base(paca_size, PAGE_SIZE, limit));
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201 memset(paca, 0, paca_size);
202
203 printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
204 paca_size, nr_cpus, paca);
205
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206 allocate_lppacas(nr_cpus, limit);
207
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208 /* Can't use for_each_*_cpu, as they aren't functional yet */
209 for (cpu = 0; cpu < nr_cpus; cpu++)
210 initialise_paca(&paca[cpu], cpu);
211}
212
213void __init free_unused_pacas(void)
214{
215 int new_size;
216
c1854e00 217 new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
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218
219 if (new_size >= paca_size)
220 return;
221
95f72d1e 222 memblock_free(__pa(paca) + new_size, paca_size - new_size);
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223
224 printk(KERN_DEBUG "Freed %u bytes for unused pacas\n",
225 paca_size - new_size);
90035fe3 226
1426d5a3 227 paca_size = new_size;
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228
229 free_lppacas();
90035fe3 230}
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