[deliverable/linux.git] / arch / powerpc / kernel / pci_32.c

/*
 * Common pmac/prep/chrp pci routines. -- Cort
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/capability.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/bootmem.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/of.h>

#include <asm/processor.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>

#undef DEBUG

unsigned long isa_io_base     = 0;
unsigned long pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;

void pcibios_make_OF_bus_map(void);

static void fixup_broken_pcnet32(struct pci_dev* dev);
static void fixup_cpc710_pci64(struct pci_dev* dev);
#ifdef CONFIG_PPC_OF
static u8* pci_to_OF_bus_map;
#endif

/* By default, we don't re-assign bus numbers. We do this only on
 * some pmacs
 */
static int pci_assign_all_buses;

LIST_HEAD(hose_list);

static int pci_bus_count;

/* This will remain NULL for now, until isa-bridge.c is made common
 * to both 32-bit and 64-bit.
 */
struct pci_dev *isa_bridge_pcidev;
EXPORT_SYMBOL_GPL(isa_bridge_pcidev);

static void
fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
	int i, class = dev->class >> 8;

	if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
	     class == PCI_CLASS_BRIDGE_OTHER) &&
		(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
		(dev->bus->parent == NULL)) {
		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
			dev->resource[i].start = 0;
			dev->resource[i].end = 0;
			dev->resource[i].flags = 0;
		}
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); 
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); 

static void
fixup_broken_pcnet32(struct pci_dev* dev)
{
	if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
		dev->vendor = PCI_VENDOR_ID_AMD;
		pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT,	PCI_ANY_ID,			fixup_broken_pcnet32);

static void
fixup_cpc710_pci64(struct pci_dev* dev)
{
	/* Hide the PCI64 BARs from the kernel as their content doesn't
	 * fit well in the resource management
	 */
	dev->resource[0].start = dev->resource[0].end = 0;
	dev->resource[0].flags = 0;
	dev->resource[1].start = dev->resource[1].end = 0;
	dev->resource[1].flags = 0;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,	PCI_DEVICE_ID_IBM_CPC710_PCI64,	fixup_cpc710_pci64);

#ifdef CONFIG_PPC_OF
/*
 * Functions below are used on OpenFirmware machines.
 */
static void
make_one_node_map(struct device_node* node, u8 pci_bus)
{
	const int *bus_range;
	int len;

	if (pci_bus >= pci_bus_count)
		return;
	bus_range = of_get_property(node, "bus-range", &len);
	if (bus_range == NULL || len < 2 * sizeof(int)) {
		printk(KERN_WARNING "Can't get bus-range for %s, "
		       "assuming it starts at 0\n", node->full_name);
		pci_to_OF_bus_map[pci_bus] = 0;
	} else
		pci_to_OF_bus_map[pci_bus] = bus_range[0];

	for_each_child_of_node(node, node) {
		struct pci_dev* dev;
		const unsigned int *class_code, *reg;
	
		class_code = of_get_property(node, "class-code", NULL);
		if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
			continue;
		reg = of_get_property(node, "reg", NULL);
		if (!reg)
			continue;
		dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
		if (!dev || !dev->subordinate) {
			pci_dev_put(dev);
			continue;
		}
		make_one_node_map(node, dev->subordinate->number);
		pci_dev_put(dev);
	}
}
	
void
pcibios_make_OF_bus_map(void)
{
	int i;
	struct pci_controller *hose, *tmp;
	struct property *map_prop;
	struct device_node *dn;

	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
	if (!pci_to_OF_bus_map) {
		printk(KERN_ERR "Can't allocate OF bus map !\n");
		return;
	}

	/* We fill the bus map with invalid values, that helps
	 * debugging.
	 */
	for (i=0; i<pci_bus_count; i++)
		pci_to_OF_bus_map[i] = 0xff;

	/* For each hose, we begin searching bridges */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		struct device_node* node = hose->dn;

		if (!node)
			continue;
		make_one_node_map(node, hose->first_busno);
	}
	dn = of_find_node_by_path("/");
	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
	if (map_prop) {
		BUG_ON(pci_bus_count > map_prop->length);
		memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	}
	of_node_put(dn);
#ifdef DEBUG
	printk("PCI->OF bus map:\n");
	for (i=0; i<pci_bus_count; i++) {
		if (pci_to_OF_bus_map[i] == 0xff)
			continue;
		printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	}
#endif
}

typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);

static struct device_node*
scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data)
{
	struct device_node *node;
	struct device_node* sub_node;

	for_each_child_of_node(parent, node) {
		const unsigned int *class_code;
	
		if (filter(node, data)) {
			of_node_put(node);
			return node;
		}

		/* For PCI<->PCI bridges or CardBus bridges, we go down
		 * Note: some OFs create a parent node "multifunc-device" as
		 * a fake root for all functions of a multi-function device,
		 * we go down them as well.
		 */
		class_code = of_get_property(node, "class-code", NULL);
		if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
			strcmp(node->name, "multifunc-device"))
			continue;
		sub_node = scan_OF_pci_childs(node, filter, data);
		if (sub_node) {
			of_node_put(node);
			return sub_node;
		}
	}
	return NULL;
}

static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
					       unsigned int devfn)
{
	struct device_node *np;
	const u32 *reg;
	unsigned int psize;

	for_each_child_of_node(parent, np) {
		reg = of_get_property(np, "reg", &psize);
		if (reg == NULL || psize < 4)
			continue;
		if (((reg[0] >> 8) & 0xff) == devfn)
			return np;
	}
	return NULL;
}


static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
{
	struct device_node *parent, *np;

	/* Are we a root bus ? */
	if (bus->self == NULL || bus->parent == NULL) {
		struct pci_controller *hose = pci_bus_to_host(bus);
		if (hose == NULL)
			return NULL;
		return of_node_get(hose->dn);
	}

	/* not a root bus, we need to get our parent */
	parent = scan_OF_for_pci_bus(bus->parent);
	if (parent == NULL)
		return NULL;

	/* now iterate for children for a match */
	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	of_node_put(parent);

	return np;
}

/*
 * Scans the OF tree for a device node matching a PCI device
 */
struct device_node *
pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
{
	struct device_node *parent, *np;

	if (!have_of)
		return NULL;

	pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
	parent = scan_OF_for_pci_bus(bus);
	if (parent == NULL)
		return NULL;
	pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
	np = scan_OF_for_pci_dev(parent, devfn);
	of_node_put(parent);
	pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");

	/* XXX most callers don't release the returned node
	 * mostly because ppc64 doesn't increase the refcount,
	 * we need to fix that.
	 */
	return np;
}
EXPORT_SYMBOL(pci_busdev_to_OF_node);

struct device_node*
pci_device_to_OF_node(struct pci_dev *dev)
{
	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
}
EXPORT_SYMBOL(pci_device_to_OF_node);

static int
find_OF_pci_device_filter(struct device_node* node, void* data)
{
	return ((void *)node == data);
}

/*
 * Returns the PCI device matching a given OF node
 */
int
pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
{
	const unsigned int *reg;
	struct pci_controller* hose;
	struct pci_dev* dev = NULL;
	
	if (!have_of)
		return -ENODEV;
	/* Make sure it's really a PCI device */
	hose = pci_find_hose_for_OF_device(node);
	if (!hose || !hose->dn)
		return -ENODEV;
	if (!scan_OF_pci_childs(hose->dn,
			find_OF_pci_device_filter, (void *)node))
		return -ENODEV;
	reg = of_get_property(node, "reg", NULL);
	if (!reg)
		return -ENODEV;
	*bus = (reg[0] >> 16) & 0xff;
	*devfn = ((reg[0] >> 8) & 0xff);

	/* Ok, here we need some tweak. If we have already renumbered
	 * all busses, we can't rely on the OF bus number any more.
	 * the pci_to_OF_bus_map is not enough as several PCI busses
	 * may match the same OF bus number.
	 */
	if (!pci_to_OF_bus_map)
		return 0;

	for_each_pci_dev(dev)
		if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
				dev->devfn == *devfn) {
			*bus = dev->bus->number;
			pci_dev_put(dev);
			return 0;
		}

	return -ENODEV;
}
EXPORT_SYMBOL(pci_device_from_OF_node);

/* We create the "pci-OF-bus-map" property now so it appears in the
 * /proc device tree
 */
void __init
pci_create_OF_bus_map(void)
{
	struct property* of_prop;
	struct device_node *dn;

	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
	if (!of_prop)
		return;
	dn = of_find_node_by_path("/");
	if (dn) {
		memset(of_prop, -1, sizeof(struct property) + 256);
		of_prop->name = "pci-OF-bus-map";
		of_prop->length = 256;
		of_prop->value = &of_prop[1];
		prom_add_property(dn, of_prop);
		of_node_put(dn);
	}
}

#else /* CONFIG_PPC_OF */
void pcibios_make_OF_bus_map(void)
{
}
#endif /* CONFIG_PPC_OF */

static void __devinit pcibios_scan_phb(struct pci_controller *hose)
{
	struct pci_bus *bus;
	struct device_node *node = hose->dn;
	unsigned long io_offset;
	struct resource *res = &hose->io_resource;

	pr_debug("PCI: Scanning PHB %s\n",
		 node ? node->full_name : "<NO NAME>");

	/* Create an empty bus for the toplevel */
	bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
	if (bus == NULL) {
		printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
		       hose->global_number);
		return;
	}
	bus->secondary = hose->first_busno;
	hose->bus = bus;

	/* Fixup IO space offset */
	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	res->start = (res->start + io_offset) & 0xffffffffu;
	res->end = (res->end + io_offset) & 0xffffffffu;

	/* Wire up PHB bus resources */
	pcibios_setup_phb_resources(hose);

	/* Scan children */
	hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
}

static int __init pcibios_init(void)
{
	struct pci_controller *hose, *tmp;
	int next_busno = 0;

	printk(KERN_INFO "PCI: Probing PCI hardware\n");

	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
		pci_assign_all_buses = 1;

	/* Scan all of the recorded PCI controllers.  */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		if (pci_assign_all_buses)
			hose->first_busno = next_busno;
		hose->last_busno = 0xff;
		pcibios_scan_phb(hose);
		pci_bus_add_devices(hose->bus);
		if (pci_assign_all_buses || next_busno <= hose->last_busno)
			next_busno = hose->last_busno + pcibios_assign_bus_offset;
	}
	pci_bus_count = next_busno;

	/* OpenFirmware based machines need a map of OF bus
	 * numbers vs. kernel bus numbers since we may have to
	 * remap them.
	 */
	if (pci_assign_all_buses && have_of)
		pcibios_make_OF_bus_map();

	/* Call common code to handle resource allocation */
	pcibios_resource_survey();

	/* Call machine dependent post-init code */
	if (ppc_md.pcibios_after_init)
		ppc_md.pcibios_after_init();

	return 0;
}

subsys_initcall(pcibios_init);

/* the next one is stolen from the alpha port... */
void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
{
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
	/* XXX FIXME - update OF device tree node interrupt property */
}

static struct pci_controller*
pci_bus_to_hose(int bus)
{
	struct pci_controller *hose, *tmp;

	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
		if (bus >= hose->first_busno && bus <= hose->last_busno)
			return hose;
	return NULL;
}

/* Provide information on locations of various I/O regions in physical
 * memory.  Do this on a per-card basis so that we choose the right
 * root bridge.
 * Note that the returned IO or memory base is a physical address
 */

long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
{
	struct pci_controller* hose;
	long result = -EOPNOTSUPP;

	hose = pci_bus_to_hose(bus);
	if (!hose)
		return -ENODEV;

	switch (which) {
	case IOBASE_BRIDGE_NUMBER:
		return (long)hose->first_busno;
	case IOBASE_MEMORY:
		return (long)hose->pci_mem_offset;
	case IOBASE_IO:
		return (long)hose->io_base_phys;
	case IOBASE_ISA_IO:
		return (long)isa_io_base;
	case IOBASE_ISA_MEM:
		return (long)isa_mem_base;
	}

	return result;
}

unsigned long pci_address_to_pio(phys_addr_t address)
{
	struct pci_controller *hose, *tmp;

	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		unsigned int size = hose->io_resource.end -
			hose->io_resource.start + 1;
		if (address >= hose->io_base_phys &&
		    address < (hose->io_base_phys + size)) {
			unsigned long base =
				(unsigned long)hose->io_base_virt - _IO_BASE;
			return base + (address - hose->io_base_phys);
		}
	}
	return (unsigned int)-1;
}
EXPORT_SYMBOL(pci_address_to_pio);

/*
 * Null PCI config access functions, for the case when we can't
 * find a hose.
 */
#define NULL_PCI_OP(rw, size, type)					\
static int								\
null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)	\
{									\
	return PCIBIOS_DEVICE_NOT_FOUND;    				\
}

static int
null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
		 int len, u32 *val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static int
null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
		  int len, u32 val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static struct pci_ops null_pci_ops =
{
	.read = null_read_config,
	.write = null_write_config,
};

/*
 * These functions are used early on before PCI scanning is done
 * and all of the pci_dev and pci_bus structures have been created.
 */
static struct pci_bus *
fake_pci_bus(struct pci_controller *hose, int busnr)
{
	static struct pci_bus bus;

	if (hose == 0) {
		hose = pci_bus_to_hose(busnr);
		if (hose == 0)
			printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	}
	bus.number = busnr;
	bus.sysdata = hose;
	bus.ops = hose? hose->ops: &null_pci_ops;
	return &bus;
}

#define EARLY_PCI_OP(rw, size, type)					\
int early_##rw##_config_##size(struct pci_controller *hose, int bus,	\
			       int devfn, int offset, type value)	\
{									\
	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus),	\
					    devfn, offset, value);	\
}

EARLY_PCI_OP(read, byte, u8 *)
EARLY_PCI_OP(read, word, u16 *)
EARLY_PCI_OP(read, dword, u32 *)
EARLY_PCI_OP(write, byte, u8)
EARLY_PCI_OP(write, word, u16)
EARLY_PCI_OP(write, dword, u32)

extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
int early_find_capability(struct pci_controller *hose, int bus, int devfn,
			  int cap)
{
	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
}
Commit	Line	Data
e05b3b4a PM	1	/*
	2	* Common pmac/prep/chrp pci routines. -- Cort
	3	*/
	4
e05b3b4a PM	5	#include <linux/kernel.h>
	6	#include <linux/pci.h>
	7	#include <linux/delay.h>
	8	#include <linux/string.h>
	9	#include <linux/init.h>
	10	#include <linux/capability.h>
	11	#include <linux/sched.h>
	12	#include <linux/errno.h>
	13	#include <linux/bootmem.h>
6e99e458	14	#include <linux/irq.h>
f90bb153	15	#include <linux/list.h>
66524b22	16	#include <linux/of.h>
e05b3b4a PM	17
	18	#include <asm/processor.h>
	19	#include <asm/io.h>
	20	#include <asm/prom.h>
	21	#include <asm/sections.h>
	22	#include <asm/pci-bridge.h>
	23	#include <asm/byteorder.h>
e05b3b4a PM	24	#include <asm/uaccess.h>
	25	#include <asm/machdep.h>
	26
	27	#undef DEBUG
	28
e05b3b4a	29	unsigned long isa_io_base = 0;
e05b3b4a PM	30	unsigned long pci_dram_offset = 0;
	31	int pcibios_assign_bus_offset = 1;
	32
	33	void pcibios_make_OF_bus_map(void);
	34
e05b3b4a	35	static void fixup_broken_pcnet32(struct pci_dev* dev);
e05b3b4a PM	36	static void fixup_cpc710_pci64(struct pci_dev* dev);
	37	#ifdef CONFIG_PPC_OF
	38	static u8* pci_to_OF_bus_map;
	39	#endif
	40
	41	/* By default, we don't re-assign bus numbers. We do this only on
	42	* some pmacs
	43	*/
fc3fb71c	44	static int pci_assign_all_buses;
e05b3b4a	45
a4c9e328	46	LIST_HEAD(hose_list);
e05b3b4a PM	47
	48	static int pci_bus_count;
	49
7b6b574c BH	50	/* This will remain NULL for now, until isa-bridge.c is made common
	51	* to both 32-bit and 64-bit.
	52	*/
	53	struct pci_dev *isa_bridge_pcidev;
	54	EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
	55
2052d6d2	56	static void
4a015c37	57	fixup_hide_host_resource_fsl(struct pci_dev *dev)
2052d6d2 KG	58	{
	59	int i, class = dev->class >> 8;
	60
4a015c37 JR	61	if ((class == PCI_CLASS_PROCESSOR_POWERPC \|\|
4a015c37 JR	62	class == PCI_CLASS_BRIDGE_OTHER) &&
2052d6d2 KG	63	(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
	64	(dev->bus->parent == NULL)) {
	65	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
	66	dev->resource[i].start = 0;
	67	dev->resource[i].end = 0;
	68	dev->resource[i].flags = 0;
	69	}
	70	}
	71	}
	72	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	73	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	74
e05b3b4a PM	75	static void
	76	fixup_broken_pcnet32(struct pci_dev* dev)
	77	{
	78	if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
	79	dev->vendor = PCI_VENDOR_ID_AMD;
	80	pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
	81	}
	82	}
	83	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
	84
	85	static void
	86	fixup_cpc710_pci64(struct pci_dev* dev)
	87	{
	88	/* Hide the PCI64 BARs from the kernel as their content doesn't
	89	* fit well in the resource management
	90	*/
	91	dev->resource[0].start = dev->resource[0].end = 0;
	92	dev->resource[0].flags = 0;
	93	dev->resource[1].start = dev->resource[1].end = 0;
	94	dev->resource[1].flags = 0;
	95	}
	96	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
	97
e05b3b4a PM	98	#ifdef CONFIG_PPC_OF
	99	/*
	100	* Functions below are used on OpenFirmware machines.
	101	*/
	102	static void
	103	make_one_node_map(struct device_node* node, u8 pci_bus)
	104	{
a7f67bdf	105	const int *bus_range;
e05b3b4a PM	106	int len;
	107
	108	if (pci_bus >= pci_bus_count)
	109	return;
e2eb6392	110	bus_range = of_get_property(node, "bus-range", &len);
e05b3b4a PM	111	if (bus_range == NULL \|\| len < 2 * sizeof(int)) {
	112	printk(KERN_WARNING "Can't get bus-range for %s, "
	113	"assuming it starts at 0\n", node->full_name);
	114	pci_to_OF_bus_map[pci_bus] = 0;
	115	} else
	116	pci_to_OF_bus_map[pci_bus] = bus_range[0];
	117
66524b22	118	for_each_child_of_node(node, node) {
e05b3b4a	119	struct pci_dev* dev;
a7f67bdf	120	const unsigned int class_code, reg;
e05b3b4a	121
e2eb6392	122	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	123	if (!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	124	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
	125	continue;
e2eb6392	126	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	127	if (!reg)
e05b3b4a PM	128	continue;
ab462768 AC	129	dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
	130	if (!dev \|\| !dev->subordinate) {
	131	pci_dev_put(dev);
e05b3b4a	132	continue;
ab462768	133	}
e05b3b4a	134	make_one_node_map(node, dev->subordinate->number);
ab462768	135	pci_dev_put(dev);
e05b3b4a PM	136	}
	137	}
	138
	139	void
	140	pcibios_make_OF_bus_map(void)
	141	{
	142	int i;
a4c9e328	143	struct pci_controller hose, tmp;
a7f67bdf	144	struct property *map_prop;
8c8dc322	145	struct device_node *dn;
e05b3b4a	146
5cbded58	147	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
e05b3b4a PM	148	if (!pci_to_OF_bus_map) {
	149	printk(KERN_ERR "Can't allocate OF bus map !\n");
	150	return;
	151	}
	152
	153	/* We fill the bus map with invalid values, that helps
	154	* debugging.
	155	*/
	156	for (i=0; i<pci_bus_count; i++)
	157	pci_to_OF_bus_map[i] = 0xff;
	158
	159	/* For each hose, we begin searching bridges */
a4c9e328	160	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
44ef3390 SR	161	struct device_node* node = hose->dn;
44ef3390 SR	162
e05b3b4a PM	163	if (!node)
	164	continue;
	165	make_one_node_map(node, hose->first_busno);
	166	}
8c8dc322 SR	167	dn = of_find_node_by_path("/");
8c8dc322 SR	168	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
a7f67bdf JK	169	if (map_prop) {
	170	BUG_ON(pci_bus_count > map_prop->length);
	171	memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	172	}
8c8dc322	173	of_node_put(dn);
e05b3b4a PM	174	#ifdef DEBUG
	175	printk("PCI->OF bus map:\n");
	176	for (i=0; i<pci_bus_count; i++) {
	177	if (pci_to_OF_bus_map[i] == 0xff)
	178	continue;
	179	printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	180	}
	181	#endif
	182	}
	183
	184	typedef int (pci_OF_scan_iterator)(struct device_node node, void* data);
	185
	186	static struct device_node*
66524b22	187	scan_OF_pci_childs(struct device_node parent, pci_OF_scan_iterator filter, void data)
e05b3b4a	188	{
66524b22	189	struct device_node *node;
e05b3b4a PM	190	struct device_node* sub_node;
e05b3b4a PM	191
66524b22	192	for_each_child_of_node(parent, node) {
a7f67bdf	193	const unsigned int *class_code;
e05b3b4a	194
66524b22 SR	195	if (filter(node, data)) {
66524b22 SR	196	of_node_put(node);
e05b3b4a	197	return node;
66524b22	198	}
e05b3b4a PM	199
	200	/* For PCI<->PCI bridges or CardBus bridges, we go down
	201	* Note: some OFs create a parent node "multifunc-device" as
	202	* a fake root for all functions of a multi-function device,
	203	* we go down them as well.
	204	*/
e2eb6392	205	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	206	if ((!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	207	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
	208	strcmp(node->name, "multifunc-device"))
	209	continue;
66524b22 SR	210	sub_node = scan_OF_pci_childs(node, filter, data);
	211	if (sub_node) {
	212	of_node_put(node);
e05b3b4a	213	return sub_node;
66524b22	214	}
e05b3b4a PM	215	}
	216	return NULL;
	217	}
	218
dae4828d BH	219	static struct device_node scan_OF_for_pci_dev(struct device_node parent,
dae4828d BH	220	unsigned int devfn)
e05b3b4a	221	{
85e99b9f	222	struct device_node *np;
dae4828d BH	223	const u32 *reg;
	224	unsigned int psize;
	225
85e99b9f	226	for_each_child_of_node(parent, np) {
e2eb6392	227	reg = of_get_property(np, "reg", &psize);
dae4828d BH	228	if (reg == NULL \|\| psize < 4)
	229	continue;
	230	if (((reg[0] >> 8) & 0xff) == devfn)
	231	return np;
	232	}
	233	return NULL;
e05b3b4a PM	234	}
e05b3b4a PM	235
dae4828d BH	236
dae4828d BH	237	static struct device_node scan_OF_for_pci_bus(struct pci_bus bus)
e05b3b4a	238	{
dae4828d BH	239	struct device_node parent, np;
	240
	241	/* Are we a root bus ? */
	242	if (bus->self == NULL \|\| bus->parent == NULL) {
0b1d40c4	243	struct pci_controller *hose = pci_bus_to_host(bus);
dae4828d BH	244	if (hose == NULL)
dae4828d BH	245	return NULL;
44ef3390	246	return of_node_get(hose->dn);
dae4828d BH	247	}
	248
	249	/* not a root bus, we need to get our parent */
	250	parent = scan_OF_for_pci_bus(bus->parent);
	251	if (parent == NULL)
	252	return NULL;
	253
	254	/* now iterate for children for a match */
	255	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	256	of_node_put(parent);
	257
dae4828d	258	return np;
e05b3b4a PM	259	}
	260
	261	/*
	262	* Scans the OF tree for a device node matching a PCI device
	263	*/
	264	struct device_node *
	265	pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
	266	{
dae4828d	267	struct device_node parent, np;
e05b3b4a PM	268
	269	if (!have_of)
	270	return NULL;
e05b3b4a	271
b0494bc8	272	pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
dae4828d BH	273	parent = scan_OF_for_pci_bus(bus);
dae4828d BH	274	if (parent == NULL)
e05b3b4a	275	return NULL;
b0494bc8	276	pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
dae4828d BH	277	np = scan_OF_for_pci_dev(parent, devfn);
dae4828d BH	278	of_node_put(parent);
b0494bc8	279	pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
dae4828d BH	280
	281	/* XXX most callers don't release the returned node
	282	* mostly because ppc64 doesn't increase the refcount,
	283	* we need to fix that.
e05b3b4a	284	*/
dae4828d	285	return np;
e05b3b4a PM	286	}
	287	EXPORT_SYMBOL(pci_busdev_to_OF_node);
	288
	289	struct device_node*
	290	pci_device_to_OF_node(struct pci_dev *dev)
	291	{
	292	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
	293	}
	294	EXPORT_SYMBOL(pci_device_to_OF_node);
	295
e05b3b4a PM	296	static int
	297	find_OF_pci_device_filter(struct device_node* node, void* data)
	298	{
	299	return ((void *)node == data);
	300	}
	301
	302	/*
	303	* Returns the PCI device matching a given OF node
	304	*/
	305	int
	306	pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
	307	{
a7f67bdf	308	const unsigned int *reg;
e05b3b4a PM	309	struct pci_controller* hose;
	310	struct pci_dev* dev = NULL;
	311
	312	if (!have_of)
	313	return -ENODEV;
	314	/* Make sure it's really a PCI device */
	315	hose = pci_find_hose_for_OF_device(node);
44ef3390	316	if (!hose \|\| !hose->dn)
e05b3b4a	317	return -ENODEV;
66524b22	318	if (!scan_OF_pci_childs(hose->dn,
e05b3b4a PM	319	find_OF_pci_device_filter, (void *)node))
e05b3b4a PM	320	return -ENODEV;
e2eb6392	321	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	322	if (!reg)
	323	return -ENODEV;
	324	*bus = (reg[0] >> 16) & 0xff;
	325	*devfn = ((reg[0] >> 8) & 0xff);
	326
	327	/* Ok, here we need some tweak. If we have already renumbered
	328	* all busses, we can't rely on the OF bus number any more.
	329	* the pci_to_OF_bus_map is not enough as several PCI busses
	330	* may match the same OF bus number.
	331	*/
	332	if (!pci_to_OF_bus_map)
	333	return 0;
	334
	335	for_each_pci_dev(dev)
	336	if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
	337	dev->devfn == *devfn) {
	338	*bus = dev->bus->number;
	339	pci_dev_put(dev);
	340	return 0;
	341	}
	342
	343	return -ENODEV;
	344	}
	345	EXPORT_SYMBOL(pci_device_from_OF_node);
	346
e05b3b4a PM	347	/* We create the "pci-OF-bus-map" property now so it appears in the
	348	* /proc device tree
	349	*/
	350	void __init
	351	pci_create_OF_bus_map(void)
	352	{
	353	struct property* of_prop;
8c8dc322 SR	354	struct device_node *dn;
8c8dc322 SR	355
e05b3b4a	356	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
8c8dc322 SR	357	if (!of_prop)
	358	return;
	359	dn = of_find_node_by_path("/");
	360	if (dn) {
e05b3b4a PM	361	memset(of_prop, -1, sizeof(struct property) + 256);
	362	of_prop->name = "pci-OF-bus-map";
	363	of_prop->length = 256;
1a38147e	364	of_prop->value = &of_prop[1];
8c8dc322 SR	365	prom_add_property(dn, of_prop);
8c8dc322 SR	366	of_node_put(dn);
e05b3b4a PM	367	}
	368	}
	369
e05b3b4a PM	370	#else /* CONFIG_PPC_OF */
	371	void pcibios_make_OF_bus_map(void)
	372	{
	373	}
	374	#endif /* CONFIG_PPC_OF */
	375
53280323 BH	376	static void __devinit pcibios_scan_phb(struct pci_controller *hose)
	377	{
	378	struct pci_bus *bus;
	379	struct device_node *node = hose->dn;
	380	unsigned long io_offset;
	381	struct resource *res = &hose->io_resource;
	382
	383	pr_debug("PCI: Scanning PHB %s\n",
	384	node ? node->full_name : "<NO NAME>");
	385
	386	/* Create an empty bus for the toplevel */
	387	bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
	388	if (bus == NULL) {
	389	printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
	390	hose->global_number);
	391	return;
	392	}
	393	bus->secondary = hose->first_busno;
	394	hose->bus = bus;
	395
	396	/* Fixup IO space offset */
	397	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	398	res->start = (res->start + io_offset) & 0xffffffffu;
	399	res->end = (res->end + io_offset) & 0xffffffffu;
	400
	401	/* Wire up PHB bus resources */
	402	pcibios_setup_phb_resources(hose);
	403
	404	/* Scan children */
	405	hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
	406	}
	407
3fd94c6b	408	static int __init pcibios_init(void)
e05b3b4a	409	{
a4c9e328	410	struct pci_controller hose, tmp;
a4c9e328	411	int next_busno = 0;
e05b3b4a PM	412
	413	printk(KERN_INFO "PCI: Probing PCI hardware\n");
	414
fc3fb71c BH	415	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
	416	pci_assign_all_buses = 1;
	417
e05b3b4a	418	/* Scan all of the recorded PCI controllers. */
a4c9e328	419	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
e05b3b4a PM	420	if (pci_assign_all_buses)
	421	hose->first_busno = next_busno;
	422	hose->last_busno = 0xff;
53280323 BH	423	pcibios_scan_phb(hose);
53280323 BH	424	pci_bus_add_devices(hose->bus);
e05b3b4a PM	425	if (pci_assign_all_buses \|\| next_busno <= hose->last_busno)
	426	next_busno = hose->last_busno + pcibios_assign_bus_offset;
	427	}
	428	pci_bus_count = next_busno;
	429
	430	/* OpenFirmware based machines need a map of OF bus
	431	* numbers vs. kernel bus numbers since we may have to
	432	* remap them.
	433	*/
	434	if (pci_assign_all_buses && have_of)
	435	pcibios_make_OF_bus_map();
	436
3fd94c6b BH	437	/* Call common code to handle resource allocation */
3fd94c6b BH	438	pcibios_resource_survey();
e05b3b4a PM	439
	440	/* Call machine dependent post-init code */
	441	if (ppc_md.pcibios_after_init)
	442	ppc_md.pcibios_after_init();
	443
	444	return 0;
	445	}
	446
	447	subsys_initcall(pcibios_init);
	448
e05b3b4a PM	449	/* the next one is stolen from the alpha port... */
	450	void __init
	451	pcibios_update_irq(struct pci_dev *dev, int irq)
	452	{
	453	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
	454	/* XXX FIXME - update OF device tree node interrupt property */
	455	}
	456
0b1d40c4	457	static struct pci_controller*
e05b3b4a PM	458	pci_bus_to_hose(int bus)
e05b3b4a PM	459	{
a4c9e328	460	struct pci_controller hose, tmp;
e05b3b4a	461
a4c9e328	462	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
e05b3b4a PM	463	if (bus >= hose->first_busno && bus <= hose->last_busno)
	464	return hose;
	465	return NULL;
	466	}
	467
e05b3b4a PM	468	/* Provide information on locations of various I/O regions in physical
	469	* memory. Do this on a per-card basis so that we choose the right
	470	* root bridge.
	471	* Note that the returned IO or memory base is a physical address
	472	*/
	473
	474	long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
	475	{
	476	struct pci_controller* hose;
	477	long result = -EOPNOTSUPP;
	478
e05b3b4a PM	479	hose = pci_bus_to_hose(bus);
	480	if (!hose)
	481	return -ENODEV;
	482
	483	switch (which) {
	484	case IOBASE_BRIDGE_NUMBER:
	485	return (long)hose->first_busno;
	486	case IOBASE_MEMORY:
	487	return (long)hose->pci_mem_offset;
	488	case IOBASE_IO:
	489	return (long)hose->io_base_phys;
	490	case IOBASE_ISA_IO:
	491	return (long)isa_io_base;
	492	case IOBASE_ISA_MEM:
	493	return (long)isa_mem_base;
	494	}
	495
	496	return result;
	497	}
	498
e05b3b4a PM	499	unsigned long pci_address_to_pio(phys_addr_t address)
e05b3b4a PM	500	{
a4c9e328	501	struct pci_controller hose, tmp;
e05b3b4a	502
a4c9e328	503	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
e05b3b4a PM	504	unsigned int size = hose->io_resource.end -
	505	hose->io_resource.start + 1;
	506	if (address >= hose->io_base_phys &&
	507	address < (hose->io_base_phys + size)) {
	508	unsigned long base =
	509	(unsigned long)hose->io_base_virt - _IO_BASE;
	510	return base + (address - hose->io_base_phys);
	511	}
	512	}
	513	return (unsigned int)-1;
	514	}
	515	EXPORT_SYMBOL(pci_address_to_pio);
	516
	517	/*
	518	* Null PCI config access functions, for the case when we can't
	519	* find a hose.
	520	*/
	521	#define NULL_PCI_OP(rw, size, type) \
	522	static int \
	523	null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
	524	{ \
	525	return PCIBIOS_DEVICE_NOT_FOUND; \
	526	}
	527
	528	static int
	529	null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
	530	int len, u32 *val)
	531	{
	532	return PCIBIOS_DEVICE_NOT_FOUND;
	533	}
	534
	535	static int
	536	null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
	537	int len, u32 val)
	538	{
	539	return PCIBIOS_DEVICE_NOT_FOUND;
	540	}
	541
	542	static struct pci_ops null_pci_ops =
	543	{
6127d1c0 NL	544	.read = null_read_config,
6127d1c0 NL	545	.write = null_write_config,
e05b3b4a PM	546	};
	547
	548	/*
	549	* These functions are used early on before PCI scanning is done
	550	* and all of the pci_dev and pci_bus structures have been created.
	551	*/
	552	static struct pci_bus *
	553	fake_pci_bus(struct pci_controller *hose, int busnr)
	554	{
	555	static struct pci_bus bus;
	556
	557	if (hose == 0) {
	558	hose = pci_bus_to_hose(busnr);
	559	if (hose == 0)
	560	printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	561	}
	562	bus.number = busnr;
	563	bus.sysdata = hose;
	564	bus.ops = hose? hose->ops: &null_pci_ops;
	565	return &bus;
	566	}
	567
	568	#define EARLY_PCI_OP(rw, size, type) \
	569	int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
	570	int devfn, int offset, type value) \
	571	{ \
	572	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
	573	devfn, offset, value); \
	574	}
	575
	576	EARLY_PCI_OP(read, byte, u8 *)
	577	EARLY_PCI_OP(read, word, u16 *)
	578	EARLY_PCI_OP(read, dword, u32 *)
	579	EARLY_PCI_OP(write, byte, u8)
	580	EARLY_PCI_OP(write, word, u16)
	581	EARLY_PCI_OP(write, dword, u32)
38805e5f KG	582
	583	extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
	584	int early_find_capability(struct pci_controller *hose, int bus, int devfn,
	585	int cap)
	586	{
	587	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
	588	}