[deliverable/linux.git] / arch / powerpc / kernel / pci_32.c

/*
 * Common pmac/prep/chrp pci routines. -- Cort
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/capability.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/bootmem.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/of.h>

#include <asm/processor.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>

#undef DEBUG

#ifdef DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif

unsigned long isa_io_base     = 0;
unsigned long pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;

void pcibios_make_OF_bus_map(void);

static void fixup_broken_pcnet32(struct pci_dev* dev);
static void fixup_cpc710_pci64(struct pci_dev* dev);
#ifdef CONFIG_PPC_OF
static u8* pci_to_OF_bus_map;
#endif

/* By default, we don't re-assign bus numbers. We do this only on
 * some pmacs
 */
static int pci_assign_all_buses;

LIST_HEAD(hose_list);

static int pci_bus_count;

/* This will remain NULL for now, until isa-bridge.c is made common
 * to both 32-bit and 64-bit.
 */
struct pci_dev *isa_bridge_pcidev;
EXPORT_SYMBOL_GPL(isa_bridge_pcidev);

static void
fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
	int i, class = dev->class >> 8;

	if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
	     class == PCI_CLASS_BRIDGE_OTHER) &&
		(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
		(dev->bus->parent == NULL)) {
		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
			dev->resource[i].start = 0;
			dev->resource[i].end = 0;
			dev->resource[i].flags = 0;
		}
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); 
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); 

static void
fixup_broken_pcnet32(struct pci_dev* dev)
{
	if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
		dev->vendor = PCI_VENDOR_ID_AMD;
		pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT,	PCI_ANY_ID,			fixup_broken_pcnet32);

static void
fixup_cpc710_pci64(struct pci_dev* dev)
{
	/* Hide the PCI64 BARs from the kernel as their content doesn't
	 * fit well in the resource management
	 */
	dev->resource[0].start = dev->resource[0].end = 0;
	dev->resource[0].flags = 0;
	dev->resource[1].start = dev->resource[1].end = 0;
	dev->resource[1].flags = 0;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,	PCI_DEVICE_ID_IBM_CPC710_PCI64,	fixup_cpc710_pci64);

#ifdef CONFIG_PPC_OF
/*
 * Functions below are used on OpenFirmware machines.
 */
static void
make_one_node_map(struct device_node* node, u8 pci_bus)
{
	const int *bus_range;
	int len;

	if (pci_bus >= pci_bus_count)
		return;
	bus_range = of_get_property(node, "bus-range", &len);
	if (bus_range == NULL || len < 2 * sizeof(int)) {
		printk(KERN_WARNING "Can't get bus-range for %s, "
		       "assuming it starts at 0\n", node->full_name);
		pci_to_OF_bus_map[pci_bus] = 0;
	} else
		pci_to_OF_bus_map[pci_bus] = bus_range[0];

	for_each_child_of_node(node, node) {
		struct pci_dev* dev;
		const unsigned int *class_code, *reg;
	
		class_code = of_get_property(node, "class-code", NULL);
		if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
			continue;
		reg = of_get_property(node, "reg", NULL);
		if (!reg)
			continue;
		dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
		if (!dev || !dev->subordinate) {
			pci_dev_put(dev);
			continue;
		}
		make_one_node_map(node, dev->subordinate->number);
		pci_dev_put(dev);
	}
}
	
void
pcibios_make_OF_bus_map(void)
{
	int i;
	struct pci_controller *hose, *tmp;
	struct property *map_prop;
	struct device_node *dn;

	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
	if (!pci_to_OF_bus_map) {
		printk(KERN_ERR "Can't allocate OF bus map !\n");
		return;
	}

	/* We fill the bus map with invalid values, that helps
	 * debugging.
	 */
	for (i=0; i<pci_bus_count; i++)
		pci_to_OF_bus_map[i] = 0xff;

	/* For each hose, we begin searching bridges */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		struct device_node* node = hose->dn;

		if (!node)
			continue;
		make_one_node_map(node, hose->first_busno);
	}
	dn = of_find_node_by_path("/");
	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
	if (map_prop) {
		BUG_ON(pci_bus_count > map_prop->length);
		memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	}
	of_node_put(dn);
#ifdef DEBUG
	printk("PCI->OF bus map:\n");
	for (i=0; i<pci_bus_count; i++) {
		if (pci_to_OF_bus_map[i] == 0xff)
			continue;
		printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	}
#endif
}

typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);

static struct device_node*
scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data)
{
	struct device_node *node;
	struct device_node* sub_node;

	for_each_child_of_node(parent, node) {
		const unsigned int *class_code;
	
		if (filter(node, data)) {
			of_node_put(node);
			return node;
		}

		/* For PCI<->PCI bridges or CardBus bridges, we go down
		 * Note: some OFs create a parent node "multifunc-device" as
		 * a fake root for all functions of a multi-function device,
		 * we go down them as well.
		 */
		class_code = of_get_property(node, "class-code", NULL);
		if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
			strcmp(node->name, "multifunc-device"))
			continue;
		sub_node = scan_OF_pci_childs(node, filter, data);
		if (sub_node) {
			of_node_put(node);
			return sub_node;
		}
	}
	return NULL;
}

static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
					       unsigned int devfn)
{
	struct device_node *np;
	const u32 *reg;
	unsigned int psize;

	for_each_child_of_node(parent, np) {
		reg = of_get_property(np, "reg", &psize);
		if (reg == NULL || psize < 4)
			continue;
		if (((reg[0] >> 8) & 0xff) == devfn)
			return np;
	}
	return NULL;
}


static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
{
	struct device_node *parent, *np;

	/* Are we a root bus ? */
	if (bus->self == NULL || bus->parent == NULL) {
		struct pci_controller *hose = pci_bus_to_host(bus);
		if (hose == NULL)
			return NULL;
		return of_node_get(hose->dn);
	}

	/* not a root bus, we need to get our parent */
	parent = scan_OF_for_pci_bus(bus->parent);
	if (parent == NULL)
		return NULL;

	/* now iterate for children for a match */
	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	of_node_put(parent);

	return np;
}

/*
 * Scans the OF tree for a device node matching a PCI device
 */
struct device_node *
pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
{
	struct device_node *parent, *np;

	if (!have_of)
		return NULL;

	DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
	parent = scan_OF_for_pci_bus(bus);
	if (parent == NULL)
		return NULL;
	DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>");
	np = scan_OF_for_pci_dev(parent, devfn);
	of_node_put(parent);
	DBG(" result is %s\n", np ? np->full_name : "<NULL>");

	/* XXX most callers don't release the returned node
	 * mostly because ppc64 doesn't increase the refcount,
	 * we need to fix that.
	 */
	return np;
}
EXPORT_SYMBOL(pci_busdev_to_OF_node);

struct device_node*
pci_device_to_OF_node(struct pci_dev *dev)
{
	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
}
EXPORT_SYMBOL(pci_device_to_OF_node);

static int
find_OF_pci_device_filter(struct device_node* node, void* data)
{
	return ((void *)node == data);
}

/*
 * Returns the PCI device matching a given OF node
 */
int
pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
{
	const unsigned int *reg;
	struct pci_controller* hose;
	struct pci_dev* dev = NULL;
	
	if (!have_of)
		return -ENODEV;
	/* Make sure it's really a PCI device */
	hose = pci_find_hose_for_OF_device(node);
	if (!hose || !hose->dn)
		return -ENODEV;
	if (!scan_OF_pci_childs(hose->dn,
			find_OF_pci_device_filter, (void *)node))
		return -ENODEV;
	reg = of_get_property(node, "reg", NULL);
	if (!reg)
		return -ENODEV;
	*bus = (reg[0] >> 16) & 0xff;
	*devfn = ((reg[0] >> 8) & 0xff);

	/* Ok, here we need some tweak. If we have already renumbered
	 * all busses, we can't rely on the OF bus number any more.
	 * the pci_to_OF_bus_map is not enough as several PCI busses
	 * may match the same OF bus number.
	 */
	if (!pci_to_OF_bus_map)
		return 0;

	for_each_pci_dev(dev)
		if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
				dev->devfn == *devfn) {
			*bus = dev->bus->number;
			pci_dev_put(dev);
			return 0;
		}

	return -ENODEV;
}
EXPORT_SYMBOL(pci_device_from_OF_node);

/* We create the "pci-OF-bus-map" property now so it appears in the
 * /proc device tree
 */
void __init
pci_create_OF_bus_map(void)
{
	struct property* of_prop;
	struct device_node *dn;

	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
	if (!of_prop)
		return;
	dn = of_find_node_by_path("/");
	if (dn) {
		memset(of_prop, -1, sizeof(struct property) + 256);
		of_prop->name = "pci-OF-bus-map";
		of_prop->length = 256;
		of_prop->value = &of_prop[1];
		prom_add_property(dn, of_prop);
		of_node_put(dn);
	}
}

#else /* CONFIG_PPC_OF */
void pcibios_make_OF_bus_map(void)
{
}
#endif /* CONFIG_PPC_OF */

static int __init pcibios_init(void)
{
	struct pci_controller *hose, *tmp;
	struct pci_bus *bus;
	int next_busno = 0;

	printk(KERN_INFO "PCI: Probing PCI hardware\n");

	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
		pci_assign_all_buses = 1;

	/* Scan all of the recorded PCI controllers.  */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		if (pci_assign_all_buses)
			hose->first_busno = next_busno;
		hose->last_busno = 0xff;
		bus = pci_scan_bus_parented(hose->parent, hose->first_busno,
					    hose->ops, hose);
		if (bus) {
			pci_bus_add_devices(bus);
			hose->last_busno = bus->subordinate;
		}
		if (pci_assign_all_buses || next_busno <= hose->last_busno)
			next_busno = hose->last_busno + pcibios_assign_bus_offset;
	}
	pci_bus_count = next_busno;

	/* OpenFirmware based machines need a map of OF bus
	 * numbers vs. kernel bus numbers since we may have to
	 * remap them.
	 */
	if (pci_assign_all_buses && have_of)
		pcibios_make_OF_bus_map();

	/* Call common code to handle resource allocation */
	pcibios_resource_survey();

	/* Call machine dependent post-init code */
	if (ppc_md.pcibios_after_init)
		ppc_md.pcibios_after_init();

	return 0;
}

subsys_initcall(pcibios_init);

void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
{
	struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
	unsigned long io_offset;
	struct resource *res;
	int i;
	struct pci_dev *dev;

	/* Hookup PHB resources */
	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	if (bus->parent == NULL) {
		/* This is a host bridge - fill in its resources */
		hose->bus = bus;

		bus->resource[0] = res = &hose->io_resource;
		if (!res->flags) {
			if (io_offset)
				printk(KERN_ERR "I/O resource not set for host"
				       " bridge %d\n", hose->global_number);
			res->start = 0;
			res->end = IO_SPACE_LIMIT;
			res->flags = IORESOURCE_IO;
		}
		res->start = (res->start + io_offset) & 0xffffffffu;
		res->end = (res->end + io_offset) & 0xffffffffu;

		for (i = 0; i < 3; ++i) {
			res = &hose->mem_resources[i];
			if (!res->flags) {
				if (i > 0)
					continue;
				printk(KERN_ERR "Memory resource not set for "
				       "host bridge %d\n", hose->global_number);
				res->start = hose->pci_mem_offset;
				res->end = ~0U;
				res->flags = IORESOURCE_MEM;
			}
			bus->resource[i+1] = res;
		}
	}

	if (ppc_md.pci_dma_bus_setup)
		ppc_md.pci_dma_bus_setup(bus);

	list_for_each_entry(dev, &bus->devices, bus_list)
		pcibios_setup_new_device(dev);
}

/* the next one is stolen from the alpha port... */
void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
{
	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
	/* XXX FIXME - update OF device tree node interrupt property */
}

static struct pci_controller*
pci_bus_to_hose(int bus)
{
	struct pci_controller *hose, *tmp;

	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
		if (bus >= hose->first_busno && bus <= hose->last_busno)
			return hose;
	return NULL;
}

/* Provide information on locations of various I/O regions in physical
 * memory.  Do this on a per-card basis so that we choose the right
 * root bridge.
 * Note that the returned IO or memory base is a physical address
 */

long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
{
	struct pci_controller* hose;
	long result = -EOPNOTSUPP;

	hose = pci_bus_to_hose(bus);
	if (!hose)
		return -ENODEV;

	switch (which) {
	case IOBASE_BRIDGE_NUMBER:
		return (long)hose->first_busno;
	case IOBASE_MEMORY:
		return (long)hose->pci_mem_offset;
	case IOBASE_IO:
		return (long)hose->io_base_phys;
	case IOBASE_ISA_IO:
		return (long)isa_io_base;
	case IOBASE_ISA_MEM:
		return (long)isa_mem_base;
	}

	return result;
}

unsigned long pci_address_to_pio(phys_addr_t address)
{
	struct pci_controller *hose, *tmp;

	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		unsigned int size = hose->io_resource.end -
			hose->io_resource.start + 1;
		if (address >= hose->io_base_phys &&
		    address < (hose->io_base_phys + size)) {
			unsigned long base =
				(unsigned long)hose->io_base_virt - _IO_BASE;
			return base + (address - hose->io_base_phys);
		}
	}
	return (unsigned int)-1;
}
EXPORT_SYMBOL(pci_address_to_pio);

/*
 * Null PCI config access functions, for the case when we can't
 * find a hose.
 */
#define NULL_PCI_OP(rw, size, type)					\
static int								\
null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)	\
{									\
	return PCIBIOS_DEVICE_NOT_FOUND;    				\
}

static int
null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
		 int len, u32 *val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static int
null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
		  int len, u32 val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static struct pci_ops null_pci_ops =
{
	.read = null_read_config,
	.write = null_write_config,
};

/*
 * These functions are used early on before PCI scanning is done
 * and all of the pci_dev and pci_bus structures have been created.
 */
static struct pci_bus *
fake_pci_bus(struct pci_controller *hose, int busnr)
{
	static struct pci_bus bus;

	if (hose == 0) {
		hose = pci_bus_to_hose(busnr);
		if (hose == 0)
			printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	}
	bus.number = busnr;
	bus.sysdata = hose;
	bus.ops = hose? hose->ops: &null_pci_ops;
	return &bus;
}

#define EARLY_PCI_OP(rw, size, type)					\
int early_##rw##_config_##size(struct pci_controller *hose, int bus,	\
			       int devfn, int offset, type value)	\
{									\
	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus),	\
					    devfn, offset, value);	\
}

EARLY_PCI_OP(read, byte, u8 *)
EARLY_PCI_OP(read, word, u16 *)
EARLY_PCI_OP(read, dword, u32 *)
EARLY_PCI_OP(write, byte, u8)
EARLY_PCI_OP(write, word, u16)
EARLY_PCI_OP(write, dword, u32)

extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
int early_find_capability(struct pci_controller *hose, int bus, int devfn,
			  int cap)
{
	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
}
Commit	Line	Data
e05b3b4a PM	1	/*
	2	* Common pmac/prep/chrp pci routines. -- Cort
	3	*/
	4
e05b3b4a PM	5	#include <linux/kernel.h>
	6	#include <linux/pci.h>
	7	#include <linux/delay.h>
	8	#include <linux/string.h>
	9	#include <linux/init.h>
	10	#include <linux/capability.h>
	11	#include <linux/sched.h>
	12	#include <linux/errno.h>
	13	#include <linux/bootmem.h>
6e99e458	14	#include <linux/irq.h>
f90bb153	15	#include <linux/list.h>
66524b22	16	#include <linux/of.h>
e05b3b4a PM	17
	18	#include <asm/processor.h>
	19	#include <asm/io.h>
	20	#include <asm/prom.h>
	21	#include <asm/sections.h>
	22	#include <asm/pci-bridge.h>
	23	#include <asm/byteorder.h>
e05b3b4a PM	24	#include <asm/uaccess.h>
	25	#include <asm/machdep.h>
	26
	27	#undef DEBUG
	28
	29	#ifdef DEBUG
	30	#define DBG(x...) printk(x)
	31	#else
	32	#define DBG(x...)
	33	#endif
	34
	35	unsigned long isa_io_base = 0;
e05b3b4a PM	36	unsigned long pci_dram_offset = 0;
	37	int pcibios_assign_bus_offset = 1;
	38
	39	void pcibios_make_OF_bus_map(void);
	40
e05b3b4a	41	static void fixup_broken_pcnet32(struct pci_dev* dev);
e05b3b4a PM	42	static void fixup_cpc710_pci64(struct pci_dev* dev);
	43	#ifdef CONFIG_PPC_OF
	44	static u8* pci_to_OF_bus_map;
	45	#endif
	46
	47	/* By default, we don't re-assign bus numbers. We do this only on
	48	* some pmacs
	49	*/
fc3fb71c	50	static int pci_assign_all_buses;
e05b3b4a	51
a4c9e328	52	LIST_HEAD(hose_list);
e05b3b4a PM	53
	54	static int pci_bus_count;
	55
7b6b574c BH	56	/* This will remain NULL for now, until isa-bridge.c is made common
	57	* to both 32-bit and 64-bit.
	58	*/
	59	struct pci_dev *isa_bridge_pcidev;
	60	EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
	61
2052d6d2	62	static void
4a015c37	63	fixup_hide_host_resource_fsl(struct pci_dev *dev)
2052d6d2 KG	64	{
	65	int i, class = dev->class >> 8;
	66
4a015c37 JR	67	if ((class == PCI_CLASS_PROCESSOR_POWERPC \|\|
4a015c37 JR	68	class == PCI_CLASS_BRIDGE_OTHER) &&
2052d6d2 KG	69	(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
	70	(dev->bus->parent == NULL)) {
	71	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
	72	dev->resource[i].start = 0;
	73	dev->resource[i].end = 0;
	74	dev->resource[i].flags = 0;
	75	}
	76	}
	77	}
	78	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	79	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	80
e05b3b4a PM	81	static void
	82	fixup_broken_pcnet32(struct pci_dev* dev)
	83	{
	84	if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
	85	dev->vendor = PCI_VENDOR_ID_AMD;
	86	pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
	87	}
	88	}
	89	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
	90
	91	static void
	92	fixup_cpc710_pci64(struct pci_dev* dev)
	93	{
	94	/* Hide the PCI64 BARs from the kernel as their content doesn't
	95	* fit well in the resource management
	96	*/
	97	dev->resource[0].start = dev->resource[0].end = 0;
	98	dev->resource[0].flags = 0;
	99	dev->resource[1].start = dev->resource[1].end = 0;
	100	dev->resource[1].flags = 0;
	101	}
	102	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
	103
e05b3b4a PM	104	#ifdef CONFIG_PPC_OF
	105	/*
	106	* Functions below are used on OpenFirmware machines.
	107	*/
	108	static void
	109	make_one_node_map(struct device_node* node, u8 pci_bus)
	110	{
a7f67bdf	111	const int *bus_range;
e05b3b4a PM	112	int len;
	113
	114	if (pci_bus >= pci_bus_count)
	115	return;
e2eb6392	116	bus_range = of_get_property(node, "bus-range", &len);
e05b3b4a PM	117	if (bus_range == NULL \|\| len < 2 * sizeof(int)) {
	118	printk(KERN_WARNING "Can't get bus-range for %s, "
	119	"assuming it starts at 0\n", node->full_name);
	120	pci_to_OF_bus_map[pci_bus] = 0;
	121	} else
	122	pci_to_OF_bus_map[pci_bus] = bus_range[0];
	123
66524b22	124	for_each_child_of_node(node, node) {
e05b3b4a	125	struct pci_dev* dev;
a7f67bdf	126	const unsigned int class_code, reg;
e05b3b4a	127
e2eb6392	128	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	129	if (!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	130	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
	131	continue;
e2eb6392	132	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	133	if (!reg)
e05b3b4a PM	134	continue;
ab462768 AC	135	dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
	136	if (!dev \|\| !dev->subordinate) {
	137	pci_dev_put(dev);
e05b3b4a	138	continue;
ab462768	139	}
e05b3b4a	140	make_one_node_map(node, dev->subordinate->number);
ab462768	141	pci_dev_put(dev);
e05b3b4a PM	142	}
	143	}
	144
	145	void
	146	pcibios_make_OF_bus_map(void)
	147	{
	148	int i;
a4c9e328	149	struct pci_controller hose, tmp;
a7f67bdf	150	struct property *map_prop;
8c8dc322	151	struct device_node *dn;
e05b3b4a	152
5cbded58	153	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
e05b3b4a PM	154	if (!pci_to_OF_bus_map) {
	155	printk(KERN_ERR "Can't allocate OF bus map !\n");
	156	return;
	157	}
	158
	159	/* We fill the bus map with invalid values, that helps
	160	* debugging.
	161	*/
	162	for (i=0; i<pci_bus_count; i++)
	163	pci_to_OF_bus_map[i] = 0xff;
	164
	165	/* For each hose, we begin searching bridges */
a4c9e328	166	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
44ef3390 SR	167	struct device_node* node = hose->dn;
44ef3390 SR	168
e05b3b4a PM	169	if (!node)
	170	continue;
	171	make_one_node_map(node, hose->first_busno);
	172	}
8c8dc322 SR	173	dn = of_find_node_by_path("/");
8c8dc322 SR	174	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
a7f67bdf JK	175	if (map_prop) {
	176	BUG_ON(pci_bus_count > map_prop->length);
	177	memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	178	}
8c8dc322	179	of_node_put(dn);
e05b3b4a PM	180	#ifdef DEBUG
	181	printk("PCI->OF bus map:\n");
	182	for (i=0; i<pci_bus_count; i++) {
	183	if (pci_to_OF_bus_map[i] == 0xff)
	184	continue;
	185	printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	186	}
	187	#endif
	188	}
	189
	190	typedef int (pci_OF_scan_iterator)(struct device_node node, void* data);
	191
	192	static struct device_node*
66524b22	193	scan_OF_pci_childs(struct device_node parent, pci_OF_scan_iterator filter, void data)
e05b3b4a	194	{
66524b22	195	struct device_node *node;
e05b3b4a PM	196	struct device_node* sub_node;
e05b3b4a PM	197
66524b22	198	for_each_child_of_node(parent, node) {
a7f67bdf	199	const unsigned int *class_code;
e05b3b4a	200
66524b22 SR	201	if (filter(node, data)) {
66524b22 SR	202	of_node_put(node);
e05b3b4a	203	return node;
66524b22	204	}
e05b3b4a PM	205
	206	/* For PCI<->PCI bridges or CardBus bridges, we go down
	207	* Note: some OFs create a parent node "multifunc-device" as
	208	* a fake root for all functions of a multi-function device,
	209	* we go down them as well.
	210	*/
e2eb6392	211	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	212	if ((!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	213	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
	214	strcmp(node->name, "multifunc-device"))
	215	continue;
66524b22 SR	216	sub_node = scan_OF_pci_childs(node, filter, data);
	217	if (sub_node) {
	218	of_node_put(node);
e05b3b4a	219	return sub_node;
66524b22	220	}
e05b3b4a PM	221	}
	222	return NULL;
	223	}
	224
dae4828d BH	225	static struct device_node scan_OF_for_pci_dev(struct device_node parent,
dae4828d BH	226	unsigned int devfn)
e05b3b4a	227	{
85e99b9f	228	struct device_node *np;
dae4828d BH	229	const u32 *reg;
	230	unsigned int psize;
	231
85e99b9f	232	for_each_child_of_node(parent, np) {
e2eb6392	233	reg = of_get_property(np, "reg", &psize);
dae4828d BH	234	if (reg == NULL \|\| psize < 4)
	235	continue;
	236	if (((reg[0] >> 8) & 0xff) == devfn)
	237	return np;
	238	}
	239	return NULL;
e05b3b4a PM	240	}
e05b3b4a PM	241
dae4828d BH	242
dae4828d BH	243	static struct device_node scan_OF_for_pci_bus(struct pci_bus bus)
e05b3b4a	244	{
dae4828d BH	245	struct device_node parent, np;
	246
	247	/* Are we a root bus ? */
	248	if (bus->self == NULL \|\| bus->parent == NULL) {
0b1d40c4	249	struct pci_controller *hose = pci_bus_to_host(bus);
dae4828d BH	250	if (hose == NULL)
dae4828d BH	251	return NULL;
44ef3390	252	return of_node_get(hose->dn);
dae4828d BH	253	}
	254
	255	/* not a root bus, we need to get our parent */
	256	parent = scan_OF_for_pci_bus(bus->parent);
	257	if (parent == NULL)
	258	return NULL;
	259
	260	/* now iterate for children for a match */
	261	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	262	of_node_put(parent);
	263
dae4828d	264	return np;
e05b3b4a PM	265	}
	266
	267	/*
	268	* Scans the OF tree for a device node matching a PCI device
	269	*/
	270	struct device_node *
	271	pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
	272	{
dae4828d	273	struct device_node parent, np;
e05b3b4a PM	274
	275	if (!have_of)
	276	return NULL;
e05b3b4a	277
dae4828d BH	278	DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
	279	parent = scan_OF_for_pci_bus(bus);
	280	if (parent == NULL)
e05b3b4a	281	return NULL;
dae4828d BH	282	DBG(" parent is %s\n", parent ? parent->full_name : "<NULL>");
	283	np = scan_OF_for_pci_dev(parent, devfn);
	284	of_node_put(parent);
	285	DBG(" result is %s\n", np ? np->full_name : "<NULL>");
	286
	287	/* XXX most callers don't release the returned node
	288	* mostly because ppc64 doesn't increase the refcount,
	289	* we need to fix that.
e05b3b4a	290	*/
dae4828d	291	return np;
e05b3b4a PM	292	}
	293	EXPORT_SYMBOL(pci_busdev_to_OF_node);
	294
	295	struct device_node*
	296	pci_device_to_OF_node(struct pci_dev *dev)
	297	{
	298	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
	299	}
	300	EXPORT_SYMBOL(pci_device_to_OF_node);
	301
e05b3b4a PM	302	static int
	303	find_OF_pci_device_filter(struct device_node* node, void* data)
	304	{
	305	return ((void *)node == data);
	306	}
	307
	308	/*
	309	* Returns the PCI device matching a given OF node
	310	*/
	311	int
	312	pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
	313	{
a7f67bdf	314	const unsigned int *reg;
e05b3b4a PM	315	struct pci_controller* hose;
	316	struct pci_dev* dev = NULL;
	317
	318	if (!have_of)
	319	return -ENODEV;
	320	/* Make sure it's really a PCI device */
	321	hose = pci_find_hose_for_OF_device(node);
44ef3390	322	if (!hose \|\| !hose->dn)
e05b3b4a	323	return -ENODEV;
66524b22	324	if (!scan_OF_pci_childs(hose->dn,
e05b3b4a PM	325	find_OF_pci_device_filter, (void *)node))
e05b3b4a PM	326	return -ENODEV;
e2eb6392	327	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	328	if (!reg)
	329	return -ENODEV;
	330	*bus = (reg[0] >> 16) & 0xff;
	331	*devfn = ((reg[0] >> 8) & 0xff);
	332
	333	/* Ok, here we need some tweak. If we have already renumbered
	334	* all busses, we can't rely on the OF bus number any more.
	335	* the pci_to_OF_bus_map is not enough as several PCI busses
	336	* may match the same OF bus number.
	337	*/
	338	if (!pci_to_OF_bus_map)
	339	return 0;
	340
	341	for_each_pci_dev(dev)
	342	if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
	343	dev->devfn == *devfn) {
	344	*bus = dev->bus->number;
	345	pci_dev_put(dev);
	346	return 0;
	347	}
	348
	349	return -ENODEV;
	350	}
	351	EXPORT_SYMBOL(pci_device_from_OF_node);
	352
e05b3b4a PM	353	/* We create the "pci-OF-bus-map" property now so it appears in the
	354	* /proc device tree
	355	*/
	356	void __init
	357	pci_create_OF_bus_map(void)
	358	{
	359	struct property* of_prop;
8c8dc322 SR	360	struct device_node *dn;
8c8dc322 SR	361
e05b3b4a	362	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
8c8dc322 SR	363	if (!of_prop)
	364	return;
	365	dn = of_find_node_by_path("/");
	366	if (dn) {
e05b3b4a PM	367	memset(of_prop, -1, sizeof(struct property) + 256);
	368	of_prop->name = "pci-OF-bus-map";
	369	of_prop->length = 256;
1a38147e	370	of_prop->value = &of_prop[1];
8c8dc322 SR	371	prom_add_property(dn, of_prop);
8c8dc322 SR	372	of_node_put(dn);
e05b3b4a PM	373	}
	374	}
	375
e05b3b4a PM	376	#else /* CONFIG_PPC_OF */
	377	void pcibios_make_OF_bus_map(void)
	378	{
	379	}
	380	#endif /* CONFIG_PPC_OF */
	381
3fd94c6b	382	static int __init pcibios_init(void)
e05b3b4a	383	{
a4c9e328	384	struct pci_controller hose, tmp;
e05b3b4a	385	struct pci_bus *bus;
a4c9e328	386	int next_busno = 0;
e05b3b4a PM	387
	388	printk(KERN_INFO "PCI: Probing PCI hardware\n");
	389
fc3fb71c BH	390	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
	391	pci_assign_all_buses = 1;
	392
e05b3b4a	393	/* Scan all of the recorded PCI controllers. */
a4c9e328	394	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
e05b3b4a PM	395	if (pci_assign_all_buses)
	396	hose->first_busno = next_busno;
	397	hose->last_busno = 0xff;
803d4573 BH	398	bus = pci_scan_bus_parented(hose->parent, hose->first_busno,
803d4573 BH	399	hose->ops, hose);
b1b166b7	400	if (bus) {
803d4573	401	pci_bus_add_devices(bus);
b1b166b7 BH	402	hose->last_busno = bus->subordinate;
b1b166b7 BH	403	}
e05b3b4a PM	404	if (pci_assign_all_buses \|\| next_busno <= hose->last_busno)
	405	next_busno = hose->last_busno + pcibios_assign_bus_offset;
	406	}
	407	pci_bus_count = next_busno;
	408
	409	/* OpenFirmware based machines need a map of OF bus
	410	* numbers vs. kernel bus numbers since we may have to
	411	* remap them.
	412	*/
	413	if (pci_assign_all_buses && have_of)
	414	pcibios_make_OF_bus_map();
	415
3fd94c6b BH	416	/* Call common code to handle resource allocation */
3fd94c6b BH	417	pcibios_resource_survey();
e05b3b4a PM	418
	419	/* Call machine dependent post-init code */
	420	if (ppc_md.pcibios_after_init)
	421	ppc_md.pcibios_after_init();
	422
	423	return 0;
	424	}
	425
	426	subsys_initcall(pcibios_init);
	427
bf5e2ba2	428	void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
e05b3b4a PM	429	{
	430	struct pci_controller hose = (struct pci_controller ) bus->sysdata;
	431	unsigned long io_offset;
	432	struct resource *res;
	433	int i;
4fc665b8	434	struct pci_dev *dev;
e05b3b4a	435
bf5e2ba2	436	/* Hookup PHB resources */
e05b3b4a PM	437	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	438	if (bus->parent == NULL) {
	439	/* This is a host bridge - fill in its resources */
	440	hose->bus = bus;
	441
	442	bus->resource[0] = res = &hose->io_resource;
	443	if (!res->flags) {
	444	if (io_offset)
	445	printk(KERN_ERR "I/O resource not set for host"
5516b540	446	" bridge %d\n", hose->global_number);
e05b3b4a PM	447	res->start = 0;
	448	res->end = IO_SPACE_LIMIT;
	449	res->flags = IORESOURCE_IO;
	450	}
05d3957e BH	451	res->start = (res->start + io_offset) & 0xffffffffu;
05d3957e BH	452	res->end = (res->end + io_offset) & 0xffffffffu;
e05b3b4a PM	453
	454	for (i = 0; i < 3; ++i) {
	455	res = &hose->mem_resources[i];
	456	if (!res->flags) {
	457	if (i > 0)
	458	continue;
	459	printk(KERN_ERR "Memory resource not set for "
5516b540	460	"host bridge %d\n", hose->global_number);
e05b3b4a PM	461	res->start = hose->pci_mem_offset;
	462	res->end = ~0U;
	463	res->flags = IORESOURCE_MEM;
	464	}
	465	bus->resource[i+1] = res;
	466	}
f90bb153	467	}
4fc665b8 BB	468
	469	if (ppc_md.pci_dma_bus_setup)
	470	ppc_md.pci_dma_bus_setup(bus);
	471
	472	list_for_each_entry(dev, &bus->devices, bus_list)
	473	pcibios_setup_new_device(dev);
e05b3b4a PM	474	}
e05b3b4a PM	475
e05b3b4a PM	476	/* the next one is stolen from the alpha port... */
	477	void __init
	478	pcibios_update_irq(struct pci_dev *dev, int irq)
	479	{
	480	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
	481	/* XXX FIXME - update OF device tree node interrupt property */
	482	}
	483
0b1d40c4	484	static struct pci_controller*
e05b3b4a PM	485	pci_bus_to_hose(int bus)
e05b3b4a PM	486	{
a4c9e328	487	struct pci_controller hose, tmp;
e05b3b4a	488
a4c9e328	489	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
e05b3b4a PM	490	if (bus >= hose->first_busno && bus <= hose->last_busno)
	491	return hose;
	492	return NULL;
	493	}
	494
e05b3b4a PM	495	/* Provide information on locations of various I/O regions in physical
	496	* memory. Do this on a per-card basis so that we choose the right
	497	* root bridge.
	498	* Note that the returned IO or memory base is a physical address
	499	*/
	500
	501	long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
	502	{
	503	struct pci_controller* hose;
	504	long result = -EOPNOTSUPP;
	505
e05b3b4a PM	506	hose = pci_bus_to_hose(bus);
	507	if (!hose)
	508	return -ENODEV;
	509
	510	switch (which) {
	511	case IOBASE_BRIDGE_NUMBER:
	512	return (long)hose->first_busno;
	513	case IOBASE_MEMORY:
	514	return (long)hose->pci_mem_offset;
	515	case IOBASE_IO:
	516	return (long)hose->io_base_phys;
	517	case IOBASE_ISA_IO:
	518	return (long)isa_io_base;
	519	case IOBASE_ISA_MEM:
	520	return (long)isa_mem_base;
	521	}
	522
	523	return result;
	524	}
	525
e05b3b4a PM	526	unsigned long pci_address_to_pio(phys_addr_t address)
e05b3b4a PM	527	{
a4c9e328	528	struct pci_controller hose, tmp;
e05b3b4a	529
a4c9e328	530	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
e05b3b4a PM	531	unsigned int size = hose->io_resource.end -
	532	hose->io_resource.start + 1;
	533	if (address >= hose->io_base_phys &&
	534	address < (hose->io_base_phys + size)) {
	535	unsigned long base =
	536	(unsigned long)hose->io_base_virt - _IO_BASE;
	537	return base + (address - hose->io_base_phys);
	538	}
	539	}
	540	return (unsigned int)-1;
	541	}
	542	EXPORT_SYMBOL(pci_address_to_pio);
	543
	544	/*
	545	* Null PCI config access functions, for the case when we can't
	546	* find a hose.
	547	*/
	548	#define NULL_PCI_OP(rw, size, type) \
	549	static int \
	550	null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
	551	{ \
	552	return PCIBIOS_DEVICE_NOT_FOUND; \
	553	}
	554
	555	static int
	556	null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
	557	int len, u32 *val)
	558	{
	559	return PCIBIOS_DEVICE_NOT_FOUND;
	560	}
	561
	562	static int
	563	null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
	564	int len, u32 val)
	565	{
	566	return PCIBIOS_DEVICE_NOT_FOUND;
	567	}
	568
	569	static struct pci_ops null_pci_ops =
	570	{
6127d1c0 NL	571	.read = null_read_config,
6127d1c0 NL	572	.write = null_write_config,
e05b3b4a PM	573	};
	574
	575	/*
	576	* These functions are used early on before PCI scanning is done
	577	* and all of the pci_dev and pci_bus structures have been created.
	578	*/
	579	static struct pci_bus *
	580	fake_pci_bus(struct pci_controller *hose, int busnr)
	581	{
	582	static struct pci_bus bus;
	583
	584	if (hose == 0) {
	585	hose = pci_bus_to_hose(busnr);
	586	if (hose == 0)
	587	printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	588	}
	589	bus.number = busnr;
	590	bus.sysdata = hose;
	591	bus.ops = hose? hose->ops: &null_pci_ops;
	592	return &bus;
	593	}
	594
	595	#define EARLY_PCI_OP(rw, size, type) \
	596	int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
	597	int devfn, int offset, type value) \
	598	{ \
	599	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
	600	devfn, offset, value); \
	601	}
	602
	603	EARLY_PCI_OP(read, byte, u8 *)
	604	EARLY_PCI_OP(read, word, u16 *)
	605	EARLY_PCI_OP(read, dword, u32 *)
	606	EARLY_PCI_OP(write, byte, u8)
	607	EARLY_PCI_OP(write, word, u16)
	608	EARLY_PCI_OP(write, dword, u32)
38805e5f KG	609
	610	extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
	611	int early_find_capability(struct pci_controller *hose, int bus, int devfn,
	612	int cap)
	613	{
	614	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
	615	}