[deliverable/linux.git] / arch / powerpc / kernel / pci_32.c

/*
 * Common pmac/prep/chrp pci routines. -- Cort
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/capability.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/bootmem.h>
#include <linux/irq.h>
#include <linux/list.h>
#include <linux/of.h>

#include <asm/processor.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/sections.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>

#undef DEBUG

unsigned long isa_io_base     = 0;
unsigned long pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;

void pcibios_make_OF_bus_map(void);

static void fixup_cpc710_pci64(struct pci_dev* dev);
#ifdef CONFIG_PPC_OF
static u8* pci_to_OF_bus_map;
#endif

/* By default, we don't re-assign bus numbers. We do this only on
 * some pmacs
 */
static int pci_assign_all_buses;

static int pci_bus_count;

/* This will remain NULL for now, until isa-bridge.c is made common
 * to both 32-bit and 64-bit.
 */
struct pci_dev *isa_bridge_pcidev;
EXPORT_SYMBOL_GPL(isa_bridge_pcidev);

static void
fixup_hide_host_resource_fsl(struct pci_dev *dev)
{
	int i, class = dev->class >> 8;

	if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
	     class == PCI_CLASS_BRIDGE_OTHER) &&
		(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
		(dev->bus->parent == NULL)) {
		for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
			dev->resource[i].start = 0;
			dev->resource[i].end = 0;
			dev->resource[i].flags = 0;
		}
	}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); 
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); 

static void
fixup_cpc710_pci64(struct pci_dev* dev)
{
	/* Hide the PCI64 BARs from the kernel as their content doesn't
	 * fit well in the resource management
	 */
	dev->resource[0].start = dev->resource[0].end = 0;
	dev->resource[0].flags = 0;
	dev->resource[1].start = dev->resource[1].end = 0;
	dev->resource[1].flags = 0;
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,	PCI_DEVICE_ID_IBM_CPC710_PCI64,	fixup_cpc710_pci64);

#ifdef CONFIG_PPC_OF
/*
 * Functions below are used on OpenFirmware machines.
 */
static void
make_one_node_map(struct device_node* node, u8 pci_bus)
{
	const int *bus_range;
	int len;

	if (pci_bus >= pci_bus_count)
		return;
	bus_range = of_get_property(node, "bus-range", &len);
	if (bus_range == NULL || len < 2 * sizeof(int)) {
		printk(KERN_WARNING "Can't get bus-range for %s, "
		       "assuming it starts at 0\n", node->full_name);
		pci_to_OF_bus_map[pci_bus] = 0;
	} else
		pci_to_OF_bus_map[pci_bus] = bus_range[0];

	for_each_child_of_node(node, node) {
		struct pci_dev* dev;
		const unsigned int *class_code, *reg;
	
		class_code = of_get_property(node, "class-code", NULL);
		if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
			continue;
		reg = of_get_property(node, "reg", NULL);
		if (!reg)
			continue;
		dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
		if (!dev || !dev->subordinate) {
			pci_dev_put(dev);
			continue;
		}
		make_one_node_map(node, dev->subordinate->number);
		pci_dev_put(dev);
	}
}
	
void
pcibios_make_OF_bus_map(void)
{
	int i;
	struct pci_controller *hose, *tmp;
	struct property *map_prop;
	struct device_node *dn;

	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
	if (!pci_to_OF_bus_map) {
		printk(KERN_ERR "Can't allocate OF bus map !\n");
		return;
	}

	/* We fill the bus map with invalid values, that helps
	 * debugging.
	 */
	for (i=0; i<pci_bus_count; i++)
		pci_to_OF_bus_map[i] = 0xff;

	/* For each hose, we begin searching bridges */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		struct device_node* node = hose->dn;

		if (!node)
			continue;
		make_one_node_map(node, hose->first_busno);
	}
	dn = of_find_node_by_path("/");
	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
	if (map_prop) {
		BUG_ON(pci_bus_count > map_prop->length);
		memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	}
	of_node_put(dn);
#ifdef DEBUG
	printk("PCI->OF bus map:\n");
	for (i=0; i<pci_bus_count; i++) {
		if (pci_to_OF_bus_map[i] == 0xff)
			continue;
		printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	}
#endif
}

typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);

static struct device_node*
scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data)
{
	struct device_node *node;
	struct device_node* sub_node;

	for_each_child_of_node(parent, node) {
		const unsigned int *class_code;
	
		if (filter(node, data)) {
			of_node_put(node);
			return node;
		}

		/* For PCI<->PCI bridges or CardBus bridges, we go down
		 * Note: some OFs create a parent node "multifunc-device" as
		 * a fake root for all functions of a multi-function device,
		 * we go down them as well.
		 */
		class_code = of_get_property(node, "class-code", NULL);
		if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
			(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
			strcmp(node->name, "multifunc-device"))
			continue;
		sub_node = scan_OF_pci_childs(node, filter, data);
		if (sub_node) {
			of_node_put(node);
			return sub_node;
		}
	}
	return NULL;
}

static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
					       unsigned int devfn)
{
	struct device_node *np, *cnp;
	const u32 *reg;
	unsigned int psize;

	for_each_child_of_node(parent, np) {
		reg = of_get_property(np, "reg", &psize);
                if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn)
			return np;

		/* Note: some OFs create a parent node "multifunc-device" as
		 * a fake root for all functions of a multi-function device,
		 * we go down them as well. */
                if (!strcmp(np->name, "multifunc-device")) {
                        cnp = scan_OF_for_pci_dev(np, devfn);
                        if (cnp)
                                return cnp;
                }
	}
	return NULL;
}


static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
{
	struct device_node *parent, *np;

	/* Are we a root bus ? */
	if (bus->self == NULL || bus->parent == NULL) {
		struct pci_controller *hose = pci_bus_to_host(bus);
		if (hose == NULL)
			return NULL;
		return of_node_get(hose->dn);
	}

	/* not a root bus, we need to get our parent */
	parent = scan_OF_for_pci_bus(bus->parent);
	if (parent == NULL)
		return NULL;

	/* now iterate for children for a match */
	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	of_node_put(parent);

	return np;
}

/*
 * Scans the OF tree for a device node matching a PCI device
 */
struct device_node *
pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
{
	struct device_node *parent, *np;

	pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
	parent = scan_OF_for_pci_bus(bus);
	if (parent == NULL)
		return NULL;
	pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
	np = scan_OF_for_pci_dev(parent, devfn);
	of_node_put(parent);
	pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");

	/* XXX most callers don't release the returned node
	 * mostly because ppc64 doesn't increase the refcount,
	 * we need to fix that.
	 */
	return np;
}
EXPORT_SYMBOL(pci_busdev_to_OF_node);

struct device_node*
pci_device_to_OF_node(struct pci_dev *dev)
{
	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
}
EXPORT_SYMBOL(pci_device_to_OF_node);

static int
find_OF_pci_device_filter(struct device_node* node, void* data)
{
	return ((void *)node == data);
}

/*
 * Returns the PCI device matching a given OF node
 */
int
pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
{
	const unsigned int *reg;
	struct pci_controller* hose;
	struct pci_dev* dev = NULL;
	
	/* Make sure it's really a PCI device */
	hose = pci_find_hose_for_OF_device(node);
	if (!hose || !hose->dn)
		return -ENODEV;
	if (!scan_OF_pci_childs(hose->dn,
			find_OF_pci_device_filter, (void *)node))
		return -ENODEV;
	reg = of_get_property(node, "reg", NULL);
	if (!reg)
		return -ENODEV;
	*bus = (reg[0] >> 16) & 0xff;
	*devfn = ((reg[0] >> 8) & 0xff);

	/* Ok, here we need some tweak. If we have already renumbered
	 * all busses, we can't rely on the OF bus number any more.
	 * the pci_to_OF_bus_map is not enough as several PCI busses
	 * may match the same OF bus number.
	 */
	if (!pci_to_OF_bus_map)
		return 0;

	for_each_pci_dev(dev)
		if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
				dev->devfn == *devfn) {
			*bus = dev->bus->number;
			pci_dev_put(dev);
			return 0;
		}

	return -ENODEV;
}
EXPORT_SYMBOL(pci_device_from_OF_node);

/* We create the "pci-OF-bus-map" property now so it appears in the
 * /proc device tree
 */
void __init
pci_create_OF_bus_map(void)
{
	struct property* of_prop;
	struct device_node *dn;

	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
	if (!of_prop)
		return;
	dn = of_find_node_by_path("/");
	if (dn) {
		memset(of_prop, -1, sizeof(struct property) + 256);
		of_prop->name = "pci-OF-bus-map";
		of_prop->length = 256;
		of_prop->value = &of_prop[1];
		prom_add_property(dn, of_prop);
		of_node_put(dn);
	}
}

#else /* CONFIG_PPC_OF */
void pcibios_make_OF_bus_map(void)
{
}
#endif /* CONFIG_PPC_OF */

static void __devinit pcibios_scan_phb(struct pci_controller *hose)
{
	struct pci_bus *bus;
	struct device_node *node = hose->dn;
	unsigned long io_offset;
	struct resource *res = &hose->io_resource;

	pr_debug("PCI: Scanning PHB %s\n",
		 node ? node->full_name : "<NO NAME>");

	/* Create an empty bus for the toplevel */
	bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
	if (bus == NULL) {
		printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
		       hose->global_number);
		return;
	}
	bus->secondary = hose->first_busno;
	hose->bus = bus;

	/* Fixup IO space offset */
	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	res->start = (res->start + io_offset) & 0xffffffffu;
	res->end = (res->end + io_offset) & 0xffffffffu;

	/* Wire up PHB bus resources */
	pcibios_setup_phb_resources(hose);

	/* Scan children */
	hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
}

static int __init pcibios_init(void)
{
	struct pci_controller *hose, *tmp;
	int next_busno = 0;

	printk(KERN_INFO "PCI: Probing PCI hardware\n");

	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
		pci_assign_all_buses = 1;

	/* Scan all of the recorded PCI controllers.  */
	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
		if (pci_assign_all_buses)
			hose->first_busno = next_busno;
		hose->last_busno = 0xff;
		pcibios_scan_phb(hose);
		pci_bus_add_devices(hose->bus);
		if (pci_assign_all_buses || next_busno <= hose->last_busno)
			next_busno = hose->last_busno + pcibios_assign_bus_offset;
	}
	pci_bus_count = next_busno;

	/* OpenFirmware based machines need a map of OF bus
	 * numbers vs. kernel bus numbers since we may have to
	 * remap them.
	 */
	if (pci_assign_all_buses)
		pcibios_make_OF_bus_map();

	/* Call common code to handle resource allocation */
	pcibios_resource_survey();

	/* Call machine dependent post-init code */
	if (ppc_md.pcibios_after_init)
		ppc_md.pcibios_after_init();

	return 0;
}

subsys_initcall(pcibios_init);

static struct pci_controller*
pci_bus_to_hose(int bus)
{
	struct pci_controller *hose, *tmp;

	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
		if (bus >= hose->first_busno && bus <= hose->last_busno)
			return hose;
	return NULL;
}

/* Provide information on locations of various I/O regions in physical
 * memory.  Do this on a per-card basis so that we choose the right
 * root bridge.
 * Note that the returned IO or memory base is a physical address
 */

long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
{
	struct pci_controller* hose;
	long result = -EOPNOTSUPP;

	hose = pci_bus_to_hose(bus);
	if (!hose)
		return -ENODEV;

	switch (which) {
	case IOBASE_BRIDGE_NUMBER:
		return (long)hose->first_busno;
	case IOBASE_MEMORY:
		return (long)hose->pci_mem_offset;
	case IOBASE_IO:
		return (long)hose->io_base_phys;
	case IOBASE_ISA_IO:
		return (long)isa_io_base;
	case IOBASE_ISA_MEM:
		return (long)isa_mem_base;
	}

	return result;
}

/*
 * Null PCI config access functions, for the case when we can't
 * find a hose.
 */
#define NULL_PCI_OP(rw, size, type)					\
static int								\
null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)	\
{									\
	return PCIBIOS_DEVICE_NOT_FOUND;    				\
}

static int
null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
		 int len, u32 *val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static int
null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
		  int len, u32 val)
{
	return PCIBIOS_DEVICE_NOT_FOUND;
}

static struct pci_ops null_pci_ops =
{
	.read = null_read_config,
	.write = null_write_config,
};

/*
 * These functions are used early on before PCI scanning is done
 * and all of the pci_dev and pci_bus structures have been created.
 */
static struct pci_bus *
fake_pci_bus(struct pci_controller *hose, int busnr)
{
	static struct pci_bus bus;

	if (hose == 0) {
		hose = pci_bus_to_hose(busnr);
		if (hose == 0)
			printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	}
	bus.number = busnr;
	bus.sysdata = hose;
	bus.ops = hose? hose->ops: &null_pci_ops;
	return &bus;
}

#define EARLY_PCI_OP(rw, size, type)					\
int early_##rw##_config_##size(struct pci_controller *hose, int bus,	\
			       int devfn, int offset, type value)	\
{									\
	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus),	\
					    devfn, offset, value);	\
}

EARLY_PCI_OP(read, byte, u8 *)
EARLY_PCI_OP(read, word, u16 *)
EARLY_PCI_OP(read, dword, u32 *)
EARLY_PCI_OP(write, byte, u8)
EARLY_PCI_OP(write, word, u16)
EARLY_PCI_OP(write, dword, u32)

extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
int early_find_capability(struct pci_controller *hose, int bus, int devfn,
			  int cap)
{
	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
}
Commit	Line	Data
e05b3b4a PM	1	/*
	2	* Common pmac/prep/chrp pci routines. -- Cort
	3	*/
	4
e05b3b4a PM	5	#include <linux/kernel.h>
	6	#include <linux/pci.h>
	7	#include <linux/delay.h>
	8	#include <linux/string.h>
	9	#include <linux/init.h>
	10	#include <linux/capability.h>
	11	#include <linux/sched.h>
	12	#include <linux/errno.h>
	13	#include <linux/bootmem.h>
6e99e458	14	#include <linux/irq.h>
f90bb153	15	#include <linux/list.h>
66524b22	16	#include <linux/of.h>
e05b3b4a PM	17
	18	#include <asm/processor.h>
	19	#include <asm/io.h>
	20	#include <asm/prom.h>
	21	#include <asm/sections.h>
	22	#include <asm/pci-bridge.h>
c3bd517d	23	#include <asm/ppc-pci.h>
e05b3b4a	24	#include <asm/byteorder.h>
e05b3b4a PM	25	#include <asm/uaccess.h>
	26	#include <asm/machdep.h>
	27
	28	#undef DEBUG
	29
e05b3b4a	30	unsigned long isa_io_base = 0;
e05b3b4a PM	31	unsigned long pci_dram_offset = 0;
	32	int pcibios_assign_bus_offset = 1;
	33
	34	void pcibios_make_OF_bus_map(void);
	35
e05b3b4a PM	36	static void fixup_cpc710_pci64(struct pci_dev* dev);
	37	#ifdef CONFIG_PPC_OF
	38	static u8* pci_to_OF_bus_map;
	39	#endif
	40
	41	/* By default, we don't re-assign bus numbers. We do this only on
	42	* some pmacs
	43	*/
fc3fb71c	44	static int pci_assign_all_buses;
e05b3b4a	45
e05b3b4a PM	46	static int pci_bus_count;
e05b3b4a PM	47
7b6b574c BH	48	/* This will remain NULL for now, until isa-bridge.c is made common
	49	* to both 32-bit and 64-bit.
	50	*/
	51	struct pci_dev *isa_bridge_pcidev;
	52	EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
	53
2052d6d2	54	static void
4a015c37	55	fixup_hide_host_resource_fsl(struct pci_dev *dev)
2052d6d2 KG	56	{
	57	int i, class = dev->class >> 8;
	58
4a015c37 JR	59	if ((class == PCI_CLASS_PROCESSOR_POWERPC \|\|
4a015c37 JR	60	class == PCI_CLASS_BRIDGE_OTHER) &&
2052d6d2 KG	61	(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
	62	(dev->bus->parent == NULL)) {
	63	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
	64	dev->resource[i].start = 0;
	65	dev->resource[i].end = 0;
	66	dev->resource[i].flags = 0;
	67	}
	68	}
	69	}
	70	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	71	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
	72
e05b3b4a PM	73	static void
	74	fixup_cpc710_pci64(struct pci_dev* dev)
	75	{
	76	/* Hide the PCI64 BARs from the kernel as their content doesn't
	77	* fit well in the resource management
	78	*/
	79	dev->resource[0].start = dev->resource[0].end = 0;
	80	dev->resource[0].flags = 0;
	81	dev->resource[1].start = dev->resource[1].end = 0;
	82	dev->resource[1].flags = 0;
	83	}
	84	DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
	85
e05b3b4a PM	86	#ifdef CONFIG_PPC_OF
	87	/*
	88	* Functions below are used on OpenFirmware machines.
	89	*/
	90	static void
	91	make_one_node_map(struct device_node* node, u8 pci_bus)
	92	{
a7f67bdf	93	const int *bus_range;
e05b3b4a PM	94	int len;
	95
	96	if (pci_bus >= pci_bus_count)
	97	return;
e2eb6392	98	bus_range = of_get_property(node, "bus-range", &len);
e05b3b4a PM	99	if (bus_range == NULL \|\| len < 2 * sizeof(int)) {
	100	printk(KERN_WARNING "Can't get bus-range for %s, "
	101	"assuming it starts at 0\n", node->full_name);
	102	pci_to_OF_bus_map[pci_bus] = 0;
	103	} else
	104	pci_to_OF_bus_map[pci_bus] = bus_range[0];
	105
66524b22	106	for_each_child_of_node(node, node) {
e05b3b4a	107	struct pci_dev* dev;
a7f67bdf	108	const unsigned int class_code, reg;
e05b3b4a	109
e2eb6392	110	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	111	if (!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	112	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
	113	continue;
e2eb6392	114	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	115	if (!reg)
e05b3b4a PM	116	continue;
ab462768 AC	117	dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
	118	if (!dev \|\| !dev->subordinate) {
	119	pci_dev_put(dev);
e05b3b4a	120	continue;
ab462768	121	}
e05b3b4a	122	make_one_node_map(node, dev->subordinate->number);
ab462768	123	pci_dev_put(dev);
e05b3b4a PM	124	}
	125	}
	126
	127	void
	128	pcibios_make_OF_bus_map(void)
	129	{
	130	int i;
a4c9e328	131	struct pci_controller hose, tmp;
a7f67bdf	132	struct property *map_prop;
8c8dc322	133	struct device_node *dn;
e05b3b4a	134
5cbded58	135	pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
e05b3b4a PM	136	if (!pci_to_OF_bus_map) {
	137	printk(KERN_ERR "Can't allocate OF bus map !\n");
	138	return;
	139	}
	140
	141	/* We fill the bus map with invalid values, that helps
	142	* debugging.
	143	*/
	144	for (i=0; i<pci_bus_count; i++)
	145	pci_to_OF_bus_map[i] = 0xff;
	146
	147	/* For each hose, we begin searching bridges */
a4c9e328	148	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
44ef3390 SR	149	struct device_node* node = hose->dn;
44ef3390 SR	150
e05b3b4a PM	151	if (!node)
	152	continue;
	153	make_one_node_map(node, hose->first_busno);
	154	}
8c8dc322 SR	155	dn = of_find_node_by_path("/");
8c8dc322 SR	156	map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
a7f67bdf JK	157	if (map_prop) {
	158	BUG_ON(pci_bus_count > map_prop->length);
	159	memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
	160	}
8c8dc322	161	of_node_put(dn);
e05b3b4a PM	162	#ifdef DEBUG
	163	printk("PCI->OF bus map:\n");
	164	for (i=0; i<pci_bus_count; i++) {
	165	if (pci_to_OF_bus_map[i] == 0xff)
	166	continue;
	167	printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
	168	}
	169	#endif
	170	}
	171
	172	typedef int (pci_OF_scan_iterator)(struct device_node node, void* data);
	173
	174	static struct device_node*
66524b22	175	scan_OF_pci_childs(struct device_node parent, pci_OF_scan_iterator filter, void data)
e05b3b4a	176	{
66524b22	177	struct device_node *node;
e05b3b4a PM	178	struct device_node* sub_node;
e05b3b4a PM	179
66524b22	180	for_each_child_of_node(parent, node) {
a7f67bdf	181	const unsigned int *class_code;
e05b3b4a	182
66524b22 SR	183	if (filter(node, data)) {
66524b22 SR	184	of_node_put(node);
e05b3b4a	185	return node;
66524b22	186	}
e05b3b4a PM	187
	188	/* For PCI<->PCI bridges or CardBus bridges, we go down
	189	* Note: some OFs create a parent node "multifunc-device" as
	190	* a fake root for all functions of a multi-function device,
	191	* we go down them as well.
	192	*/
e2eb6392	193	class_code = of_get_property(node, "class-code", NULL);
e05b3b4a PM	194	if ((!class_code \|\| ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
	195	(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
	196	strcmp(node->name, "multifunc-device"))
	197	continue;
66524b22 SR	198	sub_node = scan_OF_pci_childs(node, filter, data);
	199	if (sub_node) {
	200	of_node_put(node);
e05b3b4a	201	return sub_node;
66524b22	202	}
e05b3b4a PM	203	}
	204	return NULL;
	205	}
	206
dae4828d BH	207	static struct device_node scan_OF_for_pci_dev(struct device_node parent,
dae4828d BH	208	unsigned int devfn)
e05b3b4a	209	{
f8178691	210	struct device_node np, cnp;
dae4828d BH	211	const u32 *reg;
	212	unsigned int psize;
	213
85e99b9f	214	for_each_child_of_node(parent, np) {
e2eb6392	215	reg = of_get_property(np, "reg", &psize);
f8178691	216	if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn)
dae4828d	217	return np;
f8178691 TA	218
	219	/* Note: some OFs create a parent node "multifunc-device" as
	220	* a fake root for all functions of a multi-function device,
	221	* we go down them as well. */
	222	if (!strcmp(np->name, "multifunc-device")) {
	223	cnp = scan_OF_for_pci_dev(np, devfn);
	224	if (cnp)
	225	return cnp;
	226	}
dae4828d BH	227	}
dae4828d BH	228	return NULL;
e05b3b4a PM	229	}
e05b3b4a PM	230
dae4828d BH	231
dae4828d BH	232	static struct device_node scan_OF_for_pci_bus(struct pci_bus bus)
e05b3b4a	233	{
dae4828d BH	234	struct device_node parent, np;
	235
	236	/* Are we a root bus ? */
	237	if (bus->self == NULL \|\| bus->parent == NULL) {
0b1d40c4	238	struct pci_controller *hose = pci_bus_to_host(bus);
dae4828d BH	239	if (hose == NULL)
dae4828d BH	240	return NULL;
44ef3390	241	return of_node_get(hose->dn);
dae4828d BH	242	}
	243
	244	/* not a root bus, we need to get our parent */
	245	parent = scan_OF_for_pci_bus(bus->parent);
	246	if (parent == NULL)
	247	return NULL;
	248
	249	/* now iterate for children for a match */
	250	np = scan_OF_for_pci_dev(parent, bus->self->devfn);
	251	of_node_put(parent);
	252
dae4828d	253	return np;
e05b3b4a PM	254	}
	255
	256	/*
	257	* Scans the OF tree for a device node matching a PCI device
	258	*/
	259	struct device_node *
	260	pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
	261	{
dae4828d	262	struct device_node parent, np;
e05b3b4a	263
b0494bc8	264	pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
dae4828d BH	265	parent = scan_OF_for_pci_bus(bus);
dae4828d BH	266	if (parent == NULL)
e05b3b4a	267	return NULL;
b0494bc8	268	pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
dae4828d BH	269	np = scan_OF_for_pci_dev(parent, devfn);
dae4828d BH	270	of_node_put(parent);
b0494bc8	271	pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
dae4828d BH	272
	273	/* XXX most callers don't release the returned node
	274	* mostly because ppc64 doesn't increase the refcount,
	275	* we need to fix that.
e05b3b4a	276	*/
dae4828d	277	return np;
e05b3b4a PM	278	}
	279	EXPORT_SYMBOL(pci_busdev_to_OF_node);
	280
	281	struct device_node*
	282	pci_device_to_OF_node(struct pci_dev *dev)
	283	{
	284	return pci_busdev_to_OF_node(dev->bus, dev->devfn);
	285	}
	286	EXPORT_SYMBOL(pci_device_to_OF_node);
	287
e05b3b4a PM	288	static int
	289	find_OF_pci_device_filter(struct device_node* node, void* data)
	290	{
	291	return ((void *)node == data);
	292	}
	293
	294	/*
	295	* Returns the PCI device matching a given OF node
	296	*/
	297	int
	298	pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
	299	{
a7f67bdf	300	const unsigned int *reg;
e05b3b4a PM	301	struct pci_controller* hose;
	302	struct pci_dev* dev = NULL;
	303
e05b3b4a PM	304	/* Make sure it's really a PCI device */
e05b3b4a PM	305	hose = pci_find_hose_for_OF_device(node);
44ef3390	306	if (!hose \|\| !hose->dn)
e05b3b4a	307	return -ENODEV;
66524b22	308	if (!scan_OF_pci_childs(hose->dn,
e05b3b4a PM	309	find_OF_pci_device_filter, (void *)node))
e05b3b4a PM	310	return -ENODEV;
e2eb6392	311	reg = of_get_property(node, "reg", NULL);
e05b3b4a PM	312	if (!reg)
	313	return -ENODEV;
	314	*bus = (reg[0] >> 16) & 0xff;
	315	*devfn = ((reg[0] >> 8) & 0xff);
	316
	317	/* Ok, here we need some tweak. If we have already renumbered
	318	* all busses, we can't rely on the OF bus number any more.
	319	* the pci_to_OF_bus_map is not enough as several PCI busses
	320	* may match the same OF bus number.
	321	*/
	322	if (!pci_to_OF_bus_map)
	323	return 0;
	324
	325	for_each_pci_dev(dev)
	326	if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
	327	dev->devfn == *devfn) {
	328	*bus = dev->bus->number;
	329	pci_dev_put(dev);
	330	return 0;
	331	}
	332
	333	return -ENODEV;
	334	}
	335	EXPORT_SYMBOL(pci_device_from_OF_node);
	336
e05b3b4a PM	337	/* We create the "pci-OF-bus-map" property now so it appears in the
	338	* /proc device tree
	339	*/
	340	void __init
	341	pci_create_OF_bus_map(void)
	342	{
	343	struct property* of_prop;
8c8dc322 SR	344	struct device_node *dn;
8c8dc322 SR	345
e05b3b4a	346	of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
8c8dc322 SR	347	if (!of_prop)
	348	return;
	349	dn = of_find_node_by_path("/");
	350	if (dn) {
e05b3b4a PM	351	memset(of_prop, -1, sizeof(struct property) + 256);
	352	of_prop->name = "pci-OF-bus-map";
	353	of_prop->length = 256;
1a38147e	354	of_prop->value = &of_prop[1];
8c8dc322 SR	355	prom_add_property(dn, of_prop);
8c8dc322 SR	356	of_node_put(dn);
e05b3b4a PM	357	}
	358	}
	359
e05b3b4a PM	360	#else /* CONFIG_PPC_OF */
	361	void pcibios_make_OF_bus_map(void)
	362	{
	363	}
	364	#endif /* CONFIG_PPC_OF */
	365
53280323 BH	366	static void __devinit pcibios_scan_phb(struct pci_controller *hose)
	367	{
	368	struct pci_bus *bus;
	369	struct device_node *node = hose->dn;
	370	unsigned long io_offset;
	371	struct resource *res = &hose->io_resource;
	372
	373	pr_debug("PCI: Scanning PHB %s\n",
	374	node ? node->full_name : "<NO NAME>");
	375
	376	/* Create an empty bus for the toplevel */
	377	bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
	378	if (bus == NULL) {
	379	printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
	380	hose->global_number);
	381	return;
	382	}
	383	bus->secondary = hose->first_busno;
	384	hose->bus = bus;
	385
	386	/* Fixup IO space offset */
	387	io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
	388	res->start = (res->start + io_offset) & 0xffffffffu;
	389	res->end = (res->end + io_offset) & 0xffffffffu;
	390
	391	/* Wire up PHB bus resources */
	392	pcibios_setup_phb_resources(hose);
	393
	394	/* Scan children */
	395	hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
	396	}
	397
3fd94c6b	398	static int __init pcibios_init(void)
e05b3b4a	399	{
a4c9e328	400	struct pci_controller hose, tmp;
a4c9e328	401	int next_busno = 0;
e05b3b4a PM	402
	403	printk(KERN_INFO "PCI: Probing PCI hardware\n");
	404
fc3fb71c BH	405	if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
	406	pci_assign_all_buses = 1;
	407
e05b3b4a	408	/* Scan all of the recorded PCI controllers. */
a4c9e328	409	list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
e05b3b4a PM	410	if (pci_assign_all_buses)
	411	hose->first_busno = next_busno;
	412	hose->last_busno = 0xff;
53280323 BH	413	pcibios_scan_phb(hose);
53280323 BH	414	pci_bus_add_devices(hose->bus);
e05b3b4a PM	415	if (pci_assign_all_buses \|\| next_busno <= hose->last_busno)
	416	next_busno = hose->last_busno + pcibios_assign_bus_offset;
	417	}
	418	pci_bus_count = next_busno;
	419
	420	/* OpenFirmware based machines need a map of OF bus
	421	* numbers vs. kernel bus numbers since we may have to
	422	* remap them.
	423	*/
6b82b3e4	424	if (pci_assign_all_buses)
e05b3b4a PM	425	pcibios_make_OF_bus_map();
e05b3b4a PM	426
3fd94c6b BH	427	/* Call common code to handle resource allocation */
3fd94c6b BH	428	pcibios_resource_survey();
e05b3b4a PM	429
	430	/* Call machine dependent post-init code */
	431	if (ppc_md.pcibios_after_init)
	432	ppc_md.pcibios_after_init();
	433
	434	return 0;
	435	}
	436
	437	subsys_initcall(pcibios_init);
	438
0b1d40c4	439	static struct pci_controller*
e05b3b4a PM	440	pci_bus_to_hose(int bus)
e05b3b4a PM	441	{
a4c9e328	442	struct pci_controller hose, tmp;
e05b3b4a	443
a4c9e328	444	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
e05b3b4a PM	445	if (bus >= hose->first_busno && bus <= hose->last_busno)
	446	return hose;
	447	return NULL;
	448	}
	449
e05b3b4a PM	450	/* Provide information on locations of various I/O regions in physical
	451	* memory. Do this on a per-card basis so that we choose the right
	452	* root bridge.
	453	* Note that the returned IO or memory base is a physical address
	454	*/
	455
	456	long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
	457	{
	458	struct pci_controller* hose;
	459	long result = -EOPNOTSUPP;
	460
e05b3b4a PM	461	hose = pci_bus_to_hose(bus);
	462	if (!hose)
	463	return -ENODEV;
	464
	465	switch (which) {
	466	case IOBASE_BRIDGE_NUMBER:
	467	return (long)hose->first_busno;
	468	case IOBASE_MEMORY:
	469	return (long)hose->pci_mem_offset;
	470	case IOBASE_IO:
	471	return (long)hose->io_base_phys;
	472	case IOBASE_ISA_IO:
	473	return (long)isa_io_base;
	474	case IOBASE_ISA_MEM:
	475	return (long)isa_mem_base;
	476	}
	477
	478	return result;
	479	}
	480
e05b3b4a PM	481	/*
	482	* Null PCI config access functions, for the case when we can't
	483	* find a hose.
	484	*/
	485	#define NULL_PCI_OP(rw, size, type) \
	486	static int \
	487	null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
	488	{ \
	489	return PCIBIOS_DEVICE_NOT_FOUND; \
	490	}
	491
	492	static int
	493	null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
	494	int len, u32 *val)
	495	{
	496	return PCIBIOS_DEVICE_NOT_FOUND;
	497	}
	498
	499	static int
	500	null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
	501	int len, u32 val)
	502	{
	503	return PCIBIOS_DEVICE_NOT_FOUND;
	504	}
	505
	506	static struct pci_ops null_pci_ops =
	507	{
6127d1c0 NL	508	.read = null_read_config,
6127d1c0 NL	509	.write = null_write_config,
e05b3b4a PM	510	};
	511
	512	/*
	513	* These functions are used early on before PCI scanning is done
	514	* and all of the pci_dev and pci_bus structures have been created.
	515	*/
	516	static struct pci_bus *
	517	fake_pci_bus(struct pci_controller *hose, int busnr)
	518	{
	519	static struct pci_bus bus;
	520
	521	if (hose == 0) {
	522	hose = pci_bus_to_hose(busnr);
	523	if (hose == 0)
	524	printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
	525	}
	526	bus.number = busnr;
	527	bus.sysdata = hose;
	528	bus.ops = hose? hose->ops: &null_pci_ops;
	529	return &bus;
	530	}
	531
	532	#define EARLY_PCI_OP(rw, size, type) \
	533	int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
	534	int devfn, int offset, type value) \
	535	{ \
	536	return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
	537	devfn, offset, value); \
	538	}
	539
	540	EARLY_PCI_OP(read, byte, u8 *)
	541	EARLY_PCI_OP(read, word, u16 *)
	542	EARLY_PCI_OP(read, dword, u32 *)
	543	EARLY_PCI_OP(write, byte, u8)
	544	EARLY_PCI_OP(write, word, u16)
	545	EARLY_PCI_OP(write, dword, u32)
38805e5f KG	546
	547	extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
	548	int early_find_capability(struct pci_controller *hose, int bus, int devfn,
	549	int cap)
	550	{
	551	return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
	552	}