Commit | Line | Data |
---|---|---|
e05b3b4a PM |
1 | /* |
2 | * Common pmac/prep/chrp pci routines. -- Cort | |
3 | */ | |
4 | ||
e05b3b4a PM |
5 | #include <linux/kernel.h> |
6 | #include <linux/pci.h> | |
7 | #include <linux/delay.h> | |
8 | #include <linux/string.h> | |
9 | #include <linux/init.h> | |
10 | #include <linux/capability.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/bootmem.h> | |
6e99e458 | 14 | #include <linux/irq.h> |
f90bb153 | 15 | #include <linux/list.h> |
66524b22 | 16 | #include <linux/of.h> |
e05b3b4a PM |
17 | |
18 | #include <asm/processor.h> | |
19 | #include <asm/io.h> | |
20 | #include <asm/prom.h> | |
21 | #include <asm/sections.h> | |
22 | #include <asm/pci-bridge.h> | |
c3bd517d | 23 | #include <asm/ppc-pci.h> |
e05b3b4a | 24 | #include <asm/byteorder.h> |
e05b3b4a PM |
25 | #include <asm/uaccess.h> |
26 | #include <asm/machdep.h> | |
27 | ||
28 | #undef DEBUG | |
29 | ||
e05b3b4a | 30 | unsigned long isa_io_base = 0; |
e05b3b4a PM |
31 | unsigned long pci_dram_offset = 0; |
32 | int pcibios_assign_bus_offset = 1; | |
33 | ||
34 | void pcibios_make_OF_bus_map(void); | |
35 | ||
e05b3b4a | 36 | static void fixup_broken_pcnet32(struct pci_dev* dev); |
e05b3b4a PM |
37 | static void fixup_cpc710_pci64(struct pci_dev* dev); |
38 | #ifdef CONFIG_PPC_OF | |
39 | static u8* pci_to_OF_bus_map; | |
40 | #endif | |
41 | ||
42 | /* By default, we don't re-assign bus numbers. We do this only on | |
43 | * some pmacs | |
44 | */ | |
fc3fb71c | 45 | static int pci_assign_all_buses; |
e05b3b4a | 46 | |
e05b3b4a PM |
47 | static int pci_bus_count; |
48 | ||
7b6b574c BH |
49 | /* This will remain NULL for now, until isa-bridge.c is made common |
50 | * to both 32-bit and 64-bit. | |
51 | */ | |
52 | struct pci_dev *isa_bridge_pcidev; | |
53 | EXPORT_SYMBOL_GPL(isa_bridge_pcidev); | |
54 | ||
2052d6d2 | 55 | static void |
4a015c37 | 56 | fixup_hide_host_resource_fsl(struct pci_dev *dev) |
2052d6d2 KG |
57 | { |
58 | int i, class = dev->class >> 8; | |
59 | ||
4a015c37 JR |
60 | if ((class == PCI_CLASS_PROCESSOR_POWERPC || |
61 | class == PCI_CLASS_BRIDGE_OTHER) && | |
2052d6d2 KG |
62 | (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) && |
63 | (dev->bus->parent == NULL)) { | |
64 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
65 | dev->resource[i].start = 0; | |
66 | dev->resource[i].end = 0; | |
67 | dev->resource[i].flags = 0; | |
68 | } | |
69 | } | |
70 | } | |
71 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
72 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl); | |
73 | ||
e05b3b4a PM |
74 | static void |
75 | fixup_broken_pcnet32(struct pci_dev* dev) | |
76 | { | |
77 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { | |
78 | dev->vendor = PCI_VENDOR_ID_AMD; | |
79 | pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); | |
80 | } | |
81 | } | |
82 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); | |
83 | ||
84 | static void | |
85 | fixup_cpc710_pci64(struct pci_dev* dev) | |
86 | { | |
87 | /* Hide the PCI64 BARs from the kernel as their content doesn't | |
88 | * fit well in the resource management | |
89 | */ | |
90 | dev->resource[0].start = dev->resource[0].end = 0; | |
91 | dev->resource[0].flags = 0; | |
92 | dev->resource[1].start = dev->resource[1].end = 0; | |
93 | dev->resource[1].flags = 0; | |
94 | } | |
95 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); | |
96 | ||
e05b3b4a PM |
97 | #ifdef CONFIG_PPC_OF |
98 | /* | |
99 | * Functions below are used on OpenFirmware machines. | |
100 | */ | |
101 | static void | |
102 | make_one_node_map(struct device_node* node, u8 pci_bus) | |
103 | { | |
a7f67bdf | 104 | const int *bus_range; |
e05b3b4a PM |
105 | int len; |
106 | ||
107 | if (pci_bus >= pci_bus_count) | |
108 | return; | |
e2eb6392 | 109 | bus_range = of_get_property(node, "bus-range", &len); |
e05b3b4a PM |
110 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
111 | printk(KERN_WARNING "Can't get bus-range for %s, " | |
112 | "assuming it starts at 0\n", node->full_name); | |
113 | pci_to_OF_bus_map[pci_bus] = 0; | |
114 | } else | |
115 | pci_to_OF_bus_map[pci_bus] = bus_range[0]; | |
116 | ||
66524b22 | 117 | for_each_child_of_node(node, node) { |
e05b3b4a | 118 | struct pci_dev* dev; |
a7f67bdf | 119 | const unsigned int *class_code, *reg; |
e05b3b4a | 120 | |
e2eb6392 | 121 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
122 | if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
123 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) | |
124 | continue; | |
e2eb6392 | 125 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
126 | if (!reg) |
127 | continue; | |
ab462768 AC |
128 | dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff)); |
129 | if (!dev || !dev->subordinate) { | |
130 | pci_dev_put(dev); | |
e05b3b4a | 131 | continue; |
ab462768 | 132 | } |
e05b3b4a | 133 | make_one_node_map(node, dev->subordinate->number); |
ab462768 | 134 | pci_dev_put(dev); |
e05b3b4a PM |
135 | } |
136 | } | |
137 | ||
138 | void | |
139 | pcibios_make_OF_bus_map(void) | |
140 | { | |
141 | int i; | |
a4c9e328 | 142 | struct pci_controller *hose, *tmp; |
a7f67bdf | 143 | struct property *map_prop; |
8c8dc322 | 144 | struct device_node *dn; |
e05b3b4a | 145 | |
5cbded58 | 146 | pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL); |
e05b3b4a PM |
147 | if (!pci_to_OF_bus_map) { |
148 | printk(KERN_ERR "Can't allocate OF bus map !\n"); | |
149 | return; | |
150 | } | |
151 | ||
152 | /* We fill the bus map with invalid values, that helps | |
153 | * debugging. | |
154 | */ | |
155 | for (i=0; i<pci_bus_count; i++) | |
156 | pci_to_OF_bus_map[i] = 0xff; | |
157 | ||
158 | /* For each hose, we begin searching bridges */ | |
a4c9e328 | 159 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
44ef3390 SR |
160 | struct device_node* node = hose->dn; |
161 | ||
e05b3b4a PM |
162 | if (!node) |
163 | continue; | |
164 | make_one_node_map(node, hose->first_busno); | |
165 | } | |
8c8dc322 SR |
166 | dn = of_find_node_by_path("/"); |
167 | map_prop = of_find_property(dn, "pci-OF-bus-map", NULL); | |
a7f67bdf JK |
168 | if (map_prop) { |
169 | BUG_ON(pci_bus_count > map_prop->length); | |
170 | memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count); | |
171 | } | |
8c8dc322 | 172 | of_node_put(dn); |
e05b3b4a PM |
173 | #ifdef DEBUG |
174 | printk("PCI->OF bus map:\n"); | |
175 | for (i=0; i<pci_bus_count; i++) { | |
176 | if (pci_to_OF_bus_map[i] == 0xff) | |
177 | continue; | |
178 | printk("%d -> %d\n", i, pci_to_OF_bus_map[i]); | |
179 | } | |
180 | #endif | |
181 | } | |
182 | ||
183 | typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); | |
184 | ||
185 | static struct device_node* | |
66524b22 | 186 | scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data) |
e05b3b4a | 187 | { |
66524b22 | 188 | struct device_node *node; |
e05b3b4a PM |
189 | struct device_node* sub_node; |
190 | ||
66524b22 | 191 | for_each_child_of_node(parent, node) { |
a7f67bdf | 192 | const unsigned int *class_code; |
e05b3b4a | 193 | |
66524b22 SR |
194 | if (filter(node, data)) { |
195 | of_node_put(node); | |
e05b3b4a | 196 | return node; |
66524b22 | 197 | } |
e05b3b4a PM |
198 | |
199 | /* For PCI<->PCI bridges or CardBus bridges, we go down | |
200 | * Note: some OFs create a parent node "multifunc-device" as | |
201 | * a fake root for all functions of a multi-function device, | |
202 | * we go down them as well. | |
203 | */ | |
e2eb6392 | 204 | class_code = of_get_property(node, "class-code", NULL); |
e05b3b4a PM |
205 | if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI && |
206 | (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) && | |
207 | strcmp(node->name, "multifunc-device")) | |
208 | continue; | |
66524b22 SR |
209 | sub_node = scan_OF_pci_childs(node, filter, data); |
210 | if (sub_node) { | |
211 | of_node_put(node); | |
e05b3b4a | 212 | return sub_node; |
66524b22 | 213 | } |
e05b3b4a PM |
214 | } |
215 | return NULL; | |
216 | } | |
217 | ||
dae4828d BH |
218 | static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, |
219 | unsigned int devfn) | |
e05b3b4a | 220 | { |
f8178691 | 221 | struct device_node *np, *cnp; |
dae4828d BH |
222 | const u32 *reg; |
223 | unsigned int psize; | |
224 | ||
85e99b9f | 225 | for_each_child_of_node(parent, np) { |
e2eb6392 | 226 | reg = of_get_property(np, "reg", &psize); |
f8178691 | 227 | if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn) |
dae4828d | 228 | return np; |
f8178691 TA |
229 | |
230 | /* Note: some OFs create a parent node "multifunc-device" as | |
231 | * a fake root for all functions of a multi-function device, | |
232 | * we go down them as well. */ | |
233 | if (!strcmp(np->name, "multifunc-device")) { | |
234 | cnp = scan_OF_for_pci_dev(np, devfn); | |
235 | if (cnp) | |
236 | return cnp; | |
237 | } | |
dae4828d BH |
238 | } |
239 | return NULL; | |
e05b3b4a PM |
240 | } |
241 | ||
dae4828d BH |
242 | |
243 | static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus) | |
e05b3b4a | 244 | { |
dae4828d BH |
245 | struct device_node *parent, *np; |
246 | ||
247 | /* Are we a root bus ? */ | |
248 | if (bus->self == NULL || bus->parent == NULL) { | |
0b1d40c4 | 249 | struct pci_controller *hose = pci_bus_to_host(bus); |
dae4828d BH |
250 | if (hose == NULL) |
251 | return NULL; | |
44ef3390 | 252 | return of_node_get(hose->dn); |
dae4828d BH |
253 | } |
254 | ||
255 | /* not a root bus, we need to get our parent */ | |
256 | parent = scan_OF_for_pci_bus(bus->parent); | |
257 | if (parent == NULL) | |
258 | return NULL; | |
259 | ||
260 | /* now iterate for children for a match */ | |
261 | np = scan_OF_for_pci_dev(parent, bus->self->devfn); | |
262 | of_node_put(parent); | |
263 | ||
dae4828d | 264 | return np; |
e05b3b4a PM |
265 | } |
266 | ||
267 | /* | |
268 | * Scans the OF tree for a device node matching a PCI device | |
269 | */ | |
270 | struct device_node * | |
271 | pci_busdev_to_OF_node(struct pci_bus *bus, int devfn) | |
272 | { | |
dae4828d | 273 | struct device_node *parent, *np; |
e05b3b4a | 274 | |
b0494bc8 | 275 | pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn); |
dae4828d BH |
276 | parent = scan_OF_for_pci_bus(bus); |
277 | if (parent == NULL) | |
e05b3b4a | 278 | return NULL; |
b0494bc8 | 279 | pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>"); |
dae4828d BH |
280 | np = scan_OF_for_pci_dev(parent, devfn); |
281 | of_node_put(parent); | |
b0494bc8 | 282 | pr_debug(" result is %s\n", np ? np->full_name : "<NULL>"); |
dae4828d BH |
283 | |
284 | /* XXX most callers don't release the returned node | |
285 | * mostly because ppc64 doesn't increase the refcount, | |
286 | * we need to fix that. | |
e05b3b4a | 287 | */ |
dae4828d | 288 | return np; |
e05b3b4a PM |
289 | } |
290 | EXPORT_SYMBOL(pci_busdev_to_OF_node); | |
291 | ||
292 | struct device_node* | |
293 | pci_device_to_OF_node(struct pci_dev *dev) | |
294 | { | |
295 | return pci_busdev_to_OF_node(dev->bus, dev->devfn); | |
296 | } | |
297 | EXPORT_SYMBOL(pci_device_to_OF_node); | |
298 | ||
e05b3b4a PM |
299 | static int |
300 | find_OF_pci_device_filter(struct device_node* node, void* data) | |
301 | { | |
302 | return ((void *)node == data); | |
303 | } | |
304 | ||
305 | /* | |
306 | * Returns the PCI device matching a given OF node | |
307 | */ | |
308 | int | |
309 | pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn) | |
310 | { | |
a7f67bdf | 311 | const unsigned int *reg; |
e05b3b4a PM |
312 | struct pci_controller* hose; |
313 | struct pci_dev* dev = NULL; | |
314 | ||
e05b3b4a PM |
315 | /* Make sure it's really a PCI device */ |
316 | hose = pci_find_hose_for_OF_device(node); | |
44ef3390 | 317 | if (!hose || !hose->dn) |
e05b3b4a | 318 | return -ENODEV; |
66524b22 | 319 | if (!scan_OF_pci_childs(hose->dn, |
e05b3b4a PM |
320 | find_OF_pci_device_filter, (void *)node)) |
321 | return -ENODEV; | |
e2eb6392 | 322 | reg = of_get_property(node, "reg", NULL); |
e05b3b4a PM |
323 | if (!reg) |
324 | return -ENODEV; | |
325 | *bus = (reg[0] >> 16) & 0xff; | |
326 | *devfn = ((reg[0] >> 8) & 0xff); | |
327 | ||
328 | /* Ok, here we need some tweak. If we have already renumbered | |
329 | * all busses, we can't rely on the OF bus number any more. | |
330 | * the pci_to_OF_bus_map is not enough as several PCI busses | |
331 | * may match the same OF bus number. | |
332 | */ | |
333 | if (!pci_to_OF_bus_map) | |
334 | return 0; | |
335 | ||
336 | for_each_pci_dev(dev) | |
337 | if (pci_to_OF_bus_map[dev->bus->number] == *bus && | |
338 | dev->devfn == *devfn) { | |
339 | *bus = dev->bus->number; | |
340 | pci_dev_put(dev); | |
341 | return 0; | |
342 | } | |
343 | ||
344 | return -ENODEV; | |
345 | } | |
346 | EXPORT_SYMBOL(pci_device_from_OF_node); | |
347 | ||
e05b3b4a PM |
348 | /* We create the "pci-OF-bus-map" property now so it appears in the |
349 | * /proc device tree | |
350 | */ | |
351 | void __init | |
352 | pci_create_OF_bus_map(void) | |
353 | { | |
354 | struct property* of_prop; | |
8c8dc322 SR |
355 | struct device_node *dn; |
356 | ||
e05b3b4a | 357 | of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256); |
8c8dc322 SR |
358 | if (!of_prop) |
359 | return; | |
360 | dn = of_find_node_by_path("/"); | |
361 | if (dn) { | |
e05b3b4a PM |
362 | memset(of_prop, -1, sizeof(struct property) + 256); |
363 | of_prop->name = "pci-OF-bus-map"; | |
364 | of_prop->length = 256; | |
1a38147e | 365 | of_prop->value = &of_prop[1]; |
8c8dc322 SR |
366 | prom_add_property(dn, of_prop); |
367 | of_node_put(dn); | |
e05b3b4a PM |
368 | } |
369 | } | |
370 | ||
e05b3b4a PM |
371 | #else /* CONFIG_PPC_OF */ |
372 | void pcibios_make_OF_bus_map(void) | |
373 | { | |
374 | } | |
375 | #endif /* CONFIG_PPC_OF */ | |
376 | ||
53280323 BH |
377 | static void __devinit pcibios_scan_phb(struct pci_controller *hose) |
378 | { | |
379 | struct pci_bus *bus; | |
380 | struct device_node *node = hose->dn; | |
381 | unsigned long io_offset; | |
382 | struct resource *res = &hose->io_resource; | |
383 | ||
384 | pr_debug("PCI: Scanning PHB %s\n", | |
385 | node ? node->full_name : "<NO NAME>"); | |
386 | ||
387 | /* Create an empty bus for the toplevel */ | |
388 | bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose); | |
389 | if (bus == NULL) { | |
390 | printk(KERN_ERR "Failed to create bus for PCI domain %04x\n", | |
391 | hose->global_number); | |
392 | return; | |
393 | } | |
394 | bus->secondary = hose->first_busno; | |
395 | hose->bus = bus; | |
396 | ||
397 | /* Fixup IO space offset */ | |
398 | io_offset = (unsigned long)hose->io_base_virt - isa_io_base; | |
399 | res->start = (res->start + io_offset) & 0xffffffffu; | |
400 | res->end = (res->end + io_offset) & 0xffffffffu; | |
401 | ||
402 | /* Wire up PHB bus resources */ | |
403 | pcibios_setup_phb_resources(hose); | |
404 | ||
405 | /* Scan children */ | |
406 | hose->last_busno = bus->subordinate = pci_scan_child_bus(bus); | |
407 | } | |
408 | ||
3fd94c6b | 409 | static int __init pcibios_init(void) |
e05b3b4a | 410 | { |
a4c9e328 | 411 | struct pci_controller *hose, *tmp; |
a4c9e328 | 412 | int next_busno = 0; |
e05b3b4a PM |
413 | |
414 | printk(KERN_INFO "PCI: Probing PCI hardware\n"); | |
415 | ||
fc3fb71c BH |
416 | if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS) |
417 | pci_assign_all_buses = 1; | |
418 | ||
e05b3b4a | 419 | /* Scan all of the recorded PCI controllers. */ |
a4c9e328 | 420 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { |
e05b3b4a PM |
421 | if (pci_assign_all_buses) |
422 | hose->first_busno = next_busno; | |
423 | hose->last_busno = 0xff; | |
53280323 BH |
424 | pcibios_scan_phb(hose); |
425 | pci_bus_add_devices(hose->bus); | |
e05b3b4a PM |
426 | if (pci_assign_all_buses || next_busno <= hose->last_busno) |
427 | next_busno = hose->last_busno + pcibios_assign_bus_offset; | |
428 | } | |
429 | pci_bus_count = next_busno; | |
430 | ||
431 | /* OpenFirmware based machines need a map of OF bus | |
432 | * numbers vs. kernel bus numbers since we may have to | |
433 | * remap them. | |
434 | */ | |
6b82b3e4 | 435 | if (pci_assign_all_buses) |
e05b3b4a PM |
436 | pcibios_make_OF_bus_map(); |
437 | ||
3fd94c6b BH |
438 | /* Call common code to handle resource allocation */ |
439 | pcibios_resource_survey(); | |
e05b3b4a PM |
440 | |
441 | /* Call machine dependent post-init code */ | |
442 | if (ppc_md.pcibios_after_init) | |
443 | ppc_md.pcibios_after_init(); | |
444 | ||
445 | return 0; | |
446 | } | |
447 | ||
448 | subsys_initcall(pcibios_init); | |
449 | ||
0b1d40c4 | 450 | static struct pci_controller* |
e05b3b4a PM |
451 | pci_bus_to_hose(int bus) |
452 | { | |
a4c9e328 | 453 | struct pci_controller *hose, *tmp; |
e05b3b4a | 454 | |
a4c9e328 | 455 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) |
e05b3b4a PM |
456 | if (bus >= hose->first_busno && bus <= hose->last_busno) |
457 | return hose; | |
458 | return NULL; | |
459 | } | |
460 | ||
e05b3b4a PM |
461 | /* Provide information on locations of various I/O regions in physical |
462 | * memory. Do this on a per-card basis so that we choose the right | |
463 | * root bridge. | |
464 | * Note that the returned IO or memory base is a physical address | |
465 | */ | |
466 | ||
467 | long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |
468 | { | |
469 | struct pci_controller* hose; | |
470 | long result = -EOPNOTSUPP; | |
471 | ||
e05b3b4a PM |
472 | hose = pci_bus_to_hose(bus); |
473 | if (!hose) | |
474 | return -ENODEV; | |
475 | ||
476 | switch (which) { | |
477 | case IOBASE_BRIDGE_NUMBER: | |
478 | return (long)hose->first_busno; | |
479 | case IOBASE_MEMORY: | |
480 | return (long)hose->pci_mem_offset; | |
481 | case IOBASE_IO: | |
482 | return (long)hose->io_base_phys; | |
483 | case IOBASE_ISA_IO: | |
484 | return (long)isa_io_base; | |
485 | case IOBASE_ISA_MEM: | |
486 | return (long)isa_mem_base; | |
487 | } | |
488 | ||
489 | return result; | |
490 | } | |
491 | ||
e05b3b4a PM |
492 | /* |
493 | * Null PCI config access functions, for the case when we can't | |
494 | * find a hose. | |
495 | */ | |
496 | #define NULL_PCI_OP(rw, size, type) \ | |
497 | static int \ | |
498 | null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \ | |
499 | { \ | |
500 | return PCIBIOS_DEVICE_NOT_FOUND; \ | |
501 | } | |
502 | ||
503 | static int | |
504 | null_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | |
505 | int len, u32 *val) | |
506 | { | |
507 | return PCIBIOS_DEVICE_NOT_FOUND; | |
508 | } | |
509 | ||
510 | static int | |
511 | null_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | |
512 | int len, u32 val) | |
513 | { | |
514 | return PCIBIOS_DEVICE_NOT_FOUND; | |
515 | } | |
516 | ||
517 | static struct pci_ops null_pci_ops = | |
518 | { | |
6127d1c0 NL |
519 | .read = null_read_config, |
520 | .write = null_write_config, | |
e05b3b4a PM |
521 | }; |
522 | ||
523 | /* | |
524 | * These functions are used early on before PCI scanning is done | |
525 | * and all of the pci_dev and pci_bus structures have been created. | |
526 | */ | |
527 | static struct pci_bus * | |
528 | fake_pci_bus(struct pci_controller *hose, int busnr) | |
529 | { | |
530 | static struct pci_bus bus; | |
531 | ||
532 | if (hose == 0) { | |
533 | hose = pci_bus_to_hose(busnr); | |
534 | if (hose == 0) | |
535 | printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr); | |
536 | } | |
537 | bus.number = busnr; | |
538 | bus.sysdata = hose; | |
539 | bus.ops = hose? hose->ops: &null_pci_ops; | |
540 | return &bus; | |
541 | } | |
542 | ||
543 | #define EARLY_PCI_OP(rw, size, type) \ | |
544 | int early_##rw##_config_##size(struct pci_controller *hose, int bus, \ | |
545 | int devfn, int offset, type value) \ | |
546 | { \ | |
547 | return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \ | |
548 | devfn, offset, value); \ | |
549 | } | |
550 | ||
551 | EARLY_PCI_OP(read, byte, u8 *) | |
552 | EARLY_PCI_OP(read, word, u16 *) | |
553 | EARLY_PCI_OP(read, dword, u32 *) | |
554 | EARLY_PCI_OP(write, byte, u8) | |
555 | EARLY_PCI_OP(write, word, u16) | |
556 | EARLY_PCI_OP(write, dword, u32) | |
38805e5f KG |
557 | |
558 | extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); | |
559 | int early_find_capability(struct pci_controller *hose, int bus, int devfn, | |
560 | int cap) | |
561 | { | |
562 | return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap); | |
563 | } |