Merge branch 'next/drivers' into HEAD
[deliverable/linux.git] / arch / powerpc / kernel / process.c
CommitLineData
14cf11af 1/*
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2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
4 *
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
7 *
8 * PowerPC version
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
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17#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
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22#include <linux/stddef.h>
23#include <linux/unistd.h>
24#include <linux/ptrace.h>
25#include <linux/slab.h>
26#include <linux/user.h>
27#include <linux/elf.h>
28#include <linux/init.h>
29#include <linux/prctl.h>
30#include <linux/init_task.h>
4b16f8e2 31#include <linux/export.h>
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32#include <linux/kallsyms.h>
33#include <linux/mqueue.h>
34#include <linux/hardirq.h>
06d67d54 35#include <linux/utsname.h>
6794c782 36#include <linux/ftrace.h>
79741dd3 37#include <linux/kernel_stat.h>
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38#include <linux/personality.h>
39#include <linux/random.h>
5aae8a53 40#include <linux/hw_breakpoint.h>
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41
42#include <asm/pgtable.h>
43#include <asm/uaccess.h>
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44#include <asm/io.h>
45#include <asm/processor.h>
46#include <asm/mmu.h>
47#include <asm/prom.h>
76032de8 48#include <asm/machdep.h>
c6622f63 49#include <asm/time.h>
ae3a197e 50#include <asm/runlatch.h>
a7f31841 51#include <asm/syscalls.h>
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52#include <asm/switch_to.h>
53#include <asm/debug.h>
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54#ifdef CONFIG_PPC64
55#include <asm/firmware.h>
06d67d54 56#endif
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57#include <linux/kprobes.h>
58#include <linux/kdebug.h>
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59
60extern unsigned long _get_SP(void);
61
62#ifndef CONFIG_SMP
63struct task_struct *last_task_used_math = NULL;
64struct task_struct *last_task_used_altivec = NULL;
ce48b210 65struct task_struct *last_task_used_vsx = NULL;
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66struct task_struct *last_task_used_spe = NULL;
67#endif
68
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69/*
70 * Make sure the floating-point register state in the
71 * the thread_struct is up to date for task tsk.
72 */
73void flush_fp_to_thread(struct task_struct *tsk)
74{
75 if (tsk->thread.regs) {
76 /*
77 * We need to disable preemption here because if we didn't,
78 * another process could get scheduled after the regs->msr
79 * test but before we have finished saving the FP registers
80 * to the thread_struct. That process could take over the
81 * FPU, and then when we get scheduled again we would store
82 * bogus values for the remaining FP registers.
83 */
84 preempt_disable();
85 if (tsk->thread.regs->msr & MSR_FP) {
86#ifdef CONFIG_SMP
87 /*
88 * This should only ever be called for current or
89 * for a stopped child process. Since we save away
90 * the FP register state on context switch on SMP,
91 * there is something wrong if a stopped child appears
92 * to still have its FP state in the CPU registers.
93 */
94 BUG_ON(tsk != current);
95#endif
0ee6c15e 96 giveup_fpu(tsk);
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97 }
98 preempt_enable();
99 }
100}
de56a948 101EXPORT_SYMBOL_GPL(flush_fp_to_thread);
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102
103void enable_kernel_fp(void)
104{
105 WARN_ON(preemptible());
106
107#ifdef CONFIG_SMP
108 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
109 giveup_fpu(current);
110 else
111 giveup_fpu(NULL); /* just enables FP for kernel */
112#else
113 giveup_fpu(last_task_used_math);
114#endif /* CONFIG_SMP */
115}
116EXPORT_SYMBOL(enable_kernel_fp);
117
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118#ifdef CONFIG_ALTIVEC
119void enable_kernel_altivec(void)
120{
121 WARN_ON(preemptible());
122
123#ifdef CONFIG_SMP
124 if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
125 giveup_altivec(current);
126 else
35000870 127 giveup_altivec_notask();
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128#else
129 giveup_altivec(last_task_used_altivec);
130#endif /* CONFIG_SMP */
131}
132EXPORT_SYMBOL(enable_kernel_altivec);
133
134/*
135 * Make sure the VMX/Altivec register state in the
136 * the thread_struct is up to date for task tsk.
137 */
138void flush_altivec_to_thread(struct task_struct *tsk)
139{
140 if (tsk->thread.regs) {
141 preempt_disable();
142 if (tsk->thread.regs->msr & MSR_VEC) {
143#ifdef CONFIG_SMP
144 BUG_ON(tsk != current);
145#endif
0ee6c15e 146 giveup_altivec(tsk);
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147 }
148 preempt_enable();
149 }
150}
de56a948 151EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
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152#endif /* CONFIG_ALTIVEC */
153
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154#ifdef CONFIG_VSX
155#if 0
156/* not currently used, but some crazy RAID module might want to later */
157void enable_kernel_vsx(void)
158{
159 WARN_ON(preemptible());
160
161#ifdef CONFIG_SMP
162 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
163 giveup_vsx(current);
164 else
165 giveup_vsx(NULL); /* just enable vsx for kernel - force */
166#else
167 giveup_vsx(last_task_used_vsx);
168#endif /* CONFIG_SMP */
169}
170EXPORT_SYMBOL(enable_kernel_vsx);
171#endif
172
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173void giveup_vsx(struct task_struct *tsk)
174{
175 giveup_fpu(tsk);
176 giveup_altivec(tsk);
177 __giveup_vsx(tsk);
178}
179
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180void flush_vsx_to_thread(struct task_struct *tsk)
181{
182 if (tsk->thread.regs) {
183 preempt_disable();
184 if (tsk->thread.regs->msr & MSR_VSX) {
185#ifdef CONFIG_SMP
186 BUG_ON(tsk != current);
187#endif
188 giveup_vsx(tsk);
189 }
190 preempt_enable();
191 }
192}
de56a948 193EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
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194#endif /* CONFIG_VSX */
195
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196#ifdef CONFIG_SPE
197
198void enable_kernel_spe(void)
199{
200 WARN_ON(preemptible());
201
202#ifdef CONFIG_SMP
203 if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
204 giveup_spe(current);
205 else
206 giveup_spe(NULL); /* just enable SPE for kernel - force */
207#else
208 giveup_spe(last_task_used_spe);
209#endif /* __SMP __ */
210}
211EXPORT_SYMBOL(enable_kernel_spe);
212
213void flush_spe_to_thread(struct task_struct *tsk)
214{
215 if (tsk->thread.regs) {
216 preempt_disable();
217 if (tsk->thread.regs->msr & MSR_SPE) {
218#ifdef CONFIG_SMP
219 BUG_ON(tsk != current);
220#endif
685659ee 221 tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
0ee6c15e 222 giveup_spe(tsk);
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223 }
224 preempt_enable();
225 }
226}
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227#endif /* CONFIG_SPE */
228
5388fb10 229#ifndef CONFIG_SMP
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230/*
231 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
232 * and the current task has some state, discard it.
233 */
5388fb10 234void discard_lazy_cpu_state(void)
48abec07 235{
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236 preempt_disable();
237 if (last_task_used_math == current)
238 last_task_used_math = NULL;
239#ifdef CONFIG_ALTIVEC
240 if (last_task_used_altivec == current)
241 last_task_used_altivec = NULL;
242#endif /* CONFIG_ALTIVEC */
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243#ifdef CONFIG_VSX
244 if (last_task_used_vsx == current)
245 last_task_used_vsx = NULL;
246#endif /* CONFIG_VSX */
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247#ifdef CONFIG_SPE
248 if (last_task_used_spe == current)
249 last_task_used_spe = NULL;
250#endif
251 preempt_enable();
48abec07 252}
5388fb10 253#endif /* CONFIG_SMP */
48abec07 254
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255#ifdef CONFIG_PPC_ADV_DEBUG_REGS
256void do_send_trap(struct pt_regs *regs, unsigned long address,
257 unsigned long error_code, int signal_code, int breakpt)
258{
259 siginfo_t info;
260
261 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
262 11, SIGSEGV) == NOTIFY_STOP)
263 return;
264
265 /* Deliver the signal to userspace */
266 info.si_signo = SIGTRAP;
267 info.si_errno = breakpt; /* breakpoint or watchpoint id */
268 info.si_code = signal_code;
269 info.si_addr = (void __user *)address;
270 force_sig_info(SIGTRAP, &info, current);
271}
272#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
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273void do_dabr(struct pt_regs *regs, unsigned long address,
274 unsigned long error_code)
275{
276 siginfo_t info;
277
278 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
279 11, SIGSEGV) == NOTIFY_STOP)
280 return;
281
282 if (debugger_dabr_match(regs))
283 return;
284
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285 /* Clear the DABR */
286 set_dabr(0);
287
288 /* Deliver the signal to userspace */
289 info.si_signo = SIGTRAP;
290 info.si_errno = 0;
291 info.si_code = TRAP_HWBKPT;
292 info.si_addr = (void __user *)address;
293 force_sig_info(SIGTRAP, &info, current);
294}
3bffb652 295#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
d6a61bfc 296
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297static DEFINE_PER_CPU(unsigned long, current_dabr);
298
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299#ifdef CONFIG_PPC_ADV_DEBUG_REGS
300/*
301 * Set the debug registers back to their default "safe" values.
302 */
303static void set_debug_reg_defaults(struct thread_struct *thread)
304{
305 thread->iac1 = thread->iac2 = 0;
306#if CONFIG_PPC_ADV_DEBUG_IACS > 2
307 thread->iac3 = thread->iac4 = 0;
308#endif
309 thread->dac1 = thread->dac2 = 0;
310#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
311 thread->dvc1 = thread->dvc2 = 0;
312#endif
313 thread->dbcr0 = 0;
314#ifdef CONFIG_BOOKE
315 /*
316 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
317 */
318 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
319 DBCR1_IAC3US | DBCR1_IAC4US;
320 /*
321 * Force Data Address Compare User/Supervisor bits to be User-only
322 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
323 */
324 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
325#else
326 thread->dbcr1 = 0;
327#endif
328}
329
330static void prime_debug_regs(struct thread_struct *thread)
331{
332 mtspr(SPRN_IAC1, thread->iac1);
333 mtspr(SPRN_IAC2, thread->iac2);
334#if CONFIG_PPC_ADV_DEBUG_IACS > 2
335 mtspr(SPRN_IAC3, thread->iac3);
336 mtspr(SPRN_IAC4, thread->iac4);
337#endif
338 mtspr(SPRN_DAC1, thread->dac1);
339 mtspr(SPRN_DAC2, thread->dac2);
340#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
341 mtspr(SPRN_DVC1, thread->dvc1);
342 mtspr(SPRN_DVC2, thread->dvc2);
343#endif
344 mtspr(SPRN_DBCR0, thread->dbcr0);
345 mtspr(SPRN_DBCR1, thread->dbcr1);
346#ifdef CONFIG_BOOKE
347 mtspr(SPRN_DBCR2, thread->dbcr2);
348#endif
349}
350/*
351 * Unless neither the old or new thread are making use of the
352 * debug registers, set the debug registers from the values
353 * stored in the new thread.
354 */
355static void switch_booke_debug_regs(struct thread_struct *new_thread)
356{
357 if ((current->thread.dbcr0 & DBCR0_IDM)
358 || (new_thread->dbcr0 & DBCR0_IDM))
359 prime_debug_regs(new_thread);
360}
361#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
e0780b72 362#ifndef CONFIG_HAVE_HW_BREAKPOINT
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363static void set_debug_reg_defaults(struct thread_struct *thread)
364{
365 if (thread->dabr) {
366 thread->dabr = 0;
367 set_dabr(0);
368 }
369}
e0780b72 370#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
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371#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
372
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373int set_dabr(unsigned long dabr)
374{
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375 __get_cpu_var(current_dabr) = dabr;
376
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377 if (ppc_md.set_dabr)
378 return ppc_md.set_dabr(dabr);
14cf11af 379
791cc501 380 /* XXX should we have a CPU_FTR_HAS_DABR ? */
172ae2e7 381#ifdef CONFIG_PPC_ADV_DEBUG_REGS
d6a61bfc 382 mtspr(SPRN_DAC1, dabr);
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383#ifdef CONFIG_PPC_47x
384 isync();
385#endif
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386#elif defined(CONFIG_PPC_BOOK3S)
387 mtspr(SPRN_DABR, dabr);
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388#endif
389
c6c9eace 390
cab0af98 391 return 0;
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392}
393
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394#ifdef CONFIG_PPC64
395DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
06d67d54 396#endif
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397
398struct task_struct *__switch_to(struct task_struct *prev,
399 struct task_struct *new)
400{
401 struct thread_struct *new_thread, *old_thread;
402 unsigned long flags;
403 struct task_struct *last;
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404#ifdef CONFIG_PPC_BOOK3S_64
405 struct ppc64_tlb_batch *batch;
406#endif
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407
408#ifdef CONFIG_SMP
409 /* avoid complexity of lazy save/restore of fpu
410 * by just saving it every time we switch out if
411 * this task used the fpu during the last quantum.
412 *
413 * If it tries to use the fpu again, it'll trap and
414 * reload its fp regs. So we don't have to do a restore
415 * every switch, just a save.
416 * -- Cort
417 */
418 if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
419 giveup_fpu(prev);
420#ifdef CONFIG_ALTIVEC
421 /*
422 * If the previous thread used altivec in the last quantum
423 * (thus changing altivec regs) then save them.
424 * We used to check the VRSAVE register but not all apps
425 * set it, so we don't rely on it now (and in fact we need
426 * to save & restore VSCR even if VRSAVE == 0). -- paulus
427 *
428 * On SMP we always save/restore altivec regs just to avoid the
429 * complexity of changing processors.
430 * -- Cort
431 */
432 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
433 giveup_altivec(prev);
14cf11af 434#endif /* CONFIG_ALTIVEC */
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435#ifdef CONFIG_VSX
436 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
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437 /* VMX and FPU registers are already save here */
438 __giveup_vsx(prev);
ce48b210 439#endif /* CONFIG_VSX */
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440#ifdef CONFIG_SPE
441 /*
442 * If the previous thread used spe in the last quantum
443 * (thus changing spe regs) then save them.
444 *
445 * On SMP we always save/restore spe regs just to avoid the
446 * complexity of changing processors.
447 */
448 if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
449 giveup_spe(prev);
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450#endif /* CONFIG_SPE */
451
452#else /* CONFIG_SMP */
453#ifdef CONFIG_ALTIVEC
454 /* Avoid the trap. On smp this this never happens since
455 * we don't set last_task_used_altivec -- Cort
456 */
457 if (new->thread.regs && last_task_used_altivec == new)
458 new->thread.regs->msr |= MSR_VEC;
459#endif /* CONFIG_ALTIVEC */
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460#ifdef CONFIG_VSX
461 if (new->thread.regs && last_task_used_vsx == new)
462 new->thread.regs->msr |= MSR_VSX;
463#endif /* CONFIG_VSX */
c0c0d996 464#ifdef CONFIG_SPE
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465 /* Avoid the trap. On smp this this never happens since
466 * we don't set last_task_used_spe
467 */
468 if (new->thread.regs && last_task_used_spe == new)
469 new->thread.regs->msr |= MSR_SPE;
470#endif /* CONFIG_SPE */
c0c0d996 471
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472#endif /* CONFIG_SMP */
473
172ae2e7 474#ifdef CONFIG_PPC_ADV_DEBUG_REGS
3bffb652 475 switch_booke_debug_regs(&new->thread);
c6c9eace 476#else
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477/*
478 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
479 * schedule DABR
480 */
481#ifndef CONFIG_HAVE_HW_BREAKPOINT
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482 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
483 set_dabr(new->thread.dabr);
5aae8a53 484#endif /* CONFIG_HAVE_HW_BREAKPOINT */
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485#endif
486
c6c9eace 487
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488 new_thread = &new->thread;
489 old_thread = &current->thread;
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490
491#ifdef CONFIG_PPC64
492 /*
493 * Collect processor utilization data per process
494 */
495 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
496 struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
497 long unsigned start_tb, current_tb;
498 start_tb = old_thread->start_tb;
499 cu->current_tb = current_tb = mfspr(SPRN_PURR);
500 old_thread->accum_tb += (current_tb - start_tb);
501 new_thread->start_tb = current_tb;
502 }
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503#endif /* CONFIG_PPC64 */
504
505#ifdef CONFIG_PPC_BOOK3S_64
506 batch = &__get_cpu_var(ppc64_tlb_batch);
507 if (batch->active) {
508 current_thread_info()->local_flags |= _TLF_LAZY_MMU;
509 if (batch->index)
510 __flush_tlb_pending(batch);
511 batch->active = 0;
512 }
513#endif /* CONFIG_PPC_BOOK3S_64 */
06d67d54 514
14cf11af 515 local_irq_save(flags);
c6622f63 516
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517 /*
518 * We can't take a PMU exception inside _switch() since there is a
519 * window where the kernel stack SLB and the kernel stack are out
520 * of sync. Hard disable here.
521 */
522 hard_irq_disable();
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523 last = _switch(old_thread, new_thread);
524
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525#ifdef CONFIG_PPC_BOOK3S_64
526 if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
527 current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
528 batch = &__get_cpu_var(ppc64_tlb_batch);
529 batch->active = 1;
530 }
531#endif /* CONFIG_PPC_BOOK3S_64 */
532
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533 local_irq_restore(flags);
534
535 return last;
536}
537
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538static int instructions_to_print = 16;
539
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540static void show_instructions(struct pt_regs *regs)
541{
542 int i;
543 unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
544 sizeof(int));
545
546 printk("Instruction dump:");
547
548 for (i = 0; i < instructions_to_print; i++) {
549 int instr;
550
551 if (!(i % 8))
552 printk("\n");
553
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554#if !defined(CONFIG_BOOKE)
555 /* If executing with the IMMU off, adjust pc rather
556 * than print XXXXXXXX.
557 */
558 if (!(regs->msr & MSR_IR))
559 pc = (unsigned long)phys_to_virt(pc);
560#endif
561
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562 /* We use __get_user here *only* to avoid an OOPS on a
563 * bad address because the pc *should* only be a
564 * kernel address.
565 */
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566 if (!__kernel_text_address(pc) ||
567 __get_user(instr, (unsigned int __user *)pc)) {
40c8cefa 568 printk(KERN_CONT "XXXXXXXX ");
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569 } else {
570 if (regs->nip == pc)
40c8cefa 571 printk(KERN_CONT "<%08x> ", instr);
06d67d54 572 else
40c8cefa 573 printk(KERN_CONT "%08x ", instr);
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574 }
575
576 pc += sizeof(int);
577 }
578
579 printk("\n");
580}
581
582static struct regbit {
583 unsigned long bit;
584 const char *name;
585} msr_bits[] = {
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586#if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
587 {MSR_SF, "SF"},
588 {MSR_HV, "HV"},
589#endif
590 {MSR_VEC, "VEC"},
591 {MSR_VSX, "VSX"},
592#ifdef CONFIG_BOOKE
593 {MSR_CE, "CE"},
594#endif
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595 {MSR_EE, "EE"},
596 {MSR_PR, "PR"},
597 {MSR_FP, "FP"},
598 {MSR_ME, "ME"},
3bfd0c9c 599#ifdef CONFIG_BOOKE
1b98326b 600 {MSR_DE, "DE"},
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601#else
602 {MSR_SE, "SE"},
603 {MSR_BE, "BE"},
604#endif
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605 {MSR_IR, "IR"},
606 {MSR_DR, "DR"},
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607 {MSR_PMM, "PMM"},
608#ifndef CONFIG_BOOKE
609 {MSR_RI, "RI"},
610 {MSR_LE, "LE"},
611#endif
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612 {0, NULL}
613};
614
615static void printbits(unsigned long val, struct regbit *bits)
616{
617 const char *sep = "";
618
619 printk("<");
620 for (; bits->bit; ++bits)
621 if (val & bits->bit) {
622 printk("%s%s", sep, bits->name);
623 sep = ",";
624 }
625 printk(">");
626}
627
628#ifdef CONFIG_PPC64
f6f7dde3 629#define REG "%016lx"
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630#define REGS_PER_LINE 4
631#define LAST_VOLATILE 13
632#else
f6f7dde3 633#define REG "%08lx"
06d67d54
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634#define REGS_PER_LINE 8
635#define LAST_VOLATILE 12
636#endif
637
14cf11af
PM
638void show_regs(struct pt_regs * regs)
639{
640 int i, trap;
641
06d67d54
PM
642 printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
643 regs->nip, regs->link, regs->ctr);
644 printk("REGS: %p TRAP: %04lx %s (%s)\n",
96b644bd 645 regs, regs->trap, print_tainted(), init_utsname()->release);
06d67d54
PM
646 printk("MSR: "REG" ", regs->msr);
647 printbits(regs->msr, msr_bits);
f6f7dde3 648 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
7230c564
BH
649#ifdef CONFIG_PPC64
650 printk("SOFTE: %ld\n", regs->softe);
651#endif
14cf11af 652 trap = TRAP(regs);
5115a026
MN
653 if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
654 printk("CFAR: "REG"\n", regs->orig_gpr3);
14cf11af 655 if (trap == 0x300 || trap == 0x600)
ba28c9aa 656#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
14170789
KG
657 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
658#else
7071854b 659 printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
14170789 660#endif
06d67d54 661 printk("TASK = %p[%d] '%s' THREAD: %p",
19c5870c 662 current, task_pid_nr(current), current->comm, task_thread_info(current));
14cf11af
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663
664#ifdef CONFIG_SMP
79ccd1be 665 printk(" CPU: %d", raw_smp_processor_id());
14cf11af
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666#endif /* CONFIG_SMP */
667
668 for (i = 0; i < 32; i++) {
06d67d54 669 if ((i % REGS_PER_LINE) == 0)
a2367194 670 printk("\nGPR%02d: ", i);
06d67d54
PM
671 printk(REG " ", regs->gpr[i]);
672 if (i == LAST_VOLATILE && !FULL_REGS(regs))
14cf11af
PM
673 break;
674 }
675 printk("\n");
676#ifdef CONFIG_KALLSYMS
677 /*
678 * Lookup NIP late so we have the best change of getting the
679 * above info out without failing
680 */
058c78f4
BH
681 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
682 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
14cf11af
PM
683#endif
684 show_stack(current, (unsigned long *) regs->gpr[1]);
06d67d54
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685 if (!user_mode(regs))
686 show_instructions(regs);
14cf11af
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687}
688
689void exit_thread(void)
690{
48abec07 691 discard_lazy_cpu_state();
14cf11af
PM
692}
693
694void flush_thread(void)
695{
48abec07 696 discard_lazy_cpu_state();
14cf11af 697
e0780b72 698#ifdef CONFIG_HAVE_HW_BREAKPOINT
5aae8a53 699 flush_ptrace_hw_breakpoint(current);
e0780b72 700#else /* CONFIG_HAVE_HW_BREAKPOINT */
3bffb652 701 set_debug_reg_defaults(&current->thread);
e0780b72 702#endif /* CONFIG_HAVE_HW_BREAKPOINT */
14cf11af
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703}
704
705void
706release_thread(struct task_struct *t)
707{
708}
709
710/*
55ccf3fe
SS
711 * this gets called so that we can store coprocessor state into memory and
712 * copy the current task into the new thread.
14cf11af 713 */
55ccf3fe 714int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
14cf11af 715{
55ccf3fe
SS
716 flush_fp_to_thread(src);
717 flush_altivec_to_thread(src);
718 flush_vsx_to_thread(src);
719 flush_spe_to_thread(src);
5aae8a53 720#ifdef CONFIG_HAVE_HW_BREAKPOINT
55ccf3fe 721 flush_ptrace_hw_breakpoint(src);
5aae8a53 722#endif /* CONFIG_HAVE_HW_BREAKPOINT */
55ccf3fe
SS
723
724 *dst = *src;
725 return 0;
14cf11af
PM
726}
727
728/*
729 * Copy a thread..
730 */
efcac658
AK
731extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
732
6f2c55b8 733int copy_thread(unsigned long clone_flags, unsigned long usp,
06d67d54
PM
734 unsigned long unused, struct task_struct *p,
735 struct pt_regs *regs)
14cf11af
PM
736{
737 struct pt_regs *childregs, *kregs;
738 extern void ret_from_fork(void);
0cec6fd1 739 unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
14cf11af
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740
741 CHECK_FULL_REGS(regs);
742 /* Copy registers */
743 sp -= sizeof(struct pt_regs);
744 childregs = (struct pt_regs *) sp;
745 *childregs = *regs;
746 if ((childregs->msr & MSR_PR) == 0) {
747 /* for kernel thread, set `current' and stackptr in new task */
748 childregs->gpr[1] = sp + sizeof(struct pt_regs);
06d67d54 749#ifdef CONFIG_PPC32
14cf11af 750 childregs->gpr[2] = (unsigned long) p;
06d67d54 751#else
b5e2fc1c 752 clear_tsk_thread_flag(p, TIF_32BIT);
06d67d54 753#endif
14cf11af
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754 p->thread.regs = NULL; /* no user register state */
755 } else {
756 childregs->gpr[1] = usp;
757 p->thread.regs = childregs;
06d67d54
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758 if (clone_flags & CLONE_SETTLS) {
759#ifdef CONFIG_PPC64
9904b005 760 if (!is_32bit_task())
06d67d54
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761 childregs->gpr[13] = childregs->gpr[6];
762 else
763#endif
764 childregs->gpr[2] = childregs->gpr[6];
765 }
14cf11af
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766 }
767 childregs->gpr[3] = 0; /* Result from fork() */
768 sp -= STACK_FRAME_OVERHEAD;
14cf11af
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769
770 /*
771 * The way this works is that at some point in the future
772 * some task will call _switch to switch to the new task.
773 * That will pop off the stack frame created below and start
774 * the new task running at ret_from_fork. The new task will
775 * do some house keeping and then return from the fork or clone
776 * system call, using the stack frame created above.
777 */
778 sp -= sizeof(struct pt_regs);
779 kregs = (struct pt_regs *) sp;
780 sp -= STACK_FRAME_OVERHEAD;
781 p->thread.ksp = sp;
85218827
KG
782 p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
783 _ALIGN_UP(sizeof(struct thread_info), 16);
14cf11af 784
94491685 785#ifdef CONFIG_PPC_STD_MMU_64
44ae3ab3 786 if (mmu_has_feature(MMU_FTR_SLB)) {
1189be65 787 unsigned long sp_vsid;
3c726f8d 788 unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
06d67d54 789
44ae3ab3 790 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
1189be65
PM
791 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
792 << SLB_VSID_SHIFT_1T;
793 else
794 sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
795 << SLB_VSID_SHIFT;
3c726f8d 796 sp_vsid |= SLB_VSID_KERNEL | llp;
06d67d54
PM
797 p->thread.ksp_vsid = sp_vsid;
798 }
747bea91 799#endif /* CONFIG_PPC_STD_MMU_64 */
efcac658
AK
800#ifdef CONFIG_PPC64
801 if (cpu_has_feature(CPU_FTR_DSCR)) {
1021cb26
AB
802 p->thread.dscr_inherit = current->thread.dscr_inherit;
803 p->thread.dscr = current->thread.dscr;
efcac658
AK
804 }
805#endif
06d67d54
PM
806
807 /*
808 * The PPC64 ABI makes use of a TOC to contain function
809 * pointers. The function (ret_from_except) is actually a pointer
810 * to the TOC entry. The first entry is a pointer to the actual
811 * function.
812 */
747bea91 813#ifdef CONFIG_PPC64
06d67d54
PM
814 kregs->nip = *((unsigned long *)ret_from_fork);
815#else
816 kregs->nip = (unsigned long)ret_from_fork;
06d67d54 817#endif
14cf11af
PM
818
819 return 0;
820}
821
822/*
823 * Set up a thread for executing a new program
824 */
06d67d54 825void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
14cf11af 826{
90eac727
ME
827#ifdef CONFIG_PPC64
828 unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
829#endif
830
06d67d54
PM
831 /*
832 * If we exec out of a kernel thread then thread.regs will not be
833 * set. Do it now.
834 */
835 if (!current->thread.regs) {
0cec6fd1
AV
836 struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
837 current->thread.regs = regs - 1;
06d67d54
PM
838 }
839
14cf11af
PM
840 memset(regs->gpr, 0, sizeof(regs->gpr));
841 regs->ctr = 0;
842 regs->link = 0;
843 regs->xer = 0;
844 regs->ccr = 0;
14cf11af 845 regs->gpr[1] = sp;
06d67d54 846
474f8196
RM
847 /*
848 * We have just cleared all the nonvolatile GPRs, so make
849 * FULL_REGS(regs) return true. This is necessary to allow
850 * ptrace to examine the thread immediately after exec.
851 */
852 regs->trap &= ~1UL;
853
06d67d54
PM
854#ifdef CONFIG_PPC32
855 regs->mq = 0;
856 regs->nip = start;
14cf11af 857 regs->msr = MSR_USER;
06d67d54 858#else
9904b005 859 if (!is_32bit_task()) {
90eac727 860 unsigned long entry, toc;
06d67d54
PM
861
862 /* start is a relocated pointer to the function descriptor for
863 * the elf _start routine. The first entry in the function
864 * descriptor is the entry address of _start and the second
865 * entry is the TOC value we need to use.
866 */
867 __get_user(entry, (unsigned long __user *)start);
868 __get_user(toc, (unsigned long __user *)start+1);
869
870 /* Check whether the e_entry function descriptor entries
871 * need to be relocated before we can use them.
872 */
873 if (load_addr != 0) {
874 entry += load_addr;
875 toc += load_addr;
876 }
877 regs->nip = entry;
878 regs->gpr[2] = toc;
879 regs->msr = MSR_USER64;
d4bf9a78
SR
880 } else {
881 regs->nip = start;
882 regs->gpr[2] = 0;
883 regs->msr = MSR_USER32;
06d67d54
PM
884 }
885#endif
886
48abec07 887 discard_lazy_cpu_state();
ce48b210
MN
888#ifdef CONFIG_VSX
889 current->thread.used_vsr = 0;
890#endif
14cf11af 891 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
25c8a78b 892 current->thread.fpscr.val = 0;
14cf11af
PM
893#ifdef CONFIG_ALTIVEC
894 memset(current->thread.vr, 0, sizeof(current->thread.vr));
895 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
06d67d54 896 current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
14cf11af
PM
897 current->thread.vrsave = 0;
898 current->thread.used_vr = 0;
899#endif /* CONFIG_ALTIVEC */
900#ifdef CONFIG_SPE
901 memset(current->thread.evr, 0, sizeof(current->thread.evr));
902 current->thread.acc = 0;
903 current->thread.spefscr = 0;
904 current->thread.used_spe = 0;
905#endif /* CONFIG_SPE */
906}
907
908#define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
909 | PR_FP_EXC_RES | PR_FP_EXC_INV)
910
911int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
912{
913 struct pt_regs *regs = tsk->thread.regs;
914
915 /* This is a bit hairy. If we are an SPE enabled processor
916 * (have embedded fp) we store the IEEE exception enable flags in
917 * fpexc_mode. fpexc_mode is also used for setting FP exception
918 * mode (asyn, precise, disabled) for 'Classic' FP. */
919 if (val & PR_FP_EXC_SW_ENABLE) {
920#ifdef CONFIG_SPE
5e14d21e
KG
921 if (cpu_has_feature(CPU_FTR_SPE)) {
922 tsk->thread.fpexc_mode = val &
923 (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
924 return 0;
925 } else {
926 return -EINVAL;
927 }
14cf11af
PM
928#else
929 return -EINVAL;
930#endif
14cf11af 931 }
06d67d54
PM
932
933 /* on a CONFIG_SPE this does not hurt us. The bits that
934 * __pack_fe01 use do not overlap with bits used for
935 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
936 * on CONFIG_SPE implementations are reserved so writing to
937 * them does not change anything */
938 if (val > PR_FP_EXC_PRECISE)
939 return -EINVAL;
940 tsk->thread.fpexc_mode = __pack_fe01(val);
941 if (regs != NULL && (regs->msr & MSR_FP) != 0)
942 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
943 | tsk->thread.fpexc_mode;
14cf11af
PM
944 return 0;
945}
946
947int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
948{
949 unsigned int val;
950
951 if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
952#ifdef CONFIG_SPE
5e14d21e
KG
953 if (cpu_has_feature(CPU_FTR_SPE))
954 val = tsk->thread.fpexc_mode;
955 else
956 return -EINVAL;
14cf11af
PM
957#else
958 return -EINVAL;
959#endif
960 else
961 val = __unpack_fe01(tsk->thread.fpexc_mode);
962 return put_user(val, (unsigned int __user *) adr);
963}
964
fab5db97
PM
965int set_endian(struct task_struct *tsk, unsigned int val)
966{
967 struct pt_regs *regs = tsk->thread.regs;
968
969 if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
970 (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
971 return -EINVAL;
972
973 if (regs == NULL)
974 return -EINVAL;
975
976 if (val == PR_ENDIAN_BIG)
977 regs->msr &= ~MSR_LE;
978 else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
979 regs->msr |= MSR_LE;
980 else
981 return -EINVAL;
982
983 return 0;
984}
985
986int get_endian(struct task_struct *tsk, unsigned long adr)
987{
988 struct pt_regs *regs = tsk->thread.regs;
989 unsigned int val;
990
991 if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
992 !cpu_has_feature(CPU_FTR_REAL_LE))
993 return -EINVAL;
994
995 if (regs == NULL)
996 return -EINVAL;
997
998 if (regs->msr & MSR_LE) {
999 if (cpu_has_feature(CPU_FTR_REAL_LE))
1000 val = PR_ENDIAN_LITTLE;
1001 else
1002 val = PR_ENDIAN_PPC_LITTLE;
1003 } else
1004 val = PR_ENDIAN_BIG;
1005
1006 return put_user(val, (unsigned int __user *)adr);
1007}
1008
e9370ae1
PM
1009int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
1010{
1011 tsk->thread.align_ctl = val;
1012 return 0;
1013}
1014
1015int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
1016{
1017 return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
1018}
1019
06d67d54
PM
1020#define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
1021
14cf11af
PM
1022int sys_clone(unsigned long clone_flags, unsigned long usp,
1023 int __user *parent_tidp, void __user *child_threadptr,
1024 int __user *child_tidp, int p6,
1025 struct pt_regs *regs)
1026{
1027 CHECK_FULL_REGS(regs);
1028 if (usp == 0)
1029 usp = regs->gpr[1]; /* stack pointer for child */
06d67d54 1030#ifdef CONFIG_PPC64
9904b005 1031 if (is_32bit_task()) {
06d67d54
PM
1032 parent_tidp = TRUNC_PTR(parent_tidp);
1033 child_tidp = TRUNC_PTR(child_tidp);
1034 }
1035#endif
14cf11af
PM
1036 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
1037}
1038
1039int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
1040 unsigned long p4, unsigned long p5, unsigned long p6,
1041 struct pt_regs *regs)
1042{
1043 CHECK_FULL_REGS(regs);
1044 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
1045}
1046
1047int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
1048 unsigned long p4, unsigned long p5, unsigned long p6,
1049 struct pt_regs *regs)
1050{
1051 CHECK_FULL_REGS(regs);
1052 return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
1053 regs, 0, NULL, NULL);
1054}
1055
1056int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
1057 unsigned long a3, unsigned long a4, unsigned long a5,
1058 struct pt_regs *regs)
1059{
1060 int error;
06d67d54 1061 char *filename;
14cf11af 1062
c7887325 1063 filename = getname((const char __user *) a0);
14cf11af
PM
1064 error = PTR_ERR(filename);
1065 if (IS_ERR(filename))
1066 goto out;
1067 flush_fp_to_thread(current);
1068 flush_altivec_to_thread(current);
1069 flush_spe_to_thread(current);
d7627467
DH
1070 error = do_execve(filename,
1071 (const char __user *const __user *) a1,
1072 (const char __user *const __user *) a2, regs);
14cf11af
PM
1073 putname(filename);
1074out:
1075 return error;
1076}
1077
bb72c481
PM
1078static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
1079 unsigned long nbytes)
1080{
1081 unsigned long stack_page;
1082 unsigned long cpu = task_cpu(p);
1083
1084 /*
1085 * Avoid crashing if the stack has overflowed and corrupted
1086 * task_cpu(p), which is in the thread_info struct.
1087 */
1088 if (cpu < NR_CPUS && cpu_possible(cpu)) {
1089 stack_page = (unsigned long) hardirq_ctx[cpu];
1090 if (sp >= stack_page + sizeof(struct thread_struct)
1091 && sp <= stack_page + THREAD_SIZE - nbytes)
1092 return 1;
1093
1094 stack_page = (unsigned long) softirq_ctx[cpu];
1095 if (sp >= stack_page + sizeof(struct thread_struct)
1096 && sp <= stack_page + THREAD_SIZE - nbytes)
1097 return 1;
1098 }
1099 return 0;
1100}
1101
2f25194d 1102int validate_sp(unsigned long sp, struct task_struct *p,
14cf11af
PM
1103 unsigned long nbytes)
1104{
0cec6fd1 1105 unsigned long stack_page = (unsigned long)task_stack_page(p);
14cf11af
PM
1106
1107 if (sp >= stack_page + sizeof(struct thread_struct)
1108 && sp <= stack_page + THREAD_SIZE - nbytes)
1109 return 1;
1110
bb72c481 1111 return valid_irq_stack(sp, p, nbytes);
14cf11af
PM
1112}
1113
2f25194d
AB
1114EXPORT_SYMBOL(validate_sp);
1115
14cf11af
PM
1116unsigned long get_wchan(struct task_struct *p)
1117{
1118 unsigned long ip, sp;
1119 int count = 0;
1120
1121 if (!p || p == current || p->state == TASK_RUNNING)
1122 return 0;
1123
1124 sp = p->thread.ksp;
ec2b36b9 1125 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
14cf11af
PM
1126 return 0;
1127
1128 do {
1129 sp = *(unsigned long *)sp;
ec2b36b9 1130 if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
14cf11af
PM
1131 return 0;
1132 if (count > 0) {
ec2b36b9 1133 ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
14cf11af
PM
1134 if (!in_sched_functions(ip))
1135 return ip;
1136 }
1137 } while (count++ < 16);
1138 return 0;
1139}
06d67d54 1140
c4d04be1 1141static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
06d67d54
PM
1142
1143void show_stack(struct task_struct *tsk, unsigned long *stack)
1144{
1145 unsigned long sp, ip, lr, newsp;
1146 int count = 0;
1147 int firstframe = 1;
6794c782
SR
1148#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1149 int curr_frame = current->curr_ret_stack;
1150 extern void return_to_handler(void);
9135c3cc
SR
1151 unsigned long rth = (unsigned long)return_to_handler;
1152 unsigned long mrth = -1;
6794c782 1153#ifdef CONFIG_PPC64
9135c3cc
SR
1154 extern void mod_return_to_handler(void);
1155 rth = *(unsigned long *)rth;
1156 mrth = (unsigned long)mod_return_to_handler;
1157 mrth = *(unsigned long *)mrth;
6794c782
SR
1158#endif
1159#endif
06d67d54
PM
1160
1161 sp = (unsigned long) stack;
1162 if (tsk == NULL)
1163 tsk = current;
1164 if (sp == 0) {
1165 if (tsk == current)
1166 asm("mr %0,1" : "=r" (sp));
1167 else
1168 sp = tsk->thread.ksp;
1169 }
1170
1171 lr = 0;
1172 printk("Call Trace:\n");
1173 do {
ec2b36b9 1174 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
06d67d54
PM
1175 return;
1176
1177 stack = (unsigned long *) sp;
1178 newsp = stack[0];
ec2b36b9 1179 ip = stack[STACK_FRAME_LR_SAVE];
06d67d54 1180 if (!firstframe || ip != lr) {
058c78f4 1181 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
6794c782 1182#ifdef CONFIG_FUNCTION_GRAPH_TRACER
9135c3cc 1183 if ((ip == rth || ip == mrth) && curr_frame >= 0) {
6794c782
SR
1184 printk(" (%pS)",
1185 (void *)current->ret_stack[curr_frame].ret);
1186 curr_frame--;
1187 }
1188#endif
06d67d54
PM
1189 if (firstframe)
1190 printk(" (unreliable)");
1191 printk("\n");
1192 }
1193 firstframe = 0;
1194
1195 /*
1196 * See if this is an exception frame.
1197 * We look for the "regshere" marker in the current frame.
1198 */
ec2b36b9
BH
1199 if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
1200 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
06d67d54
PM
1201 struct pt_regs *regs = (struct pt_regs *)
1202 (sp + STACK_FRAME_OVERHEAD);
06d67d54 1203 lr = regs->link;
058c78f4
BH
1204 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1205 regs->trap, (void *)regs->nip, (void *)lr);
06d67d54
PM
1206 firstframe = 1;
1207 }
1208
1209 sp = newsp;
1210 } while (count++ < kstack_depth_to_print);
1211}
1212
1213void dump_stack(void)
1214{
1215 show_stack(current, NULL);
1216}
1217EXPORT_SYMBOL(dump_stack);
cb2c9b27
AB
1218
1219#ifdef CONFIG_PPC64
fe1952fc
BH
1220/* Called with hard IRQs off */
1221void __ppc64_runlatch_on(void)
cb2c9b27 1222{
fe1952fc 1223 struct thread_info *ti = current_thread_info();
cb2c9b27
AB
1224 unsigned long ctrl;
1225
fe1952fc
BH
1226 ctrl = mfspr(SPRN_CTRLF);
1227 ctrl |= CTRL_RUNLATCH;
1228 mtspr(SPRN_CTRLT, ctrl);
cb2c9b27 1229
fae2e0fb 1230 ti->local_flags |= _TLF_RUNLATCH;
cb2c9b27
AB
1231}
1232
fe1952fc 1233/* Called with hard IRQs off */
4138d653 1234void __ppc64_runlatch_off(void)
cb2c9b27 1235{
fe1952fc 1236 struct thread_info *ti = current_thread_info();
cb2c9b27
AB
1237 unsigned long ctrl;
1238
fae2e0fb 1239 ti->local_flags &= ~_TLF_RUNLATCH;
cb2c9b27 1240
4138d653
AB
1241 ctrl = mfspr(SPRN_CTRLF);
1242 ctrl &= ~CTRL_RUNLATCH;
1243 mtspr(SPRN_CTRLT, ctrl);
cb2c9b27 1244}
fe1952fc 1245#endif /* CONFIG_PPC64 */
f6a61680 1246
d839088c
AB
1247unsigned long arch_align_stack(unsigned long sp)
1248{
1249 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
1250 sp -= get_random_int() & ~PAGE_MASK;
1251 return sp & ~0xf;
1252}
912f9ee2
AB
1253
1254static inline unsigned long brk_rnd(void)
1255{
1256 unsigned long rnd = 0;
1257
1258 /* 8MB for 32bit, 1GB for 64bit */
1259 if (is_32bit_task())
1260 rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
1261 else
1262 rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
1263
1264 return rnd << PAGE_SHIFT;
1265}
1266
1267unsigned long arch_randomize_brk(struct mm_struct *mm)
1268{
8bbde7a7
AB
1269 unsigned long base = mm->brk;
1270 unsigned long ret;
1271
ce7a35c7 1272#ifdef CONFIG_PPC_STD_MMU_64
8bbde7a7
AB
1273 /*
1274 * If we are using 1TB segments and we are allowed to randomise
1275 * the heap, we can put it above 1TB so it is backed by a 1TB
1276 * segment. Otherwise the heap will be in the bottom 1TB
1277 * which always uses 256MB segments and this may result in a
1278 * performance penalty.
1279 */
1280 if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
1281 base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
1282#endif
1283
1284 ret = PAGE_ALIGN(base + brk_rnd());
912f9ee2
AB
1285
1286 if (ret < mm->brk)
1287 return mm->brk;
1288
1289 return ret;
1290}
501cb16d
AB
1291
1292unsigned long randomize_et_dyn(unsigned long base)
1293{
1294 unsigned long ret = PAGE_ALIGN(base + brk_rnd());
1295
1296 if (ret < base)
1297 return base;
1298
1299 return ret;
1300}
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