Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * PowerPC version |
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
4 | * | |
5 | * Derived from "arch/m68k/kernel/ptrace.c" | |
6 | * Copyright (C) 1994 by Hamish Macdonald | |
7 | * Taken from linux/kernel/ptrace.c and modified for M680x0. | |
8 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds | |
9 | * | |
10 | * Modified by Cort Dougan (cort@hq.fsmlabs.com) | |
b123923d | 11 | * and Paul Mackerras (paulus@samba.org). |
1da177e4 LT |
12 | * |
13 | * This file is subject to the terms and conditions of the GNU General | |
14 | * Public License. See the file README.legal in the main directory of | |
15 | * this archive for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/mm.h> | |
21 | #include <linux/smp.h> | |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/ptrace.h> | |
24 | #include <linux/user.h> | |
25 | #include <linux/security.h> | |
7ed20e1a | 26 | #include <linux/signal.h> |
ea9c102c DW |
27 | #include <linux/seccomp.h> |
28 | #include <linux/audit.h> | |
e8a30302 | 29 | #ifdef CONFIG_PPC32 |
ea9c102c | 30 | #include <linux/module.h> |
e8a30302 | 31 | #endif |
1da177e4 LT |
32 | |
33 | #include <asm/uaccess.h> | |
34 | #include <asm/page.h> | |
35 | #include <asm/pgtable.h> | |
36 | #include <asm/system.h> | |
21a62902 | 37 | |
e8a30302 | 38 | #ifdef CONFIG_PPC64 |
acd89828 | 39 | #include "ptrace-ppc64.h" |
1da177e4 | 40 | #else |
acd89828 | 41 | #include "ptrace-ppc32.h" |
1da177e4 | 42 | #endif |
acd89828 | 43 | |
1da177e4 LT |
44 | /* |
45 | * does not yet catch signals sent when the child dies. | |
46 | * in exit.c or in signal.c. | |
47 | */ | |
48 | ||
865418d8 BH |
49 | /* |
50 | * Get contents of register REGNO in task TASK. | |
51 | */ | |
52 | unsigned long ptrace_get_reg(struct task_struct *task, int regno) | |
53 | { | |
54 | unsigned long tmp = 0; | |
55 | ||
56 | if (task->thread.regs == NULL) | |
57 | return -EIO; | |
58 | ||
59 | if (regno == PT_MSR) { | |
60 | tmp = ((unsigned long *)task->thread.regs)[PT_MSR]; | |
61 | return PT_MUNGE_MSR(tmp, task); | |
62 | } | |
63 | ||
64 | if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) | |
65 | return ((unsigned long *)task->thread.regs)[regno]; | |
66 | ||
67 | return -EIO; | |
68 | } | |
69 | ||
70 | /* | |
71 | * Write contents of register REGNO in task TASK. | |
72 | */ | |
73 | int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data) | |
74 | { | |
75 | if (task->thread.regs == NULL) | |
76 | return -EIO; | |
77 | ||
78 | if (regno <= PT_MAX_PUT_REG) { | |
79 | if (regno == PT_MSR) | |
80 | data = (data & MSR_DEBUGCHANGE) | |
81 | | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); | |
82 | ((unsigned long *)task->thread.regs)[regno] = data; | |
83 | return 0; | |
84 | } | |
85 | return -EIO; | |
86 | } | |
87 | ||
88 | ||
89 | static int get_fpregs(void __user *data, struct task_struct *task, | |
90 | int has_fpscr) | |
91 | { | |
92 | unsigned int count = has_fpscr ? 33 : 32; | |
93 | ||
94 | if (copy_to_user(data, task->thread.fpr, count * sizeof(double))) | |
95 | return -EFAULT; | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static int set_fpregs(void __user *data, struct task_struct *task, | |
100 | int has_fpscr) | |
101 | { | |
102 | unsigned int count = has_fpscr ? 33 : 32; | |
103 | ||
104 | if (copy_from_user(task->thread.fpr, data, count * sizeof(double))) | |
105 | return -EFAULT; | |
106 | return 0; | |
107 | } | |
108 | ||
109 | ||
110 | #ifdef CONFIG_ALTIVEC | |
111 | /* | |
112 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. | |
113 | * The transfer totals 34 quadword. Quadwords 0-31 contain the | |
114 | * corresponding vector registers. Quadword 32 contains the vscr as the | |
115 | * last word (offset 12) within that quadword. Quadword 33 contains the | |
116 | * vrsave as the first word (offset 0) within the quadword. | |
117 | * | |
118 | * This definition of the VMX state is compatible with the current PPC32 | |
119 | * ptrace interface. This allows signal handling and ptrace to use the | |
120 | * same structures. This also simplifies the implementation of a bi-arch | |
121 | * (combined (32- and 64-bit) gdb. | |
122 | */ | |
123 | ||
124 | /* | |
125 | * Get contents of AltiVec register state in task TASK | |
126 | */ | |
127 | static int get_vrregs(unsigned long __user *data, struct task_struct *task) | |
128 | { | |
129 | unsigned long regsize; | |
130 | ||
131 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
132 | regsize = 32 * sizeof(vector128); | |
133 | if (copy_to_user(data, task->thread.vr, regsize)) | |
134 | return -EFAULT; | |
135 | data += (regsize / sizeof(unsigned long)); | |
136 | ||
137 | /* copy VSCR */ | |
138 | regsize = 1 * sizeof(vector128); | |
139 | if (copy_to_user(data, &task->thread.vscr, regsize)) | |
140 | return -EFAULT; | |
141 | data += (regsize / sizeof(unsigned long)); | |
142 | ||
143 | /* copy VRSAVE */ | |
144 | if (put_user(task->thread.vrsave, (u32 __user *)data)) | |
145 | return -EFAULT; | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | /* | |
151 | * Write contents of AltiVec register state into task TASK. | |
152 | */ | |
153 | static int set_vrregs(struct task_struct *task, unsigned long __user *data) | |
154 | { | |
155 | unsigned long regsize; | |
156 | ||
157 | /* copy AltiVec registers VR[0] .. VR[31] */ | |
158 | regsize = 32 * sizeof(vector128); | |
159 | if (copy_from_user(task->thread.vr, data, regsize)) | |
160 | return -EFAULT; | |
161 | data += (regsize / sizeof(unsigned long)); | |
162 | ||
163 | /* copy VSCR */ | |
164 | regsize = 1 * sizeof(vector128); | |
165 | if (copy_from_user(&task->thread.vscr, data, regsize)) | |
166 | return -EFAULT; | |
167 | data += (regsize / sizeof(unsigned long)); | |
168 | ||
169 | /* copy VRSAVE */ | |
170 | if (get_user(task->thread.vrsave, (u32 __user *)data)) | |
171 | return -EFAULT; | |
172 | ||
173 | return 0; | |
174 | } | |
175 | #endif /* CONFIG_ALTIVEC */ | |
176 | ||
177 | #ifdef CONFIG_SPE | |
178 | ||
179 | /* | |
180 | * For get_evrregs/set_evrregs functions 'data' has the following layout: | |
181 | * | |
182 | * struct { | |
183 | * u32 evr[32]; | |
184 | * u64 acc; | |
185 | * u32 spefscr; | |
186 | * } | |
187 | */ | |
188 | ||
189 | /* | |
190 | * Get contents of SPE register state in task TASK. | |
191 | */ | |
192 | static int get_evrregs(unsigned long *data, struct task_struct *task) | |
193 | { | |
194 | int i; | |
195 | ||
196 | if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long))) | |
197 | return -EFAULT; | |
198 | ||
199 | /* copy SPEFSCR */ | |
200 | if (__put_user(task->thread.spefscr, &data[34])) | |
201 | return -EFAULT; | |
202 | ||
203 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
204 | for (i = 0; i < 32; i++, data++) | |
205 | if (__put_user(task->thread.evr[i], data)) | |
206 | return -EFAULT; | |
207 | ||
208 | /* copy ACC */ | |
209 | if (__put_user64(task->thread.acc, (unsigned long long *)data)) | |
210 | return -EFAULT; | |
211 | ||
212 | return 0; | |
213 | } | |
214 | ||
215 | /* | |
216 | * Write contents of SPE register state into task TASK. | |
217 | */ | |
218 | static int set_evrregs(struct task_struct *task, unsigned long *data) | |
219 | { | |
220 | int i; | |
221 | ||
222 | if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long))) | |
223 | return -EFAULT; | |
224 | ||
225 | /* copy SPEFSCR */ | |
226 | if (__get_user(task->thread.spefscr, &data[34])) | |
227 | return -EFAULT; | |
228 | ||
229 | /* copy SPE registers EVR[0] .. EVR[31] */ | |
230 | for (i = 0; i < 32; i++, data++) | |
231 | if (__get_user(task->thread.evr[i], data)) | |
232 | return -EFAULT; | |
233 | /* copy ACC */ | |
234 | if (__get_user64(task->thread.acc, (unsigned long long*)data)) | |
235 | return -EFAULT; | |
236 | ||
237 | return 0; | |
238 | } | |
239 | #endif /* CONFIG_SPE */ | |
240 | ||
241 | ||
242 | static void set_single_step(struct task_struct *task) | |
243 | { | |
244 | struct pt_regs *regs = task->thread.regs; | |
245 | ||
246 | if (regs != NULL) { | |
247 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
248 | task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; | |
249 | regs->msr |= MSR_DE; | |
250 | #else | |
251 | regs->msr |= MSR_SE; | |
252 | #endif | |
253 | } | |
254 | set_tsk_thread_flag(task, TIF_SINGLESTEP); | |
255 | } | |
256 | ||
257 | static void clear_single_step(struct task_struct *task) | |
258 | { | |
259 | struct pt_regs *regs = task->thread.regs; | |
260 | ||
261 | if (regs != NULL) { | |
262 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | |
263 | task->thread.dbcr0 = 0; | |
264 | regs->msr &= ~MSR_DE; | |
265 | #else | |
266 | regs->msr &= ~MSR_SE; | |
267 | #endif | |
268 | } | |
269 | clear_tsk_thread_flag(task, TIF_SINGLESTEP); | |
270 | } | |
271 | ||
1da177e4 LT |
272 | /* |
273 | * Called by kernel/ptrace.c when detaching.. | |
274 | * | |
275 | * Make sure single step bits etc are not set. | |
276 | */ | |
277 | void ptrace_disable(struct task_struct *child) | |
278 | { | |
279 | /* make sure the single step bit is not set. */ | |
280 | clear_single_step(child); | |
281 | } | |
282 | ||
e17666ba BH |
283 | /* |
284 | * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls, | |
285 | * we mark them as obsolete now, they will be removed in a future version | |
286 | */ | |
287 | static long arch_ptrace_old(struct task_struct *child, long request, long addr, | |
288 | long data) | |
289 | { | |
290 | int ret = -EPERM; | |
291 | ||
292 | switch(request) { | |
293 | case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */ | |
294 | int i; | |
295 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
296 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
297 | ||
298 | for (i = 0; i < 32; i++) { | |
299 | ret = put_user(*reg, tmp); | |
300 | if (ret) | |
301 | break; | |
302 | reg++; | |
303 | tmp++; | |
304 | } | |
305 | break; | |
306 | } | |
307 | ||
308 | case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */ | |
309 | int i; | |
310 | unsigned long *reg = &((unsigned long *)child->thread.regs)[0]; | |
311 | unsigned long __user *tmp = (unsigned long __user *)addr; | |
312 | ||
313 | for (i = 0; i < 32; i++) { | |
314 | ret = get_user(*reg, tmp); | |
315 | if (ret) | |
316 | break; | |
317 | reg++; | |
318 | tmp++; | |
319 | } | |
320 | break; | |
321 | } | |
322 | ||
323 | case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */ | |
324 | flush_fp_to_thread(child); | |
325 | ret = get_fpregs((void __user *)addr, child, 0); | |
326 | break; | |
327 | } | |
328 | ||
329 | case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */ | |
330 | flush_fp_to_thread(child); | |
331 | ret = set_fpregs((void __user *)addr, child, 0); | |
332 | break; | |
333 | } | |
334 | ||
335 | } | |
336 | return ret; | |
337 | } | |
338 | ||
481bed45 | 339 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
1da177e4 | 340 | { |
1da177e4 LT |
341 | int ret = -EPERM; |
342 | ||
1da177e4 LT |
343 | switch (request) { |
344 | /* when I and D space are separate, these will need to be fixed. */ | |
345 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
346 | case PTRACE_PEEKDATA: { | |
347 | unsigned long tmp; | |
348 | int copied; | |
349 | ||
350 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
351 | ret = -EIO; | |
352 | if (copied != sizeof(tmp)) | |
353 | break; | |
354 | ret = put_user(tmp,(unsigned long __user *) data); | |
355 | break; | |
356 | } | |
357 | ||
358 | /* read the word at location addr in the USER area. */ | |
1da177e4 LT |
359 | case PTRACE_PEEKUSR: { |
360 | unsigned long index, tmp; | |
361 | ||
362 | ret = -EIO; | |
363 | /* convert to index and check */ | |
e8a30302 | 364 | #ifdef CONFIG_PPC32 |
1da177e4 | 365 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
366 | if ((addr & 3) || (index > PT_FPSCR) |
367 | || (child->thread.regs == NULL)) | |
368 | #else | |
369 | index = (unsigned long) addr >> 3; | |
370 | if ((addr & 7) || (index > PT_FPSCR)) | |
371 | #endif | |
1da177e4 LT |
372 | break; |
373 | ||
374 | CHECK_FULL_REGS(child->thread.regs); | |
375 | if (index < PT_FPR0) { | |
865418d8 | 376 | tmp = ptrace_get_reg(child, (int) index); |
1da177e4 | 377 | } else { |
e8a30302 | 378 | flush_fp_to_thread(child); |
1da177e4 LT |
379 | tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; |
380 | } | |
381 | ret = put_user(tmp,(unsigned long __user *) data); | |
382 | break; | |
383 | } | |
384 | ||
385 | /* If I and D space are separate, this will have to be fixed. */ | |
386 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
387 | case PTRACE_POKEDATA: | |
388 | ret = 0; | |
e8a30302 SR |
389 | if (access_process_vm(child, addr, &data, sizeof(data), 1) |
390 | == sizeof(data)) | |
1da177e4 LT |
391 | break; |
392 | ret = -EIO; | |
393 | break; | |
394 | ||
395 | /* write the word at location addr in the USER area */ | |
396 | case PTRACE_POKEUSR: { | |
397 | unsigned long index; | |
398 | ||
399 | ret = -EIO; | |
400 | /* convert to index and check */ | |
e8a30302 | 401 | #ifdef CONFIG_PPC32 |
1da177e4 | 402 | index = (unsigned long) addr >> 2; |
e8a30302 SR |
403 | if ((addr & 3) || (index > PT_FPSCR) |
404 | || (child->thread.regs == NULL)) | |
405 | #else | |
406 | index = (unsigned long) addr >> 3; | |
407 | if ((addr & 7) || (index > PT_FPSCR)) | |
408 | #endif | |
1da177e4 LT |
409 | break; |
410 | ||
411 | CHECK_FULL_REGS(child->thread.regs); | |
412 | if (index == PT_ORIG_R3) | |
413 | break; | |
414 | if (index < PT_FPR0) { | |
865418d8 | 415 | ret = ptrace_put_reg(child, index, data); |
1da177e4 | 416 | } else { |
e8a30302 | 417 | flush_fp_to_thread(child); |
1da177e4 LT |
418 | ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; |
419 | ret = 0; | |
420 | } | |
421 | break; | |
422 | } | |
423 | ||
424 | case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ | |
425 | case PTRACE_CONT: { /* restart after signal. */ | |
426 | ret = -EIO; | |
7ed20e1a | 427 | if (!valid_signal(data)) |
1da177e4 | 428 | break; |
e8a30302 | 429 | if (request == PTRACE_SYSCALL) |
1da177e4 | 430 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
e8a30302 | 431 | else |
1da177e4 | 432 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); |
1da177e4 LT |
433 | child->exit_code = data; |
434 | /* make sure the single step bit is not set. */ | |
435 | clear_single_step(child); | |
436 | wake_up_process(child); | |
437 | ret = 0; | |
438 | break; | |
439 | } | |
440 | ||
441 | /* | |
442 | * make the child exit. Best I can do is send it a sigkill. | |
443 | * perhaps it should be put in the status that it wants to | |
444 | * exit. | |
445 | */ | |
446 | case PTRACE_KILL: { | |
447 | ret = 0; | |
448 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
449 | break; | |
450 | child->exit_code = SIGKILL; | |
451 | /* make sure the single step bit is not set. */ | |
452 | clear_single_step(child); | |
453 | wake_up_process(child); | |
454 | break; | |
455 | } | |
456 | ||
457 | case PTRACE_SINGLESTEP: { /* set the trap flag. */ | |
458 | ret = -EIO; | |
7ed20e1a | 459 | if (!valid_signal(data)) |
1da177e4 LT |
460 | break; |
461 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
462 | set_single_step(child); | |
463 | child->exit_code = data; | |
464 | /* give it a chance to run. */ | |
465 | wake_up_process(child); | |
466 | ret = 0; | |
467 | break; | |
468 | } | |
469 | ||
e8a30302 SR |
470 | #ifdef CONFIG_PPC64 |
471 | case PTRACE_GET_DEBUGREG: { | |
472 | ret = -EINVAL; | |
473 | /* We only support one DABR and no IABRS at the moment */ | |
474 | if (addr > 0) | |
475 | break; | |
476 | ret = put_user(child->thread.dabr, | |
477 | (unsigned long __user *)data); | |
478 | break; | |
479 | } | |
480 | ||
481 | case PTRACE_SET_DEBUGREG: | |
482 | ret = ptrace_set_debugreg(child, addr, data); | |
483 | break; | |
484 | #endif | |
485 | ||
1da177e4 LT |
486 | case PTRACE_DETACH: |
487 | ret = ptrace_detach(child, data); | |
488 | break; | |
489 | ||
e17666ba BH |
490 | #ifdef CONFIG_PPC64 |
491 | case PTRACE_GETREGS64: | |
492 | #endif | |
493 | case PTRACE_GETREGS: { /* Get all pt_regs from the child. */ | |
494 | int ui; | |
495 | if (!access_ok(VERIFY_WRITE, (void __user *)data, | |
496 | sizeof(struct pt_regs))) { | |
497 | ret = -EIO; | |
498 | break; | |
499 | } | |
500 | ret = 0; | |
501 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
865418d8 | 502 | ret |= __put_user(ptrace_get_reg(child, ui), |
e17666ba BH |
503 | (unsigned long __user *) data); |
504 | data += sizeof(long); | |
e8a30302 SR |
505 | } |
506 | break; | |
507 | } | |
508 | ||
e17666ba BH |
509 | #ifdef CONFIG_PPC64 |
510 | case PTRACE_SETREGS64: | |
511 | #endif | |
512 | case PTRACE_SETREGS: { /* Set all gp regs in the child. */ | |
513 | unsigned long tmp; | |
514 | int ui; | |
515 | if (!access_ok(VERIFY_READ, (void __user *)data, | |
516 | sizeof(struct pt_regs))) { | |
517 | ret = -EIO; | |
518 | break; | |
519 | } | |
520 | ret = 0; | |
521 | for (ui = 0; ui < PT_REGS_COUNT; ui ++) { | |
522 | ret = __get_user(tmp, (unsigned long __user *) data); | |
e8a30302 SR |
523 | if (ret) |
524 | break; | |
865418d8 | 525 | ptrace_put_reg(child, ui, tmp); |
e17666ba | 526 | data += sizeof(long); |
e8a30302 SR |
527 | } |
528 | break; | |
529 | } | |
530 | ||
e17666ba | 531 | case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 532 | flush_fp_to_thread(child); |
e17666ba | 533 | ret = get_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
534 | break; |
535 | } | |
536 | ||
e17666ba | 537 | case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */ |
e8a30302 | 538 | flush_fp_to_thread(child); |
e17666ba | 539 | ret = set_fpregs((void __user *)data, child, 1); |
e8a30302 SR |
540 | break; |
541 | } | |
e8a30302 | 542 | |
1da177e4 LT |
543 | #ifdef CONFIG_ALTIVEC |
544 | case PTRACE_GETVRREGS: | |
545 | /* Get the child altivec register state. */ | |
e8a30302 | 546 | flush_altivec_to_thread(child); |
1da177e4 LT |
547 | ret = get_vrregs((unsigned long __user *)data, child); |
548 | break; | |
549 | ||
550 | case PTRACE_SETVRREGS: | |
551 | /* Set the child altivec register state. */ | |
e8a30302 | 552 | flush_altivec_to_thread(child); |
1da177e4 LT |
553 | ret = set_vrregs(child, (unsigned long __user *)data); |
554 | break; | |
555 | #endif | |
556 | #ifdef CONFIG_SPE | |
557 | case PTRACE_GETEVRREGS: | |
558 | /* Get the child spe register state. */ | |
559 | if (child->thread.regs->msr & MSR_SPE) | |
560 | giveup_spe(child); | |
561 | ret = get_evrregs((unsigned long __user *)data, child); | |
562 | break; | |
563 | ||
564 | case PTRACE_SETEVRREGS: | |
565 | /* Set the child spe register state. */ | |
566 | /* this is to clear the MSR_SPE bit to force a reload | |
567 | * of register state from memory */ | |
568 | if (child->thread.regs->msr & MSR_SPE) | |
569 | giveup_spe(child); | |
570 | ret = set_evrregs(child, (unsigned long __user *)data); | |
571 | break; | |
572 | #endif | |
573 | ||
e17666ba BH |
574 | /* Old reverse args ptrace callss */ |
575 | case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */ | |
576 | case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */ | |
577 | case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */ | |
578 | case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */ | |
579 | ret = arch_ptrace_old(child, request, addr, data); | |
580 | break; | |
581 | ||
1da177e4 LT |
582 | default: |
583 | ret = ptrace_request(child, request, addr, data); | |
584 | break; | |
585 | } | |
1da177e4 LT |
586 | return ret; |
587 | } | |
588 | ||
ea9c102c | 589 | static void do_syscall_trace(void) |
1da177e4 | 590 | { |
ea9c102c DW |
591 | /* the 0x80 provides a way for the tracing parent to distinguish |
592 | between a syscall stop and SIGTRAP delivery */ | |
1da177e4 LT |
593 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
594 | ? 0x80 : 0)); | |
595 | ||
596 | /* | |
597 | * this isn't the same as continuing with a signal, but it will do | |
598 | * for normal use. strace only continues with a signal if the | |
599 | * stopping signal is not SIGTRAP. -brl | |
600 | */ | |
601 | if (current->exit_code) { | |
602 | send_sig(current->exit_code, current, 1); | |
603 | current->exit_code = 0; | |
604 | } | |
605 | } | |
ea9c102c DW |
606 | |
607 | void do_syscall_trace_enter(struct pt_regs *regs) | |
608 | { | |
e8a30302 | 609 | secure_computing(regs->gpr[0]); |
e8a30302 | 610 | |
ea9c102c DW |
611 | if (test_thread_flag(TIF_SYSCALL_TRACE) |
612 | && (current->ptrace & PT_PTRACED)) | |
613 | do_syscall_trace(); | |
614 | ||
cfcd1705 DW |
615 | if (unlikely(current->audit_context)) { |
616 | #ifdef CONFIG_PPC64 | |
617 | if (!test_thread_flag(TIF_32BIT)) | |
618 | audit_syscall_entry(AUDIT_ARCH_PPC64, | |
619 | regs->gpr[0], | |
620 | regs->gpr[3], regs->gpr[4], | |
621 | regs->gpr[5], regs->gpr[6]); | |
622 | else | |
e8a30302 | 623 | #endif |
cfcd1705 DW |
624 | audit_syscall_entry(AUDIT_ARCH_PPC, |
625 | regs->gpr[0], | |
626 | regs->gpr[3] & 0xffffffff, | |
627 | regs->gpr[4] & 0xffffffff, | |
628 | regs->gpr[5] & 0xffffffff, | |
629 | regs->gpr[6] & 0xffffffff); | |
630 | } | |
ea9c102c DW |
631 | } |
632 | ||
633 | void do_syscall_trace_leave(struct pt_regs *regs) | |
634 | { | |
ea9c102c | 635 | if (unlikely(current->audit_context)) |
4b9c876a | 636 | audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, |
ea9c102c DW |
637 | regs->result); |
638 | ||
e8a30302 | 639 | if ((test_thread_flag(TIF_SYSCALL_TRACE) |
1bd79336 | 640 | || test_thread_flag(TIF_SINGLESTEP)) |
ea9c102c DW |
641 | && (current->ptrace & PT_PTRACED)) |
642 | do_syscall_trace(); | |
643 | } |