powerpc: Add VSX assembler code macros
[deliverable/linux.git] / arch / powerpc / kernel / ptrace.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
b123923d 11 * and Paul Mackerras (paulus@samba.org).
1da177e4
LT
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
1da177e4
LT
22#include <linux/errno.h>
23#include <linux/ptrace.h>
f65255e8 24#include <linux/regset.h>
3caf06c6 25#include <linux/elf.h>
1da177e4
LT
26#include <linux/user.h>
27#include <linux/security.h>
7ed20e1a 28#include <linux/signal.h>
ea9c102c
DW
29#include <linux/seccomp.h>
30#include <linux/audit.h>
e8a30302 31#ifdef CONFIG_PPC32
ea9c102c 32#include <linux/module.h>
e8a30302 33#endif
1da177e4
LT
34
35#include <asm/uaccess.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
21a62902 39
abd06505
BH
40/*
41 * does not yet catch signals sent when the child dies.
42 * in exit.c or in signal.c.
43 */
44
45/*
46 * Set of msr bits that gdb can change on behalf of a process.
47 */
48#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
49#define MSR_DEBUGCHANGE 0
1da177e4 50#else
abd06505 51#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
1da177e4 52#endif
acd89828 53
1da177e4 54/*
abd06505 55 * Max register writeable via put_reg
1da177e4 56 */
abd06505
BH
57#ifdef CONFIG_PPC32
58#define PT_MAX_PUT_REG PT_MQ
59#else
60#define PT_MAX_PUT_REG PT_CCR
61#endif
1da177e4 62
26f77130
RM
63static unsigned long get_user_msr(struct task_struct *task)
64{
65 return task->thread.regs->msr | task->thread.fpexc_mode;
66}
67
68static int set_user_msr(struct task_struct *task, unsigned long msr)
69{
70 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
71 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
72 return 0;
73}
74
75/*
76 * We prevent mucking around with the reserved area of trap
77 * which are used internally by the kernel.
78 */
79static int set_user_trap(struct task_struct *task, unsigned long trap)
80{
81 task->thread.regs->trap = trap & 0xfff0;
82 return 0;
83}
84
865418d8
BH
85/*
86 * Get contents of register REGNO in task TASK.
87 */
88unsigned long ptrace_get_reg(struct task_struct *task, int regno)
89{
865418d8
BH
90 if (task->thread.regs == NULL)
91 return -EIO;
92
26f77130
RM
93 if (regno == PT_MSR)
94 return get_user_msr(task);
865418d8
BH
95
96 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
97 return ((unsigned long *)task->thread.regs)[regno];
98
99 return -EIO;
100}
101
102/*
103 * Write contents of register REGNO in task TASK.
104 */
105int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
106{
107 if (task->thread.regs == NULL)
108 return -EIO;
109
26f77130
RM
110 if (regno == PT_MSR)
111 return set_user_msr(task, data);
112 if (regno == PT_TRAP)
113 return set_user_trap(task, data);
114
115 if (regno <= PT_MAX_PUT_REG) {
865418d8
BH
116 ((unsigned long *)task->thread.regs)[regno] = data;
117 return 0;
118 }
119 return -EIO;
120}
121
44dd3f50
RM
122static int gpr_get(struct task_struct *target, const struct user_regset *regset,
123 unsigned int pos, unsigned int count,
124 void *kbuf, void __user *ubuf)
125{
126 int ret;
127
128 if (target->thread.regs == NULL)
129 return -EIO;
130
131 CHECK_FULL_REGS(target->thread.regs);
132
133 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
134 target->thread.regs,
135 0, offsetof(struct pt_regs, msr));
136 if (!ret) {
137 unsigned long msr = get_user_msr(target);
138 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
139 offsetof(struct pt_regs, msr),
140 offsetof(struct pt_regs, msr) +
141 sizeof(msr));
142 }
143
144 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
145 offsetof(struct pt_regs, msr) + sizeof(long));
146
147 if (!ret)
148 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
149 &target->thread.regs->orig_gpr3,
150 offsetof(struct pt_regs, orig_gpr3),
151 sizeof(struct pt_regs));
152 if (!ret)
153 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
154 sizeof(struct pt_regs), -1);
155
156 return ret;
157}
158
159static int gpr_set(struct task_struct *target, const struct user_regset *regset,
160 unsigned int pos, unsigned int count,
161 const void *kbuf, const void __user *ubuf)
162{
163 unsigned long reg;
164 int ret;
165
166 if (target->thread.regs == NULL)
167 return -EIO;
168
169 CHECK_FULL_REGS(target->thread.regs);
170
171 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
172 target->thread.regs,
173 0, PT_MSR * sizeof(reg));
174
175 if (!ret && count > 0) {
176 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
177 PT_MSR * sizeof(reg),
178 (PT_MSR + 1) * sizeof(reg));
179 if (!ret)
180 ret = set_user_msr(target, reg);
181 }
182
183 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
184 offsetof(struct pt_regs, msr) + sizeof(long));
185
186 if (!ret)
187 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
188 &target->thread.regs->orig_gpr3,
189 PT_ORIG_R3 * sizeof(reg),
190 (PT_MAX_PUT_REG + 1) * sizeof(reg));
191
192 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
193 ret = user_regset_copyin_ignore(
194 &pos, &count, &kbuf, &ubuf,
195 (PT_MAX_PUT_REG + 1) * sizeof(reg),
196 PT_TRAP * sizeof(reg));
197
198 if (!ret && count > 0) {
199 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
200 PT_TRAP * sizeof(reg),
201 (PT_TRAP + 1) * sizeof(reg));
202 if (!ret)
203 ret = set_user_trap(target, reg);
204 }
205
206 if (!ret)
207 ret = user_regset_copyin_ignore(
208 &pos, &count, &kbuf, &ubuf,
209 (PT_TRAP + 1) * sizeof(reg), -1);
210
211 return ret;
212}
865418d8 213
f65255e8
RM
214static int fpr_get(struct task_struct *target, const struct user_regset *regset,
215 unsigned int pos, unsigned int count,
216 void *kbuf, void __user *ubuf)
217{
c6e6771b
MN
218#ifdef CONFIG_VSX
219 double buf[33];
220 int i;
221#endif
f65255e8
RM
222 flush_fp_to_thread(target);
223
c6e6771b
MN
224#ifdef CONFIG_VSX
225 /* copy to local buffer then write that out */
226 for (i = 0; i < 32 ; i++)
227 buf[i] = target->thread.TS_FPR(i);
228 memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
229 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
230
231#else
f65255e8 232 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
9c75a31c 233 offsetof(struct thread_struct, TS_FPR(32)));
f65255e8
RM
234
235 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
236 &target->thread.fpr, 0, -1);
c6e6771b 237#endif
f65255e8
RM
238}
239
240static int fpr_set(struct task_struct *target, const struct user_regset *regset,
241 unsigned int pos, unsigned int count,
242 const void *kbuf, const void __user *ubuf)
243{
c6e6771b
MN
244#ifdef CONFIG_VSX
245 double buf[33];
246 int i;
247#endif
f65255e8
RM
248 flush_fp_to_thread(target);
249
c6e6771b
MN
250#ifdef CONFIG_VSX
251 /* copy to local buffer then write that out */
252 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
253 if (i)
254 return i;
255 for (i = 0; i < 32 ; i++)
256 target->thread.TS_FPR(i) = buf[i];
257 memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
258 return 0;
259#else
f65255e8 260 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
9c75a31c 261 offsetof(struct thread_struct, TS_FPR(32)));
f65255e8
RM
262
263 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
264 &target->thread.fpr, 0, -1);
c6e6771b 265#endif
f65255e8
RM
266}
267
865418d8
BH
268#ifdef CONFIG_ALTIVEC
269/*
270 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
271 * The transfer totals 34 quadword. Quadwords 0-31 contain the
272 * corresponding vector registers. Quadword 32 contains the vscr as the
273 * last word (offset 12) within that quadword. Quadword 33 contains the
274 * vrsave as the first word (offset 0) within the quadword.
275 *
276 * This definition of the VMX state is compatible with the current PPC32
277 * ptrace interface. This allows signal handling and ptrace to use the
278 * same structures. This also simplifies the implementation of a bi-arch
279 * (combined (32- and 64-bit) gdb.
280 */
281
3caf06c6
RM
282static int vr_active(struct task_struct *target,
283 const struct user_regset *regset)
284{
285 flush_altivec_to_thread(target);
286 return target->thread.used_vr ? regset->n : 0;
287}
288
289static int vr_get(struct task_struct *target, const struct user_regset *regset,
290 unsigned int pos, unsigned int count,
291 void *kbuf, void __user *ubuf)
292{
293 int ret;
294
295 flush_altivec_to_thread(target);
296
297 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
298 offsetof(struct thread_struct, vr[32]));
299
300 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
301 &target->thread.vr, 0,
302 33 * sizeof(vector128));
303 if (!ret) {
304 /*
305 * Copy out only the low-order word of vrsave.
306 */
307 union {
308 elf_vrreg_t reg;
309 u32 word;
310 } vrsave;
311 memset(&vrsave, 0, sizeof(vrsave));
312 vrsave.word = target->thread.vrsave;
313 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
314 33 * sizeof(vector128), -1);
315 }
316
317 return ret;
318}
319
320static int vr_set(struct task_struct *target, const struct user_regset *regset,
321 unsigned int pos, unsigned int count,
322 const void *kbuf, const void __user *ubuf)
323{
324 int ret;
325
326 flush_altivec_to_thread(target);
327
328 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
329 offsetof(struct thread_struct, vr[32]));
330
331 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
332 &target->thread.vr, 0, 33 * sizeof(vector128));
333 if (!ret && count > 0) {
334 /*
335 * We use only the first word of vrsave.
336 */
337 union {
338 elf_vrreg_t reg;
339 u32 word;
340 } vrsave;
341 memset(&vrsave, 0, sizeof(vrsave));
342 vrsave.word = target->thread.vrsave;
343 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
344 33 * sizeof(vector128), -1);
345 if (!ret)
346 target->thread.vrsave = vrsave.word;
347 }
348
349 return ret;
350}
865418d8
BH
351#endif /* CONFIG_ALTIVEC */
352
353#ifdef CONFIG_SPE
354
355/*
356 * For get_evrregs/set_evrregs functions 'data' has the following layout:
357 *
358 * struct {
359 * u32 evr[32];
360 * u64 acc;
361 * u32 spefscr;
362 * }
363 */
364
a4e4b175
RM
365static int evr_active(struct task_struct *target,
366 const struct user_regset *regset)
865418d8 367{
a4e4b175
RM
368 flush_spe_to_thread(target);
369 return target->thread.used_spe ? regset->n : 0;
370}
865418d8 371
a4e4b175
RM
372static int evr_get(struct task_struct *target, const struct user_regset *regset,
373 unsigned int pos, unsigned int count,
374 void *kbuf, void __user *ubuf)
375{
376 int ret;
865418d8 377
a4e4b175 378 flush_spe_to_thread(target);
865418d8 379
a4e4b175
RM
380 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
381 &target->thread.evr,
382 0, sizeof(target->thread.evr));
865418d8 383
a4e4b175
RM
384 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
385 offsetof(struct thread_struct, spefscr));
386
387 if (!ret)
388 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
389 &target->thread.acc,
390 sizeof(target->thread.evr), -1);
391
392 return ret;
393}
394
395static int evr_set(struct task_struct *target, const struct user_regset *regset,
396 unsigned int pos, unsigned int count,
397 const void *kbuf, const void __user *ubuf)
398{
399 int ret;
400
401 flush_spe_to_thread(target);
402
403 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
404 &target->thread.evr,
405 0, sizeof(target->thread.evr));
865418d8 406
a4e4b175
RM
407 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
408 offsetof(struct thread_struct, spefscr));
409
410 if (!ret)
411 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
412 &target->thread.acc,
413 sizeof(target->thread.evr), -1);
414
415 return ret;
865418d8 416}
865418d8
BH
417#endif /* CONFIG_SPE */
418
419
80fdf470
RM
420/*
421 * These are our native regset flavors.
422 */
423enum powerpc_regset {
424 REGSET_GPR,
425 REGSET_FPR,
426#ifdef CONFIG_ALTIVEC
427 REGSET_VMX,
428#endif
429#ifdef CONFIG_SPE
430 REGSET_SPE,
431#endif
432};
433
434static const struct user_regset native_regsets[] = {
435 [REGSET_GPR] = {
436 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
437 .size = sizeof(long), .align = sizeof(long),
438 .get = gpr_get, .set = gpr_set
439 },
440 [REGSET_FPR] = {
441 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
442 .size = sizeof(double), .align = sizeof(double),
443 .get = fpr_get, .set = fpr_set
444 },
445#ifdef CONFIG_ALTIVEC
446 [REGSET_VMX] = {
447 .core_note_type = NT_PPC_VMX, .n = 34,
448 .size = sizeof(vector128), .align = sizeof(vector128),
449 .active = vr_active, .get = vr_get, .set = vr_set
450 },
451#endif
452#ifdef CONFIG_SPE
453 [REGSET_SPE] = {
454 .n = 35,
455 .size = sizeof(u32), .align = sizeof(u32),
456 .active = evr_active, .get = evr_get, .set = evr_set
457 },
458#endif
459};
460
461static const struct user_regset_view user_ppc_native_view = {
462 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
463 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
464};
465
fa8f5cb0
RM
466#ifdef CONFIG_PPC64
467#include <linux/compat.h>
468
469static int gpr32_get(struct task_struct *target,
470 const struct user_regset *regset,
471 unsigned int pos, unsigned int count,
472 void *kbuf, void __user *ubuf)
473{
474 const unsigned long *regs = &target->thread.regs->gpr[0];
475 compat_ulong_t *k = kbuf;
476 compat_ulong_t __user *u = ubuf;
477 compat_ulong_t reg;
478
479 if (target->thread.regs == NULL)
480 return -EIO;
481
482 CHECK_FULL_REGS(target->thread.regs);
483
484 pos /= sizeof(reg);
485 count /= sizeof(reg);
486
487 if (kbuf)
488 for (; count > 0 && pos < PT_MSR; --count)
489 *k++ = regs[pos++];
490 else
491 for (; count > 0 && pos < PT_MSR; --count)
492 if (__put_user((compat_ulong_t) regs[pos++], u++))
493 return -EFAULT;
494
495 if (count > 0 && pos == PT_MSR) {
496 reg = get_user_msr(target);
497 if (kbuf)
498 *k++ = reg;
499 else if (__put_user(reg, u++))
500 return -EFAULT;
501 ++pos;
502 --count;
503 }
504
505 if (kbuf)
506 for (; count > 0 && pos < PT_REGS_COUNT; --count)
507 *k++ = regs[pos++];
508 else
509 for (; count > 0 && pos < PT_REGS_COUNT; --count)
510 if (__put_user((compat_ulong_t) regs[pos++], u++))
511 return -EFAULT;
512
513 kbuf = k;
514 ubuf = u;
515 pos *= sizeof(reg);
516 count *= sizeof(reg);
517 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
518 PT_REGS_COUNT * sizeof(reg), -1);
519}
520
521static int gpr32_set(struct task_struct *target,
522 const struct user_regset *regset,
523 unsigned int pos, unsigned int count,
524 const void *kbuf, const void __user *ubuf)
525{
526 unsigned long *regs = &target->thread.regs->gpr[0];
527 const compat_ulong_t *k = kbuf;
528 const compat_ulong_t __user *u = ubuf;
529 compat_ulong_t reg;
530
531 if (target->thread.regs == NULL)
532 return -EIO;
533
534 CHECK_FULL_REGS(target->thread.regs);
535
536 pos /= sizeof(reg);
537 count /= sizeof(reg);
538
539 if (kbuf)
540 for (; count > 0 && pos < PT_MSR; --count)
541 regs[pos++] = *k++;
542 else
543 for (; count > 0 && pos < PT_MSR; --count) {
544 if (__get_user(reg, u++))
545 return -EFAULT;
546 regs[pos++] = reg;
547 }
548
549
550 if (count > 0 && pos == PT_MSR) {
551 if (kbuf)
552 reg = *k++;
553 else if (__get_user(reg, u++))
554 return -EFAULT;
555 set_user_msr(target, reg);
556 ++pos;
557 --count;
558 }
559
c2372eb9 560 if (kbuf) {
fa8f5cb0
RM
561 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
562 regs[pos++] = *k++;
c2372eb9
RM
563 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
564 ++k;
565 } else {
fa8f5cb0
RM
566 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
567 if (__get_user(reg, u++))
568 return -EFAULT;
569 regs[pos++] = reg;
570 }
c2372eb9
RM
571 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
572 if (__get_user(reg, u++))
573 return -EFAULT;
574 }
fa8f5cb0
RM
575
576 if (count > 0 && pos == PT_TRAP) {
577 if (kbuf)
578 reg = *k++;
579 else if (__get_user(reg, u++))
580 return -EFAULT;
581 set_user_trap(target, reg);
582 ++pos;
583 --count;
584 }
585
586 kbuf = k;
587 ubuf = u;
588 pos *= sizeof(reg);
589 count *= sizeof(reg);
590 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
591 (PT_TRAP + 1) * sizeof(reg), -1);
592}
593
594/*
595 * These are the regset flavors matching the CONFIG_PPC32 native set.
596 */
597static const struct user_regset compat_regsets[] = {
598 [REGSET_GPR] = {
599 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
600 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
601 .get = gpr32_get, .set = gpr32_set
602 },
603 [REGSET_FPR] = {
604 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
605 .size = sizeof(double), .align = sizeof(double),
606 .get = fpr_get, .set = fpr_set
607 },
608#ifdef CONFIG_ALTIVEC
609 [REGSET_VMX] = {
610 .core_note_type = NT_PPC_VMX, .n = 34,
611 .size = sizeof(vector128), .align = sizeof(vector128),
612 .active = vr_active, .get = vr_get, .set = vr_set
613 },
614#endif
615#ifdef CONFIG_SPE
616 [REGSET_SPE] = {
24f1a849 617 .core_note_type = NT_PPC_SPE, .n = 35,
fa8f5cb0
RM
618 .size = sizeof(u32), .align = sizeof(u32),
619 .active = evr_active, .get = evr_get, .set = evr_set
620 },
621#endif
622};
623
624static const struct user_regset_view user_ppc_compat_view = {
625 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
626 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
627};
628#endif /* CONFIG_PPC64 */
629
80fdf470
RM
630const struct user_regset_view *task_user_regset_view(struct task_struct *task)
631{
fa8f5cb0
RM
632#ifdef CONFIG_PPC64
633 if (test_tsk_thread_flag(task, TIF_32BIT))
634 return &user_ppc_compat_view;
635#endif
80fdf470
RM
636 return &user_ppc_native_view;
637}
638
639
2a84b0d7 640void user_enable_single_step(struct task_struct *task)
865418d8
BH
641{
642 struct pt_regs *regs = task->thread.regs;
643
644 if (regs != NULL) {
645#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
646 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
647 regs->msr |= MSR_DE;
648#else
649 regs->msr |= MSR_SE;
650#endif
651 }
652 set_tsk_thread_flag(task, TIF_SINGLESTEP);
653}
654
2a84b0d7 655void user_disable_single_step(struct task_struct *task)
865418d8
BH
656{
657 struct pt_regs *regs = task->thread.regs;
658
659 if (regs != NULL) {
660#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
661 task->thread.dbcr0 = 0;
662 regs->msr &= ~MSR_DE;
663#else
664 regs->msr &= ~MSR_SE;
665#endif
666 }
667 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
668}
669
abd06505
BH
670static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
671 unsigned long data)
672{
673 /* We only support one DABR and no IABRS at the moment */
674 if (addr > 0)
675 return -EINVAL;
676
677 /* The bottom 3 bits are flags */
678 if ((data & ~0x7UL) >= TASK_SIZE)
679 return -EIO;
680
681 /* Ensure translation is on */
682 if (data && !(data & DABR_TRANSLATION))
683 return -EIO;
684
685 task->thread.dabr = data;
686 return 0;
687}
abd06505 688
1da177e4
LT
689/*
690 * Called by kernel/ptrace.c when detaching..
691 *
692 * Make sure single step bits etc are not set.
693 */
694void ptrace_disable(struct task_struct *child)
695{
696 /* make sure the single step bit is not set. */
2a84b0d7 697 user_disable_single_step(child);
1da177e4
LT
698}
699
e17666ba
BH
700/*
701 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
702 * we mark them as obsolete now, they will be removed in a future version
703 */
704static long arch_ptrace_old(struct task_struct *child, long request, long addr,
705 long data)
706{
c391cd00
RM
707 switch (request) {
708 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
709 return copy_regset_to_user(child, &user_ppc_native_view,
710 REGSET_GPR, 0, 32 * sizeof(long),
711 (void __user *) data);
712
713 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
714 return copy_regset_from_user(child, &user_ppc_native_view,
715 REGSET_GPR, 0, 32 * sizeof(long),
716 (const void __user *) data);
717
718 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
719 return copy_regset_to_user(child, &user_ppc_native_view,
720 REGSET_FPR, 0, 32 * sizeof(double),
721 (void __user *) data);
722
723 case PPC_PTRACE_SETFPREGS: /* Set FPRs 0 - 31. */
724 return copy_regset_from_user(child, &user_ppc_native_view,
725 REGSET_FPR, 0, 32 * sizeof(double),
726 (const void __user *) data);
e17666ba
BH
727 }
728
c391cd00 729 return -EPERM;
e17666ba
BH
730}
731
481bed45 732long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4 733{
1da177e4
LT
734 int ret = -EPERM;
735
1da177e4 736 switch (request) {
1da177e4 737 /* read the word at location addr in the USER area. */
1da177e4
LT
738 case PTRACE_PEEKUSR: {
739 unsigned long index, tmp;
740
741 ret = -EIO;
742 /* convert to index and check */
e8a30302 743#ifdef CONFIG_PPC32
1da177e4 744 index = (unsigned long) addr >> 2;
e8a30302
SR
745 if ((addr & 3) || (index > PT_FPSCR)
746 || (child->thread.regs == NULL))
747#else
748 index = (unsigned long) addr >> 3;
749 if ((addr & 7) || (index > PT_FPSCR))
750#endif
1da177e4
LT
751 break;
752
753 CHECK_FULL_REGS(child->thread.regs);
754 if (index < PT_FPR0) {
865418d8 755 tmp = ptrace_get_reg(child, (int) index);
1da177e4 756 } else {
e8a30302 757 flush_fp_to_thread(child);
9c75a31c
MN
758 tmp = ((unsigned long *)child->thread.fpr)
759 [TS_FPRWIDTH * (index - PT_FPR0)];
1da177e4
LT
760 }
761 ret = put_user(tmp,(unsigned long __user *) data);
762 break;
763 }
764
1da177e4
LT
765 /* write the word at location addr in the USER area */
766 case PTRACE_POKEUSR: {
767 unsigned long index;
768
769 ret = -EIO;
770 /* convert to index and check */
e8a30302 771#ifdef CONFIG_PPC32
1da177e4 772 index = (unsigned long) addr >> 2;
e8a30302
SR
773 if ((addr & 3) || (index > PT_FPSCR)
774 || (child->thread.regs == NULL))
775#else
776 index = (unsigned long) addr >> 3;
777 if ((addr & 7) || (index > PT_FPSCR))
778#endif
1da177e4
LT
779 break;
780
781 CHECK_FULL_REGS(child->thread.regs);
1da177e4 782 if (index < PT_FPR0) {
865418d8 783 ret = ptrace_put_reg(child, index, data);
1da177e4 784 } else {
e8a30302 785 flush_fp_to_thread(child);
9c75a31c
MN
786 ((unsigned long *)child->thread.fpr)
787 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
1da177e4
LT
788 ret = 0;
789 }
790 break;
791 }
792
e8a30302
SR
793 case PTRACE_GET_DEBUGREG: {
794 ret = -EINVAL;
795 /* We only support one DABR and no IABRS at the moment */
796 if (addr > 0)
797 break;
798 ret = put_user(child->thread.dabr,
799 (unsigned long __user *)data);
800 break;
801 }
802
803 case PTRACE_SET_DEBUGREG:
804 ret = ptrace_set_debugreg(child, addr, data);
805 break;
e8a30302 806
e17666ba
BH
807#ifdef CONFIG_PPC64
808 case PTRACE_GETREGS64:
809#endif
c391cd00
RM
810 case PTRACE_GETREGS: /* Get all pt_regs from the child. */
811 return copy_regset_to_user(child, &user_ppc_native_view,
812 REGSET_GPR,
813 0, sizeof(struct pt_regs),
814 (void __user *) data);
e8a30302 815
e17666ba
BH
816#ifdef CONFIG_PPC64
817 case PTRACE_SETREGS64:
818#endif
c391cd00
RM
819 case PTRACE_SETREGS: /* Set all gp regs in the child. */
820 return copy_regset_from_user(child, &user_ppc_native_view,
821 REGSET_GPR,
822 0, sizeof(struct pt_regs),
823 (const void __user *) data);
824
825 case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
826 return copy_regset_to_user(child, &user_ppc_native_view,
827 REGSET_FPR,
828 0, sizeof(elf_fpregset_t),
829 (void __user *) data);
830
831 case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
832 return copy_regset_from_user(child, &user_ppc_native_view,
833 REGSET_FPR,
834 0, sizeof(elf_fpregset_t),
835 (const void __user *) data);
e8a30302 836
1da177e4
LT
837#ifdef CONFIG_ALTIVEC
838 case PTRACE_GETVRREGS:
c391cd00
RM
839 return copy_regset_to_user(child, &user_ppc_native_view,
840 REGSET_VMX,
841 0, (33 * sizeof(vector128) +
842 sizeof(u32)),
843 (void __user *) data);
1da177e4
LT
844
845 case PTRACE_SETVRREGS:
c391cd00
RM
846 return copy_regset_from_user(child, &user_ppc_native_view,
847 REGSET_VMX,
848 0, (33 * sizeof(vector128) +
849 sizeof(u32)),
850 (const void __user *) data);
1da177e4
LT
851#endif
852#ifdef CONFIG_SPE
853 case PTRACE_GETEVRREGS:
854 /* Get the child spe register state. */
c391cd00
RM
855 return copy_regset_to_user(child, &user_ppc_native_view,
856 REGSET_SPE, 0, 35 * sizeof(u32),
857 (void __user *) data);
1da177e4
LT
858
859 case PTRACE_SETEVRREGS:
860 /* Set the child spe register state. */
c391cd00
RM
861 return copy_regset_from_user(child, &user_ppc_native_view,
862 REGSET_SPE, 0, 35 * sizeof(u32),
863 (const void __user *) data);
1da177e4
LT
864#endif
865
e17666ba
BH
866 /* Old reverse args ptrace callss */
867 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
868 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
869 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
870 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
871 ret = arch_ptrace_old(child, request, addr, data);
872 break;
873
1da177e4
LT
874 default:
875 ret = ptrace_request(child, request, addr, data);
876 break;
877 }
1da177e4
LT
878 return ret;
879}
880
ea9c102c 881static void do_syscall_trace(void)
1da177e4 882{
ea9c102c
DW
883 /* the 0x80 provides a way for the tracing parent to distinguish
884 between a syscall stop and SIGTRAP delivery */
1da177e4
LT
885 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
886 ? 0x80 : 0));
887
888 /*
889 * this isn't the same as continuing with a signal, but it will do
890 * for normal use. strace only continues with a signal if the
891 * stopping signal is not SIGTRAP. -brl
892 */
893 if (current->exit_code) {
894 send_sig(current->exit_code, current, 1);
895 current->exit_code = 0;
896 }
897}
ea9c102c
DW
898
899void do_syscall_trace_enter(struct pt_regs *regs)
900{
e8a30302 901 secure_computing(regs->gpr[0]);
e8a30302 902
ea9c102c
DW
903 if (test_thread_flag(TIF_SYSCALL_TRACE)
904 && (current->ptrace & PT_PTRACED))
905 do_syscall_trace();
906
cfcd1705
DW
907 if (unlikely(current->audit_context)) {
908#ifdef CONFIG_PPC64
909 if (!test_thread_flag(TIF_32BIT))
910 audit_syscall_entry(AUDIT_ARCH_PPC64,
911 regs->gpr[0],
912 regs->gpr[3], regs->gpr[4],
913 regs->gpr[5], regs->gpr[6]);
914 else
e8a30302 915#endif
cfcd1705
DW
916 audit_syscall_entry(AUDIT_ARCH_PPC,
917 regs->gpr[0],
918 regs->gpr[3] & 0xffffffff,
919 regs->gpr[4] & 0xffffffff,
920 regs->gpr[5] & 0xffffffff,
921 regs->gpr[6] & 0xffffffff);
922 }
ea9c102c
DW
923}
924
925void do_syscall_trace_leave(struct pt_regs *regs)
926{
ea9c102c 927 if (unlikely(current->audit_context))
4b9c876a 928 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
ea9c102c
DW
929 regs->result);
930
e8a30302 931 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1bd79336 932 || test_thread_flag(TIF_SINGLESTEP))
ea9c102c
DW
933 && (current->ptrace & PT_PTRACED))
934 do_syscall_trace();
935}
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