[POWERPC] Allow ptrace write to pt_regs trap and orig_r3
[deliverable/linux.git] / arch / powerpc / kernel / ptrace.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
b123923d 11 * and Paul Mackerras (paulus@samba.org).
1da177e4
LT
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
1da177e4
LT
22#include <linux/errno.h>
23#include <linux/ptrace.h>
24#include <linux/user.h>
25#include <linux/security.h>
7ed20e1a 26#include <linux/signal.h>
ea9c102c
DW
27#include <linux/seccomp.h>
28#include <linux/audit.h>
e8a30302 29#ifdef CONFIG_PPC32
ea9c102c 30#include <linux/module.h>
e8a30302 31#endif
1da177e4
LT
32
33#include <asm/uaccess.h>
34#include <asm/page.h>
35#include <asm/pgtable.h>
36#include <asm/system.h>
21a62902 37
e8a30302 38#ifdef CONFIG_PPC64
acd89828 39#include "ptrace-ppc64.h"
1da177e4 40#else
acd89828 41#include "ptrace-ppc32.h"
1da177e4 42#endif
acd89828 43
1da177e4
LT
44/*
45 * does not yet catch signals sent when the child dies.
46 * in exit.c or in signal.c.
47 */
48
865418d8
BH
49/*
50 * Get contents of register REGNO in task TASK.
51 */
52unsigned long ptrace_get_reg(struct task_struct *task, int regno)
53{
54 unsigned long tmp = 0;
55
56 if (task->thread.regs == NULL)
57 return -EIO;
58
59 if (regno == PT_MSR) {
60 tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
61 return PT_MUNGE_MSR(tmp, task);
62 }
63
64 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
65 return ((unsigned long *)task->thread.regs)[regno];
66
67 return -EIO;
68}
69
70/*
71 * Write contents of register REGNO in task TASK.
72 */
73int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
74{
75 if (task->thread.regs == NULL)
76 return -EIO;
77
912000e7 78 if (regno <= PT_MAX_PUT_REG || regno == PT_TRAP) {
865418d8
BH
79 if (regno == PT_MSR)
80 data = (data & MSR_DEBUGCHANGE)
81 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
912000e7
BH
82 /* We prevent mucking around with the reserved area of trap
83 * which are used internally by the kernel
84 */
85 if (regno == PT_TRAP)
86 data &= 0xfff0;
865418d8
BH
87 ((unsigned long *)task->thread.regs)[regno] = data;
88 return 0;
89 }
90 return -EIO;
91}
92
93
94static int get_fpregs(void __user *data, struct task_struct *task,
95 int has_fpscr)
96{
97 unsigned int count = has_fpscr ? 33 : 32;
98
99 if (copy_to_user(data, task->thread.fpr, count * sizeof(double)))
100 return -EFAULT;
101 return 0;
102}
103
104static int set_fpregs(void __user *data, struct task_struct *task,
105 int has_fpscr)
106{
107 unsigned int count = has_fpscr ? 33 : 32;
108
109 if (copy_from_user(task->thread.fpr, data, count * sizeof(double)))
110 return -EFAULT;
111 return 0;
112}
113
114
115#ifdef CONFIG_ALTIVEC
116/*
117 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
118 * The transfer totals 34 quadword. Quadwords 0-31 contain the
119 * corresponding vector registers. Quadword 32 contains the vscr as the
120 * last word (offset 12) within that quadword. Quadword 33 contains the
121 * vrsave as the first word (offset 0) within the quadword.
122 *
123 * This definition of the VMX state is compatible with the current PPC32
124 * ptrace interface. This allows signal handling and ptrace to use the
125 * same structures. This also simplifies the implementation of a bi-arch
126 * (combined (32- and 64-bit) gdb.
127 */
128
129/*
130 * Get contents of AltiVec register state in task TASK
131 */
132static int get_vrregs(unsigned long __user *data, struct task_struct *task)
133{
134 unsigned long regsize;
135
136 /* copy AltiVec registers VR[0] .. VR[31] */
137 regsize = 32 * sizeof(vector128);
138 if (copy_to_user(data, task->thread.vr, regsize))
139 return -EFAULT;
140 data += (regsize / sizeof(unsigned long));
141
142 /* copy VSCR */
143 regsize = 1 * sizeof(vector128);
144 if (copy_to_user(data, &task->thread.vscr, regsize))
145 return -EFAULT;
146 data += (regsize / sizeof(unsigned long));
147
148 /* copy VRSAVE */
149 if (put_user(task->thread.vrsave, (u32 __user *)data))
150 return -EFAULT;
151
152 return 0;
153}
154
155/*
156 * Write contents of AltiVec register state into task TASK.
157 */
158static int set_vrregs(struct task_struct *task, unsigned long __user *data)
159{
160 unsigned long regsize;
161
162 /* copy AltiVec registers VR[0] .. VR[31] */
163 regsize = 32 * sizeof(vector128);
164 if (copy_from_user(task->thread.vr, data, regsize))
165 return -EFAULT;
166 data += (regsize / sizeof(unsigned long));
167
168 /* copy VSCR */
169 regsize = 1 * sizeof(vector128);
170 if (copy_from_user(&task->thread.vscr, data, regsize))
171 return -EFAULT;
172 data += (regsize / sizeof(unsigned long));
173
174 /* copy VRSAVE */
175 if (get_user(task->thread.vrsave, (u32 __user *)data))
176 return -EFAULT;
177
178 return 0;
179}
180#endif /* CONFIG_ALTIVEC */
181
182#ifdef CONFIG_SPE
183
184/*
185 * For get_evrregs/set_evrregs functions 'data' has the following layout:
186 *
187 * struct {
188 * u32 evr[32];
189 * u64 acc;
190 * u32 spefscr;
191 * }
192 */
193
194/*
195 * Get contents of SPE register state in task TASK.
196 */
197static int get_evrregs(unsigned long *data, struct task_struct *task)
198{
199 int i;
200
201 if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
202 return -EFAULT;
203
204 /* copy SPEFSCR */
205 if (__put_user(task->thread.spefscr, &data[34]))
206 return -EFAULT;
207
208 /* copy SPE registers EVR[0] .. EVR[31] */
209 for (i = 0; i < 32; i++, data++)
210 if (__put_user(task->thread.evr[i], data))
211 return -EFAULT;
212
213 /* copy ACC */
214 if (__put_user64(task->thread.acc, (unsigned long long *)data))
215 return -EFAULT;
216
217 return 0;
218}
219
220/*
221 * Write contents of SPE register state into task TASK.
222 */
223static int set_evrregs(struct task_struct *task, unsigned long *data)
224{
225 int i;
226
227 if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
228 return -EFAULT;
229
230 /* copy SPEFSCR */
231 if (__get_user(task->thread.spefscr, &data[34]))
232 return -EFAULT;
233
234 /* copy SPE registers EVR[0] .. EVR[31] */
235 for (i = 0; i < 32; i++, data++)
236 if (__get_user(task->thread.evr[i], data))
237 return -EFAULT;
238 /* copy ACC */
239 if (__get_user64(task->thread.acc, (unsigned long long*)data))
240 return -EFAULT;
241
242 return 0;
243}
244#endif /* CONFIG_SPE */
245
246
247static void set_single_step(struct task_struct *task)
248{
249 struct pt_regs *regs = task->thread.regs;
250
251 if (regs != NULL) {
252#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
253 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
254 regs->msr |= MSR_DE;
255#else
256 regs->msr |= MSR_SE;
257#endif
258 }
259 set_tsk_thread_flag(task, TIF_SINGLESTEP);
260}
261
262static void clear_single_step(struct task_struct *task)
263{
264 struct pt_regs *regs = task->thread.regs;
265
266 if (regs != NULL) {
267#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
268 task->thread.dbcr0 = 0;
269 regs->msr &= ~MSR_DE;
270#else
271 regs->msr &= ~MSR_SE;
272#endif
273 }
274 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
275}
276
1da177e4
LT
277/*
278 * Called by kernel/ptrace.c when detaching..
279 *
280 * Make sure single step bits etc are not set.
281 */
282void ptrace_disable(struct task_struct *child)
283{
284 /* make sure the single step bit is not set. */
285 clear_single_step(child);
286}
287
e17666ba
BH
288/*
289 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
290 * we mark them as obsolete now, they will be removed in a future version
291 */
292static long arch_ptrace_old(struct task_struct *child, long request, long addr,
293 long data)
294{
295 int ret = -EPERM;
296
297 switch(request) {
298 case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
299 int i;
300 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
301 unsigned long __user *tmp = (unsigned long __user *)addr;
302
303 for (i = 0; i < 32; i++) {
304 ret = put_user(*reg, tmp);
305 if (ret)
306 break;
307 reg++;
308 tmp++;
309 }
310 break;
311 }
312
313 case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
314 int i;
315 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
316 unsigned long __user *tmp = (unsigned long __user *)addr;
317
318 for (i = 0; i < 32; i++) {
319 ret = get_user(*reg, tmp);
320 if (ret)
321 break;
322 reg++;
323 tmp++;
324 }
325 break;
326 }
327
328 case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
329 flush_fp_to_thread(child);
330 ret = get_fpregs((void __user *)addr, child, 0);
331 break;
332 }
333
334 case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */
335 flush_fp_to_thread(child);
336 ret = set_fpregs((void __user *)addr, child, 0);
337 break;
338 }
339
340 }
341 return ret;
342}
343
481bed45 344long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4 345{
1da177e4
LT
346 int ret = -EPERM;
347
1da177e4
LT
348 switch (request) {
349 /* when I and D space are separate, these will need to be fixed. */
350 case PTRACE_PEEKTEXT: /* read word at location addr. */
351 case PTRACE_PEEKDATA: {
352 unsigned long tmp;
353 int copied;
354
355 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
356 ret = -EIO;
357 if (copied != sizeof(tmp))
358 break;
359 ret = put_user(tmp,(unsigned long __user *) data);
360 break;
361 }
362
363 /* read the word at location addr in the USER area. */
1da177e4
LT
364 case PTRACE_PEEKUSR: {
365 unsigned long index, tmp;
366
367 ret = -EIO;
368 /* convert to index and check */
e8a30302 369#ifdef CONFIG_PPC32
1da177e4 370 index = (unsigned long) addr >> 2;
e8a30302
SR
371 if ((addr & 3) || (index > PT_FPSCR)
372 || (child->thread.regs == NULL))
373#else
374 index = (unsigned long) addr >> 3;
375 if ((addr & 7) || (index > PT_FPSCR))
376#endif
1da177e4
LT
377 break;
378
379 CHECK_FULL_REGS(child->thread.regs);
380 if (index < PT_FPR0) {
865418d8 381 tmp = ptrace_get_reg(child, (int) index);
1da177e4 382 } else {
e8a30302 383 flush_fp_to_thread(child);
1da177e4
LT
384 tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
385 }
386 ret = put_user(tmp,(unsigned long __user *) data);
387 break;
388 }
389
390 /* If I and D space are separate, this will have to be fixed. */
391 case PTRACE_POKETEXT: /* write the word at location addr. */
392 case PTRACE_POKEDATA:
393 ret = 0;
e8a30302
SR
394 if (access_process_vm(child, addr, &data, sizeof(data), 1)
395 == sizeof(data))
1da177e4
LT
396 break;
397 ret = -EIO;
398 break;
399
400 /* write the word at location addr in the USER area */
401 case PTRACE_POKEUSR: {
402 unsigned long index;
403
404 ret = -EIO;
405 /* convert to index and check */
e8a30302 406#ifdef CONFIG_PPC32
1da177e4 407 index = (unsigned long) addr >> 2;
e8a30302
SR
408 if ((addr & 3) || (index > PT_FPSCR)
409 || (child->thread.regs == NULL))
410#else
411 index = (unsigned long) addr >> 3;
412 if ((addr & 7) || (index > PT_FPSCR))
413#endif
1da177e4
LT
414 break;
415
416 CHECK_FULL_REGS(child->thread.regs);
1da177e4 417 if (index < PT_FPR0) {
865418d8 418 ret = ptrace_put_reg(child, index, data);
1da177e4 419 } else {
e8a30302 420 flush_fp_to_thread(child);
1da177e4
LT
421 ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
422 ret = 0;
423 }
424 break;
425 }
426
427 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
428 case PTRACE_CONT: { /* restart after signal. */
429 ret = -EIO;
7ed20e1a 430 if (!valid_signal(data))
1da177e4 431 break;
e8a30302 432 if (request == PTRACE_SYSCALL)
1da177e4 433 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
e8a30302 434 else
1da177e4 435 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1da177e4
LT
436 child->exit_code = data;
437 /* make sure the single step bit is not set. */
438 clear_single_step(child);
439 wake_up_process(child);
440 ret = 0;
441 break;
442 }
443
444/*
445 * make the child exit. Best I can do is send it a sigkill.
446 * perhaps it should be put in the status that it wants to
447 * exit.
448 */
449 case PTRACE_KILL: {
450 ret = 0;
451 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
452 break;
453 child->exit_code = SIGKILL;
454 /* make sure the single step bit is not set. */
455 clear_single_step(child);
456 wake_up_process(child);
457 break;
458 }
459
460 case PTRACE_SINGLESTEP: { /* set the trap flag. */
461 ret = -EIO;
7ed20e1a 462 if (!valid_signal(data))
1da177e4
LT
463 break;
464 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
465 set_single_step(child);
466 child->exit_code = data;
467 /* give it a chance to run. */
468 wake_up_process(child);
469 ret = 0;
470 break;
471 }
472
e8a30302
SR
473#ifdef CONFIG_PPC64
474 case PTRACE_GET_DEBUGREG: {
475 ret = -EINVAL;
476 /* We only support one DABR and no IABRS at the moment */
477 if (addr > 0)
478 break;
479 ret = put_user(child->thread.dabr,
480 (unsigned long __user *)data);
481 break;
482 }
483
484 case PTRACE_SET_DEBUGREG:
485 ret = ptrace_set_debugreg(child, addr, data);
486 break;
487#endif
488
1da177e4
LT
489 case PTRACE_DETACH:
490 ret = ptrace_detach(child, data);
491 break;
492
e17666ba
BH
493#ifdef CONFIG_PPC64
494 case PTRACE_GETREGS64:
495#endif
496 case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
497 int ui;
498 if (!access_ok(VERIFY_WRITE, (void __user *)data,
499 sizeof(struct pt_regs))) {
500 ret = -EIO;
501 break;
502 }
503 ret = 0;
504 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
865418d8 505 ret |= __put_user(ptrace_get_reg(child, ui),
e17666ba
BH
506 (unsigned long __user *) data);
507 data += sizeof(long);
e8a30302
SR
508 }
509 break;
510 }
511
e17666ba
BH
512#ifdef CONFIG_PPC64
513 case PTRACE_SETREGS64:
514#endif
515 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
516 unsigned long tmp;
517 int ui;
518 if (!access_ok(VERIFY_READ, (void __user *)data,
519 sizeof(struct pt_regs))) {
520 ret = -EIO;
521 break;
522 }
523 ret = 0;
524 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
525 ret = __get_user(tmp, (unsigned long __user *) data);
e8a30302
SR
526 if (ret)
527 break;
865418d8 528 ptrace_put_reg(child, ui, tmp);
e17666ba 529 data += sizeof(long);
e8a30302
SR
530 }
531 break;
532 }
533
e17666ba 534 case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */
e8a30302 535 flush_fp_to_thread(child);
e17666ba 536 ret = get_fpregs((void __user *)data, child, 1);
e8a30302
SR
537 break;
538 }
539
e17666ba 540 case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */
e8a30302 541 flush_fp_to_thread(child);
e17666ba 542 ret = set_fpregs((void __user *)data, child, 1);
e8a30302
SR
543 break;
544 }
e8a30302 545
1da177e4
LT
546#ifdef CONFIG_ALTIVEC
547 case PTRACE_GETVRREGS:
548 /* Get the child altivec register state. */
e8a30302 549 flush_altivec_to_thread(child);
1da177e4
LT
550 ret = get_vrregs((unsigned long __user *)data, child);
551 break;
552
553 case PTRACE_SETVRREGS:
554 /* Set the child altivec register state. */
e8a30302 555 flush_altivec_to_thread(child);
1da177e4
LT
556 ret = set_vrregs(child, (unsigned long __user *)data);
557 break;
558#endif
559#ifdef CONFIG_SPE
560 case PTRACE_GETEVRREGS:
561 /* Get the child spe register state. */
562 if (child->thread.regs->msr & MSR_SPE)
563 giveup_spe(child);
564 ret = get_evrregs((unsigned long __user *)data, child);
565 break;
566
567 case PTRACE_SETEVRREGS:
568 /* Set the child spe register state. */
569 /* this is to clear the MSR_SPE bit to force a reload
570 * of register state from memory */
571 if (child->thread.regs->msr & MSR_SPE)
572 giveup_spe(child);
573 ret = set_evrregs(child, (unsigned long __user *)data);
574 break;
575#endif
576
e17666ba
BH
577 /* Old reverse args ptrace callss */
578 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
579 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
580 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
581 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
582 ret = arch_ptrace_old(child, request, addr, data);
583 break;
584
1da177e4
LT
585 default:
586 ret = ptrace_request(child, request, addr, data);
587 break;
588 }
1da177e4
LT
589 return ret;
590}
591
ea9c102c 592static void do_syscall_trace(void)
1da177e4 593{
ea9c102c
DW
594 /* the 0x80 provides a way for the tracing parent to distinguish
595 between a syscall stop and SIGTRAP delivery */
1da177e4
LT
596 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
597 ? 0x80 : 0));
598
599 /*
600 * this isn't the same as continuing with a signal, but it will do
601 * for normal use. strace only continues with a signal if the
602 * stopping signal is not SIGTRAP. -brl
603 */
604 if (current->exit_code) {
605 send_sig(current->exit_code, current, 1);
606 current->exit_code = 0;
607 }
608}
ea9c102c
DW
609
610void do_syscall_trace_enter(struct pt_regs *regs)
611{
e8a30302 612 secure_computing(regs->gpr[0]);
e8a30302 613
ea9c102c
DW
614 if (test_thread_flag(TIF_SYSCALL_TRACE)
615 && (current->ptrace & PT_PTRACED))
616 do_syscall_trace();
617
cfcd1705
DW
618 if (unlikely(current->audit_context)) {
619#ifdef CONFIG_PPC64
620 if (!test_thread_flag(TIF_32BIT))
621 audit_syscall_entry(AUDIT_ARCH_PPC64,
622 regs->gpr[0],
623 regs->gpr[3], regs->gpr[4],
624 regs->gpr[5], regs->gpr[6]);
625 else
e8a30302 626#endif
cfcd1705
DW
627 audit_syscall_entry(AUDIT_ARCH_PPC,
628 regs->gpr[0],
629 regs->gpr[3] & 0xffffffff,
630 regs->gpr[4] & 0xffffffff,
631 regs->gpr[5] & 0xffffffff,
632 regs->gpr[6] & 0xffffffff);
633 }
ea9c102c
DW
634}
635
636void do_syscall_trace_leave(struct pt_regs *regs)
637{
ea9c102c 638 if (unlikely(current->audit_context))
4b9c876a 639 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
ea9c102c
DW
640 regs->result);
641
e8a30302 642 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1bd79336 643 || test_thread_flag(TIF_SINGLESTEP))
ea9c102c
DW
644 && (current->ptrace & PT_PTRACED))
645 do_syscall_trace();
646}
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