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[POWERPC] Add user_regset compat support
[deliverable/linux.git] / arch / powerpc / kernel / ptrace.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
b123923d 11 * and Paul Mackerras (paulus@samba.org).
1da177e4
LT		 12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
1da177e4
LT		 22#include <linux/errno.h>
23#include <linux/ptrace.h>
f65255e8 24#include <linux/regset.h>
3caf06c6 25#include <linux/elf.h>
1da177e4
LT		 26#include <linux/user.h>
27#include <linux/security.h>
7ed20e1a 28#include <linux/signal.h>
ea9c102c
DW		 29#include <linux/seccomp.h>
30#include <linux/audit.h>
e8a30302 31#ifdef CONFIG_PPC32
ea9c102c 32#include <linux/module.h>
e8a30302 33#endif
1da177e4
LT		 34
35#include <asm/uaccess.h>
36#include <asm/page.h>
37#include <asm/pgtable.h>
38#include <asm/system.h>
21a62902 39
abd06505
BH		 40/*
41 * does not yet catch signals sent when the child dies.
42 * in exit.c or in signal.c.
43 */
44
45/*
46 * Set of msr bits that gdb can change on behalf of a process.
47 */
48#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
49#define MSR_DEBUGCHANGE 0
1da177e4 50#else
abd06505 51#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
1da177e4 52#endif
acd89828 53
1da177e4 54/*
abd06505 55 * Max register writeable via put_reg
1da177e4 56 */
abd06505
BH		 57#ifdef CONFIG_PPC32
58#define PT_MAX_PUT_REG PT_MQ
59#else
60#define PT_MAX_PUT_REG PT_CCR
61#endif
1da177e4 62
26f77130
RM		 63static unsigned long get_user_msr(struct task_struct *task)
64{
65 return task->thread.regs->msr | task->thread.fpexc_mode;
66}
67
68static int set_user_msr(struct task_struct *task, unsigned long msr)
69{
70 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
71 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
72 return 0;
73}
74
75/*
76 * We prevent mucking around with the reserved area of trap
77 * which are used internally by the kernel.
78 */
79static int set_user_trap(struct task_struct *task, unsigned long trap)
80{
81 task->thread.regs->trap = trap & 0xfff0;
82 return 0;
83}
84
865418d8
BH		 85/*
86 * Get contents of register REGNO in task TASK.
87 */
88unsigned long ptrace_get_reg(struct task_struct *task, int regno)
89{
865418d8
BH		 90 if (task->thread.regs == NULL)
91 return -EIO;
92
26f77130
RM		 93 if (regno == PT_MSR)
94 return get_user_msr(task);
865418d8
BH		 95
96 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
97 return ((unsigned long *)task->thread.regs)[regno];
98
99 return -EIO;
100}
101
102/*
103 * Write contents of register REGNO in task TASK.
104 */
105int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
106{
107 if (task->thread.regs == NULL)
108 return -EIO;
109
26f77130
RM		 110 if (regno == PT_MSR)
111 return set_user_msr(task, data);
112 if (regno == PT_TRAP)
113 return set_user_trap(task, data);
114
115 if (regno <= PT_MAX_PUT_REG) {
865418d8
BH		 116 ((unsigned long *)task->thread.regs)[regno] = data;
117 return 0;
118 }
119 return -EIO;
120}
121
44dd3f50
RM		 122static int gpr_get(struct task_struct *target, const struct user_regset *regset,
123 unsigned int pos, unsigned int count,
124 void *kbuf, void __user *ubuf)
125{
126 int ret;
127
128 if (target->thread.regs == NULL)
129 return -EIO;
130
131 CHECK_FULL_REGS(target->thread.regs);
132
133 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
134 target->thread.regs,
135 0, offsetof(struct pt_regs, msr));
136 if (!ret) {
137 unsigned long msr = get_user_msr(target);
138 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
139 offsetof(struct pt_regs, msr),
140 offsetof(struct pt_regs, msr) +
141 sizeof(msr));
142 }
143
144 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
145 offsetof(struct pt_regs, msr) + sizeof(long));
146
147 if (!ret)
148 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
149 &target->thread.regs->orig_gpr3,
150 offsetof(struct pt_regs, orig_gpr3),
151 sizeof(struct pt_regs));
152 if (!ret)
153 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
154 sizeof(struct pt_regs), -1);
155
156 return ret;
157}
158
159static int gpr_set(struct task_struct *target, const struct user_regset *regset,
160 unsigned int pos, unsigned int count,
161 const void *kbuf, const void __user *ubuf)
162{
163 unsigned long reg;
164 int ret;
165
166 if (target->thread.regs == NULL)
167 return -EIO;
168
169 CHECK_FULL_REGS(target->thread.regs);
170
171 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
172 target->thread.regs,
173 0, PT_MSR * sizeof(reg));
174
175 if (!ret && count > 0) {
176 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
177 PT_MSR * sizeof(reg),
178 (PT_MSR + 1) * sizeof(reg));
179 if (!ret)
180 ret = set_user_msr(target, reg);
181 }
182
183 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
184 offsetof(struct pt_regs, msr) + sizeof(long));
185
186 if (!ret)
187 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
188 &target->thread.regs->orig_gpr3,
189 PT_ORIG_R3 * sizeof(reg),
190 (PT_MAX_PUT_REG + 1) * sizeof(reg));
191
192 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
193 ret = user_regset_copyin_ignore(
194 &pos, &count, &kbuf, &ubuf,
195 (PT_MAX_PUT_REG + 1) * sizeof(reg),
196 PT_TRAP * sizeof(reg));
197
198 if (!ret && count > 0) {
199 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
200 PT_TRAP * sizeof(reg),
201 (PT_TRAP + 1) * sizeof(reg));
202 if (!ret)
203 ret = set_user_trap(target, reg);
204 }
205
206 if (!ret)
207 ret = user_regset_copyin_ignore(
208 &pos, &count, &kbuf, &ubuf,
209 (PT_TRAP + 1) * sizeof(reg), -1);
210
211 return ret;
212}
865418d8 213
f65255e8
RM		 214static int fpr_get(struct task_struct *target, const struct user_regset *regset,
215 unsigned int pos, unsigned int count,
216 void *kbuf, void __user *ubuf)
217{
218 flush_fp_to_thread(target);
219
220 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
221 offsetof(struct thread_struct, fpr[32]));
222
223 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
224 &target->thread.fpr, 0, -1);
225}
226
227static int fpr_set(struct task_struct *target, const struct user_regset *regset,
228 unsigned int pos, unsigned int count,
229 const void *kbuf, const void __user *ubuf)
230{
231 flush_fp_to_thread(target);
232
233 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
234 offsetof(struct thread_struct, fpr[32]));
235
236 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
237 &target->thread.fpr, 0, -1);
238}
239
865418d8
BH		 240static int get_fpregs(void __user *data, struct task_struct *task,
241 int has_fpscr)
242{
243 unsigned int count = has_fpscr ? 33 : 32;
f65255e8 244 if (!access_ok(VERIFY_WRITE, data, count * sizeof(double)))
865418d8 245 return -EFAULT;
f65255e8 246 return fpr_get(task, NULL, 0, count * sizeof(double), NULL, data);
865418d8
BH		 247}
248
249static int set_fpregs(void __user *data, struct task_struct *task,
250 int has_fpscr)
251{
252 unsigned int count = has_fpscr ? 33 : 32;
f65255e8 253 if (!access_ok(VERIFY_READ, data, count * sizeof(double)))
865418d8 254 return -EFAULT;
f65255e8 255 return fpr_set(task, NULL, 0, count * sizeof(double), NULL, data);
865418d8
BH		 256}
257
258
259#ifdef CONFIG_ALTIVEC
260/*
261 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
262 * The transfer totals 34 quadword. Quadwords 0-31 contain the
263 * corresponding vector registers. Quadword 32 contains the vscr as the
264 * last word (offset 12) within that quadword. Quadword 33 contains the
265 * vrsave as the first word (offset 0) within the quadword.
266 *
267 * This definition of the VMX state is compatible with the current PPC32
268 * ptrace interface. This allows signal handling and ptrace to use the
269 * same structures. This also simplifies the implementation of a bi-arch
270 * (combined (32- and 64-bit) gdb.
271 */
272
3caf06c6
RM		 273static int vr_active(struct task_struct *target,
274 const struct user_regset *regset)
275{
276 flush_altivec_to_thread(target);
277 return target->thread.used_vr ? regset->n : 0;
278}
279
280static int vr_get(struct task_struct *target, const struct user_regset *regset,
281 unsigned int pos, unsigned int count,
282 void *kbuf, void __user *ubuf)
283{
284 int ret;
285
286 flush_altivec_to_thread(target);
287
288 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
289 offsetof(struct thread_struct, vr[32]));
290
291 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
292 &target->thread.vr, 0,
293 33 * sizeof(vector128));
294 if (!ret) {
295 /*
296 * Copy out only the low-order word of vrsave.
297 */
298 union {
299 elf_vrreg_t reg;
300 u32 word;
301 } vrsave;
302 memset(&vrsave, 0, sizeof(vrsave));
303 vrsave.word = target->thread.vrsave;
304 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
305 33 * sizeof(vector128), -1);
306 }
307
308 return ret;
309}
310
311static int vr_set(struct task_struct *target, const struct user_regset *regset,
312 unsigned int pos, unsigned int count,
313 const void *kbuf, const void __user *ubuf)
314{
315 int ret;
316
317 flush_altivec_to_thread(target);
318
319 BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
320 offsetof(struct thread_struct, vr[32]));
321
322 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
323 &target->thread.vr, 0, 33 * sizeof(vector128));
324 if (!ret && count > 0) {
325 /*
326 * We use only the first word of vrsave.
327 */
328 union {
329 elf_vrreg_t reg;
330 u32 word;
331 } vrsave;
332 memset(&vrsave, 0, sizeof(vrsave));
333 vrsave.word = target->thread.vrsave;
334 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
335 33 * sizeof(vector128), -1);
336 if (!ret)
337 target->thread.vrsave = vrsave.word;
338 }
339
340 return ret;
341}
342
865418d8
BH		 343/*
344 * Get contents of AltiVec register state in task TASK
345 */
346static int get_vrregs(unsigned long __user *data, struct task_struct *task)
347{
3caf06c6
RM		 348 if (!access_ok(VERIFY_WRITE, data,
349 33 * sizeof(vector128) + sizeof(u32)))
865418d8
BH		 350 return -EFAULT;
351
3caf06c6
RM		 352 return vr_get(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32),
353 NULL, data);
865418d8
BH		 354}
355
356/*
357 * Write contents of AltiVec register state into task TASK.
358 */
359static int set_vrregs(struct task_struct *task, unsigned long __user *data)
360{
3caf06c6 361 if (!access_ok(VERIFY_READ, data, 33 * sizeof(vector128) + sizeof(u32)))
865418d8
BH		 362 return -EFAULT;
363
3caf06c6
RM		 364 return vr_set(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32),
365 NULL, data);
865418d8
BH		 366}
367#endif /* CONFIG_ALTIVEC */
368
369#ifdef CONFIG_SPE
370
371/*
372 * For get_evrregs/set_evrregs functions 'data' has the following layout:
373 *
374 * struct {
375 * u32 evr[32];
376 * u64 acc;
377 * u32 spefscr;
378 * }
379 */
380
a4e4b175
RM		 381static int evr_active(struct task_struct *target,
382 const struct user_regset *regset)
865418d8 383{
a4e4b175
RM		 384 flush_spe_to_thread(target);
385 return target->thread.used_spe ? regset->n : 0;
386}
865418d8 387
a4e4b175
RM		 388static int evr_get(struct task_struct *target, const struct user_regset *regset,
389 unsigned int pos, unsigned int count,
390 void *kbuf, void __user *ubuf)
391{
392 int ret;
865418d8 393
a4e4b175 394 flush_spe_to_thread(target);
865418d8 395
a4e4b175
RM		 396 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
397 &target->thread.evr,
398 0, sizeof(target->thread.evr));
865418d8 399
a4e4b175
RM		 400 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
401 offsetof(struct thread_struct, spefscr));
402
403 if (!ret)
404 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
405 &target->thread.acc,
406 sizeof(target->thread.evr), -1);
407
408 return ret;
409}
410
411static int evr_set(struct task_struct *target, const struct user_regset *regset,
412 unsigned int pos, unsigned int count,
413 const void *kbuf, const void __user *ubuf)
414{
415 int ret;
416
417 flush_spe_to_thread(target);
418
419 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
420 &target->thread.evr,
421 0, sizeof(target->thread.evr));
865418d8 422
a4e4b175
RM		 423 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
424 offsetof(struct thread_struct, spefscr));
425
426 if (!ret)
427 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
428 &target->thread.acc,
429 sizeof(target->thread.evr), -1);
430
431 return ret;
865418d8
BH		 432}
433
434/*
a4e4b175 435 * Get contents of SPE register state in task TASK.
865418d8 436 */
a4e4b175 437static int get_evrregs(unsigned long __user *data, struct task_struct *task)
865418d8 438{
a4e4b175 439 if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(u32)))
865418d8
BH		 440 return -EFAULT;
441
a4e4b175
RM		 442 return evr_get(task, NULL, 0, 35 * sizeof(u32), NULL, data);
443}
865418d8 444
a4e4b175
RM		 445/*
446 * Write contents of SPE register state into task TASK.
447 */
448static int set_evrregs(struct task_struct *task, unsigned long *data)
449{
450 if (!access_ok(VERIFY_READ, data, 35 * sizeof(u32)))
865418d8
BH		 451 return -EFAULT;
452
a4e4b175 453 return evr_set(task, NULL, 0, 35 * sizeof(u32), NULL, data);
865418d8
BH		 454}
455#endif /* CONFIG_SPE */
456
457
80fdf470
RM		 458/*
459 * These are our native regset flavors.
460 */
461enum powerpc_regset {
462 REGSET_GPR,
463 REGSET_FPR,
464#ifdef CONFIG_ALTIVEC
465 REGSET_VMX,
466#endif
467#ifdef CONFIG_SPE
468 REGSET_SPE,
469#endif
470};
471
472static const struct user_regset native_regsets[] = {
473 [REGSET_GPR] = {
474 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
475 .size = sizeof(long), .align = sizeof(long),
476 .get = gpr_get, .set = gpr_set
477 },
478 [REGSET_FPR] = {
479 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
480 .size = sizeof(double), .align = sizeof(double),
481 .get = fpr_get, .set = fpr_set
482 },
483#ifdef CONFIG_ALTIVEC
484 [REGSET_VMX] = {
485 .core_note_type = NT_PPC_VMX, .n = 34,
486 .size = sizeof(vector128), .align = sizeof(vector128),
487 .active = vr_active, .get = vr_get, .set = vr_set
488 },
489#endif
490#ifdef CONFIG_SPE
491 [REGSET_SPE] = {
492 .n = 35,
493 .size = sizeof(u32), .align = sizeof(u32),
494 .active = evr_active, .get = evr_get, .set = evr_set
495 },
496#endif
497};
498
499static const struct user_regset_view user_ppc_native_view = {
500 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
501 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
502};
503
fa8f5cb0
RM		 504#ifdef CONFIG_PPC64
505#include <linux/compat.h>
506
507static int gpr32_get(struct task_struct *target,
508 const struct user_regset *regset,
509 unsigned int pos, unsigned int count,
510 void *kbuf, void __user *ubuf)
511{
512 const unsigned long *regs = &target->thread.regs->gpr[0];
513 compat_ulong_t *k = kbuf;
514 compat_ulong_t __user *u = ubuf;
515 compat_ulong_t reg;
516
517 if (target->thread.regs == NULL)
518 return -EIO;
519
520 CHECK_FULL_REGS(target->thread.regs);
521
522 pos /= sizeof(reg);
523 count /= sizeof(reg);
524
525 if (kbuf)
526 for (; count > 0 && pos < PT_MSR; --count)
527 *k++ = regs[pos++];
528 else
529 for (; count > 0 && pos < PT_MSR; --count)
530 if (__put_user((compat_ulong_t) regs[pos++], u++))
531 return -EFAULT;
532
533 if (count > 0 && pos == PT_MSR) {
534 reg = get_user_msr(target);
535 if (kbuf)
536 *k++ = reg;
537 else if (__put_user(reg, u++))
538 return -EFAULT;
539 ++pos;
540 --count;
541 }
542
543 if (kbuf)
544 for (; count > 0 && pos < PT_REGS_COUNT; --count)
545 *k++ = regs[pos++];
546 else
547 for (; count > 0 && pos < PT_REGS_COUNT; --count)
548 if (__put_user((compat_ulong_t) regs[pos++], u++))
549 return -EFAULT;
550
551 kbuf = k;
552 ubuf = u;
553 pos *= sizeof(reg);
554 count *= sizeof(reg);
555 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
556 PT_REGS_COUNT * sizeof(reg), -1);
557}
558
559static int gpr32_set(struct task_struct *target,
560 const struct user_regset *regset,
561 unsigned int pos, unsigned int count,
562 const void *kbuf, const void __user *ubuf)
563{
564 unsigned long *regs = &target->thread.regs->gpr[0];
565 const compat_ulong_t *k = kbuf;
566 const compat_ulong_t __user *u = ubuf;
567 compat_ulong_t reg;
568
569 if (target->thread.regs == NULL)
570 return -EIO;
571
572 CHECK_FULL_REGS(target->thread.regs);
573
574 pos /= sizeof(reg);
575 count /= sizeof(reg);
576
577 if (kbuf)
578 for (; count > 0 && pos < PT_MSR; --count)
579 regs[pos++] = *k++;
580 else
581 for (; count > 0 && pos < PT_MSR; --count) {
582 if (__get_user(reg, u++))
583 return -EFAULT;
584 regs[pos++] = reg;
585 }
586
587
588 if (count > 0 && pos == PT_MSR) {
589 if (kbuf)
590 reg = *k++;
591 else if (__get_user(reg, u++))
592 return -EFAULT;
593 set_user_msr(target, reg);
594 ++pos;
595 --count;
596 }
597
598 if (kbuf)
599 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
600 regs[pos++] = *k++;
601 else
602 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
603 if (__get_user(reg, u++))
604 return -EFAULT;
605 regs[pos++] = reg;
606 }
607
608 if (count > 0 && pos == PT_TRAP) {
609 if (kbuf)
610 reg = *k++;
611 else if (__get_user(reg, u++))
612 return -EFAULT;
613 set_user_trap(target, reg);
614 ++pos;
615 --count;
616 }
617
618 kbuf = k;
619 ubuf = u;
620 pos *= sizeof(reg);
621 count *= sizeof(reg);
622 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
623 (PT_TRAP + 1) * sizeof(reg), -1);
624}
625
626/*
627 * These are the regset flavors matching the CONFIG_PPC32 native set.
628 */
629static const struct user_regset compat_regsets[] = {
630 [REGSET_GPR] = {
631 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
632 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
633 .get = gpr32_get, .set = gpr32_set
634 },
635 [REGSET_FPR] = {
636 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
637 .size = sizeof(double), .align = sizeof(double),
638 .get = fpr_get, .set = fpr_set
639 },
640#ifdef CONFIG_ALTIVEC
641 [REGSET_VMX] = {
642 .core_note_type = NT_PPC_VMX, .n = 34,
643 .size = sizeof(vector128), .align = sizeof(vector128),
644 .active = vr_active, .get = vr_get, .set = vr_set
645 },
646#endif
647#ifdef CONFIG_SPE
648 [REGSET_SPE] = {
649 .n = 35,
650 .size = sizeof(u32), .align = sizeof(u32),
651 .active = evr_active, .get = evr_get, .set = evr_set
652 },
653#endif
654};
655
656static const struct user_regset_view user_ppc_compat_view = {
657 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
658 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
659};
660#endif /* CONFIG_PPC64 */
661
80fdf470
RM		 662const struct user_regset_view *task_user_regset_view(struct task_struct *task)
663{
fa8f5cb0
RM		 664#ifdef CONFIG_PPC64
665 if (test_tsk_thread_flag(task, TIF_32BIT))
666 return &user_ppc_compat_view;
667#endif
80fdf470
RM		 668 return &user_ppc_native_view;
669}
670
671
2a84b0d7 672void user_enable_single_step(struct task_struct *task)
865418d8
BH		 673{
674 struct pt_regs *regs = task->thread.regs;
675
676 if (regs != NULL) {
677#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
678 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
679 regs->msr |= MSR_DE;
680#else
681 regs->msr |= MSR_SE;
682#endif
683 }
684 set_tsk_thread_flag(task, TIF_SINGLESTEP);
685}
686
2a84b0d7 687void user_disable_single_step(struct task_struct *task)
865418d8
BH		 688{
689 struct pt_regs *regs = task->thread.regs;
690
691 if (regs != NULL) {
692#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
693 task->thread.dbcr0 = 0;
694 regs->msr &= ~MSR_DE;
695#else
696 regs->msr &= ~MSR_SE;
697#endif
698 }
699 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
700}
701
abd06505
BH		 702static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
703 unsigned long data)
704{
705 /* We only support one DABR and no IABRS at the moment */
706 if (addr > 0)
707 return -EINVAL;
708
709 /* The bottom 3 bits are flags */
710 if ((data & ~0x7UL) >= TASK_SIZE)
711 return -EIO;
712
713 /* Ensure translation is on */
714 if (data && !(data & DABR_TRANSLATION))
715 return -EIO;
716
717 task->thread.dabr = data;
718 return 0;
719}
abd06505 720
1da177e4
LT		 721/*
722 * Called by kernel/ptrace.c when detaching..
723 *
724 * Make sure single step bits etc are not set.
725 */
726void ptrace_disable(struct task_struct *child)
727{
728 /* make sure the single step bit is not set. */
2a84b0d7 729 user_disable_single_step(child);
1da177e4
LT		 730}
731
e17666ba
BH		 732/*
733 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
734 * we mark them as obsolete now, they will be removed in a future version
735 */
736static long arch_ptrace_old(struct task_struct *child, long request, long addr,
737 long data)
738{
739 int ret = -EPERM;
740
741 switch(request) {
742 case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
743 int i;
744 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
745 unsigned long __user *tmp = (unsigned long __user *)addr;
746
fabca2c0 747 CHECK_FULL_REGS(child->thread.regs);
e17666ba
BH		 748 for (i = 0; i < 32; i++) {
749 ret = put_user(*reg, tmp);
750 if (ret)
751 break;
752 reg++;
753 tmp++;
754 }
755 break;
756 }
757
758 case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
759 int i;
760 unsigned long *reg = &((unsigned long *)child->thread.regs)[0];
761 unsigned long __user *tmp = (unsigned long __user *)addr;
762
fabca2c0 763 CHECK_FULL_REGS(child->thread.regs);
e17666ba
BH		 764 for (i = 0; i < 32; i++) {
765 ret = get_user(*reg, tmp);
766 if (ret)
767 break;
768 reg++;
769 tmp++;
770 }
771 break;
772 }
773
774 case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
775 flush_fp_to_thread(child);
776 ret = get_fpregs((void __user *)addr, child, 0);
777 break;
778 }
779
780 case PPC_PTRACE_SETFPREGS: { /* Get FPRs 0 - 31. */
781 flush_fp_to_thread(child);
782 ret = set_fpregs((void __user *)addr, child, 0);
783 break;
784 }
785
786 }
787 return ret;
788}
789
481bed45 790long arch_ptrace(struct task_struct *child, long request, long addr, long data)
1da177e4 791{
1da177e4
LT		 792 int ret = -EPERM;
793
1da177e4
LT		 794 switch (request) {
795 /* when I and D space are separate, these will need to be fixed. */
796 case PTRACE_PEEKTEXT: /* read word at location addr. */
76647323
AD		 797 case PTRACE_PEEKDATA:
798 ret = generic_ptrace_peekdata(child, addr, data);
1da177e4 799 break;
1da177e4
LT		 800
801 /* read the word at location addr in the USER area. */
1da177e4
LT		 802 case PTRACE_PEEKUSR: {
803 unsigned long index, tmp;
804
805 ret = -EIO;
806 /* convert to index and check */
e8a30302 807#ifdef CONFIG_PPC32
1da177e4 808 index = (unsigned long) addr >> 2;
e8a30302
SR		 809 if ((addr & 3) || (index > PT_FPSCR)
810 || (child->thread.regs == NULL))
811#else
812 index = (unsigned long) addr >> 3;
813 if ((addr & 7) || (index > PT_FPSCR))
814#endif
1da177e4
LT		 815 break;
816
817 CHECK_FULL_REGS(child->thread.regs);
818 if (index < PT_FPR0) {
865418d8 819 tmp = ptrace_get_reg(child, (int) index);
1da177e4 820 } else {
e8a30302 821 flush_fp_to_thread(child);
1da177e4
LT		 822 tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
823 }
824 ret = put_user(tmp,(unsigned long __user *) data);
825 break;
826 }
827
828 /* If I and D space are separate, this will have to be fixed. */
829 case PTRACE_POKETEXT: /* write the word at location addr. */
830 case PTRACE_POKEDATA:
f284ce72 831 ret = generic_ptrace_pokedata(child, addr, data);
1da177e4
LT		 832 break;
833
834 /* write the word at location addr in the USER area */
835 case PTRACE_POKEUSR: {
836 unsigned long index;
837
838 ret = -EIO;
839 /* convert to index and check */
e8a30302 840#ifdef CONFIG_PPC32
1da177e4 841 index = (unsigned long) addr >> 2;
e8a30302
SR		 842 if ((addr & 3) || (index > PT_FPSCR)
843 || (child->thread.regs == NULL))
844#else
845 index = (unsigned long) addr >> 3;
846 if ((addr & 7) || (index > PT_FPSCR))
847#endif
1da177e4
LT		 848 break;
849
850 CHECK_FULL_REGS(child->thread.regs);
1da177e4 851 if (index < PT_FPR0) {
865418d8 852 ret = ptrace_put_reg(child, index, data);
1da177e4 853 } else {
e8a30302 854 flush_fp_to_thread(child);
1da177e4
LT		 855 ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
856 ret = 0;
857 }
858 break;
859 }
860
e8a30302
SR		 861 case PTRACE_GET_DEBUGREG: {
862 ret = -EINVAL;
863 /* We only support one DABR and no IABRS at the moment */
864 if (addr > 0)
865 break;
866 ret = put_user(child->thread.dabr,
867 (unsigned long __user *)data);
868 break;
869 }
870
871 case PTRACE_SET_DEBUGREG:
872 ret = ptrace_set_debugreg(child, addr, data);
873 break;
e8a30302 874
e17666ba
BH		 875#ifdef CONFIG_PPC64
876 case PTRACE_GETREGS64:
877#endif
878 case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
879 int ui;
880 if (!access_ok(VERIFY_WRITE, (void __user *)data,
881 sizeof(struct pt_regs))) {
882 ret = -EIO;
883 break;
884 }
fabca2c0 885 CHECK_FULL_REGS(child->thread.regs);
e17666ba
BH		 886 ret = 0;
887 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
865418d8 888 ret |= __put_user(ptrace_get_reg(child, ui),
e17666ba
BH		 889 (unsigned long __user *) data);
890 data += sizeof(long);
e8a30302
SR		 891 }
892 break;
893 }
894
e17666ba
BH		 895#ifdef CONFIG_PPC64
896 case PTRACE_SETREGS64:
897#endif
898 case PTRACE_SETREGS: { /* Set all gp regs in the child. */
899 unsigned long tmp;
900 int ui;
901 if (!access_ok(VERIFY_READ, (void __user *)data,
902 sizeof(struct pt_regs))) {
903 ret = -EIO;
904 break;
905 }
fabca2c0 906 CHECK_FULL_REGS(child->thread.regs);
e17666ba
BH		 907 ret = 0;
908 for (ui = 0; ui < PT_REGS_COUNT; ui ++) {
909 ret = __get_user(tmp, (unsigned long __user *) data);
e8a30302
SR		 910 if (ret)
911 break;
865418d8 912 ptrace_put_reg(child, ui, tmp);
e17666ba 913 data += sizeof(long);
e8a30302
SR		 914 }
915 break;
916 }
917
e17666ba 918 case PTRACE_GETFPREGS: { /* Get the child FPU state (FPR0...31 + FPSCR) */
e8a30302 919 flush_fp_to_thread(child);
e17666ba 920 ret = get_fpregs((void __user *)data, child, 1);
e8a30302
SR		 921 break;
922 }
923
e17666ba 924 case PTRACE_SETFPREGS: { /* Set the child FPU state (FPR0...31 + FPSCR) */
e8a30302 925 flush_fp_to_thread(child);
e17666ba 926 ret = set_fpregs((void __user *)data, child, 1);
e8a30302
SR		 927 break;
928 }
e8a30302 929
1da177e4
LT		 930#ifdef CONFIG_ALTIVEC
931 case PTRACE_GETVRREGS:
932 /* Get the child altivec register state. */
e8a30302 933 flush_altivec_to_thread(child);
1da177e4
LT		 934 ret = get_vrregs((unsigned long __user *)data, child);
935 break;
936
937 case PTRACE_SETVRREGS:
938 /* Set the child altivec register state. */
e8a30302 939 flush_altivec_to_thread(child);
1da177e4
LT		 940 ret = set_vrregs(child, (unsigned long __user *)data);
941 break;
942#endif
943#ifdef CONFIG_SPE
944 case PTRACE_GETEVRREGS:
945 /* Get the child spe register state. */
5e14d21e 946 flush_spe_to_thread(child);
1da177e4
LT		 947 ret = get_evrregs((unsigned long __user *)data, child);
948 break;
949
950 case PTRACE_SETEVRREGS:
951 /* Set the child spe register state. */
952 /* this is to clear the MSR_SPE bit to force a reload
953 * of register state from memory */
5e14d21e 954 flush_spe_to_thread(child);
1da177e4
LT		 955 ret = set_evrregs(child, (unsigned long __user *)data);
956 break;
957#endif
958
e17666ba
BH		 959 /* Old reverse args ptrace callss */
960 case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
961 case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
962 case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
963 case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
964 ret = arch_ptrace_old(child, request, addr, data);
965 break;
966
1da177e4
LT		 967 default:
968 ret = ptrace_request(child, request, addr, data);
969 break;
970 }
1da177e4
LT		 971 return ret;
972}
973
ea9c102c 974static void do_syscall_trace(void)
1da177e4 975{
ea9c102c
DW		 976 /* the 0x80 provides a way for the tracing parent to distinguish
977 between a syscall stop and SIGTRAP delivery */
1da177e4
LT		 978 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
979 ? 0x80 : 0));
980
981 /*
982 * this isn't the same as continuing with a signal, but it will do
983 * for normal use. strace only continues with a signal if the
984 * stopping signal is not SIGTRAP. -brl
985 */
986 if (current->exit_code) {
987 send_sig(current->exit_code, current, 1);
988 current->exit_code = 0;
989 }
990}
ea9c102c
DW		 991
992void do_syscall_trace_enter(struct pt_regs *regs)
993{
e8a30302 994 secure_computing(regs->gpr[0]);
e8a30302 995
ea9c102c
DW		 996 if (test_thread_flag(TIF_SYSCALL_TRACE)
997 && (current->ptrace & PT_PTRACED))
998 do_syscall_trace();
999
cfcd1705
DW		 1000 if (unlikely(current->audit_context)) {
1001#ifdef CONFIG_PPC64
1002 if (!test_thread_flag(TIF_32BIT))
1003 audit_syscall_entry(AUDIT_ARCH_PPC64,
1004 regs->gpr[0],
1005 regs->gpr[3], regs->gpr[4],
1006 regs->gpr[5], regs->gpr[6]);
1007 else
e8a30302 1008#endif
cfcd1705
DW		 1009 audit_syscall_entry(AUDIT_ARCH_PPC,
1010 regs->gpr[0],
1011 regs->gpr[3] & 0xffffffff,
1012 regs->gpr[4] & 0xffffffff,
1013 regs->gpr[5] & 0xffffffff,
1014 regs->gpr[6] & 0xffffffff);
1015 }
ea9c102c
DW		 1016}
1017
1018void do_syscall_trace_leave(struct pt_regs *regs)
1019{
ea9c102c 1020 if (unlikely(current->audit_context))
4b9c876a 1021 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
ea9c102c
DW		 1022 regs->result);
1023
e8a30302 1024 if ((test_thread_flag(TIF_SYSCALL_TRACE)
1bd79336 1025 || test_thread_flag(TIF_SINGLESTEP))
ea9c102c
DW		 1026 && (current->ptrace & PT_PTRACED))
1027 do_syscall_trace();
1028}
Linux kernel - Deliverables
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