powerpc: Explicit alignment for .data.cacheline_aligned
[deliverable/linux.git] / arch / powerpc / kernel / setup-common.c
CommitLineData
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1/*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
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12
13#undef DEBUG
14
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15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
e5c6c8e4 23#include <linux/platform_device.h>
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24#include <linux/seq_file.h>
25#include <linux/ioport.h>
26#include <linux/console.h>
27#include <linux/utsname.h>
894673ee 28#include <linux/screen_info.h>
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29#include <linux/root_dev.h>
30#include <linux/notifier.h>
31#include <linux/cpu.h>
32#include <linux/unistd.h>
33#include <linux/serial.h>
34#include <linux/serial_8250.h>
94a3807c 35#include <linux/debugfs.h>
8d089085 36#include <linux/percpu.h>
d9b2b2a2 37#include <linux/lmb.h>
d746286c 38#include <linux/of_platform.h>
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39#include <asm/io.h>
40#include <asm/prom.h>
41#include <asm/processor.h>
a7f290da 42#include <asm/vdso_datapage.h>
03501dab 43#include <asm/pgtable.h>
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44#include <asm/smp.h>
45#include <asm/elf.h>
46#include <asm/machdep.h>
47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
e8222502 50#include <asm/firmware.h>
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51#include <asm/btext.h>
52#include <asm/nvram.h>
53#include <asm/setup.h>
54#include <asm/system.h>
55#include <asm/rtas.h>
56#include <asm/iommu.h>
57#include <asm/serial.h>
58#include <asm/cache.h>
59#include <asm/page.h>
60#include <asm/mmu.h>
fca5dcd4 61#include <asm/xmon.h>
8d089085 62#include <asm/cputhreads.h>
f465df81 63#include <mm/mmu_decl.h>
03501dab 64
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65#include "setup.h"
66
03501dab 67#ifdef DEBUG
f9e4ec57 68#include <asm/udbg.h>
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69#define DBG(fmt...) udbg_printf(fmt)
70#else
71#define DBG(fmt...)
72#endif
73
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74/* The main machine-dep calls structure
75 */
76struct machdep_calls ppc_md;
77EXPORT_SYMBOL(ppc_md);
78struct machdep_calls *machine_id;
79EXPORT_SYMBOL(machine_id);
799d6046 80
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81unsigned long klimit = (unsigned long) _end;
82
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83char cmd_line[COMMAND_LINE_SIZE];
84
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85/*
86 * This still seems to be needed... -- paulus
87 */
88struct screen_info screen_info = {
89 .orig_x = 0,
90 .orig_y = 25,
91 .orig_video_cols = 80,
92 .orig_video_lines = 25,
93 .orig_video_isVGA = 1,
94 .orig_video_points = 16
95};
96
97#ifdef __DO_IRQ_CANON
98/* XXX should go elsewhere eventually */
99int ppc_do_canonicalize_irqs;
100EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
101#endif
102
103/* also used by kexec */
104void machine_shutdown(void)
105{
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106 if (ppc_md.machine_shutdown)
107 ppc_md.machine_shutdown();
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108}
109
110void machine_restart(char *cmd)
111{
112 machine_shutdown();
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113 if (ppc_md.restart)
114 ppc_md.restart(cmd);
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115#ifdef CONFIG_SMP
116 smp_send_stop();
117#endif
118 printk(KERN_EMERG "System Halted, OK to turn off power\n");
119 local_irq_disable();
120 while (1) ;
121}
122
123void machine_power_off(void)
124{
125 machine_shutdown();
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126 if (ppc_md.power_off)
127 ppc_md.power_off();
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128#ifdef CONFIG_SMP
129 smp_send_stop();
130#endif
131 printk(KERN_EMERG "System Halted, OK to turn off power\n");
132 local_irq_disable();
133 while (1) ;
134}
135/* Used by the G5 thermal driver */
136EXPORT_SYMBOL_GPL(machine_power_off);
137
138void (*pm_power_off)(void) = machine_power_off;
139EXPORT_SYMBOL_GPL(pm_power_off);
140
141void machine_halt(void)
142{
143 machine_shutdown();
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144 if (ppc_md.halt)
145 ppc_md.halt();
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146#ifdef CONFIG_SMP
147 smp_send_stop();
148#endif
149 printk(KERN_EMERG "System Halted, OK to turn off power\n");
150 local_irq_disable();
151 while (1) ;
152}
153
154
155#ifdef CONFIG_TAU
156extern u32 cpu_temp(unsigned long cpu);
157extern u32 cpu_temp_both(unsigned long cpu);
158#endif /* CONFIG_TAU */
159
160#ifdef CONFIG_SMP
161DEFINE_PER_CPU(unsigned int, pvr);
162#endif
163
164static int show_cpuinfo(struct seq_file *m, void *v)
165{
166 unsigned long cpu_id = (unsigned long)v - 1;
167 unsigned int pvr;
168 unsigned short maj;
169 unsigned short min;
170
171 if (cpu_id == NR_CPUS) {
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172 struct device_node *root;
173 const char *model = NULL;
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174#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
175 unsigned long bogosum = 0;
176 int i;
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177 for_each_online_cpu(i)
178 bogosum += loops_per_jiffy;
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179 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
180 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
181#endif /* CONFIG_SMP && CONFIG_PPC32 */
182 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
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183 if (ppc_md.name)
184 seq_printf(m, "platform\t: %s\n", ppc_md.name);
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185 root = of_find_node_by_path("/");
186 if (root)
187 model = of_get_property(root, "model", NULL);
188 if (model)
189 seq_printf(m, "model\t\t: %s\n", model);
190 of_node_put(root);
191
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192 if (ppc_md.show_cpuinfo != NULL)
193 ppc_md.show_cpuinfo(m);
194
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195#ifdef CONFIG_PPC32
196 /* Display the amount of memory */
197 seq_printf(m, "Memory\t\t: %d MB\n",
198 (unsigned int)(total_memory / (1024 * 1024)));
199#endif
200
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201 return 0;
202 }
203
204 /* We only show online cpus: disable preempt (overzealous, I
205 * knew) to prevent cpu going down. */
206 preempt_disable();
207 if (!cpu_online(cpu_id)) {
208 preempt_enable();
209 return 0;
210 }
211
212#ifdef CONFIG_SMP
03501dab 213 pvr = per_cpu(pvr, cpu_id);
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214#else
215 pvr = mfspr(SPRN_PVR);
216#endif
217 maj = (pvr >> 8) & 0xFF;
218 min = pvr & 0xFF;
219
220 seq_printf(m, "processor\t: %lu\n", cpu_id);
221 seq_printf(m, "cpu\t\t: ");
222
223 if (cur_cpu_spec->pvr_mask)
224 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
225 else
226 seq_printf(m, "unknown (%08x)", pvr);
227
228#ifdef CONFIG_ALTIVEC
229 if (cpu_has_feature(CPU_FTR_ALTIVEC))
230 seq_printf(m, ", altivec supported");
231#endif /* CONFIG_ALTIVEC */
232
233 seq_printf(m, "\n");
234
235#ifdef CONFIG_TAU
236 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
237#ifdef CONFIG_TAU_AVERAGE
238 /* more straightforward, but potentially misleading */
239 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
bccfd588 240 cpu_temp(cpu_id));
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241#else
242 /* show the actual temp sensor range */
243 u32 temp;
bccfd588 244 temp = cpu_temp_both(cpu_id);
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245 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
246 temp & 0xff, temp >> 16);
247#endif
248 }
249#endif /* CONFIG_TAU */
250
251 /*
252 * Assume here that all clock rates are the same in a
253 * smp system. -- Cort
254 */
255 if (ppc_proc_freq)
256 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
257 ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
258
259 if (ppc_md.show_percpuinfo != NULL)
260 ppc_md.show_percpuinfo(m, cpu_id);
261
262 /* If we are a Freescale core do a simple check so
263 * we dont have to keep adding cases in the future */
264 if (PVR_VER(pvr) & 0x8000) {
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265 switch (PVR_VER(pvr)) {
266 case 0x8000: /* 7441/7450/7451, Voyager */
267 case 0x8001: /* 7445/7455, Apollo 6 */
268 case 0x8002: /* 7447/7457, Apollo 7 */
269 case 0x8003: /* 7447A, Apollo 7 PM */
270 case 0x8004: /* 7448, Apollo 8 */
271 case 0x800c: /* 7410, Nitro */
272 maj = ((pvr >> 8) & 0xF);
273 min = PVR_MIN(pvr);
274 break;
275 default: /* e500/book-e */
276 maj = PVR_MAJ(pvr);
277 min = PVR_MIN(pvr);
278 break;
279 }
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280 } else {
281 switch (PVR_VER(pvr)) {
282 case 0x0020: /* 403 family */
283 maj = PVR_MAJ(pvr) + 1;
284 min = PVR_MIN(pvr);
285 break;
286 case 0x1008: /* 740P/750P ?? */
287 maj = ((pvr >> 8) & 0xFF) - 1;
288 min = pvr & 0xFF;
289 break;
290 default:
291 maj = (pvr >> 8) & 0xFF;
292 min = pvr & 0xFF;
293 break;
294 }
295 }
296
297 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
298 maj, min, PVR_VER(pvr), PVR_REV(pvr));
299
300#ifdef CONFIG_PPC32
301 seq_printf(m, "bogomips\t: %lu.%02lu\n",
302 loops_per_jiffy / (500000/HZ),
303 (loops_per_jiffy / (5000/HZ)) % 100);
304#endif
305
306#ifdef CONFIG_SMP
307 seq_printf(m, "\n");
308#endif
309
310 preempt_enable();
311 return 0;
312}
313
314static void *c_start(struct seq_file *m, loff_t *pos)
315{
316 unsigned long i = *pos;
317
318 return i <= NR_CPUS ? (void *)(i + 1) : NULL;
319}
320
321static void *c_next(struct seq_file *m, void *v, loff_t *pos)
322{
323 ++*pos;
324 return c_start(m, pos);
325}
326
327static void c_stop(struct seq_file *m, void *v)
328{
329}
330
331struct seq_operations cpuinfo_op = {
332 .start =c_start,
333 .next = c_next,
334 .stop = c_stop,
335 .show = show_cpuinfo,
336};
337
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338void __init check_for_initrd(void)
339{
340#ifdef CONFIG_BLK_DEV_INITRD
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341 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
342 initrd_start, initrd_end);
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DW
343
344 /* If we were passed an initrd, set the ROOT_DEV properly if the values
345 * look sensible. If not, clear initrd reference.
346 */
51fae6de 347 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
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DW
348 initrd_end > initrd_start)
349 ROOT_DEV = Root_RAM0;
6761c4a0 350 else
a82765b6 351 initrd_start = initrd_end = 0;
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DW
352
353 if (initrd_start)
354 printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
355
356 DBG(" <- check_for_initrd()\n");
357#endif /* CONFIG_BLK_DEV_INITRD */
358}
359
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360#ifdef CONFIG_SMP
361
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362int threads_per_core, threads_shift;
363cpumask_t threads_core_mask;
364
365static void __init cpu_init_thread_core_maps(int tpc)
366{
367 int i;
368
369 threads_per_core = tpc;
370 threads_core_mask = CPU_MASK_NONE;
371
372 /* This implementation only supports power of 2 number of threads
373 * for simplicity and performance
374 */
375 threads_shift = ilog2(tpc);
376 BUG_ON(tpc != (1 << threads_shift));
377
378 for (i = 0; i < tpc; i++)
379 cpu_set(i, threads_core_mask);
380
381 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
382 tpc, tpc > 1 ? "s" : "");
383 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
384}
385
386
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387/**
388 * setup_cpu_maps - initialize the following cpu maps:
389 * cpu_possible_map
390 * cpu_present_map
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391 *
392 * Having the possible map set up early allows us to restrict allocations
393 * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
394 *
395 * We do not initialize the online map here; cpus set their own bits in
396 * cpu_online_map as they come up.
397 *
398 * This function is valid only for Open Firmware systems. finish_device_tree
399 * must be called before using this.
400 *
401 * While we're here, we may as well set the "physical" cpu ids in the paca.
4df20460
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402 *
403 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
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404 */
405void __init smp_setup_cpu_maps(void)
406{
407 struct device_node *dn = NULL;
408 int cpu = 0;
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409 int nthreads = 1;
410
411 DBG("smp_setup_cpu_maps()\n");
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412
413 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
a7f67bdf 414 const int *intserv;
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415 int j, len;
416
417 DBG(" * %s...\n", dn->full_name);
5ad57078 418
e2eb6392
SR
419 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
420 &len);
8d089085 421 if (intserv) {
5ad57078 422 nthreads = len / sizeof(int);
8d089085
BH
423 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
424 nthreads);
425 } else {
426 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
e2eb6392 427 intserv = of_get_property(dn, "reg", NULL);
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428 if (!intserv)
429 intserv = &cpu; /* assume logical == phys */
430 }
431
432 for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
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433 DBG(" thread %d -> cpu %d (hard id %d)\n",
434 j, cpu, intserv[j]);
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435 cpu_set(cpu, cpu_present_map);
436 set_hard_smp_processor_id(cpu, intserv[j]);
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437 cpu_set(cpu, cpu_possible_map);
438 cpu++;
439 }
440 }
441
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442 /* If no SMT supported, nthreads is forced to 1 */
443 if (!cpu_has_feature(CPU_FTR_SMT)) {
444 DBG(" SMT disabled ! nthreads forced to 1\n");
445 nthreads = 1;
446 }
447
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448#ifdef CONFIG_PPC64
449 /*
450 * On pSeries LPAR, we need to know how many cpus
451 * could possibly be added to this partition.
452 */
e8222502 453 if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
799d6046 454 (dn = of_find_node_by_path("/rtas"))) {
5ad57078 455 int num_addr_cell, num_size_cell, maxcpus;
a7f67bdf 456 const unsigned int *ireg;
5ad57078 457
a8bda5dd 458 num_addr_cell = of_n_addr_cells(dn);
9213feea 459 num_size_cell = of_n_size_cells(dn);
5ad57078 460
e2eb6392 461 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
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462
463 if (!ireg)
464 goto out;
465
466 maxcpus = ireg[num_addr_cell + num_size_cell];
467
468 /* Double maxcpus for processors which have SMT capability */
469 if (cpu_has_feature(CPU_FTR_SMT))
8d089085 470 maxcpus *= nthreads;
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471
472 if (maxcpus > NR_CPUS) {
473 printk(KERN_WARNING
474 "Partition configured for %d cpus, "
475 "operating system maximum is %d.\n",
476 maxcpus, NR_CPUS);
477 maxcpus = NR_CPUS;
478 } else
479 printk(KERN_INFO "Partition configured for %d cpus.\n",
480 maxcpus);
481
482 for (cpu = 0; cpu < maxcpus; cpu++)
483 cpu_set(cpu, cpu_possible_map);
484 out:
485 of_node_put(dn);
486 }
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MT
487 vdso_data->processorCount = num_present_cpus();
488#endif /* CONFIG_PPC64 */
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489
490 /* Initialize CPU <=> thread mapping/
491 *
492 * WARNING: We assume that the number of threads is the same for
493 * every CPU in the system. If that is not the case, then some code
494 * here will have to be reworked
495 */
496 cpu_init_thread_core_maps(nthreads);
d5a7430d 497}
5ad57078 498#endif /* CONFIG_SMP */
fca5dcd4 499
d33b78df 500#ifdef CONFIG_PCSPKR_PLATFORM
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MN
501static __init int add_pcspkr(void)
502{
503 struct device_node *np;
504 struct platform_device *pd;
505 int ret;
506
507 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
508 of_node_put(np);
509 if (!np)
510 return -ENODEV;
511
512 pd = platform_device_alloc("pcspkr", -1);
513 if (!pd)
514 return -ENOMEM;
515
516 ret = platform_device_add(pd);
517 if (ret)
518 platform_device_put(pd);
519
520 return ret;
521}
522device_initcall(add_pcspkr);
d33b78df 523#endif /* CONFIG_PCSPKR_PLATFORM */
95d465fd 524
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525void probe_machine(void)
526{
527 extern struct machdep_calls __machine_desc_start;
528 extern struct machdep_calls __machine_desc_end;
529
530 /*
531 * Iterate all ppc_md structures until we find the proper
532 * one for the current machine type
533 */
534 DBG("Probing machine type ...\n");
535
536 for (machine_id = &__machine_desc_start;
537 machine_id < &__machine_desc_end;
538 machine_id++) {
539 DBG(" %s ...", machine_id->name);
540 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
541 if (ppc_md.probe()) {
542 DBG(" match !\n");
543 break;
544 }
545 DBG("\n");
546 }
547 /* What can we do if we didn't find ? */
548 if (machine_id >= &__machine_desc_end) {
549 DBG("No suitable machine found !\n");
550 for (;;);
551 }
552
553 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
554}
1269277a 555
8d8a0241 556/* Match a class of boards, not a specific device configuration. */
1269277a
DW
557int check_legacy_ioport(unsigned long base_port)
558{
8d8a0241
OH
559 struct device_node *parent, *np = NULL;
560 int ret = -ENODEV;
561
562 switch(base_port) {
563 case I8042_DATA_REG:
db0dbae9
WF
564 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
565 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
566 if (np) {
567 parent = of_get_parent(np);
568 of_node_put(np);
569 np = parent;
570 break;
571 }
8d8a0241 572 np = of_find_node_by_type(NULL, "8042");
f5d834fc
AC
573 /* Pegasos has no device_type on its 8042 node, look for the
574 * name instead */
575 if (!np)
576 np = of_find_node_by_name(NULL, "8042");
8d8a0241
OH
577 break;
578 case FDC_BASE: /* FDC1 */
579 np = of_find_node_by_type(NULL, "fdc");
580 break;
581#ifdef CONFIG_PPC_PREP
582 case _PIDXR:
583 case _PNPWRP:
584 case PNPBIOS_BASE:
585 /* implement me */
586#endif
587 default:
588 /* ipmi is supposed to fail here */
589 break;
590 }
591 if (!np)
592 return ret;
593 parent = of_get_parent(np);
594 if (parent) {
595 if (strcmp(parent->type, "isa") == 0)
596 ret = 0;
597 of_node_put(parent);
598 }
599 of_node_put(np);
600 return ret;
1269277a
DW
601}
602EXPORT_SYMBOL(check_legacy_ioport);
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KG
603
604static int ppc_panic_event(struct notifier_block *this,
605 unsigned long event, void *ptr)
606{
607 ppc_md.panic(ptr); /* May not return */
608 return NOTIFY_DONE;
609}
610
611static struct notifier_block ppc_panic_block = {
612 .notifier_call = ppc_panic_event,
613 .priority = INT_MIN /* may not return; must be done last */
614};
615
616void __init setup_panic(void)
617{
618 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
619}
06cce43c
DF
620
621#ifdef CONFIG_CHECK_CACHE_COHERENCY
622/*
623 * For platforms that have configurable cache-coherency. This function
624 * checks that the cache coherency setting of the kernel matches the setting
625 * left by the firmware, as indicated in the device tree. Since a mismatch
626 * will eventually result in DMA failures, we print * and error and call
627 * BUG() in that case.
628 */
629
630#ifdef CONFIG_NOT_COHERENT_CACHE
631#define KERNEL_COHERENCY 0
632#else
633#define KERNEL_COHERENCY 1
634#endif
635
636static int __init check_cache_coherency(void)
637{
638 struct device_node *np;
639 const void *prop;
640 int devtree_coherency;
641
642 np = of_find_node_by_path("/");
643 prop = of_get_property(np, "coherency-off", NULL);
644 of_node_put(np);
645
646 devtree_coherency = prop ? 0 : 1;
647
648 if (devtree_coherency != KERNEL_COHERENCY) {
649 printk(KERN_ERR
650 "kernel coherency:%s != device tree_coherency:%s\n",
651 KERNEL_COHERENCY ? "on" : "off",
652 devtree_coherency ? "on" : "off");
653 BUG();
654 }
655
656 return 0;
657}
658
659late_initcall(check_cache_coherency);
660#endif /* CONFIG_CHECK_CACHE_COHERENCY */
94a3807c
ME
661
662#ifdef CONFIG_DEBUG_FS
663struct dentry *powerpc_debugfs_root;
664
665static int powerpc_debugfs_init(void)
666{
667 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
668
669 return powerpc_debugfs_root == NULL;
670}
671arch_initcall(powerpc_debugfs_init);
672#endif
d746286c
KG
673
674static int ppc_dflt_bus_notify(struct notifier_block *nb,
675 unsigned long action, void *data)
676{
677 struct device *dev = data;
678
679 /* We are only intereted in device addition */
680 if (action != BUS_NOTIFY_ADD_DEVICE)
681 return 0;
682
683 set_dma_ops(dev, &dma_direct_ops);
684
685 return NOTIFY_DONE;
686}
687
688static struct notifier_block ppc_dflt_plat_bus_notifier = {
689 .notifier_call = ppc_dflt_bus_notify,
690 .priority = INT_MAX,
691};
692
693static struct notifier_block ppc_dflt_of_bus_notifier = {
694 .notifier_call = ppc_dflt_bus_notify,
695 .priority = INT_MAX,
696};
697
698static int __init setup_bus_notifier(void)
699{
700 bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
701 bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier);
702
703 return 0;
704}
705
706arch_initcall(setup_bus_notifier);
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