[deliverable/linux.git] / arch / powerpc / kernel / setup-common.c

/*
 * Common boot and setup code for both 32-bit and 64-bit.
 * Extracted from arch/powerpc/kernel/setup_64.c.
 *
 * Copyright (C) 2001 PPC64 Team, IBM Corp
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */

#undef DEBUG

#include <linux/module.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/delay.h>
#include <linux/initrd.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/ioport.h>
#include <linux/console.h>
#include <linux/screen_info.h>
#include <linux/root_dev.h>
#include <linux/notifier.h>
#include <linux/cpu.h>
#include <linux/unistd.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/debugfs.h>
#include <linux/percpu.h>
#include <linux/memblock.h>
#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/paca.h>
#include <asm/prom.h>
#include <asm/processor.h>
#include <asm/vdso_datapage.h>
#include <asm/pgtable.h>
#include <asm/smp.h>
#include <asm/elf.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/cputable.h>
#include <asm/sections.h>
#include <asm/firmware.h>
#include <asm/btext.h>
#include <asm/nvram.h>
#include <asm/setup.h>
#include <asm/system.h>
#include <asm/rtas.h>
#include <asm/iommu.h>
#include <asm/serial.h>
#include <asm/cache.h>
#include <asm/page.h>
#include <asm/mmu.h>
#include <asm/xmon.h>
#include <asm/cputhreads.h>
#include <mm/mmu_decl.h>

#include "setup.h"

#ifdef DEBUG
#include <asm/udbg.h>
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif

/* The main machine-dep calls structure
 */
struct machdep_calls ppc_md;
EXPORT_SYMBOL(ppc_md);
struct machdep_calls *machine_id;
EXPORT_SYMBOL(machine_id);

unsigned long klimit = (unsigned long) _end;

char cmd_line[COMMAND_LINE_SIZE];

/*
 * This still seems to be needed... -- paulus
 */ 
struct screen_info screen_info = {
	.orig_x = 0,
	.orig_y = 25,
	.orig_video_cols = 80,
	.orig_video_lines = 25,
	.orig_video_isVGA = 1,
	.orig_video_points = 16
};

/* Variables required to store legacy IO irq routing */
int of_i8042_kbd_irq;
EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
int of_i8042_aux_irq;
EXPORT_SYMBOL_GPL(of_i8042_aux_irq);

#ifdef __DO_IRQ_CANON
/* XXX should go elsewhere eventually */
int ppc_do_canonicalize_irqs;
EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
#endif

/* also used by kexec */
void machine_shutdown(void)
{
	if (ppc_md.machine_shutdown)
		ppc_md.machine_shutdown();
}

void machine_restart(char *cmd)
{
	machine_shutdown();
	if (ppc_md.restart)
		ppc_md.restart(cmd);
#ifdef CONFIG_SMP
	smp_send_stop();
#endif
	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	local_irq_disable();
	while (1) ;
}

void machine_power_off(void)
{
	machine_shutdown();
	if (ppc_md.power_off)
		ppc_md.power_off();
#ifdef CONFIG_SMP
	smp_send_stop();
#endif
	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	local_irq_disable();
	while (1) ;
}
/* Used by the G5 thermal driver */
EXPORT_SYMBOL_GPL(machine_power_off);

void (*pm_power_off)(void) = machine_power_off;
EXPORT_SYMBOL_GPL(pm_power_off);

void machine_halt(void)
{
	machine_shutdown();
	if (ppc_md.halt)
		ppc_md.halt();
#ifdef CONFIG_SMP
	smp_send_stop();
#endif
	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	local_irq_disable();
	while (1) ;
}


#ifdef CONFIG_TAU
extern u32 cpu_temp(unsigned long cpu);
extern u32 cpu_temp_both(unsigned long cpu);
#endif /* CONFIG_TAU */

#ifdef CONFIG_SMP
DEFINE_PER_CPU(unsigned int, cpu_pvr);
#endif

static void show_cpuinfo_summary(struct seq_file *m)
{
	struct device_node *root;
	const char *model = NULL;
#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
	unsigned long bogosum = 0;
	int i;
	for_each_online_cpu(i)
		bogosum += loops_per_jiffy;
	seq_printf(m, "total bogomips\t: %lu.%02lu\n",
		   bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
#endif /* CONFIG_SMP && CONFIG_PPC32 */
	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
	if (ppc_md.name)
		seq_printf(m, "platform\t: %s\n", ppc_md.name);
	root = of_find_node_by_path("/");
	if (root)
		model = of_get_property(root, "model", NULL);
	if (model)
		seq_printf(m, "model\t\t: %s\n", model);
	of_node_put(root);

	if (ppc_md.show_cpuinfo != NULL)
		ppc_md.show_cpuinfo(m);

#ifdef CONFIG_PPC32
	/* Display the amount of memory */
	seq_printf(m, "Memory\t\t: %d MB\n",
		   (unsigned int)(total_memory / (1024 * 1024)));
#endif
}

static int show_cpuinfo(struct seq_file *m, void *v)
{
	unsigned long cpu_id = (unsigned long)v - 1;
	unsigned int pvr;
	unsigned short maj;
	unsigned short min;

	/* We only show online cpus: disable preempt (overzealous, I
	 * knew) to prevent cpu going down. */
	preempt_disable();
	if (!cpu_online(cpu_id)) {
		preempt_enable();
		return 0;
	}

#ifdef CONFIG_SMP
	pvr = per_cpu(cpu_pvr, cpu_id);
#else
	pvr = mfspr(SPRN_PVR);
#endif
	maj = (pvr >> 8) & 0xFF;
	min = pvr & 0xFF;

	seq_printf(m, "processor\t: %lu\n", cpu_id);
	seq_printf(m, "cpu\t\t: ");

	if (cur_cpu_spec->pvr_mask)
		seq_printf(m, "%s", cur_cpu_spec->cpu_name);
	else
		seq_printf(m, "unknown (%08x)", pvr);

#ifdef CONFIG_ALTIVEC
	if (cpu_has_feature(CPU_FTR_ALTIVEC))
		seq_printf(m, ", altivec supported");
#endif /* CONFIG_ALTIVEC */

	seq_printf(m, "\n");

#ifdef CONFIG_TAU
	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
#ifdef CONFIG_TAU_AVERAGE
		/* more straightforward, but potentially misleading */
		seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
			   cpu_temp(cpu_id));
#else
		/* show the actual temp sensor range */
		u32 temp;
		temp = cpu_temp_both(cpu_id);
		seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
			   temp & 0xff, temp >> 16);
#endif
	}
#endif /* CONFIG_TAU */

	/*
	 * Assume here that all clock rates are the same in a
	 * smp system.  -- Cort
	 */
	if (ppc_proc_freq)
		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
			   ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);

	if (ppc_md.show_percpuinfo != NULL)
		ppc_md.show_percpuinfo(m, cpu_id);

	/* If we are a Freescale core do a simple check so
	 * we dont have to keep adding cases in the future */
	if (PVR_VER(pvr) & 0x8000) {
		switch (PVR_VER(pvr)) {
		case 0x8000:	/* 7441/7450/7451, Voyager */
		case 0x8001:	/* 7445/7455, Apollo 6 */
		case 0x8002:	/* 7447/7457, Apollo 7 */
		case 0x8003:	/* 7447A, Apollo 7 PM */
		case 0x8004:	/* 7448, Apollo 8 */
		case 0x800c:	/* 7410, Nitro */
			maj = ((pvr >> 8) & 0xF);
			min = PVR_MIN(pvr);
			break;
		default:	/* e500/book-e */
			maj = PVR_MAJ(pvr);
			min = PVR_MIN(pvr);
			break;
		}
	} else {
		switch (PVR_VER(pvr)) {
			case 0x0020:	/* 403 family */
				maj = PVR_MAJ(pvr) + 1;
				min = PVR_MIN(pvr);
				break;
			case 0x1008:	/* 740P/750P ?? */
				maj = ((pvr >> 8) & 0xFF) - 1;
				min = pvr & 0xFF;
				break;
			default:
				maj = (pvr >> 8) & 0xFF;
				min = pvr & 0xFF;
				break;
		}
	}

	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
		   maj, min, PVR_VER(pvr), PVR_REV(pvr));

#ifdef CONFIG_PPC32
	seq_printf(m, "bogomips\t: %lu.%02lu\n",
		   loops_per_jiffy / (500000/HZ),
		   (loops_per_jiffy / (5000/HZ)) % 100);
#endif

#ifdef CONFIG_SMP
	seq_printf(m, "\n");
#endif

	preempt_enable();

	/* If this is the last cpu, print the summary */
	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
		show_cpuinfo_summary(m);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	if (*pos == 0)	/* just in case, cpu 0 is not the first */
		*pos = cpumask_first(cpu_online_mask);
	else
		*pos = cpumask_next(*pos - 1, cpu_online_mask);
	if ((*pos) < nr_cpu_ids)
		return (void *)(unsigned long)(*pos + 1);
	return NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	(*pos)++;
	return c_start(m, pos);
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start =c_start,
	.next =	c_next,
	.stop =	c_stop,
	.show =	show_cpuinfo,
};

void __init check_for_initrd(void)
{
#ifdef CONFIG_BLK_DEV_INITRD
	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
	    initrd_start, initrd_end);

	/* If we were passed an initrd, set the ROOT_DEV properly if the values
	 * look sensible. If not, clear initrd reference.
	 */
	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
	    initrd_end > initrd_start)
		ROOT_DEV = Root_RAM0;
	else
		initrd_start = initrd_end = 0;

	if (initrd_start)
		printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);

	DBG(" <- check_for_initrd()\n");
#endif /* CONFIG_BLK_DEV_INITRD */
}

#ifdef CONFIG_SMP

int threads_per_core, threads_shift;
cpumask_t threads_core_mask;

static void __init cpu_init_thread_core_maps(int tpc)
{
	int i;

	threads_per_core = tpc;
	threads_core_mask = CPU_MASK_NONE;

	/* This implementation only supports power of 2 number of threads
	 * for simplicity and performance
	 */
	threads_shift = ilog2(tpc);
	BUG_ON(tpc != (1 << threads_shift));

	for (i = 0; i < tpc; i++)
		cpu_set(i, threads_core_mask);

	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
	       tpc, tpc > 1 ? "s" : "");
	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
}


/**
 * setup_cpu_maps - initialize the following cpu maps:
 *                  cpu_possible_mask
 *                  cpu_present_mask
 *
 * Having the possible map set up early allows us to restrict allocations
 * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
 *
 * We do not initialize the online map here; cpus set their own bits in
 * cpu_online_mask as they come up.
 *
 * This function is valid only for Open Firmware systems.  finish_device_tree
 * must be called before using this.
 *
 * While we're here, we may as well set the "physical" cpu ids in the paca.
 *
 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
 */
void __init smp_setup_cpu_maps(void)
{
	struct device_node *dn = NULL;
	int cpu = 0;
	int nthreads = 1;

	DBG("smp_setup_cpu_maps()\n");

	while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
		const int *intserv;
		int j, len;

		DBG("  * %s...\n", dn->full_name);

		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
				&len);
		if (intserv) {
			nthreads = len / sizeof(int);
			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
			    nthreads);
		} else {
			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
			intserv = of_get_property(dn, "reg", NULL);
			if (!intserv)
				intserv = &cpu;	/* assume logical == phys */
		}

		for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
			DBG("    thread %d -> cpu %d (hard id %d)\n",
			    j, cpu, intserv[j]);
			set_cpu_present(cpu, true);
			set_hard_smp_processor_id(cpu, intserv[j]);
			set_cpu_possible(cpu, true);
			cpu++;
		}
	}

	/* If no SMT supported, nthreads is forced to 1 */
	if (!cpu_has_feature(CPU_FTR_SMT)) {
		DBG("  SMT disabled ! nthreads forced to 1\n");
		nthreads = 1;
	}

#ifdef CONFIG_PPC64
	/*
	 * On pSeries LPAR, we need to know how many cpus
	 * could possibly be added to this partition.
	 */
	if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
	    (dn = of_find_node_by_path("/rtas"))) {
		int num_addr_cell, num_size_cell, maxcpus;
		const unsigned int *ireg;

		num_addr_cell = of_n_addr_cells(dn);
		num_size_cell = of_n_size_cells(dn);

		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);

		if (!ireg)
			goto out;

		maxcpus = ireg[num_addr_cell + num_size_cell];

		/* Double maxcpus for processors which have SMT capability */
		if (cpu_has_feature(CPU_FTR_SMT))
			maxcpus *= nthreads;

		if (maxcpus > NR_CPUS) {
			printk(KERN_WARNING
			       "Partition configured for %d cpus, "
			       "operating system maximum is %d.\n",
			       maxcpus, NR_CPUS);
			maxcpus = NR_CPUS;
		} else
			printk(KERN_INFO "Partition configured for %d cpus.\n",
			       maxcpus);

		for (cpu = 0; cpu < maxcpus; cpu++)
			set_cpu_possible(cpu, true);
	out:
		of_node_put(dn);
	}
	vdso_data->processorCount = num_present_cpus();
#endif /* CONFIG_PPC64 */

        /* Initialize CPU <=> thread mapping/
	 *
	 * WARNING: We assume that the number of threads is the same for
	 * every CPU in the system. If that is not the case, then some code
	 * here will have to be reworked
	 */
	cpu_init_thread_core_maps(nthreads);

	free_unused_pacas();
}
#endif /* CONFIG_SMP */

#ifdef CONFIG_PCSPKR_PLATFORM
static __init int add_pcspkr(void)
{
	struct device_node *np;
	struct platform_device *pd;
	int ret;

	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
	of_node_put(np);
	if (!np)
		return -ENODEV;

	pd = platform_device_alloc("pcspkr", -1);
	if (!pd)
		return -ENOMEM;

	ret = platform_device_add(pd);
	if (ret)
		platform_device_put(pd);

	return ret;
}
device_initcall(add_pcspkr);
#endif	/* CONFIG_PCSPKR_PLATFORM */

void probe_machine(void)
{
	extern struct machdep_calls __machine_desc_start;
	extern struct machdep_calls __machine_desc_end;

	/*
	 * Iterate all ppc_md structures until we find the proper
	 * one for the current machine type
	 */
	DBG("Probing machine type ...\n");

	for (machine_id = &__machine_desc_start;
	     machine_id < &__machine_desc_end;
	     machine_id++) {
		DBG("  %s ...", machine_id->name);
		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
		if (ppc_md.probe()) {
			DBG(" match !\n");
			break;
		}
		DBG("\n");
	}
	/* What can we do if we didn't find ? */
	if (machine_id >= &__machine_desc_end) {
		DBG("No suitable machine found !\n");
		for (;;);
	}

	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
}

/* Match a class of boards, not a specific device configuration. */
int check_legacy_ioport(unsigned long base_port)
{
	struct device_node *parent, *np = NULL;
	int ret = -ENODEV;

	switch(base_port) {
	case I8042_DATA_REG:
		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
		if (np) {
			parent = of_get_parent(np);

			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
			if (!of_i8042_kbd_irq)
				of_i8042_kbd_irq = 1;

			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
			if (!of_i8042_aux_irq)
				of_i8042_aux_irq = 12;

			of_node_put(np);
			np = parent;
			break;
		}
		np = of_find_node_by_type(NULL, "8042");
		/* Pegasos has no device_type on its 8042 node, look for the
		 * name instead */
		if (!np)
			np = of_find_node_by_name(NULL, "8042");
		break;
	case FDC_BASE: /* FDC1 */
		np = of_find_node_by_type(NULL, "fdc");
		break;
#ifdef CONFIG_PPC_PREP
	case _PIDXR:
	case _PNPWRP:
	case PNPBIOS_BASE:
		/* implement me */
#endif
	default:
		/* ipmi is supposed to fail here */
		break;
	}
	if (!np)
		return ret;
	parent = of_get_parent(np);
	if (parent) {
		if (strcmp(parent->type, "isa") == 0)
			ret = 0;
		of_node_put(parent);
	}
	of_node_put(np);
	return ret;
}
EXPORT_SYMBOL(check_legacy_ioport);

static int ppc_panic_event(struct notifier_block *this,
                             unsigned long event, void *ptr)
{
	ppc_md.panic(ptr);  /* May not return */
	return NOTIFY_DONE;
}

static struct notifier_block ppc_panic_block = {
	.notifier_call = ppc_panic_event,
	.priority = INT_MIN /* may not return; must be done last */
};

void __init setup_panic(void)
{
	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
}

#ifdef CONFIG_CHECK_CACHE_COHERENCY
/*
 * For platforms that have configurable cache-coherency.  This function
 * checks that the cache coherency setting of the kernel matches the setting
 * left by the firmware, as indicated in the device tree.  Since a mismatch
 * will eventually result in DMA failures, we print * and error and call
 * BUG() in that case.
 */

#ifdef CONFIG_NOT_COHERENT_CACHE
#define KERNEL_COHERENCY	0
#else
#define KERNEL_COHERENCY	1
#endif

static int __init check_cache_coherency(void)
{
	struct device_node *np;
	const void *prop;
	int devtree_coherency;

	np = of_find_node_by_path("/");
	prop = of_get_property(np, "coherency-off", NULL);
	of_node_put(np);

	devtree_coherency = prop ? 0 : 1;

	if (devtree_coherency != KERNEL_COHERENCY) {
		printk(KERN_ERR
			"kernel coherency:%s != device tree_coherency:%s\n",
			KERNEL_COHERENCY ? "on" : "off",
			devtree_coherency ? "on" : "off");
		BUG();
	}

	return 0;
}

late_initcall(check_cache_coherency);
#endif /* CONFIG_CHECK_CACHE_COHERENCY */

#ifdef CONFIG_DEBUG_FS
struct dentry *powerpc_debugfs_root;
EXPORT_SYMBOL(powerpc_debugfs_root);

static int powerpc_debugfs_init(void)
{
	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);

	return powerpc_debugfs_root == NULL;
}
arch_initcall(powerpc_debugfs_init);
#endif

static int ppc_dflt_bus_notify(struct notifier_block *nb,
				unsigned long action, void *data)
{
	struct device *dev = data;

	/* We are only intereted in device addition */
	if (action != BUS_NOTIFY_ADD_DEVICE)
		return 0;

	set_dma_ops(dev, &dma_direct_ops);

	return NOTIFY_DONE;
}

static struct notifier_block ppc_dflt_plat_bus_notifier = {
	.notifier_call = ppc_dflt_bus_notify,
	.priority = INT_MAX,
};

static int __init setup_bus_notifier(void)
{
	bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
	return 0;
}

arch_initcall(setup_bus_notifier);
Commit	Line	Data
03501dab PM	1	/*
	2	* Common boot and setup code for both 32-bit and 64-bit.
	3	* Extracted from arch/powerpc/kernel/setup_64.c.
	4	*
	5	* Copyright (C) 2001 PPC64 Team, IBM Corp
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version
	10	* 2 of the License, or (at your option) any later version.
	11	*/
e8222502 BH	12
	13	#undef DEBUG
	14
03501dab PM	15	#include <linux/module.h>
	16	#include <linux/string.h>
	17	#include <linux/sched.h>
	18	#include <linux/init.h>
	19	#include <linux/kernel.h>
	20	#include <linux/reboot.h>
	21	#include <linux/delay.h>
	22	#include <linux/initrd.h>
e5c6c8e4	23	#include <linux/platform_device.h>
03501dab PM	24	#include <linux/seq_file.h>
	25	#include <linux/ioport.h>
	26	#include <linux/console.h>
894673ee	27	#include <linux/screen_info.h>
03501dab PM	28	#include <linux/root_dev.h>
	29	#include <linux/notifier.h>
	30	#include <linux/cpu.h>
	31	#include <linux/unistd.h>
	32	#include <linux/serial.h>
	33	#include <linux/serial_8250.h>
94a3807c	34	#include <linux/debugfs.h>
8d089085	35	#include <linux/percpu.h>
95f72d1e	36	#include <linux/memblock.h>
d746286c	37	#include <linux/of_platform.h>
03501dab	38	#include <asm/io.h>
1426d5a3	39	#include <asm/paca.h>
03501dab PM	40	#include <asm/prom.h>
03501dab PM	41	#include <asm/processor.h>
a7f290da	42	#include <asm/vdso_datapage.h>
03501dab	43	#include <asm/pgtable.h>
03501dab PM	44	#include <asm/smp.h>
	45	#include <asm/elf.h>
	46	#include <asm/machdep.h>
	47	#include <asm/time.h>
	48	#include <asm/cputable.h>
	49	#include <asm/sections.h>
e8222502	50	#include <asm/firmware.h>
03501dab PM	51	#include <asm/btext.h>
	52	#include <asm/nvram.h>
	53	#include <asm/setup.h>
	54	#include <asm/system.h>
	55	#include <asm/rtas.h>
	56	#include <asm/iommu.h>
	57	#include <asm/serial.h>
	58	#include <asm/cache.h>
	59	#include <asm/page.h>
	60	#include <asm/mmu.h>
fca5dcd4	61	#include <asm/xmon.h>
8d089085	62	#include <asm/cputhreads.h>
f465df81	63	#include <mm/mmu_decl.h>
03501dab	64
66ba135c SR	65	#include "setup.h"
66ba135c SR	66
03501dab	67	#ifdef DEBUG
f9e4ec57	68	#include <asm/udbg.h>
03501dab PM	69	#define DBG(fmt...) udbg_printf(fmt)
	70	#else
	71	#define DBG(fmt...)
	72	#endif
	73
e8222502 BH	74	/* The main machine-dep calls structure
	75	*/
	76	struct machdep_calls ppc_md;
	77	EXPORT_SYMBOL(ppc_md);
	78	struct machdep_calls *machine_id;
	79	EXPORT_SYMBOL(machine_id);
799d6046	80
49b09853 PM	81	unsigned long klimit = (unsigned long) _end;
49b09853 PM	82
19a8d97d SR	83	char cmd_line[COMMAND_LINE_SIZE];
19a8d97d SR	84
03501dab PM	85	/*
	86	* This still seems to be needed... -- paulus
	87	*/
	88	struct screen_info screen_info = {
	89	.orig_x = 0,
	90	.orig_y = 25,
	91	.orig_video_cols = 80,
	92	.orig_video_lines = 25,
	93	.orig_video_isVGA = 1,
	94	.orig_video_points = 16
	95	};
	96
540c6c39 MW	97	/* Variables required to store legacy IO irq routing */
540c6c39 MW	98	int of_i8042_kbd_irq;
ee110066	99	EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
540c6c39	100	int of_i8042_aux_irq;
ee110066	101	EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
540c6c39	102
03501dab PM	103	#ifdef __DO_IRQ_CANON
	104	/* XXX should go elsewhere eventually */
	105	int ppc_do_canonicalize_irqs;
	106	EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
	107	#endif
	108
	109	/* also used by kexec */
	110	void machine_shutdown(void)
	111	{
3d1229d6 ME	112	if (ppc_md.machine_shutdown)
3d1229d6 ME	113	ppc_md.machine_shutdown();
03501dab PM	114	}
	115
	116	void machine_restart(char *cmd)
	117	{
	118	machine_shutdown();
b8e383d5 KG	119	if (ppc_md.restart)
b8e383d5 KG	120	ppc_md.restart(cmd);
03501dab PM	121	#ifdef CONFIG_SMP
	122	smp_send_stop();
	123	#endif
	124	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	125	local_irq_disable();
	126	while (1) ;
	127	}
	128
	129	void machine_power_off(void)
	130	{
	131	machine_shutdown();
b8e383d5 KG	132	if (ppc_md.power_off)
b8e383d5 KG	133	ppc_md.power_off();
03501dab PM	134	#ifdef CONFIG_SMP
	135	smp_send_stop();
	136	#endif
	137	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	138	local_irq_disable();
	139	while (1) ;
	140	}
	141	/* Used by the G5 thermal driver */
	142	EXPORT_SYMBOL_GPL(machine_power_off);
	143
	144	void (*pm_power_off)(void) = machine_power_off;
	145	EXPORT_SYMBOL_GPL(pm_power_off);
	146
	147	void machine_halt(void)
	148	{
	149	machine_shutdown();
b8e383d5 KG	150	if (ppc_md.halt)
b8e383d5 KG	151	ppc_md.halt();
03501dab PM	152	#ifdef CONFIG_SMP
	153	smp_send_stop();
	154	#endif
	155	printk(KERN_EMERG "System Halted, OK to turn off power\n");
	156	local_irq_disable();
	157	while (1) ;
	158	}
	159
	160
	161	#ifdef CONFIG_TAU
	162	extern u32 cpu_temp(unsigned long cpu);
	163	extern u32 cpu_temp_both(unsigned long cpu);
	164	#endif /* CONFIG_TAU */
	165
	166	#ifdef CONFIG_SMP
6b7487fc	167	DEFINE_PER_CPU(unsigned int, cpu_pvr);
03501dab PM	168	#endif
03501dab PM	169
2c2df038 AB	170	static void show_cpuinfo_summary(struct seq_file *m)
	171	{
	172	struct device_node *root;
	173	const char *model = NULL;
	174	#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
	175	unsigned long bogosum = 0;
	176	int i;
	177	for_each_online_cpu(i)
	178	bogosum += loops_per_jiffy;
	179	seq_printf(m, "total bogomips\t: %lu.%02lu\n",
	180	bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
	181	#endif /* CONFIG_SMP && CONFIG_PPC32 */
	182	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
	183	if (ppc_md.name)
	184	seq_printf(m, "platform\t: %s\n", ppc_md.name);
	185	root = of_find_node_by_path("/");
	186	if (root)
	187	model = of_get_property(root, "model", NULL);
	188	if (model)
	189	seq_printf(m, "model\t\t: %s\n", model);
	190	of_node_put(root);
	191
	192	if (ppc_md.show_cpuinfo != NULL)
	193	ppc_md.show_cpuinfo(m);
	194
	195	#ifdef CONFIG_PPC32
	196	/* Display the amount of memory */
	197	seq_printf(m, "Memory\t\t: %d MB\n",
	198	(unsigned int)(total_memory / (1024 * 1024)));
	199	#endif
	200	}
	201
03501dab PM	202	static int show_cpuinfo(struct seq_file m, void v)
	203	{
	204	unsigned long cpu_id = (unsigned long)v - 1;
	205	unsigned int pvr;
	206	unsigned short maj;
	207	unsigned short min;
	208
03501dab PM	209	/* We only show online cpus: disable preempt (overzealous, I
	210	* knew) to prevent cpu going down. */
	211	preempt_disable();
	212	if (!cpu_online(cpu_id)) {
	213	preempt_enable();
	214	return 0;
	215	}
	216
	217	#ifdef CONFIG_SMP
6b7487fc	218	pvr = per_cpu(cpu_pvr, cpu_id);
03501dab PM	219	#else
	220	pvr = mfspr(SPRN_PVR);
	221	#endif
	222	maj = (pvr >> 8) & 0xFF;
	223	min = pvr & 0xFF;
	224
	225	seq_printf(m, "processor\t: %lu\n", cpu_id);
	226	seq_printf(m, "cpu\t\t: ");
	227
	228	if (cur_cpu_spec->pvr_mask)
	229	seq_printf(m, "%s", cur_cpu_spec->cpu_name);
	230	else
	231	seq_printf(m, "unknown (%08x)", pvr);
	232
	233	#ifdef CONFIG_ALTIVEC
	234	if (cpu_has_feature(CPU_FTR_ALTIVEC))
	235	seq_printf(m, ", altivec supported");
	236	#endif /* CONFIG_ALTIVEC */
	237
	238	seq_printf(m, "\n");
	239
	240	#ifdef CONFIG_TAU
	241	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
	242	#ifdef CONFIG_TAU_AVERAGE
	243	/* more straightforward, but potentially misleading */
	244	seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
bccfd588	245	cpu_temp(cpu_id));
03501dab PM	246	#else
	247	/* show the actual temp sensor range */
	248	u32 temp;
bccfd588	249	temp = cpu_temp_both(cpu_id);
03501dab PM	250	seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
	251	temp & 0xff, temp >> 16);
	252	#endif
	253	}
	254	#endif /* CONFIG_TAU */
	255
	256	/*
	257	* Assume here that all clock rates are the same in a
	258	* smp system. -- Cort
	259	*/
	260	if (ppc_proc_freq)
	261	seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
	262	ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
	263
	264	if (ppc_md.show_percpuinfo != NULL)
	265	ppc_md.show_percpuinfo(m, cpu_id);
	266
	267	/* If we are a Freescale core do a simple check so
	268	* we dont have to keep adding cases in the future */
	269	if (PVR_VER(pvr) & 0x8000) {
a501d8f3 ML	270	switch (PVR_VER(pvr)) {
	271	case 0x8000: /* 7441/7450/7451, Voyager */
	272	case 0x8001: /* 7445/7455, Apollo 6 */
	273	case 0x8002: /* 7447/7457, Apollo 7 */
	274	case 0x8003: /* 7447A, Apollo 7 PM */
	275	case 0x8004: /* 7448, Apollo 8 */
	276	case 0x800c: /* 7410, Nitro */
	277	maj = ((pvr >> 8) & 0xF);
	278	min = PVR_MIN(pvr);
	279	break;
	280	default: /* e500/book-e */
	281	maj = PVR_MAJ(pvr);
	282	min = PVR_MIN(pvr);
	283	break;
	284	}
03501dab PM	285	} else {
	286	switch (PVR_VER(pvr)) {
	287	case 0x0020: /* 403 family */
	288	maj = PVR_MAJ(pvr) + 1;
	289	min = PVR_MIN(pvr);
	290	break;
	291	case 0x1008: /* 740P/750P ?? */
	292	maj = ((pvr >> 8) & 0xFF) - 1;
	293	min = pvr & 0xFF;
	294	break;
	295	default:
	296	maj = (pvr >> 8) & 0xFF;
	297	min = pvr & 0xFF;
	298	break;
	299	}
	300	}
	301
	302	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
	303	maj, min, PVR_VER(pvr), PVR_REV(pvr));
	304
	305	#ifdef CONFIG_PPC32
	306	seq_printf(m, "bogomips\t: %lu.%02lu\n",
	307	loops_per_jiffy / (500000/HZ),
	308	(loops_per_jiffy / (5000/HZ)) % 100);
	309	#endif
	310
	311	#ifdef CONFIG_SMP
	312	seq_printf(m, "\n");
	313	#endif
	314
	315	preempt_enable();
e6532c63 AB	316
	317	/* If this is the last cpu, print the summary */
	318	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
	319	show_cpuinfo_summary(m);
	320
03501dab PM	321	return 0;
	322	}
	323
	324	static void c_start(struct seq_file m, loff_t *pos)
	325	{
e6532c63 AB	326	if (pos == 0) / just in case, cpu 0 is not the first */
	327	*pos = cpumask_first(cpu_online_mask);
	328	else
	329	pos = cpumask_next(pos - 1, cpu_online_mask);
	330	if ((*pos) < nr_cpu_ids)
	331	return (void )(unsigned long)(pos + 1);
	332	return NULL;
03501dab PM	333	}
	334
	335	static void c_next(struct seq_file m, void v, loff_t pos)
	336	{
e6532c63	337	(*pos)++;
03501dab PM	338	return c_start(m, pos);
	339	}
	340
	341	static void c_stop(struct seq_file m, void v)
	342	{
	343	}
	344
88e9d34c	345	const struct seq_operations cpuinfo_op = {
03501dab PM	346	.start =c_start,
	347	.next = c_next,
	348	.stop = c_stop,
	349	.show = show_cpuinfo,
	350	};
	351
a82765b6 DW	352	void __init check_for_initrd(void)
	353	{
	354	#ifdef CONFIG_BLK_DEV_INITRD
30437b3e DG	355	DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
30437b3e DG	356	initrd_start, initrd_end);
a82765b6 DW	357
	358	/* If we were passed an initrd, set the ROOT_DEV properly if the values
	359	* look sensible. If not, clear initrd reference.
	360	*/
51fae6de	361	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
a82765b6 DW	362	initrd_end > initrd_start)
a82765b6 DW	363	ROOT_DEV = Root_RAM0;
6761c4a0	364	else
a82765b6	365	initrd_start = initrd_end = 0;
a82765b6 DW	366
	367	if (initrd_start)
	368	printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
	369
	370	DBG(" <- check_for_initrd()\n");
	371	#endif /* CONFIG_BLK_DEV_INITRD */
	372	}
	373
5ad57078 PM	374	#ifdef CONFIG_SMP
5ad57078 PM	375
8d089085 BH	376	int threads_per_core, threads_shift;
	377	cpumask_t threads_core_mask;
	378
	379	static void __init cpu_init_thread_core_maps(int tpc)
	380	{
	381	int i;
	382
	383	threads_per_core = tpc;
	384	threads_core_mask = CPU_MASK_NONE;
	385
	386	/* This implementation only supports power of 2 number of threads
	387	* for simplicity and performance
	388	*/
	389	threads_shift = ilog2(tpc);
	390	BUG_ON(tpc != (1 << threads_shift));
	391
	392	for (i = 0; i < tpc; i++)
	393	cpu_set(i, threads_core_mask);
	394
	395	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
	396	tpc, tpc > 1 ? "s" : "");
	397	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
	398	}
	399
	400
5ad57078 PM	401	/**
5ad57078 PM	402	* setup_cpu_maps - initialize the following cpu maps:
828a6986 AB	403	* cpu_possible_mask
828a6986 AB	404	* cpu_present_mask
5ad57078 PM	405	*
	406	* Having the possible map set up early allows us to restrict allocations
	407	* of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
	408	*
	409	* We do not initialize the online map here; cpus set their own bits in
828a6986	410	* cpu_online_mask as they come up.
5ad57078 PM	411	*
	412	* This function is valid only for Open Firmware systems. finish_device_tree
	413	* must be called before using this.
	414	*
	415	* While we're here, we may as well set the "physical" cpu ids in the paca.
4df20460 AB	416	*
4df20460 AB	417	* NOTE: This must match the parsing done in early_init_dt_scan_cpus.
5ad57078 PM	418	*/
	419	void __init smp_setup_cpu_maps(void)
	420	{
	421	struct device_node *dn = NULL;
	422	int cpu = 0;
8d089085 BH	423	int nthreads = 1;
	424
	425	DBG("smp_setup_cpu_maps()\n");
5ad57078 PM	426
5ad57078 PM	427	while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
a7f67bdf	428	const int *intserv;
8d089085 BH	429	int j, len;
	430
	431	DBG(" * %s...\n", dn->full_name);
5ad57078	432
e2eb6392 SR	433	intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
e2eb6392 SR	434	&len);
8d089085	435	if (intserv) {
5ad57078	436	nthreads = len / sizeof(int);
8d089085 BH	437	DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
	438	nthreads);
	439	} else {
	440	DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
e2eb6392	441	intserv = of_get_property(dn, "reg", NULL);
5ad57078 PM	442	if (!intserv)
	443	intserv = &cpu; /* assume logical == phys */
	444	}
	445
	446	for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
8d089085 BH	447	DBG(" thread %d -> cpu %d (hard id %d)\n",
8d089085 BH	448	j, cpu, intserv[j]);
ea0f1cab	449	set_cpu_present(cpu, true);
5ad57078	450	set_hard_smp_processor_id(cpu, intserv[j]);
ea0f1cab	451	set_cpu_possible(cpu, true);
5ad57078 PM	452	cpu++;
	453	}
	454	}
	455
8d089085 BH	456	/* If no SMT supported, nthreads is forced to 1 */
	457	if (!cpu_has_feature(CPU_FTR_SMT)) {
	458	DBG(" SMT disabled ! nthreads forced to 1\n");
	459	nthreads = 1;
	460	}
	461
5ad57078 PM	462	#ifdef CONFIG_PPC64
	463	/*
	464	* On pSeries LPAR, we need to know how many cpus
	465	* could possibly be added to this partition.
	466	*/
e8222502	467	if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
799d6046	468	(dn = of_find_node_by_path("/rtas"))) {
5ad57078	469	int num_addr_cell, num_size_cell, maxcpus;
a7f67bdf	470	const unsigned int *ireg;
5ad57078	471
a8bda5dd	472	num_addr_cell = of_n_addr_cells(dn);
9213feea	473	num_size_cell = of_n_size_cells(dn);
5ad57078	474
e2eb6392	475	ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
5ad57078 PM	476
	477	if (!ireg)
	478	goto out;
	479
	480	maxcpus = ireg[num_addr_cell + num_size_cell];
	481
	482	/* Double maxcpus for processors which have SMT capability */
	483	if (cpu_has_feature(CPU_FTR_SMT))
8d089085	484	maxcpus *= nthreads;
5ad57078 PM	485
	486	if (maxcpus > NR_CPUS) {
	487	printk(KERN_WARNING
	488	"Partition configured for %d cpus, "
	489	"operating system maximum is %d.\n",
	490	maxcpus, NR_CPUS);
	491	maxcpus = NR_CPUS;
	492	} else
	493	printk(KERN_INFO "Partition configured for %d cpus.\n",
	494	maxcpus);
	495
	496	for (cpu = 0; cpu < maxcpus; cpu++)
ea0f1cab	497	set_cpu_possible(cpu, true);
5ad57078 PM	498	out:
	499	of_node_put(dn);
	500	}
d5a7430d MT	501	vdso_data->processorCount = num_present_cpus();
d5a7430d MT	502	#endif /* CONFIG_PPC64 */
8d089085 BH	503
	504	/* Initialize CPU <=> thread mapping/
	505	*
	506	* WARNING: We assume that the number of threads is the same for
	507	* every CPU in the system. If that is not the case, then some code
	508	* here will have to be reworked
	509	*/
	510	cpu_init_thread_core_maps(nthreads);
1426d5a3 ME	511
1426d5a3 ME	512	free_unused_pacas();
d5a7430d	513	}
5ad57078	514	#endif /* CONFIG_SMP */
fca5dcd4	515
d33b78df	516	#ifdef CONFIG_PCSPKR_PLATFORM
e5c6c8e4 MN	517	static __init int add_pcspkr(void)
	518	{
	519	struct device_node *np;
	520	struct platform_device *pd;
	521	int ret;
	522
	523	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
	524	of_node_put(np);
	525	if (!np)
	526	return -ENODEV;
	527
	528	pd = platform_device_alloc("pcspkr", -1);
	529	if (!pd)
	530	return -ENOMEM;
	531
	532	ret = platform_device_add(pd);
	533	if (ret)
	534	platform_device_put(pd);
	535
	536	return ret;
	537	}
	538	device_initcall(add_pcspkr);
d33b78df	539	#endif /* CONFIG_PCSPKR_PLATFORM */
95d465fd	540
e8222502 BH	541	void probe_machine(void)
	542	{
	543	extern struct machdep_calls __machine_desc_start;
	544	extern struct machdep_calls __machine_desc_end;
	545
	546	/*
	547	* Iterate all ppc_md structures until we find the proper
	548	* one for the current machine type
	549	*/
	550	DBG("Probing machine type ...\n");
	551
	552	for (machine_id = &__machine_desc_start;
	553	machine_id < &__machine_desc_end;
	554	machine_id++) {
	555	DBG(" %s ...", machine_id->name);
	556	memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
	557	if (ppc_md.probe()) {
	558	DBG(" match !\n");
	559	break;
	560	}
	561	DBG("\n");
	562	}
	563	/* What can we do if we didn't find ? */
	564	if (machine_id >= &__machine_desc_end) {
	565	DBG("No suitable machine found !\n");
	566	for (;;);
	567	}
	568
	569	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
	570	}
1269277a	571
8d8a0241	572	/* Match a class of boards, not a specific device configuration. */
1269277a DW	573	int check_legacy_ioport(unsigned long base_port)
1269277a DW	574	{
8d8a0241 OH	575	struct device_node parent, np = NULL;
	576	int ret = -ENODEV;
	577
	578	switch(base_port) {
	579	case I8042_DATA_REG:
db0dbae9 WF	580	if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
	581	np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
	582	if (np) {
	583	parent = of_get_parent(np);
540c6c39 MW	584
	585	of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
	586	if (!of_i8042_kbd_irq)
	587	of_i8042_kbd_irq = 1;
	588
	589	of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
	590	if (!of_i8042_aux_irq)
	591	of_i8042_aux_irq = 12;
	592
db0dbae9 WF	593	of_node_put(np);
	594	np = parent;
	595	break;
	596	}
8d8a0241	597	np = of_find_node_by_type(NULL, "8042");
f5d834fc AC	598	/* Pegasos has no device_type on its 8042 node, look for the
	599	* name instead */
	600	if (!np)
	601	np = of_find_node_by_name(NULL, "8042");
8d8a0241 OH	602	break;
	603	case FDC_BASE: /* FDC1 */
	604	np = of_find_node_by_type(NULL, "fdc");
	605	break;
	606	#ifdef CONFIG_PPC_PREP
	607	case _PIDXR:
	608	case _PNPWRP:
	609	case PNPBIOS_BASE:
	610	/* implement me */
	611	#endif
	612	default:
	613	/* ipmi is supposed to fail here */
	614	break;
	615	}
	616	if (!np)
	617	return ret;
	618	parent = of_get_parent(np);
	619	if (parent) {
	620	if (strcmp(parent->type, "isa") == 0)
	621	ret = 0;
	622	of_node_put(parent);
	623	}
	624	of_node_put(np);
	625	return ret;
1269277a DW	626	}
1269277a DW	627	EXPORT_SYMBOL(check_legacy_ioport);
7e990266 KG	628
	629	static int ppc_panic_event(struct notifier_block *this,
	630	unsigned long event, void *ptr)
	631	{
	632	ppc_md.panic(ptr); /* May not return */
	633	return NOTIFY_DONE;
	634	}
	635
	636	static struct notifier_block ppc_panic_block = {
	637	.notifier_call = ppc_panic_event,
	638	.priority = INT_MIN /* may not return; must be done last */
	639	};
	640
	641	void __init setup_panic(void)
	642	{
	643	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
	644	}
06cce43c DF	645
	646	#ifdef CONFIG_CHECK_CACHE_COHERENCY
	647	/*
	648	* For platforms that have configurable cache-coherency. This function
	649	* checks that the cache coherency setting of the kernel matches the setting
	650	* left by the firmware, as indicated in the device tree. Since a mismatch
	651	* will eventually result in DMA failures, we print * and error and call
	652	* BUG() in that case.
	653	*/
	654
	655	#ifdef CONFIG_NOT_COHERENT_CACHE
	656	#define KERNEL_COHERENCY 0
	657	#else
	658	#define KERNEL_COHERENCY 1
	659	#endif
	660
	661	static int __init check_cache_coherency(void)
	662	{
	663	struct device_node *np;
	664	const void *prop;
	665	int devtree_coherency;
	666
	667	np = of_find_node_by_path("/");
	668	prop = of_get_property(np, "coherency-off", NULL);
	669	of_node_put(np);
	670
	671	devtree_coherency = prop ? 0 : 1;
	672
	673	if (devtree_coherency != KERNEL_COHERENCY) {
	674	printk(KERN_ERR
	675	"kernel coherency:%s != device tree_coherency:%s\n",
	676	KERNEL_COHERENCY ? "on" : "off",
	677	devtree_coherency ? "on" : "off");
	678	BUG();
	679	}
	680
	681	return 0;
	682	}
	683
	684	late_initcall(check_cache_coherency);
	685	#endif /* CONFIG_CHECK_CACHE_COHERENCY */
94a3807c ME	686
	687	#ifdef CONFIG_DEBUG_FS
	688	struct dentry *powerpc_debugfs_root;
907b1f45	689	EXPORT_SYMBOL(powerpc_debugfs_root);
94a3807c ME	690
	691	static int powerpc_debugfs_init(void)
	692	{
	693	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
	694
	695	return powerpc_debugfs_root == NULL;
	696	}
	697	arch_initcall(powerpc_debugfs_init);
	698	#endif
d746286c KG	699
	700	static int ppc_dflt_bus_notify(struct notifier_block *nb,
	701	unsigned long action, void *data)
	702	{
	703	struct device *dev = data;
	704
	705	/* We are only intereted in device addition */
	706	if (action != BUS_NOTIFY_ADD_DEVICE)
	707	return 0;
	708
	709	set_dma_ops(dev, &dma_direct_ops);
	710
	711	return NOTIFY_DONE;
	712	}
	713
	714	static struct notifier_block ppc_dflt_plat_bus_notifier = {
	715	.notifier_call = ppc_dflt_bus_notify,
	716	.priority = INT_MAX,
	717	};
	718
d746286c KG	719	static int __init setup_bus_notifier(void)
	720	{
	721	bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
d746286c KG	722	return 0;
	723	}
	724
	725	arch_initcall(setup_bus_notifier);