Commit | Line | Data |
---|---|---|
40ef8cbc PM |
1 | /* |
2 | * | |
3 | * Common boot and setup code. | |
4 | * | |
5 | * Copyright (C) 2001 PPC64 Team, IBM Corp | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #undef DEBUG | |
14 | ||
40ef8cbc PM |
15 | #include <linux/module.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/reboot.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/initrd.h> | |
40ef8cbc PM |
23 | #include <linux/seq_file.h> |
24 | #include <linux/ioport.h> | |
25 | #include <linux/console.h> | |
26 | #include <linux/utsname.h> | |
27 | #include <linux/tty.h> | |
28 | #include <linux/root_dev.h> | |
29 | #include <linux/notifier.h> | |
30 | #include <linux/cpu.h> | |
31 | #include <linux/unistd.h> | |
32 | #include <linux/serial.h> | |
33 | #include <linux/serial_8250.h> | |
7a0268fa | 34 | #include <linux/bootmem.h> |
12d04eef | 35 | #include <linux/pci.h> |
945feb17 | 36 | #include <linux/lockdep.h> |
d9b2b2a2 | 37 | #include <linux/lmb.h> |
40ef8cbc | 38 | #include <asm/io.h> |
0cc4746c | 39 | #include <asm/kdump.h> |
40ef8cbc PM |
40 | #include <asm/prom.h> |
41 | #include <asm/processor.h> | |
42 | #include <asm/pgtable.h> | |
40ef8cbc PM |
43 | #include <asm/smp.h> |
44 | #include <asm/elf.h> | |
45 | #include <asm/machdep.h> | |
46 | #include <asm/paca.h> | |
40ef8cbc PM |
47 | #include <asm/time.h> |
48 | #include <asm/cputable.h> | |
49 | #include <asm/sections.h> | |
50 | #include <asm/btext.h> | |
51 | #include <asm/nvram.h> | |
52 | #include <asm/setup.h> | |
53 | #include <asm/system.h> | |
54 | #include <asm/rtas.h> | |
55 | #include <asm/iommu.h> | |
56 | #include <asm/serial.h> | |
57 | #include <asm/cache.h> | |
58 | #include <asm/page.h> | |
59 | #include <asm/mmu.h> | |
40ef8cbc | 60 | #include <asm/firmware.h> |
f78541dc | 61 | #include <asm/xmon.h> |
dcad47fc | 62 | #include <asm/udbg.h> |
593e537b | 63 | #include <asm/kexec.h> |
40ef8cbc | 64 | |
66ba135c SR |
65 | #include "setup.h" |
66 | ||
40ef8cbc PM |
67 | #ifdef DEBUG |
68 | #define DBG(fmt...) udbg_printf(fmt) | |
69 | #else | |
70 | #define DBG(fmt...) | |
71 | #endif | |
72 | ||
40ef8cbc PM |
73 | int have_of = 1; |
74 | int boot_cpuid = 0; | |
40ef8cbc PM |
75 | u64 ppc64_pft_size; |
76 | ||
dabcafd3 OJ |
77 | /* Pick defaults since we might want to patch instructions |
78 | * before we've read this from the device tree. | |
79 | */ | |
80 | struct ppc64_caches ppc64_caches = { | |
5a2fe38d OJ |
81 | .dline_size = 0x40, |
82 | .log_dline_size = 6, | |
83 | .iline_size = 0x40, | |
84 | .log_iline_size = 6 | |
dabcafd3 | 85 | }; |
40ef8cbc PM |
86 | EXPORT_SYMBOL_GPL(ppc64_caches); |
87 | ||
4e491d14 SR |
88 | #ifdef CONFIG_FTRACE |
89 | extern void _mcount(void); | |
90 | EXPORT_SYMBOL(_mcount); | |
91 | #endif | |
92 | ||
40ef8cbc PM |
93 | /* |
94 | * These are used in binfmt_elf.c to put aux entries on the stack | |
95 | * for each elf executable being started. | |
96 | */ | |
97 | int dcache_bsize; | |
98 | int icache_bsize; | |
99 | int ucache_bsize; | |
100 | ||
40ef8cbc PM |
101 | #ifdef CONFIG_SMP |
102 | ||
103 | static int smt_enabled_cmdline; | |
104 | ||
105 | /* Look for ibm,smt-enabled OF option */ | |
106 | static void check_smt_enabled(void) | |
107 | { | |
108 | struct device_node *dn; | |
a7f67bdf | 109 | const char *smt_option; |
40ef8cbc PM |
110 | |
111 | /* Allow the command line to overrule the OF option */ | |
112 | if (smt_enabled_cmdline) | |
113 | return; | |
114 | ||
115 | dn = of_find_node_by_path("/options"); | |
116 | ||
117 | if (dn) { | |
e2eb6392 | 118 | smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); |
40ef8cbc PM |
119 | |
120 | if (smt_option) { | |
121 | if (!strcmp(smt_option, "on")) | |
122 | smt_enabled_at_boot = 1; | |
123 | else if (!strcmp(smt_option, "off")) | |
124 | smt_enabled_at_boot = 0; | |
125 | } | |
126 | } | |
127 | } | |
128 | ||
129 | /* Look for smt-enabled= cmdline option */ | |
130 | static int __init early_smt_enabled(char *p) | |
131 | { | |
132 | smt_enabled_cmdline = 1; | |
133 | ||
134 | if (!p) | |
135 | return 0; | |
136 | ||
137 | if (!strcmp(p, "on") || !strcmp(p, "1")) | |
138 | smt_enabled_at_boot = 1; | |
139 | else if (!strcmp(p, "off") || !strcmp(p, "0")) | |
140 | smt_enabled_at_boot = 0; | |
141 | ||
142 | return 0; | |
143 | } | |
144 | early_param("smt-enabled", early_smt_enabled); | |
145 | ||
5ad57078 PM |
146 | #else |
147 | #define check_smt_enabled() | |
40ef8cbc PM |
148 | #endif /* CONFIG_SMP */ |
149 | ||
4ba99b97 ME |
150 | /* Put the paca pointer into r13 and SPRG3 */ |
151 | void __init setup_paca(int cpu) | |
152 | { | |
153 | local_paca = &paca[cpu]; | |
154 | mtspr(SPRN_SPRG3, local_paca); | |
155 | } | |
156 | ||
40ef8cbc PM |
157 | /* |
158 | * Early initialization entry point. This is called by head.S | |
159 | * with MMU translation disabled. We rely on the "feature" of | |
160 | * the CPU that ignores the top 2 bits of the address in real | |
161 | * mode so we can access kernel globals normally provided we | |
162 | * only toy with things in the RMO region. From here, we do | |
163 | * some early parsing of the device-tree to setup out LMB | |
164 | * data structures, and allocate & initialize the hash table | |
165 | * and segment tables so we can start running with translation | |
166 | * enabled. | |
167 | * | |
168 | * It is this function which will call the probe() callback of | |
169 | * the various platform types and copy the matching one to the | |
170 | * global ppc_md structure. Your platform can eventually do | |
171 | * some very early initializations from the probe() routine, but | |
172 | * this is not recommended, be very careful as, for example, the | |
173 | * device-tree is not accessible via normal means at this point. | |
174 | */ | |
175 | ||
176 | void __init early_setup(unsigned long dt_ptr) | |
177 | { | |
24d96495 BH |
178 | /* -------- printk is _NOT_ safe to use here ! ------- */ |
179 | ||
90035fe3 TB |
180 | /* Fill in any unititialised pacas */ |
181 | initialise_pacas(); | |
182 | ||
42c4aaad | 183 | /* Identify CPU type */ |
974a76f5 | 184 | identify_cpu(0, mfspr(SPRN_PVR)); |
42c4aaad | 185 | |
33dbcf72 ME |
186 | /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ |
187 | setup_paca(0); | |
188 | ||
945feb17 BH |
189 | /* Initialize lockdep early or else spinlocks will blow */ |
190 | lockdep_init(); | |
191 | ||
24d96495 BH |
192 | /* -------- printk is now safe to use ------- */ |
193 | ||
f2fd2513 BH |
194 | /* Enable early debugging if any specified (see udbg.h) */ |
195 | udbg_early_init(); | |
196 | ||
e8222502 | 197 | DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); |
40ef8cbc | 198 | |
40ef8cbc | 199 | /* |
3c607ce2 LV |
200 | * Do early initialization using the flattened device |
201 | * tree, such as retrieving the physical memory map or | |
202 | * calculating/retrieving the hash table size. | |
40ef8cbc PM |
203 | */ |
204 | early_init_devtree(__va(dt_ptr)); | |
205 | ||
4df20460 | 206 | /* Now we know the logical id of our boot cpu, setup the paca. */ |
4ba99b97 | 207 | setup_paca(boot_cpuid); |
4df20460 AB |
208 | |
209 | /* Fix up paca fields required for the boot cpu */ | |
210 | get_paca()->cpu_start = 1; | |
211 | get_paca()->stab_real = __pa((u64)&initial_stab); | |
212 | get_paca()->stab_addr = (u64)&initial_stab; | |
213 | ||
e8222502 BH |
214 | /* Probe the machine type */ |
215 | probe_machine(); | |
40ef8cbc | 216 | |
47310413 | 217 | setup_kdump_trampoline(); |
0cc4746c | 218 | |
40ef8cbc PM |
219 | DBG("Found, Initializing memory management...\n"); |
220 | ||
221 | /* | |
3c726f8d BH |
222 | * Initialize the MMU Hash table and create the linear mapping |
223 | * of memory. Has to be done before stab/slb initialization as | |
224 | * this is currently where the page size encoding is obtained | |
40ef8cbc | 225 | */ |
3c726f8d | 226 | htab_initialize(); |
40ef8cbc PM |
227 | |
228 | /* | |
3c726f8d | 229 | * Initialize stab / SLB management except on iSeries |
40ef8cbc | 230 | */ |
856d08ec SR |
231 | if (cpu_has_feature(CPU_FTR_SLB)) |
232 | slb_initialize(); | |
233 | else if (!firmware_has_feature(FW_FEATURE_ISERIES)) | |
234 | stab_initialize(get_paca()->stab_real); | |
40ef8cbc PM |
235 | |
236 | DBG(" <- early_setup()\n"); | |
237 | } | |
238 | ||
799d6046 PM |
239 | #ifdef CONFIG_SMP |
240 | void early_setup_secondary(void) | |
241 | { | |
242 | struct paca_struct *lpaca = get_paca(); | |
243 | ||
d04c56f7 PM |
244 | /* Mark interrupts enabled in PACA */ |
245 | lpaca->soft_enabled = 0; | |
799d6046 PM |
246 | |
247 | /* Initialize hash table for that CPU */ | |
248 | htab_initialize_secondary(); | |
249 | ||
250 | /* Initialize STAB/SLB. We use a virtual address as it works | |
251 | * in real mode on pSeries and we want a virutal address on | |
252 | * iSeries anyway | |
253 | */ | |
254 | if (cpu_has_feature(CPU_FTR_SLB)) | |
255 | slb_initialize(); | |
256 | else | |
257 | stab_initialize(lpaca->stab_addr); | |
258 | } | |
259 | ||
260 | #endif /* CONFIG_SMP */ | |
40ef8cbc | 261 | |
b8f51021 ME |
262 | #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) |
263 | void smp_release_cpus(void) | |
264 | { | |
265 | extern unsigned long __secondary_hold_spinloop; | |
758438a7 | 266 | unsigned long *ptr; |
b8f51021 ME |
267 | |
268 | DBG(" -> smp_release_cpus()\n"); | |
269 | ||
270 | /* All secondary cpus are spinning on a common spinloop, release them | |
271 | * all now so they can start to spin on their individual paca | |
272 | * spinloops. For non SMP kernels, the secondary cpus never get out | |
273 | * of the common spinloop. | |
274 | * This is useless but harmless on iSeries, secondaries are already | |
275 | * waiting on their paca spinloops. */ | |
276 | ||
758438a7 ME |
277 | ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop |
278 | - PHYSICAL_START); | |
279 | *ptr = 1; | |
b8f51021 ME |
280 | mb(); |
281 | ||
282 | DBG(" <- smp_release_cpus()\n"); | |
283 | } | |
284 | #endif /* CONFIG_SMP || CONFIG_KEXEC */ | |
285 | ||
40ef8cbc | 286 | /* |
799d6046 PM |
287 | * Initialize some remaining members of the ppc64_caches and systemcfg |
288 | * structures | |
40ef8cbc PM |
289 | * (at least until we get rid of them completely). This is mostly some |
290 | * cache informations about the CPU that will be used by cache flush | |
291 | * routines and/or provided to userland | |
292 | */ | |
293 | static void __init initialize_cache_info(void) | |
294 | { | |
295 | struct device_node *np; | |
296 | unsigned long num_cpus = 0; | |
297 | ||
298 | DBG(" -> initialize_cache_info()\n"); | |
299 | ||
300 | for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { | |
301 | num_cpus += 1; | |
302 | ||
303 | /* We're assuming *all* of the CPUs have the same | |
304 | * d-cache and i-cache sizes... -Peter | |
305 | */ | |
306 | ||
307 | if ( num_cpus == 1 ) { | |
a7f67bdf | 308 | const u32 *sizep, *lsizep; |
40ef8cbc | 309 | u32 size, lsize; |
40ef8cbc PM |
310 | |
311 | size = 0; | |
312 | lsize = cur_cpu_spec->dcache_bsize; | |
e2eb6392 | 313 | sizep = of_get_property(np, "d-cache-size", NULL); |
40ef8cbc PM |
314 | if (sizep != NULL) |
315 | size = *sizep; | |
20474abd BH |
316 | lsizep = of_get_property(np, "d-cache-block-size", NULL); |
317 | /* fallback if block size missing */ | |
318 | if (lsizep == NULL) | |
319 | lsizep = of_get_property(np, "d-cache-line-size", NULL); | |
40ef8cbc PM |
320 | if (lsizep != NULL) |
321 | lsize = *lsizep; | |
322 | if (sizep == 0 || lsizep == 0) | |
323 | DBG("Argh, can't find dcache properties ! " | |
324 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
325 | ||
a7f290da BH |
326 | ppc64_caches.dsize = size; |
327 | ppc64_caches.dline_size = lsize; | |
40ef8cbc PM |
328 | ppc64_caches.log_dline_size = __ilog2(lsize); |
329 | ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; | |
330 | ||
331 | size = 0; | |
332 | lsize = cur_cpu_spec->icache_bsize; | |
e2eb6392 | 333 | sizep = of_get_property(np, "i-cache-size", NULL); |
40ef8cbc PM |
334 | if (sizep != NULL) |
335 | size = *sizep; | |
20474abd BH |
336 | lsizep = of_get_property(np, "i-cache-block-size", NULL); |
337 | if (lsizep == NULL) | |
338 | lsizep = of_get_property(np, "i-cache-line-size", NULL); | |
40ef8cbc PM |
339 | if (lsizep != NULL) |
340 | lsize = *lsizep; | |
341 | if (sizep == 0 || lsizep == 0) | |
342 | DBG("Argh, can't find icache properties ! " | |
343 | "sizep: %p, lsizep: %p\n", sizep, lsizep); | |
344 | ||
a7f290da BH |
345 | ppc64_caches.isize = size; |
346 | ppc64_caches.iline_size = lsize; | |
40ef8cbc PM |
347 | ppc64_caches.log_iline_size = __ilog2(lsize); |
348 | ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; | |
349 | } | |
350 | } | |
351 | ||
40ef8cbc PM |
352 | DBG(" <- initialize_cache_info()\n"); |
353 | } | |
354 | ||
40ef8cbc PM |
355 | |
356 | /* | |
357 | * Do some initial setup of the system. The parameters are those which | |
358 | * were passed in from the bootloader. | |
359 | */ | |
360 | void __init setup_system(void) | |
361 | { | |
362 | DBG(" -> setup_system()\n"); | |
363 | ||
826ea8f2 TB |
364 | /* Apply the CPUs-specific and firmware specific fixups to kernel |
365 | * text (nop out sections not relevant to this CPU or this firmware) | |
42c4aaad | 366 | */ |
0909c8c2 | 367 | do_feature_fixups(cur_cpu_spec->cpu_features, |
42c4aaad | 368 | &__start___ftr_fixup, &__stop___ftr_fixup); |
826ea8f2 TB |
369 | do_feature_fixups(powerpc_firmware_features, |
370 | &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); | |
42c4aaad | 371 | |
40ef8cbc PM |
372 | /* |
373 | * Unflatten the device-tree passed by prom_init or kexec | |
374 | */ | |
375 | unflatten_device_tree(); | |
376 | ||
377 | /* | |
378 | * Fill the ppc64_caches & systemcfg structures with informations | |
0ebfff14 | 379 | * retrieved from the device-tree. |
40ef8cbc PM |
380 | */ |
381 | initialize_cache_info(); | |
382 | ||
0ebfff14 BH |
383 | /* |
384 | * Initialize irq remapping subsystem | |
385 | */ | |
386 | irq_early_init(); | |
387 | ||
40ef8cbc PM |
388 | #ifdef CONFIG_PPC_RTAS |
389 | /* | |
390 | * Initialize RTAS if available | |
391 | */ | |
392 | rtas_initialize(); | |
393 | #endif /* CONFIG_PPC_RTAS */ | |
40ef8cbc PM |
394 | |
395 | /* | |
396 | * Check if we have an initrd provided via the device-tree | |
397 | */ | |
398 | check_for_initrd(); | |
40ef8cbc PM |
399 | |
400 | /* | |
401 | * Do some platform specific early initializations, that includes | |
402 | * setting up the hash table pointers. It also sets up some interrupt-mapping | |
403 | * related options that will be used by finish_device_tree() | |
404 | */ | |
57744ea9 GL |
405 | if (ppc_md.init_early) |
406 | ppc_md.init_early(); | |
40ef8cbc | 407 | |
463ce0e1 BH |
408 | /* |
409 | * We can discover serial ports now since the above did setup the | |
410 | * hash table management for us, thus ioremap works. We do that early | |
411 | * so that further code can be debugged | |
412 | */ | |
463ce0e1 | 413 | find_legacy_serial_ports(); |
463ce0e1 | 414 | |
40ef8cbc PM |
415 | /* |
416 | * Register early console | |
417 | */ | |
418 | register_early_udbg_console(); | |
40ef8cbc | 419 | |
47679283 ME |
420 | /* |
421 | * Initialize xmon | |
422 | */ | |
423 | xmon_setup(); | |
480f6f35 | 424 | |
5ad57078 PM |
425 | check_smt_enabled(); |
426 | smp_setup_cpu_maps(); | |
40ef8cbc | 427 | |
f018b36f | 428 | #ifdef CONFIG_SMP |
40ef8cbc PM |
429 | /* Release secondary cpus out of their spinloops at 0x60 now that |
430 | * we can map physical -> logical CPU ids | |
431 | */ | |
432 | smp_release_cpus(); | |
f018b36f | 433 | #endif |
40ef8cbc | 434 | |
96b644bd | 435 | printk("Starting Linux PPC64 %s\n", init_utsname()->version); |
40ef8cbc PM |
436 | |
437 | printk("-----------------------------------------------------\n"); | |
438 | printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); | |
a7f290da | 439 | printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size()); |
9697add0 AB |
440 | if (ppc64_caches.dline_size != 0x80) |
441 | printk("ppc64_caches.dcache_line_size = 0x%x\n", | |
442 | ppc64_caches.dline_size); | |
443 | if (ppc64_caches.iline_size != 0x80) | |
444 | printk("ppc64_caches.icache_line_size = 0x%x\n", | |
445 | ppc64_caches.iline_size); | |
446 | if (htab_address) | |
447 | printk("htab_address = 0x%p\n", htab_address); | |
40ef8cbc | 448 | printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); |
398ab1fc | 449 | #if PHYSICAL_START > 0 |
37dd2bad | 450 | printk("physical_start = 0x%lx\n", PHYSICAL_START); |
398ab1fc | 451 | #endif |
40ef8cbc | 452 | printk("-----------------------------------------------------\n"); |
40ef8cbc | 453 | |
40ef8cbc PM |
454 | DBG(" <- setup_system()\n"); |
455 | } | |
456 | ||
40ef8cbc PM |
457 | #ifdef CONFIG_IRQSTACKS |
458 | static void __init irqstack_early_init(void) | |
459 | { | |
460 | unsigned int i; | |
461 | ||
462 | /* | |
463 | * interrupt stacks must be under 256MB, we cannot afford to take | |
464 | * SLB misses on them. | |
465 | */ | |
0e551954 | 466 | for_each_possible_cpu(i) { |
3c726f8d BH |
467 | softirq_ctx[i] = (struct thread_info *) |
468 | __va(lmb_alloc_base(THREAD_SIZE, | |
469 | THREAD_SIZE, 0x10000000)); | |
470 | hardirq_ctx[i] = (struct thread_info *) | |
471 | __va(lmb_alloc_base(THREAD_SIZE, | |
472 | THREAD_SIZE, 0x10000000)); | |
40ef8cbc PM |
473 | } |
474 | } | |
475 | #else | |
476 | #define irqstack_early_init() | |
477 | #endif | |
478 | ||
479 | /* | |
480 | * Stack space used when we detect a bad kernel stack pointer, and | |
481 | * early in SMP boots before relocation is enabled. | |
482 | */ | |
483 | static void __init emergency_stack_init(void) | |
484 | { | |
485 | unsigned long limit; | |
486 | unsigned int i; | |
487 | ||
488 | /* | |
489 | * Emergency stacks must be under 256MB, we cannot afford to take | |
490 | * SLB misses on them. The ABI also requires them to be 128-byte | |
491 | * aligned. | |
492 | * | |
493 | * Since we use these as temporary stacks during secondary CPU | |
494 | * bringup, we need to get at them in real mode. This means they | |
495 | * must also be within the RMO region. | |
496 | */ | |
497 | limit = min(0x10000000UL, lmb.rmo_size); | |
498 | ||
3243d874 ME |
499 | for_each_possible_cpu(i) { |
500 | unsigned long sp; | |
501 | sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); | |
502 | sp += THREAD_SIZE; | |
503 | paca[i].emergency_sp = __va(sp); | |
504 | } | |
40ef8cbc PM |
505 | } |
506 | ||
40ef8cbc PM |
507 | /* |
508 | * Called into from start_kernel, after lock_kernel has been called. | |
509 | * Initializes bootmem, which is unsed to manage page allocation until | |
510 | * mem_init is called. | |
511 | */ | |
512 | void __init setup_arch(char **cmdline_p) | |
513 | { | |
40ef8cbc PM |
514 | ppc64_boot_msg(0x12, "Setup Arch"); |
515 | ||
516 | *cmdline_p = cmd_line; | |
517 | ||
518 | /* | |
519 | * Set cache line size based on type of cpu as a default. | |
520 | * Systems with OF can look in the properties on the cpu node(s) | |
521 | * for a possibly more accurate value. | |
522 | */ | |
523 | dcache_bsize = ppc64_caches.dline_size; | |
524 | icache_bsize = ppc64_caches.iline_size; | |
525 | ||
526 | /* reboot on panic */ | |
527 | panic_timeout = 180; | |
40ef8cbc PM |
528 | |
529 | if (ppc_md.panic) | |
7e990266 | 530 | setup_panic(); |
40ef8cbc | 531 | |
4846c5de | 532 | init_mm.start_code = (unsigned long)_stext; |
40ef8cbc PM |
533 | init_mm.end_code = (unsigned long) _etext; |
534 | init_mm.end_data = (unsigned long) _edata; | |
535 | init_mm.brk = klimit; | |
536 | ||
537 | irqstack_early_init(); | |
538 | emergency_stack_init(); | |
539 | ||
40ef8cbc PM |
540 | stabs_alloc(); |
541 | ||
542 | /* set up the bootmem stuff with available memory */ | |
543 | do_init_bootmem(); | |
544 | sparse_init(); | |
545 | ||
0458060c PM |
546 | #ifdef CONFIG_DUMMY_CONSOLE |
547 | conswitchp = &dummy_con; | |
548 | #endif | |
549 | ||
38db7e74 GL |
550 | if (ppc_md.setup_arch) |
551 | ppc_md.setup_arch(); | |
40ef8cbc | 552 | |
40ef8cbc PM |
553 | paging_init(); |
554 | ppc64_boot_msg(0x15, "Setup Done"); | |
555 | } | |
556 | ||
557 | ||
558 | /* ToDo: do something useful if ppc_md is not yet setup. */ | |
559 | #define PPC64_LINUX_FUNCTION 0x0f000000 | |
560 | #define PPC64_IPL_MESSAGE 0xc0000000 | |
561 | #define PPC64_TERM_MESSAGE 0xb0000000 | |
562 | ||
563 | static void ppc64_do_msg(unsigned int src, const char *msg) | |
564 | { | |
565 | if (ppc_md.progress) { | |
566 | char buf[128]; | |
567 | ||
568 | sprintf(buf, "%08X\n", src); | |
569 | ppc_md.progress(buf, 0); | |
570 | snprintf(buf, 128, "%s", msg); | |
571 | ppc_md.progress(buf, 0); | |
572 | } | |
573 | } | |
574 | ||
575 | /* Print a boot progress message. */ | |
576 | void ppc64_boot_msg(unsigned int src, const char *msg) | |
577 | { | |
578 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); | |
579 | printk("[boot]%04x %s\n", src, msg); | |
580 | } | |
581 | ||
582 | /* Print a termination message (print only -- does not stop the kernel) */ | |
583 | void ppc64_terminate_msg(unsigned int src, const char *msg) | |
584 | { | |
585 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); | |
586 | printk("[terminate]%04x %s\n", src, msg); | |
587 | } | |
588 | ||
40ef8cbc PM |
589 | void cpu_die(void) |
590 | { | |
591 | if (ppc_md.cpu_die) | |
592 | ppc_md.cpu_die(); | |
593 | } | |
7a0268fa AB |
594 | |
595 | #ifdef CONFIG_SMP | |
596 | void __init setup_per_cpu_areas(void) | |
597 | { | |
598 | int i; | |
599 | unsigned long size; | |
600 | char *ptr; | |
601 | ||
602 | /* Copy section for each CPU (we discard the original) */ | |
b6e3590f | 603 | size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE); |
7a0268fa AB |
604 | #ifdef CONFIG_MODULES |
605 | if (size < PERCPU_ENOUGH_ROOM) | |
606 | size = PERCPU_ENOUGH_ROOM; | |
607 | #endif | |
608 | ||
0e551954 | 609 | for_each_possible_cpu(i) { |
b6e3590f | 610 | ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size); |
7a0268fa AB |
611 | if (!ptr) |
612 | panic("Cannot allocate cpu data for CPU %d\n", i); | |
613 | ||
614 | paca[i].data_offset = ptr - __per_cpu_start; | |
615 | memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); | |
616 | } | |
d5a7430d MT |
617 | |
618 | /* Now that per_cpu is setup, initialize cpu_sibling_map */ | |
619 | smp_setup_cpu_sibling_map(); | |
7a0268fa AB |
620 | } |
621 | #endif | |
4cb3cee0 BH |
622 | |
623 | ||
624 | #ifdef CONFIG_PPC_INDIRECT_IO | |
625 | struct ppc_pci_io ppc_pci_io; | |
626 | EXPORT_SYMBOL(ppc_pci_io); | |
627 | #endif /* CONFIG_PPC_INDIRECT_IO */ | |
628 |