[POWERPC] Add strncmp to arch/ppc
[deliverable/linux.git] / arch / powerpc / kernel / setup_64.c
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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
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15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
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23#include <linux/seq_file.h>
24#include <linux/ioport.h>
25#include <linux/console.h>
26#include <linux/utsname.h>
27#include <linux/tty.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
7a0268fa 34#include <linux/bootmem.h>
12d04eef 35#include <linux/pci.h>
945feb17 36#include <linux/lockdep.h>
d9b2b2a2 37#include <linux/lmb.h>
40ef8cbc 38#include <asm/io.h>
0cc4746c 39#include <asm/kdump.h>
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40#include <asm/prom.h>
41#include <asm/processor.h>
42#include <asm/pgtable.h>
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43#include <asm/smp.h>
44#include <asm/elf.h>
45#include <asm/machdep.h>
46#include <asm/paca.h>
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47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
50#include <asm/btext.h>
51#include <asm/nvram.h>
52#include <asm/setup.h>
53#include <asm/system.h>
54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
40ef8cbc 60#include <asm/firmware.h>
f78541dc 61#include <asm/xmon.h>
dcad47fc 62#include <asm/udbg.h>
593e537b 63#include <asm/kexec.h>
40ef8cbc 64
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65#include "setup.h"
66
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67#ifdef DEBUG
68#define DBG(fmt...) udbg_printf(fmt)
69#else
70#define DBG(fmt...)
71#endif
72
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73int have_of = 1;
74int boot_cpuid = 0;
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75u64 ppc64_pft_size;
76
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77/* Pick defaults since we might want to patch instructions
78 * before we've read this from the device tree.
79 */
80struct ppc64_caches ppc64_caches = {
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81 .dline_size = 0x40,
82 .log_dline_size = 6,
83 .iline_size = 0x40,
84 .log_iline_size = 6
dabcafd3 85};
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86EXPORT_SYMBOL_GPL(ppc64_caches);
87
88/*
89 * These are used in binfmt_elf.c to put aux entries on the stack
90 * for each elf executable being started.
91 */
92int dcache_bsize;
93int icache_bsize;
94int ucache_bsize;
95
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96#ifdef CONFIG_SMP
97
98static int smt_enabled_cmdline;
99
100/* Look for ibm,smt-enabled OF option */
101static void check_smt_enabled(void)
102{
103 struct device_node *dn;
a7f67bdf 104 const char *smt_option;
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105
106 /* Allow the command line to overrule the OF option */
107 if (smt_enabled_cmdline)
108 return;
109
110 dn = of_find_node_by_path("/options");
111
112 if (dn) {
e2eb6392 113 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
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114
115 if (smt_option) {
116 if (!strcmp(smt_option, "on"))
117 smt_enabled_at_boot = 1;
118 else if (!strcmp(smt_option, "off"))
119 smt_enabled_at_boot = 0;
120 }
121 }
122}
123
124/* Look for smt-enabled= cmdline option */
125static int __init early_smt_enabled(char *p)
126{
127 smt_enabled_cmdline = 1;
128
129 if (!p)
130 return 0;
131
132 if (!strcmp(p, "on") || !strcmp(p, "1"))
133 smt_enabled_at_boot = 1;
134 else if (!strcmp(p, "off") || !strcmp(p, "0"))
135 smt_enabled_at_boot = 0;
136
137 return 0;
138}
139early_param("smt-enabled", early_smt_enabled);
140
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141#else
142#define check_smt_enabled()
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143#endif /* CONFIG_SMP */
144
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145/* Put the paca pointer into r13 and SPRG3 */
146void __init setup_paca(int cpu)
147{
148 local_paca = &paca[cpu];
149 mtspr(SPRN_SPRG3, local_paca);
150}
151
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152/*
153 * Early initialization entry point. This is called by head.S
154 * with MMU translation disabled. We rely on the "feature" of
155 * the CPU that ignores the top 2 bits of the address in real
156 * mode so we can access kernel globals normally provided we
157 * only toy with things in the RMO region. From here, we do
158 * some early parsing of the device-tree to setup out LMB
159 * data structures, and allocate & initialize the hash table
160 * and segment tables so we can start running with translation
161 * enabled.
162 *
163 * It is this function which will call the probe() callback of
164 * the various platform types and copy the matching one to the
165 * global ppc_md structure. Your platform can eventually do
166 * some very early initializations from the probe() routine, but
167 * this is not recommended, be very careful as, for example, the
168 * device-tree is not accessible via normal means at this point.
169 */
170
171void __init early_setup(unsigned long dt_ptr)
172{
42c4aaad 173 /* Identify CPU type */
974a76f5 174 identify_cpu(0, mfspr(SPRN_PVR));
42c4aaad 175
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176 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
177 setup_paca(0);
178
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179 /* Enable early debugging if any specified (see udbg.h) */
180 udbg_early_init();
40ef8cbc 181
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182 /* Initialize lockdep early or else spinlocks will blow */
183 lockdep_init();
184
e8222502 185 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
40ef8cbc 186
40ef8cbc 187 /*
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188 * Do early initialization using the flattened device
189 * tree, such as retrieving the physical memory map or
190 * calculating/retrieving the hash table size.
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191 */
192 early_init_devtree(__va(dt_ptr));
193
4df20460 194 /* Now we know the logical id of our boot cpu, setup the paca. */
4ba99b97 195 setup_paca(boot_cpuid);
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196
197 /* Fix up paca fields required for the boot cpu */
198 get_paca()->cpu_start = 1;
199 get_paca()->stab_real = __pa((u64)&initial_stab);
200 get_paca()->stab_addr = (u64)&initial_stab;
201
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202 /* Probe the machine type */
203 probe_machine();
40ef8cbc 204
47310413 205 setup_kdump_trampoline();
0cc4746c 206
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207 DBG("Found, Initializing memory management...\n");
208
209 /*
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210 * Initialize the MMU Hash table and create the linear mapping
211 * of memory. Has to be done before stab/slb initialization as
212 * this is currently where the page size encoding is obtained
40ef8cbc 213 */
3c726f8d 214 htab_initialize();
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215
216 /*
3c726f8d 217 * Initialize stab / SLB management except on iSeries
40ef8cbc 218 */
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219 if (cpu_has_feature(CPU_FTR_SLB))
220 slb_initialize();
221 else if (!firmware_has_feature(FW_FEATURE_ISERIES))
222 stab_initialize(get_paca()->stab_real);
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223
224 DBG(" <- early_setup()\n");
225}
226
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227#ifdef CONFIG_SMP
228void early_setup_secondary(void)
229{
230 struct paca_struct *lpaca = get_paca();
231
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232 /* Mark interrupts enabled in PACA */
233 lpaca->soft_enabled = 0;
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234
235 /* Initialize hash table for that CPU */
236 htab_initialize_secondary();
237
238 /* Initialize STAB/SLB. We use a virtual address as it works
239 * in real mode on pSeries and we want a virutal address on
240 * iSeries anyway
241 */
242 if (cpu_has_feature(CPU_FTR_SLB))
243 slb_initialize();
244 else
245 stab_initialize(lpaca->stab_addr);
246}
247
248#endif /* CONFIG_SMP */
40ef8cbc 249
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250#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
251void smp_release_cpus(void)
252{
253 extern unsigned long __secondary_hold_spinloop;
758438a7 254 unsigned long *ptr;
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255
256 DBG(" -> smp_release_cpus()\n");
257
258 /* All secondary cpus are spinning on a common spinloop, release them
259 * all now so they can start to spin on their individual paca
260 * spinloops. For non SMP kernels, the secondary cpus never get out
261 * of the common spinloop.
262 * This is useless but harmless on iSeries, secondaries are already
263 * waiting on their paca spinloops. */
264
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265 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
266 - PHYSICAL_START);
267 *ptr = 1;
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268 mb();
269
270 DBG(" <- smp_release_cpus()\n");
271}
272#endif /* CONFIG_SMP || CONFIG_KEXEC */
273
40ef8cbc 274/*
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275 * Initialize some remaining members of the ppc64_caches and systemcfg
276 * structures
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277 * (at least until we get rid of them completely). This is mostly some
278 * cache informations about the CPU that will be used by cache flush
279 * routines and/or provided to userland
280 */
281static void __init initialize_cache_info(void)
282{
283 struct device_node *np;
284 unsigned long num_cpus = 0;
285
286 DBG(" -> initialize_cache_info()\n");
287
288 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
289 num_cpus += 1;
290
291 /* We're assuming *all* of the CPUs have the same
292 * d-cache and i-cache sizes... -Peter
293 */
294
295 if ( num_cpus == 1 ) {
a7f67bdf 296 const u32 *sizep, *lsizep;
40ef8cbc 297 u32 size, lsize;
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298
299 size = 0;
300 lsize = cur_cpu_spec->dcache_bsize;
e2eb6392 301 sizep = of_get_property(np, "d-cache-size", NULL);
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302 if (sizep != NULL)
303 size = *sizep;
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304 lsizep = of_get_property(np, "d-cache-block-size", NULL);
305 /* fallback if block size missing */
306 if (lsizep == NULL)
307 lsizep = of_get_property(np, "d-cache-line-size", NULL);
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308 if (lsizep != NULL)
309 lsize = *lsizep;
310 if (sizep == 0 || lsizep == 0)
311 DBG("Argh, can't find dcache properties ! "
312 "sizep: %p, lsizep: %p\n", sizep, lsizep);
313
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314 ppc64_caches.dsize = size;
315 ppc64_caches.dline_size = lsize;
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316 ppc64_caches.log_dline_size = __ilog2(lsize);
317 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
318
319 size = 0;
320 lsize = cur_cpu_spec->icache_bsize;
e2eb6392 321 sizep = of_get_property(np, "i-cache-size", NULL);
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322 if (sizep != NULL)
323 size = *sizep;
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324 lsizep = of_get_property(np, "i-cache-block-size", NULL);
325 if (lsizep == NULL)
326 lsizep = of_get_property(np, "i-cache-line-size", NULL);
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327 if (lsizep != NULL)
328 lsize = *lsizep;
329 if (sizep == 0 || lsizep == 0)
330 DBG("Argh, can't find icache properties ! "
331 "sizep: %p, lsizep: %p\n", sizep, lsizep);
332
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333 ppc64_caches.isize = size;
334 ppc64_caches.iline_size = lsize;
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335 ppc64_caches.log_iline_size = __ilog2(lsize);
336 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
337 }
338 }
339
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340 DBG(" <- initialize_cache_info()\n");
341}
342
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343
344/*
345 * Do some initial setup of the system. The parameters are those which
346 * were passed in from the bootloader.
347 */
348void __init setup_system(void)
349{
350 DBG(" -> setup_system()\n");
351
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352 /* Apply the CPUs-specific and firmware specific fixups to kernel
353 * text (nop out sections not relevant to this CPU or this firmware)
42c4aaad 354 */
0909c8c2 355 do_feature_fixups(cur_cpu_spec->cpu_features,
42c4aaad 356 &__start___ftr_fixup, &__stop___ftr_fixup);
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357 do_feature_fixups(powerpc_firmware_features,
358 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
42c4aaad 359
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360 /*
361 * Unflatten the device-tree passed by prom_init or kexec
362 */
363 unflatten_device_tree();
364
365 /*
366 * Fill the ppc64_caches & systemcfg structures with informations
0ebfff14 367 * retrieved from the device-tree.
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368 */
369 initialize_cache_info();
370
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371 /*
372 * Initialize irq remapping subsystem
373 */
374 irq_early_init();
375
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376#ifdef CONFIG_PPC_RTAS
377 /*
378 * Initialize RTAS if available
379 */
380 rtas_initialize();
381#endif /* CONFIG_PPC_RTAS */
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382
383 /*
384 * Check if we have an initrd provided via the device-tree
385 */
386 check_for_initrd();
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387
388 /*
389 * Do some platform specific early initializations, that includes
390 * setting up the hash table pointers. It also sets up some interrupt-mapping
391 * related options that will be used by finish_device_tree()
392 */
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393 if (ppc_md.init_early)
394 ppc_md.init_early();
40ef8cbc 395
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396 /*
397 * We can discover serial ports now since the above did setup the
398 * hash table management for us, thus ioremap works. We do that early
399 * so that further code can be debugged
400 */
463ce0e1 401 find_legacy_serial_ports();
463ce0e1 402
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403 /*
404 * Register early console
405 */
406 register_early_udbg_console();
40ef8cbc 407
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408 /*
409 * Initialize xmon
410 */
411 xmon_setup();
480f6f35 412
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413 check_smt_enabled();
414 smp_setup_cpu_maps();
40ef8cbc 415
f018b36f 416#ifdef CONFIG_SMP
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417 /* Release secondary cpus out of their spinloops at 0x60 now that
418 * we can map physical -> logical CPU ids
419 */
420 smp_release_cpus();
f018b36f 421#endif
40ef8cbc 422
96b644bd 423 printk("Starting Linux PPC64 %s\n", init_utsname()->version);
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424
425 printk("-----------------------------------------------------\n");
426 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
a7f290da 427 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
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428 if (ppc64_caches.dline_size != 0x80)
429 printk("ppc64_caches.dcache_line_size = 0x%x\n",
430 ppc64_caches.dline_size);
431 if (ppc64_caches.iline_size != 0x80)
432 printk("ppc64_caches.icache_line_size = 0x%x\n",
433 ppc64_caches.iline_size);
434 if (htab_address)
435 printk("htab_address = 0x%p\n", htab_address);
40ef8cbc 436 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
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437#if PHYSICAL_START > 0
438 printk("physical_start = 0x%x\n", PHYSICAL_START);
439#endif
40ef8cbc 440 printk("-----------------------------------------------------\n");
40ef8cbc 441
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442 DBG(" <- setup_system()\n");
443}
444
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445#ifdef CONFIG_IRQSTACKS
446static void __init irqstack_early_init(void)
447{
448 unsigned int i;
449
450 /*
451 * interrupt stacks must be under 256MB, we cannot afford to take
452 * SLB misses on them.
453 */
0e551954 454 for_each_possible_cpu(i) {
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455 softirq_ctx[i] = (struct thread_info *)
456 __va(lmb_alloc_base(THREAD_SIZE,
457 THREAD_SIZE, 0x10000000));
458 hardirq_ctx[i] = (struct thread_info *)
459 __va(lmb_alloc_base(THREAD_SIZE,
460 THREAD_SIZE, 0x10000000));
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461 }
462}
463#else
464#define irqstack_early_init()
465#endif
466
467/*
468 * Stack space used when we detect a bad kernel stack pointer, and
469 * early in SMP boots before relocation is enabled.
470 */
471static void __init emergency_stack_init(void)
472{
473 unsigned long limit;
474 unsigned int i;
475
476 /*
477 * Emergency stacks must be under 256MB, we cannot afford to take
478 * SLB misses on them. The ABI also requires them to be 128-byte
479 * aligned.
480 *
481 * Since we use these as temporary stacks during secondary CPU
482 * bringup, we need to get at them in real mode. This means they
483 * must also be within the RMO region.
484 */
485 limit = min(0x10000000UL, lmb.rmo_size);
486
0e551954 487 for_each_possible_cpu(i)
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488 paca[i].emergency_sp =
489 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
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490}
491
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492/*
493 * Called into from start_kernel, after lock_kernel has been called.
494 * Initializes bootmem, which is unsed to manage page allocation until
495 * mem_init is called.
496 */
497void __init setup_arch(char **cmdline_p)
498{
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499 ppc64_boot_msg(0x12, "Setup Arch");
500
501 *cmdline_p = cmd_line;
502
503 /*
504 * Set cache line size based on type of cpu as a default.
505 * Systems with OF can look in the properties on the cpu node(s)
506 * for a possibly more accurate value.
507 */
508 dcache_bsize = ppc64_caches.dline_size;
509 icache_bsize = ppc64_caches.iline_size;
510
511 /* reboot on panic */
512 panic_timeout = 180;
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513
514 if (ppc_md.panic)
7e990266 515 setup_panic();
40ef8cbc 516
4846c5de 517 init_mm.start_code = (unsigned long)_stext;
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518 init_mm.end_code = (unsigned long) _etext;
519 init_mm.end_data = (unsigned long) _edata;
520 init_mm.brk = klimit;
521
522 irqstack_early_init();
523 emergency_stack_init();
524
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525 stabs_alloc();
526
527 /* set up the bootmem stuff with available memory */
528 do_init_bootmem();
529 sparse_init();
530
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531#ifdef CONFIG_DUMMY_CONSOLE
532 conswitchp = &dummy_con;
533#endif
534
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535 if (ppc_md.setup_arch)
536 ppc_md.setup_arch();
40ef8cbc 537
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538 paging_init();
539 ppc64_boot_msg(0x15, "Setup Done");
540}
541
542
543/* ToDo: do something useful if ppc_md is not yet setup. */
544#define PPC64_LINUX_FUNCTION 0x0f000000
545#define PPC64_IPL_MESSAGE 0xc0000000
546#define PPC64_TERM_MESSAGE 0xb0000000
547
548static void ppc64_do_msg(unsigned int src, const char *msg)
549{
550 if (ppc_md.progress) {
551 char buf[128];
552
553 sprintf(buf, "%08X\n", src);
554 ppc_md.progress(buf, 0);
555 snprintf(buf, 128, "%s", msg);
556 ppc_md.progress(buf, 0);
557 }
558}
559
560/* Print a boot progress message. */
561void ppc64_boot_msg(unsigned int src, const char *msg)
562{
563 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
564 printk("[boot]%04x %s\n", src, msg);
565}
566
567/* Print a termination message (print only -- does not stop the kernel) */
568void ppc64_terminate_msg(unsigned int src, const char *msg)
569{
570 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
571 printk("[terminate]%04x %s\n", src, msg);
572}
573
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574void cpu_die(void)
575{
576 if (ppc_md.cpu_die)
577 ppc_md.cpu_die();
578}
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579
580#ifdef CONFIG_SMP
581void __init setup_per_cpu_areas(void)
582{
583 int i;
584 unsigned long size;
585 char *ptr;
586
587 /* Copy section for each CPU (we discard the original) */
b6e3590f 588 size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE);
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589#ifdef CONFIG_MODULES
590 if (size < PERCPU_ENOUGH_ROOM)
591 size = PERCPU_ENOUGH_ROOM;
592#endif
593
0e551954 594 for_each_possible_cpu(i) {
b6e3590f 595 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
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596 if (!ptr)
597 panic("Cannot allocate cpu data for CPU %d\n", i);
598
599 paca[i].data_offset = ptr - __per_cpu_start;
600 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
601 }
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602
603 /* Now that per_cpu is setup, initialize cpu_sibling_map */
604 smp_setup_cpu_sibling_map();
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605}
606#endif
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607
608
609#ifdef CONFIG_PPC_INDIRECT_IO
610struct ppc_pci_io ppc_pci_io;
611EXPORT_SYMBOL(ppc_pci_io);
612#endif /* CONFIG_PPC_INDIRECT_IO */
613
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