powerpc: ELF2 binaries signal handling
[deliverable/linux.git] / arch / powerpc / kernel / signal_64.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/i386/kernel/signal.c"
6 * Copyright (C) 1991, 1992 Linus Torvalds
7 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
1da177e4
LT
15#include <linux/sched.h>
16#include <linux/mm.h>
17#include <linux/smp.h>
1da177e4
LT
18#include <linux/kernel.h>
19#include <linux/signal.h>
20#include <linux/errno.h>
21#include <linux/wait.h>
22#include <linux/unistd.h>
23#include <linux/stddef.h>
24#include <linux/elf.h>
25#include <linux/ptrace.h>
76462232 26#include <linux/ratelimit.h>
1da177e4
LT
27
28#include <asm/sigcontext.h>
29#include <asm/ucontext.h>
30#include <asm/uaccess.h>
31#include <asm/pgtable.h>
1da177e4
LT
32#include <asm/unistd.h>
33#include <asm/cacheflush.h>
a7f31841 34#include <asm/syscalls.h>
1da177e4 35#include <asm/vdso.h>
ae3a197e 36#include <asm/switch_to.h>
2b0a576d 37#include <asm/tm.h>
1da177e4 38
22e38f29 39#include "signal.h"
1da177e4 40
1da177e4 41#define DEBUG_SIG 0
1da177e4 42
6741f3a7 43#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
1da177e4
LT
44#define FP_REGS_SIZE sizeof(elf_fpregset_t)
45
46#define TRAMP_TRACEBACK 3
47#define TRAMP_SIZE 6
48
49/*
50 * When we have signals to deliver, we set up on the user stack,
51 * going down from the original stack pointer:
52 * 1) a rt_sigframe struct which contains the ucontext
53 * 2) a gap of __SIGNAL_FRAMESIZE bytes which acts as a dummy caller
54 * frame for the signal handler.
55 */
56
57struct rt_sigframe {
58 /* sys_rt_sigreturn requires the ucontext be the first field */
59 struct ucontext uc;
2b0a576d
MN
60#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
61 struct ucontext uc_transact;
62#endif
1da177e4
LT
63 unsigned long _unused[2];
64 unsigned int tramp[TRAMP_SIZE];
29e646df
AV
65 struct siginfo __user *pinfo;
66 void __user *puc;
1da177e4
LT
67 struct siginfo info;
68 /* 64 bit ABI allows for 288 bytes below sp before decrementing it. */
69 char abigap[288];
70} __attribute__ ((aligned (16)));
71
d0c3d534
OJ
72static const char fmt32[] = KERN_INFO \
73 "%s[%d]: bad frame in %s: %08lx nip %08lx lr %08lx\n";
74static const char fmt64[] = KERN_INFO \
75 "%s[%d]: bad frame in %s: %016lx nip %016lx lr %016lx\n";
76
1da177e4
LT
77/*
78 * Set up the sigcontext for the signal frame.
79 */
80
81static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
16c29d18
MN
82 int signr, sigset_t *set, unsigned long handler,
83 int ctx_has_vsx_region)
1da177e4
LT
84{
85 /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
86 * process never used altivec yet (MSR_VEC is zero in pt_regs of
87 * the context). This is very important because we must ensure we
88 * don't lose the VRSAVE content that may have been set prior to
89 * the process doing its first vector operation
48fc7f7e 90 * Userland shall check AT_HWCAP to know whether it can rely on the
1da177e4
LT
91 * v_regs pointer or not
92 */
93#ifdef CONFIG_ALTIVEC
94 elf_vrreg_t __user *v_regs = (elf_vrreg_t __user *)(((unsigned long)sc->vmx_reserve + 15) & ~0xful);
95#endif
0be234a4 96 unsigned long msr = regs->msr;
1da177e4
LT
97 long err = 0;
98
1da177e4
LT
99#ifdef CONFIG_ALTIVEC
100 err |= __put_user(v_regs, &sc->v_regs);
101
102 /* save altivec registers */
103 if (current->thread.used_vr) {
104 flush_altivec_to_thread(current);
105 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
de79f7b9
PM
106 err |= __copy_to_user(v_regs, &current->thread.vr_state,
107 33 * sizeof(vector128));
1da177e4
LT
108 /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg)
109 * contains valid data.
110 */
0be234a4 111 msr |= MSR_VEC;
1da177e4
LT
112 }
113 /* We always copy to/from vrsave, it's 0 if we don't have or don't
114 * use altivec.
115 */
408a7e08
PM
116 if (cpu_has_feature(CPU_FTR_ALTIVEC))
117 current->thread.vrsave = mfspr(SPRN_VRSAVE);
1da177e4
LT
118 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
119#else /* CONFIG_ALTIVEC */
120 err |= __put_user(0, &sc->v_regs);
121#endif /* CONFIG_ALTIVEC */
c6e6771b 122 flush_fp_to_thread(current);
6a274c08
MN
123 /* copy fpr regs and fpscr */
124 err |= copy_fpr_to_user(&sc->fp_regs, current);
c6e6771b 125#ifdef CONFIG_VSX
ce48b210
MN
126 /*
127 * Copy VSX low doubleword to local buffer for formatting,
128 * then out to userspace. Update v_regs to point after the
129 * VMX data.
130 */
16c29d18 131 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 132 __giveup_vsx(current);
ce48b210 133 v_regs += ELF_NVRREG;
6a274c08 134 err |= copy_vsx_to_user(v_regs, current);
ce48b210
MN
135 /* set MSR_VSX in the MSR value in the frame to
136 * indicate that sc->vs_reg) contains valid data.
137 */
138 msr |= MSR_VSX;
139 }
c6e6771b 140#endif /* CONFIG_VSX */
1da177e4 141 err |= __put_user(&sc->gp_regs, &sc->regs);
1bd79336 142 WARN_ON(!FULL_REGS(regs));
1da177e4 143 err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE);
0be234a4 144 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
1da177e4
LT
145 err |= __put_user(signr, &sc->signal);
146 err |= __put_user(handler, &sc->handler);
147 if (set != NULL)
148 err |= __put_user(set->sig[0], &sc->oldmask);
149
150 return err;
151}
152
2b0a576d
MN
153#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
154/*
155 * As above, but Transactional Memory is in use, so deliver sigcontexts
156 * containing checkpointed and transactional register states.
157 *
2b3f8e87
MN
158 * To do this, we treclaim (done before entering here) to gather both sets of
159 * registers and set up the 'normal' sigcontext registers with rolled-back
160 * register values such that a simple signal handler sees a correct
161 * checkpointed register state. If interested, a TM-aware sighandler can
162 * examine the transactional registers in the 2nd sigcontext to determine the
163 * real origin of the signal.
2b0a576d
MN
164 */
165static long setup_tm_sigcontexts(struct sigcontext __user *sc,
166 struct sigcontext __user *tm_sc,
167 struct pt_regs *regs,
168 int signr, sigset_t *set, unsigned long handler)
169{
170 /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the
171 * process never used altivec yet (MSR_VEC is zero in pt_regs of
172 * the context). This is very important because we must ensure we
173 * don't lose the VRSAVE content that may have been set prior to
174 * the process doing its first vector operation
175 * Userland shall check AT_HWCAP to know wether it can rely on the
176 * v_regs pointer or not.
177 */
178#ifdef CONFIG_ALTIVEC
179 elf_vrreg_t __user *v_regs = (elf_vrreg_t __user *)
180 (((unsigned long)sc->vmx_reserve + 15) & ~0xful);
181 elf_vrreg_t __user *tm_v_regs = (elf_vrreg_t __user *)
182 (((unsigned long)tm_sc->vmx_reserve + 15) & ~0xful);
183#endif
184 unsigned long msr = regs->msr;
185 long err = 0;
186
187 BUG_ON(!MSR_TM_ACTIVE(regs->msr));
188
2b0a576d
MN
189 flush_fp_to_thread(current);
190
191#ifdef CONFIG_ALTIVEC
192 err |= __put_user(v_regs, &sc->v_regs);
193 err |= __put_user(tm_v_regs, &tm_sc->v_regs);
194
195 /* save altivec registers */
196 if (current->thread.used_vr) {
197 flush_altivec_to_thread(current);
198 /* Copy 33 vec registers (vr0..31 and vscr) to the stack */
de79f7b9 199 err |= __copy_to_user(v_regs, &current->thread.vr_state,
2b0a576d
MN
200 33 * sizeof(vector128));
201 /* If VEC was enabled there are transactional VRs valid too,
202 * else they're a copy of the checkpointed VRs.
203 */
204 if (msr & MSR_VEC)
205 err |= __copy_to_user(tm_v_regs,
de79f7b9 206 &current->thread.transact_vr,
2b0a576d
MN
207 33 * sizeof(vector128));
208 else
209 err |= __copy_to_user(tm_v_regs,
de79f7b9 210 &current->thread.vr_state,
2b0a576d
MN
211 33 * sizeof(vector128));
212
213 /* set MSR_VEC in the MSR value in the frame to indicate
214 * that sc->v_reg contains valid data.
215 */
216 msr |= MSR_VEC;
217 }
218 /* We always copy to/from vrsave, it's 0 if we don't have or don't
219 * use altivec.
220 */
408a7e08
PM
221 if (cpu_has_feature(CPU_FTR_ALTIVEC))
222 current->thread.vrsave = mfspr(SPRN_VRSAVE);
2b0a576d
MN
223 err |= __put_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
224 if (msr & MSR_VEC)
225 err |= __put_user(current->thread.transact_vrsave,
226 (u32 __user *)&tm_v_regs[33]);
227 else
228 err |= __put_user(current->thread.vrsave,
229 (u32 __user *)&tm_v_regs[33]);
230
231#else /* CONFIG_ALTIVEC */
232 err |= __put_user(0, &sc->v_regs);
233 err |= __put_user(0, &tm_sc->v_regs);
234#endif /* CONFIG_ALTIVEC */
235
236 /* copy fpr regs and fpscr */
237 err |= copy_fpr_to_user(&sc->fp_regs, current);
238 if (msr & MSR_FP)
239 err |= copy_transact_fpr_to_user(&tm_sc->fp_regs, current);
240 else
241 err |= copy_fpr_to_user(&tm_sc->fp_regs, current);
242
243#ifdef CONFIG_VSX
244 /*
245 * Copy VSX low doubleword to local buffer for formatting,
246 * then out to userspace. Update v_regs to point after the
247 * VMX data.
248 */
249 if (current->thread.used_vsr) {
250 __giveup_vsx(current);
251 v_regs += ELF_NVRREG;
252 tm_v_regs += ELF_NVRREG;
253
254 err |= copy_vsx_to_user(v_regs, current);
255
256 if (msr & MSR_VSX)
257 err |= copy_transact_vsx_to_user(tm_v_regs, current);
258 else
259 err |= copy_vsx_to_user(tm_v_regs, current);
260
261 /* set MSR_VSX in the MSR value in the frame to
262 * indicate that sc->vs_reg) contains valid data.
263 */
264 msr |= MSR_VSX;
265 }
266#endif /* CONFIG_VSX */
267
268 err |= __put_user(&sc->gp_regs, &sc->regs);
269 err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs);
270 WARN_ON(!FULL_REGS(regs));
271 err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE);
272 err |= __copy_to_user(&sc->gp_regs,
273 &current->thread.ckpt_regs, GP_REGS_SIZE);
274 err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]);
275 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
276 err |= __put_user(signr, &sc->signal);
277 err |= __put_user(handler, &sc->handler);
278 if (set != NULL)
279 err |= __put_user(set->sig[0], &sc->oldmask);
280
281 return err;
282}
283#endif
284
1da177e4
LT
285/*
286 * Restore the sigcontext from the signal frame.
287 */
288
289static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
290 struct sigcontext __user *sc)
291{
292#ifdef CONFIG_ALTIVEC
293 elf_vrreg_t __user *v_regs;
294#endif
295 unsigned long err = 0;
296 unsigned long save_r13 = 0;
1da177e4 297 unsigned long msr;
6a274c08
MN
298#ifdef CONFIG_VSX
299 int i;
300#endif
1da177e4
LT
301
302 /* If this is not a signal return, we preserve the TLS in r13 */
303 if (!sig)
304 save_r13 = regs->gpr[13];
305
fcbc5a97
SR
306 /* copy the GPRs */
307 err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr));
308 err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]);
fab5db97
PM
309 /* get MSR separately, transfer the LE bit if doing signal return */
310 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
311 if (sig)
312 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
fcbc5a97
SR
313 err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]);
314 err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]);
315 err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]);
316 err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
317 err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
fab5db97 318 /* skip SOFTE */
9a81c16b 319 regs->trap = 0;
fcbc5a97
SR
320 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
321 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
322 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
1da177e4
LT
323
324 if (!sig)
325 regs->gpr[13] = save_r13;
1da177e4
LT
326 if (set != NULL)
327 err |= __get_user(set->sig[0], &sc->oldmask);
328
5388fb10
PM
329 /*
330 * Do this before updating the thread state in
331 * current->thread.fpr/vr. That way, if we get preempted
332 * and another task grabs the FPU/Altivec, it won't be
333 * tempted to save the current CPU state into the thread_struct
334 * and corrupt what we are writing there.
335 */
336 discard_lazy_cpu_state();
337
ae62fbb5
PM
338 /*
339 * Force reload of FP/VEC.
340 * This has to be done before copying stuff into current->thread.fpr/vr
341 * for the reasons explained in the previous comment.
342 */
ce48b210 343 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
ae62fbb5 344
1da177e4
LT
345#ifdef CONFIG_ALTIVEC
346 err |= __get_user(v_regs, &sc->v_regs);
1da177e4
LT
347 if (err)
348 return err;
7c85d1f9
PM
349 if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
350 return -EFAULT;
1da177e4 351 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
b0d436c7 352 if (v_regs != NULL && (msr & MSR_VEC) != 0)
de79f7b9 353 err |= __copy_from_user(&current->thread.vr_state, v_regs,
1da177e4
LT
354 33 * sizeof(vector128));
355 else if (current->thread.used_vr)
de79f7b9 356 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
1da177e4 357 /* Always get VRSAVE back */
b0d436c7 358 if (v_regs != NULL)
1da177e4
LT
359 err |= __get_user(current->thread.vrsave, (u32 __user *)&v_regs[33]);
360 else
361 current->thread.vrsave = 0;
408a7e08
PM
362 if (cpu_has_feature(CPU_FTR_ALTIVEC))
363 mtspr(SPRN_VRSAVE, current->thread.vrsave);
1da177e4 364#endif /* CONFIG_ALTIVEC */
c6e6771b 365 /* restore floating point */
6a274c08
MN
366 err |= copy_fpr_from_user(current, &sc->fp_regs);
367#ifdef CONFIG_VSX
ce48b210
MN
368 /*
369 * Get additional VSX data. Update v_regs to point after the
370 * VMX data. Copy VSX low doubleword from userspace to local
371 * buffer for formatting, then into the taskstruct.
372 */
373 v_regs += ELF_NVRREG;
374 if ((msr & MSR_VSX) != 0)
6a274c08 375 err |= copy_vsx_from_user(current, v_regs);
ce48b210 376 else
6a274c08 377 for (i = 0; i < 32 ; i++)
de79f7b9 378 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b 379#endif
1da177e4
LT
380 return err;
381}
382
2b0a576d
MN
383#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
384/*
385 * Restore the two sigcontexts from the frame of a transactional processes.
386 */
387
388static long restore_tm_sigcontexts(struct pt_regs *regs,
389 struct sigcontext __user *sc,
390 struct sigcontext __user *tm_sc)
391{
392#ifdef CONFIG_ALTIVEC
393 elf_vrreg_t __user *v_regs, *tm_v_regs;
394#endif
395 unsigned long err = 0;
396 unsigned long msr;
397#ifdef CONFIG_VSX
398 int i;
399#endif
400 /* copy the GPRs */
401 err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr));
402 err |= __copy_from_user(&current->thread.ckpt_regs, sc->gp_regs,
403 sizeof(regs->gpr));
404
405 /*
406 * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP.
407 * TEXASR was set by the signal delivery reclaim, as was TFIAR.
408 * Users doing anything abhorrent like thread-switching w/ signals for
409 * TM-Suspended code will have to back TEXASR/TFIAR up themselves.
410 * For the case of getting a signal and simply returning from it,
411 * we don't need to re-copy them here.
412 */
413 err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]);
414 err |= __get_user(current->thread.tm_tfhar, &sc->gp_regs[PT_NIP]);
415
416 /* get MSR separately, transfer the LE bit if doing signal return */
417 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
87b4e539
MN
418 /* pull in MSR TM from user context */
419 regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr & MSR_TS_MASK);
420
421 /* pull in MSR LE from user context */
2b0a576d
MN
422 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
423
424 /* The following non-GPR non-FPR non-VR state is also checkpointed: */
425 err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]);
426 err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]);
427 err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]);
428 err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]);
429 err |= __get_user(current->thread.ckpt_regs.ctr,
430 &sc->gp_regs[PT_CTR]);
431 err |= __get_user(current->thread.ckpt_regs.link,
432 &sc->gp_regs[PT_LNK]);
433 err |= __get_user(current->thread.ckpt_regs.xer,
434 &sc->gp_regs[PT_XER]);
435 err |= __get_user(current->thread.ckpt_regs.ccr,
436 &sc->gp_regs[PT_CCR]);
437
438 /* These regs are not checkpointed; they can go in 'regs'. */
439 err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]);
440 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
441 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
442 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
443
444 /*
445 * Do this before updating the thread state in
446 * current->thread.fpr/vr. That way, if we get preempted
447 * and another task grabs the FPU/Altivec, it won't be
448 * tempted to save the current CPU state into the thread_struct
449 * and corrupt what we are writing there.
450 */
451 discard_lazy_cpu_state();
452
453 /*
454 * Force reload of FP/VEC.
455 * This has to be done before copying stuff into current->thread.fpr/vr
456 * for the reasons explained in the previous comment.
457 */
458 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
459
460#ifdef CONFIG_ALTIVEC
461 err |= __get_user(v_regs, &sc->v_regs);
462 err |= __get_user(tm_v_regs, &tm_sc->v_regs);
463 if (err)
464 return err;
465 if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
466 return -EFAULT;
467 if (tm_v_regs && !access_ok(VERIFY_READ,
468 tm_v_regs, 34 * sizeof(vector128)))
469 return -EFAULT;
470 /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
b0d436c7 471 if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) {
de79f7b9 472 err |= __copy_from_user(&current->thread.vr_state, v_regs,
2b0a576d 473 33 * sizeof(vector128));
de79f7b9 474 err |= __copy_from_user(&current->thread.transact_vr, tm_v_regs,
2b0a576d
MN
475 33 * sizeof(vector128));
476 }
477 else if (current->thread.used_vr) {
de79f7b9
PM
478 memset(&current->thread.vr_state, 0, 33 * sizeof(vector128));
479 memset(&current->thread.transact_vr, 0, 33 * sizeof(vector128));
2b0a576d
MN
480 }
481 /* Always get VRSAVE back */
b0d436c7 482 if (v_regs != NULL && tm_v_regs != NULL) {
2b0a576d
MN
483 err |= __get_user(current->thread.vrsave,
484 (u32 __user *)&v_regs[33]);
485 err |= __get_user(current->thread.transact_vrsave,
486 (u32 __user *)&tm_v_regs[33]);
487 }
488 else {
489 current->thread.vrsave = 0;
490 current->thread.transact_vrsave = 0;
491 }
408a7e08
PM
492 if (cpu_has_feature(CPU_FTR_ALTIVEC))
493 mtspr(SPRN_VRSAVE, current->thread.vrsave);
2b0a576d
MN
494#endif /* CONFIG_ALTIVEC */
495 /* restore floating point */
496 err |= copy_fpr_from_user(current, &sc->fp_regs);
497 err |= copy_transact_fpr_from_user(current, &tm_sc->fp_regs);
498#ifdef CONFIG_VSX
499 /*
500 * Get additional VSX data. Update v_regs to point after the
501 * VMX data. Copy VSX low doubleword from userspace to local
502 * buffer for formatting, then into the taskstruct.
503 */
504 if (v_regs && ((msr & MSR_VSX) != 0)) {
505 v_regs += ELF_NVRREG;
506 tm_v_regs += ELF_NVRREG;
507 err |= copy_vsx_from_user(current, v_regs);
508 err |= copy_transact_vsx_from_user(current, tm_v_regs);
509 } else {
510 for (i = 0; i < 32 ; i++) {
de79f7b9
PM
511 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
512 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0;
2b0a576d
MN
513 }
514 }
515#endif
516 tm_enable();
517 /* This loads the checkpointed FP/VEC state, if used */
518 tm_recheckpoint(&current->thread, msr);
2b0a576d
MN
519
520 /* This loads the speculative FP/VEC state, if used */
521 if (msr & MSR_FP) {
522 do_load_up_transact_fpu(&current->thread);
523 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
524 }
f110c0c1 525#ifdef CONFIG_ALTIVEC
2b0a576d
MN
526 if (msr & MSR_VEC) {
527 do_load_up_transact_altivec(&current->thread);
528 regs->msr |= MSR_VEC;
529 }
f110c0c1 530#endif
2b0a576d
MN
531
532 return err;
533}
534#endif
535
1da177e4
LT
536/*
537 * Setup the trampoline code on the stack
538 */
539static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
540{
541 int i;
542 long err = 0;
543
544 /* addi r1, r1, __SIGNAL_FRAMESIZE # Pop the dummy stackframe */
545 err |= __put_user(0x38210000UL | (__SIGNAL_FRAMESIZE & 0xffff), &tramp[0]);
546 /* li r0, __NR_[rt_]sigreturn| */
547 err |= __put_user(0x38000000UL | (syscall & 0xffff), &tramp[1]);
548 /* sc */
549 err |= __put_user(0x44000002UL, &tramp[2]);
550
551 /* Minimal traceback info */
552 for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++)
553 err |= __put_user(0, &tramp[i]);
554
555 if (!err)
556 flush_icache_range((unsigned long) &tramp[0],
557 (unsigned long) &tramp[TRAMP_SIZE]);
558
559 return err;
560}
561
c1cb299e
MN
562/*
563 * Userspace code may pass a ucontext which doesn't include VSX added
564 * at the end. We need to check for this case.
565 */
566#define UCONTEXTSIZEWITHOUTVSX \
567 (sizeof(struct ucontext) - 32*sizeof(long))
568
1da177e4
LT
569/*
570 * Handle {get,set,swap}_context operations
571 */
572int sys_swapcontext(struct ucontext __user *old_ctx,
573 struct ucontext __user *new_ctx,
574 long ctx_size, long r6, long r7, long r8, struct pt_regs *regs)
575{
576 unsigned char tmp;
577 sigset_t set;
c1cb299e 578 unsigned long new_msr = 0;
16c29d18 579 int ctx_has_vsx_region = 0;
1da177e4 580
c1cb299e 581 if (new_ctx &&
16c29d18 582 get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR]))
c1cb299e
MN
583 return -EFAULT;
584 /*
585 * Check that the context is not smaller than the original
586 * size (with VMX but without VSX)
1da177e4 587 */
c1cb299e 588 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1da177e4 589 return -EINVAL;
c1cb299e
MN
590 /*
591 * If the new context state sets the MSR VSX bits but
592 * it doesn't provide VSX state.
593 */
594 if ((ctx_size < sizeof(struct ucontext)) &&
595 (new_msr & MSR_VSX))
596 return -EINVAL;
16c29d18
MN
597 /* Does the context have enough room to store VSX data? */
598 if (ctx_size >= sizeof(struct ucontext))
599 ctx_has_vsx_region = 1;
600
1da177e4 601 if (old_ctx != NULL) {
16c29d18
MN
602 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
603 || setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0,
604 ctx_has_vsx_region)
1da177e4
LT
605 || __copy_to_user(&old_ctx->uc_sigmask,
606 &current->blocked, sizeof(sigset_t)))
607 return -EFAULT;
608 }
609 if (new_ctx == NULL)
610 return 0;
16c29d18 611 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 612 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 613 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
614 return -EFAULT;
615
616 /*
617 * If we get a fault copying the context into the kernel's
618 * image of the user's registers, we can't just return -EFAULT
619 * because the user's registers will be corrupted. For instance
620 * the NIP value may have been updated but not some of the
621 * other registers. Given that we have done the access_ok
622 * and successfully read the first and last bytes of the region
623 * above, this should only happen in an out-of-memory situation
624 * or if another thread unmaps the region containing the context.
625 * We kill the task with a SIGSEGV in this situation.
626 */
627
628 if (__copy_from_user(&set, &new_ctx->uc_sigmask, sizeof(set)))
629 do_exit(SIGSEGV);
17440f17 630 set_current_blocked(&set);
1da177e4
LT
631 if (restore_sigcontext(regs, NULL, 0, &new_ctx->uc_mcontext))
632 do_exit(SIGSEGV);
633
634 /* This returns like rt_sigreturn */
401d1f02 635 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
636 return 0;
637}
638
639
640/*
641 * Do a signal return; undo the signal stack.
642 */
643
644int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
645 unsigned long r6, unsigned long r7, unsigned long r8,
646 struct pt_regs *regs)
647{
648 struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1];
649 sigset_t set;
2b0a576d
MN
650#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
651 unsigned long msr;
652#endif
1da177e4
LT
653
654 /* Always make any pending restarted system calls return -EINTR */
655 current_thread_info()->restart_block.fn = do_no_restart_syscall;
656
657 if (!access_ok(VERIFY_READ, uc, sizeof(*uc)))
658 goto badframe;
659
660 if (__copy_from_user(&set, &uc->uc_sigmask, sizeof(set)))
661 goto badframe;
17440f17 662 set_current_blocked(&set);
2b0a576d
MN
663#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
664 if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR]))
665 goto badframe;
87b4e539 666 if (MSR_TM_ACTIVE(msr)) {
2b0a576d
MN
667 /* We recheckpoint on return. */
668 struct ucontext __user *uc_transact;
669 if (__get_user(uc_transact, &uc->uc_link))
670 goto badframe;
671 if (restore_tm_sigcontexts(regs, &uc->uc_mcontext,
672 &uc_transact->uc_mcontext))
673 goto badframe;
674 }
675 else
676 /* Fall through, for non-TM restore */
677#endif
1da177e4
LT
678 if (restore_sigcontext(regs, NULL, 1, &uc->uc_mcontext))
679 goto badframe;
680
7cce2465
AV
681 if (restore_altstack(&uc->uc_stack))
682 goto badframe;
1da177e4 683
401d1f02
DW
684 set_thread_flag(TIF_RESTOREALL);
685 return 0;
1da177e4
LT
686
687badframe:
688#if DEBUG_SIG
689 printk("badframe in sys_rt_sigreturn, regs=%p uc=%p &uc->uc_mcontext=%p\n",
690 regs, uc, &uc->uc_mcontext);
691#endif
76462232
CD
692 if (show_unhandled_signals)
693 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
694 current->comm, current->pid, "rt_sigreturn",
695 (long)uc, regs->nip, regs->link);
d0c3d534 696
1da177e4
LT
697 force_sig(SIGSEGV, current);
698 return 0;
699}
700
f478f543 701int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
1da177e4
LT
702 sigset_t *set, struct pt_regs *regs)
703{
1da177e4
LT
704 struct rt_sigframe __user *frame;
705 unsigned long newsp = 0;
706 long err = 0;
707
2b3f8e87 708 frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 0);
a3f61dc0 709 if (unlikely(frame == NULL))
1da177e4
LT
710 goto badframe;
711
712 err |= __put_user(&frame->info, &frame->pinfo);
713 err |= __put_user(&frame->uc, &frame->puc);
714 err |= copy_siginfo_to_user(&frame->info, info);
715 if (err)
716 goto badframe;
717
718 /* Create the ucontext. */
719 err |= __put_user(0, &frame->uc.uc_flags);
7cce2465 720 err |= __save_altstack(&frame->uc.uc_stack, regs->gpr[1]);
2b0a576d
MN
721#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
722 if (MSR_TM_ACTIVE(regs->msr)) {
723 /* The ucontext_t passed to userland points to the second
724 * ucontext_t (for transactional state) with its uc_link ptr.
725 */
726 err |= __put_user(&frame->uc_transact, &frame->uc.uc_link);
727 err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext,
728 &frame->uc_transact.uc_mcontext,
729 regs, signr,
730 NULL,
731 (unsigned long)ka->sa.sa_handler);
732 } else
733#endif
734 {
735 err |= __put_user(0, &frame->uc.uc_link);
736 err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, signr,
737 NULL, (unsigned long)ka->sa.sa_handler,
738 1);
739 }
1da177e4
LT
740 err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
741 if (err)
742 goto badframe;
743
cc657f53 744 /* Make sure signal handler doesn't get spurious FP exceptions */
de79f7b9 745 current->thread.fp_state.fpscr = 0;
2b0a576d
MN
746#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
747 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
748 * just indicates to userland that we were doing a transaction, but we
749 * don't want to return in transactional state:
750 */
751 regs->msr &= ~MSR_TS_MASK;
752#endif
cc657f53 753
1da177e4 754 /* Set up to return from userspace. */
a5bba930
BH
755 if (vdso64_rt_sigtramp && current->mm->context.vdso_base) {
756 regs->link = current->mm->context.vdso_base + vdso64_rt_sigtramp;
1da177e4
LT
757 } else {
758 err |= setup_trampoline(__NR_rt_sigreturn, &frame->tramp[0]);
759 if (err)
760 goto badframe;
761 regs->link = (unsigned long) &frame->tramp[0];
762 }
1da177e4
LT
763
764 /* Allocate a dummy caller frame for the signal handler. */
a3f61dc0 765 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
1da177e4
LT
766 err |= put_user(regs->gpr[1], (unsigned long __user *)newsp);
767
768 /* Set up "regs" so we "return" to the signal handler. */
d606b92a
RR
769 if (is_elf2_task()) {
770 regs->nip = (unsigned long) ka->sa.sa_handler;
771 regs->gpr[12] = regs->nip;
772 } else {
773 /* Handler is *really* a pointer to the function descriptor for
774 * the signal routine. The first entry in the function
775 * descriptor is the entry address of signal and the second
776 * entry is the TOC value we need to use.
777 */
778 func_descr_t __user *funct_desc_ptr =
779 (func_descr_t __user *) ka->sa.sa_handler;
780
781 err |= get_user(regs->nip, &funct_desc_ptr->entry);
782 err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
783 }
784
e871c6bb 785 /* enter the signal handler in native-endian mode */
fab5db97 786 regs->msr &= ~MSR_LE;
e871c6bb 787 regs->msr |= (MSR_KERNEL & MSR_LE);
1da177e4 788 regs->gpr[1] = newsp;
1da177e4
LT
789 regs->gpr[3] = signr;
790 regs->result = 0;
791 if (ka->sa.sa_flags & SA_SIGINFO) {
792 err |= get_user(regs->gpr[4], (unsigned long __user *)&frame->pinfo);
793 err |= get_user(regs->gpr[5], (unsigned long __user *)&frame->puc);
794 regs->gpr[6] = (unsigned long) frame;
795 } else {
796 regs->gpr[4] = (unsigned long)&frame->uc.uc_mcontext;
797 }
798 if (err)
799 goto badframe;
800
1da177e4
LT
801 return 1;
802
803badframe:
804#if DEBUG_SIG
805 printk("badframe in setup_rt_frame, regs=%p frame=%p newsp=%lx\n",
806 regs, frame, newsp);
807#endif
76462232
CD
808 if (show_unhandled_signals)
809 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
810 current->comm, current->pid, "setup_rt_frame",
811 (long)frame, regs->nip, regs->link);
d0c3d534 812
1da177e4
LT
813 force_sigsegv(signr, current);
814 return 0;
815}
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