Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 | 20 | #include <linux/kernel.h> |
4b16f8e2 | 21 | #include <linux/export.h> |
1da177e4 LT |
22 | #include <linux/sched.h> |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
8a25a2fd | 30 | #include <linux/device.h> |
1da177e4 LT |
31 | #include <linux/cpu.h> |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
60063497 | 36 | #include <linux/atomic.h> |
1da177e4 | 37 | #include <asm/irq.h> |
1b67bee1 | 38 | #include <asm/hw_irq.h> |
441c19c8 | 39 | #include <asm/kvm_ppc.h> |
1da177e4 LT |
40 | #include <asm/page.h> |
41 | #include <asm/pgtable.h> | |
42 | #include <asm/prom.h> | |
43 | #include <asm/smp.h> | |
1da177e4 LT |
44 | #include <asm/time.h> |
45 | #include <asm/machdep.h> | |
e2075f79 | 46 | #include <asm/cputhreads.h> |
1da177e4 | 47 | #include <asm/cputable.h> |
bbeb3f4c | 48 | #include <asm/mpic.h> |
a7f290da | 49 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
50 | #ifdef CONFIG_PPC64 |
51 | #include <asm/paca.h> | |
52 | #endif | |
18ad51dd | 53 | #include <asm/vdso.h> |
ae3a197e | 54 | #include <asm/debug.h> |
5ad57078 | 55 | |
1da177e4 | 56 | #ifdef DEBUG |
f9e4ec57 | 57 | #include <asm/udbg.h> |
1da177e4 LT |
58 | #define DBG(fmt...) udbg_printf(fmt) |
59 | #else | |
60 | #define DBG(fmt...) | |
61 | #endif | |
62 | ||
c56e5853 | 63 | #ifdef CONFIG_HOTPLUG_CPU |
fb82b839 BH |
64 | /* State of each CPU during hotplug phases */ |
65 | static DEFINE_PER_CPU(int, cpu_state) = { 0 }; | |
c56e5853 BH |
66 | #endif |
67 | ||
f9e4ec57 ME |
68 | struct thread_info *secondary_ti; |
69 | ||
cc1ba8ea AB |
70 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
71 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 72 | |
d5a7430d | 73 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 74 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 75 | |
5ad57078 | 76 | /* SMP operations for this machine */ |
1da177e4 LT |
77 | struct smp_ops_t *smp_ops; |
78 | ||
7ccbe504 BH |
79 | /* Can't be static due to PowerMac hackery */ |
80 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 81 | |
1da177e4 LT |
82 | int smt_enabled_at_boot = 1; |
83 | ||
cc532915 ME |
84 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
85 | ||
3cd85250 AF |
86 | /* |
87 | * Returns 1 if the specified cpu should be brought up during boot. | |
88 | * Used to inhibit booting threads if they've been disabled or | |
89 | * limited on the command line | |
90 | */ | |
91 | int smp_generic_cpu_bootable(unsigned int nr) | |
92 | { | |
93 | /* Special case - we inhibit secondary thread startup | |
94 | * during boot if the user requests it. | |
95 | */ | |
96 | if (system_state == SYSTEM_BOOTING && cpu_has_feature(CPU_FTR_SMT)) { | |
97 | if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0) | |
98 | return 0; | |
99 | if (smt_enabled_at_boot | |
100 | && cpu_thread_in_core(nr) >= smt_enabled_at_boot) | |
101 | return 0; | |
102 | } | |
103 | ||
104 | return 1; | |
105 | } | |
106 | ||
107 | ||
5ad57078 | 108 | #ifdef CONFIG_PPC64 |
cad5cef6 | 109 | int smp_generic_kick_cpu(int nr) |
1da177e4 LT |
110 | { |
111 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
112 | ||
113 | /* | |
114 | * The processor is currently spinning, waiting for the | |
115 | * cpu_start field to become non-zero After we set cpu_start, | |
116 | * the processor will continue on to secondary_start | |
117 | */ | |
fb82b839 BH |
118 | if (!paca[nr].cpu_start) { |
119 | paca[nr].cpu_start = 1; | |
120 | smp_mb(); | |
121 | return 0; | |
122 | } | |
123 | ||
124 | #ifdef CONFIG_HOTPLUG_CPU | |
125 | /* | |
126 | * Ok it's not there, so it might be soft-unplugged, let's | |
127 | * try to bring it back | |
128 | */ | |
ae5cab47 | 129 | generic_set_cpu_up(nr); |
fb82b839 BH |
130 | smp_wmb(); |
131 | smp_send_reschedule(nr); | |
132 | #endif /* CONFIG_HOTPLUG_CPU */ | |
de300974 ME |
133 | |
134 | return 0; | |
1da177e4 | 135 | } |
fb82b839 | 136 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 137 | |
25ddd738 MM |
138 | static irqreturn_t call_function_action(int irq, void *data) |
139 | { | |
140 | generic_smp_call_function_interrupt(); | |
141 | return IRQ_HANDLED; | |
142 | } | |
143 | ||
144 | static irqreturn_t reschedule_action(int irq, void *data) | |
145 | { | |
184748cc | 146 | scheduler_ipi(); |
25ddd738 MM |
147 | return IRQ_HANDLED; |
148 | } | |
149 | ||
1b67bee1 | 150 | static irqreturn_t tick_broadcast_ipi_action(int irq, void *data) |
25ddd738 | 151 | { |
1b67bee1 | 152 | tick_broadcast_ipi_handler(); |
25ddd738 MM |
153 | return IRQ_HANDLED; |
154 | } | |
155 | ||
7ef71d75 | 156 | static irqreturn_t debug_ipi_action(int irq, void *data) |
25ddd738 | 157 | { |
23d72bfd MM |
158 | if (crash_ipi_function_ptr) { |
159 | crash_ipi_function_ptr(get_irq_regs()); | |
160 | return IRQ_HANDLED; | |
161 | } | |
162 | ||
163 | #ifdef CONFIG_DEBUGGER | |
164 | debugger_ipi(get_irq_regs()); | |
165 | #endif /* CONFIG_DEBUGGER */ | |
166 | ||
25ddd738 MM |
167 | return IRQ_HANDLED; |
168 | } | |
169 | ||
170 | static irq_handler_t smp_ipi_action[] = { | |
171 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
172 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
1b67bee1 | 173 | [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action, |
25ddd738 MM |
174 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, |
175 | }; | |
176 | ||
177 | const char *smp_ipi_name[] = { | |
178 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
179 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
1b67bee1 | 180 | [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast", |
25ddd738 MM |
181 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", |
182 | }; | |
183 | ||
184 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
185 | int smp_request_message_ipi(int virq, int msg) | |
186 | { | |
187 | int err; | |
188 | ||
189 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
190 | return -EINVAL; | |
191 | } | |
192 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
193 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
194 | return 1; | |
195 | } | |
196 | #endif | |
3b5e16d7 | 197 | err = request_irq(virq, smp_ipi_action[msg], |
e6651de9 | 198 | IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND, |
b0d436c7 | 199 | smp_ipi_name[msg], NULL); |
25ddd738 MM |
200 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", |
201 | virq, smp_ipi_name[msg], err); | |
202 | ||
203 | return err; | |
204 | } | |
205 | ||
1ece355b | 206 | #ifdef CONFIG_PPC_SMP_MUXED_IPI |
23d72bfd | 207 | struct cpu_messages { |
71454272 | 208 | int messages; /* current messages */ |
23d72bfd MM |
209 | unsigned long data; /* data for cause ipi */ |
210 | }; | |
211 | static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message); | |
212 | ||
213 | void smp_muxed_ipi_set_data(int cpu, unsigned long data) | |
214 | { | |
215 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
216 | ||
217 | info->data = data; | |
218 | } | |
219 | ||
220 | void smp_muxed_ipi_message_pass(int cpu, int msg) | |
221 | { | |
222 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
71454272 | 223 | char *message = (char *)&info->messages; |
23d72bfd | 224 | |
9fb1b36c PM |
225 | /* |
226 | * Order previous accesses before accesses in the IPI handler. | |
227 | */ | |
228 | smp_mb(); | |
71454272 | 229 | message[msg] = 1; |
9fb1b36c PM |
230 | /* |
231 | * cause_ipi functions are required to include a full barrier | |
232 | * before doing whatever causes the IPI. | |
233 | */ | |
23d72bfd MM |
234 | smp_ops->cause_ipi(cpu, info->data); |
235 | } | |
236 | ||
0654de1c AB |
237 | #ifdef __BIG_ENDIAN__ |
238 | #define IPI_MESSAGE(A) (1 << (24 - 8 * (A))) | |
239 | #else | |
240 | #define IPI_MESSAGE(A) (1 << (8 * (A))) | |
241 | #endif | |
242 | ||
23d72bfd MM |
243 | irqreturn_t smp_ipi_demux(void) |
244 | { | |
245 | struct cpu_messages *info = &__get_cpu_var(ipi_message); | |
71454272 | 246 | unsigned int all; |
23d72bfd MM |
247 | |
248 | mb(); /* order any irq clear */ | |
71454272 MM |
249 | |
250 | do { | |
9fb1b36c | 251 | all = xchg(&info->messages, 0); |
0654de1c | 252 | if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION)) |
23d72bfd | 253 | generic_smp_call_function_interrupt(); |
0654de1c | 254 | if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE)) |
880102e7 | 255 | scheduler_ipi(); |
1b67bee1 SB |
256 | if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST)) |
257 | tick_broadcast_ipi_handler(); | |
0654de1c | 258 | if (all & IPI_MESSAGE(PPC_MSG_DEBUGGER_BREAK)) |
23d72bfd | 259 | debug_ipi_action(0, NULL); |
71454272 MM |
260 | } while (info->messages); |
261 | ||
23d72bfd MM |
262 | return IRQ_HANDLED; |
263 | } | |
1ece355b | 264 | #endif /* CONFIG_PPC_SMP_MUXED_IPI */ |
23d72bfd | 265 | |
9ca980dc PM |
266 | static inline void do_message_pass(int cpu, int msg) |
267 | { | |
268 | if (smp_ops->message_pass) | |
269 | smp_ops->message_pass(cpu, msg); | |
270 | #ifdef CONFIG_PPC_SMP_MUXED_IPI | |
271 | else | |
272 | smp_muxed_ipi_message_pass(cpu, msg); | |
273 | #endif | |
274 | } | |
275 | ||
1da177e4 LT |
276 | void smp_send_reschedule(int cpu) |
277 | { | |
8cffc6ac | 278 | if (likely(smp_ops)) |
9ca980dc | 279 | do_message_pass(cpu, PPC_MSG_RESCHEDULE); |
1da177e4 | 280 | } |
de56a948 | 281 | EXPORT_SYMBOL_GPL(smp_send_reschedule); |
1da177e4 | 282 | |
b7d7a240 JA |
283 | void arch_send_call_function_single_ipi(int cpu) |
284 | { | |
402d9a1e | 285 | do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
b7d7a240 JA |
286 | } |
287 | ||
f063ea02 | 288 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
289 | { |
290 | unsigned int cpu; | |
291 | ||
f063ea02 | 292 | for_each_cpu(cpu, mask) |
9ca980dc | 293 | do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
b7d7a240 JA |
294 | } |
295 | ||
1b67bee1 SB |
296 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
297 | void tick_broadcast(const struct cpumask *mask) | |
298 | { | |
299 | unsigned int cpu; | |
300 | ||
301 | for_each_cpu(cpu, mask) | |
302 | do_message_pass(cpu, PPC_MSG_TICK_BROADCAST); | |
303 | } | |
304 | #endif | |
305 | ||
e0476371 MM |
306 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
307 | void smp_send_debugger_break(void) | |
1da177e4 | 308 | { |
e0476371 MM |
309 | int cpu; |
310 | int me = raw_smp_processor_id(); | |
311 | ||
312 | if (unlikely(!smp_ops)) | |
313 | return; | |
314 | ||
315 | for_each_online_cpu(cpu) | |
316 | if (cpu != me) | |
9ca980dc | 317 | do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); |
1da177e4 LT |
318 | } |
319 | #endif | |
320 | ||
cc532915 ME |
321 | #ifdef CONFIG_KEXEC |
322 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
323 | { | |
324 | crash_ipi_function_ptr = crash_ipi_callback; | |
e0476371 | 325 | if (crash_ipi_callback) { |
cc532915 | 326 | mb(); |
e0476371 | 327 | smp_send_debugger_break(); |
cc532915 ME |
328 | } |
329 | } | |
330 | #endif | |
331 | ||
1da177e4 LT |
332 | static void stop_this_cpu(void *dummy) |
333 | { | |
8389b37d VB |
334 | /* Remove this CPU */ |
335 | set_cpu_online(smp_processor_id(), false); | |
336 | ||
1da177e4 LT |
337 | local_irq_disable(); |
338 | while (1) | |
339 | ; | |
340 | } | |
341 | ||
8fd7675c SS |
342 | void smp_send_stop(void) |
343 | { | |
8691e5a8 | 344 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
345 | } |
346 | ||
1da177e4 LT |
347 | struct thread_info *current_set[NR_CPUS]; |
348 | ||
cad5cef6 | 349 | static void smp_store_cpu_info(int id) |
1da177e4 | 350 | { |
6b7487fc | 351 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
3160b097 BB |
352 | #ifdef CONFIG_PPC_FSL_BOOK3E |
353 | per_cpu(next_tlbcam_idx, id) | |
354 | = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; | |
355 | #endif | |
1da177e4 LT |
356 | } |
357 | ||
1da177e4 LT |
358 | void __init smp_prepare_cpus(unsigned int max_cpus) |
359 | { | |
360 | unsigned int cpu; | |
361 | ||
362 | DBG("smp_prepare_cpus\n"); | |
363 | ||
364 | /* | |
365 | * setup_cpu may need to be called on the boot cpu. We havent | |
366 | * spun any cpus up but lets be paranoid. | |
367 | */ | |
368 | BUG_ON(boot_cpuid != smp_processor_id()); | |
369 | ||
370 | /* Fixup boot cpu */ | |
371 | smp_store_cpu_info(boot_cpuid); | |
372 | cpu_callin_map[boot_cpuid] = 1; | |
373 | ||
cc1ba8ea AB |
374 | for_each_possible_cpu(cpu) { |
375 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
376 | GFP_KERNEL, cpu_to_node(cpu)); | |
377 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
378 | GFP_KERNEL, cpu_to_node(cpu)); | |
379 | } | |
380 | ||
381 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
382 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
383 | ||
dfee0efe CG |
384 | if (smp_ops && smp_ops->probe) |
385 | smp_ops->probe(); | |
1da177e4 LT |
386 | } |
387 | ||
cad5cef6 | 388 | void smp_prepare_boot_cpu(void) |
1da177e4 LT |
389 | { |
390 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 391 | #ifdef CONFIG_PPC64 |
1da177e4 | 392 | paca[boot_cpuid].__current = current; |
5ad57078 | 393 | #endif |
8c272261 | 394 | set_numa_node(numa_cpu_lookup_table[boot_cpuid]); |
b5e2fc1c | 395 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
396 | } |
397 | ||
398 | #ifdef CONFIG_HOTPLUG_CPU | |
1da177e4 LT |
399 | |
400 | int generic_cpu_disable(void) | |
401 | { | |
402 | unsigned int cpu = smp_processor_id(); | |
403 | ||
404 | if (cpu == boot_cpuid) | |
405 | return -EBUSY; | |
406 | ||
ea0f1cab | 407 | set_cpu_online(cpu, false); |
799d6046 | 408 | #ifdef CONFIG_PPC64 |
a7f290da | 409 | vdso_data->processorCount--; |
094fe2e7 | 410 | #endif |
1c91cc57 | 411 | migrate_irqs(); |
1da177e4 LT |
412 | return 0; |
413 | } | |
414 | ||
1da177e4 LT |
415 | void generic_cpu_die(unsigned int cpu) |
416 | { | |
417 | int i; | |
418 | ||
419 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 420 | smp_rmb(); |
1da177e4 LT |
421 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
422 | return; | |
423 | msleep(100); | |
424 | } | |
425 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
426 | } | |
427 | ||
428 | void generic_mach_cpu_die(void) | |
429 | { | |
430 | unsigned int cpu; | |
431 | ||
432 | local_irq_disable(); | |
4fcb8833 | 433 | idle_task_exit(); |
1da177e4 LT |
434 | cpu = smp_processor_id(); |
435 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
436 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 437 | smp_wmb(); |
1da177e4 LT |
438 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
439 | cpu_relax(); | |
1da177e4 | 440 | } |
105765f4 BH |
441 | |
442 | void generic_set_cpu_dead(unsigned int cpu) | |
443 | { | |
444 | per_cpu(cpu_state, cpu) = CPU_DEAD; | |
445 | } | |
fb82b839 | 446 | |
ae5cab47 ZC |
447 | /* |
448 | * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise | |
449 | * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(), | |
450 | * which makes the delay in generic_cpu_die() not happen. | |
451 | */ | |
452 | void generic_set_cpu_up(unsigned int cpu) | |
453 | { | |
454 | per_cpu(cpu_state, cpu) = CPU_UP_PREPARE; | |
455 | } | |
456 | ||
fb82b839 BH |
457 | int generic_check_cpu_restart(unsigned int cpu) |
458 | { | |
459 | return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE; | |
460 | } | |
512691d4 | 461 | |
441c19c8 | 462 | static bool secondaries_inhibited(void) |
512691d4 | 463 | { |
441c19c8 | 464 | return kvm_hv_mode_active(); |
512691d4 PM |
465 | } |
466 | ||
467 | #else /* HOTPLUG_CPU */ | |
468 | ||
469 | #define secondaries_inhibited() 0 | |
470 | ||
1da177e4 LT |
471 | #endif |
472 | ||
17e32eac | 473 | static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle) |
c56e5853 | 474 | { |
17e32eac | 475 | struct thread_info *ti = task_thread_info(idle); |
c56e5853 BH |
476 | |
477 | #ifdef CONFIG_PPC64 | |
17e32eac | 478 | paca[cpu].__current = idle; |
c56e5853 BH |
479 | paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD; |
480 | #endif | |
481 | ti->cpu = cpu; | |
17e32eac | 482 | secondary_ti = current_set[cpu] = ti; |
c56e5853 BH |
483 | } |
484 | ||
061d19f2 | 485 | int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 486 | { |
c56e5853 | 487 | int rc, c; |
1da177e4 | 488 | |
512691d4 PM |
489 | /* |
490 | * Don't allow secondary threads to come online if inhibited | |
491 | */ | |
492 | if (threads_per_core > 1 && secondaries_inhibited() && | |
6f5e40a3 | 493 | cpu_thread_in_subcore(cpu)) |
512691d4 PM |
494 | return -EBUSY; |
495 | ||
8cffc6ac BH |
496 | if (smp_ops == NULL || |
497 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
498 | return -EINVAL; |
499 | ||
17e32eac | 500 | cpu_idle_thread_init(cpu, tidle); |
c560bbce | 501 | |
1da177e4 LT |
502 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
503 | * hotplug | |
504 | */ | |
505 | cpu_callin_map[cpu] = 0; | |
506 | ||
507 | /* The information for processor bringup must | |
508 | * be written out to main store before we release | |
509 | * the processor. | |
510 | */ | |
0d8d4d42 | 511 | smp_mb(); |
1da177e4 LT |
512 | |
513 | /* wake up cpus */ | |
514 | DBG("smp: kicking cpu %d\n", cpu); | |
de300974 ME |
515 | rc = smp_ops->kick_cpu(cpu); |
516 | if (rc) { | |
517 | pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc); | |
518 | return rc; | |
519 | } | |
1da177e4 LT |
520 | |
521 | /* | |
522 | * wait to see if the cpu made a callin (is actually up). | |
523 | * use this value that I found through experimentation. | |
524 | * -- Cort | |
525 | */ | |
526 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 527 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
528 | udelay(100); |
529 | #ifdef CONFIG_HOTPLUG_CPU | |
530 | else | |
531 | /* | |
532 | * CPUs can take much longer to come up in the | |
533 | * hotplug case. Wait five seconds. | |
534 | */ | |
67764263 GS |
535 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
536 | msleep(1); | |
1da177e4 LT |
537 | #endif |
538 | ||
539 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 540 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
541 | return -ENOENT; |
542 | } | |
543 | ||
6685a477 | 544 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
545 | |
546 | if (smp_ops->give_timebase) | |
547 | smp_ops->give_timebase(); | |
548 | ||
549 | /* Wait until cpu puts itself in the online map */ | |
550 | while (!cpu_online(cpu)) | |
551 | cpu_relax(); | |
552 | ||
553 | return 0; | |
554 | } | |
555 | ||
e9efed3b NL |
556 | /* Return the value of the reg property corresponding to the given |
557 | * logical cpu. | |
558 | */ | |
559 | int cpu_to_core_id(int cpu) | |
560 | { | |
561 | struct device_node *np; | |
f8a1883a | 562 | const __be32 *reg; |
e9efed3b NL |
563 | int id = -1; |
564 | ||
565 | np = of_get_cpu_node(cpu, NULL); | |
566 | if (!np) | |
567 | goto out; | |
568 | ||
569 | reg = of_get_property(np, "reg", NULL); | |
570 | if (!reg) | |
571 | goto out; | |
572 | ||
f8a1883a | 573 | id = be32_to_cpup(reg); |
e9efed3b NL |
574 | out: |
575 | of_node_put(np); | |
576 | return id; | |
577 | } | |
578 | ||
99d86705 VS |
579 | /* Helper routines for cpu to core mapping */ |
580 | int cpu_core_index_of_thread(int cpu) | |
581 | { | |
582 | return cpu >> threads_shift; | |
583 | } | |
584 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
585 | ||
586 | int cpu_first_thread_of_core(int core) | |
587 | { | |
588 | return core << threads_shift; | |
589 | } | |
590 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
591 | ||
256f2d4b PM |
592 | static void traverse_siblings_chip_id(int cpu, bool add, int chipid) |
593 | { | |
594 | const struct cpumask *mask; | |
595 | struct device_node *np; | |
596 | int i, plen; | |
597 | const __be32 *prop; | |
598 | ||
599 | mask = add ? cpu_online_mask : cpu_present_mask; | |
600 | for_each_cpu(i, mask) { | |
601 | np = of_get_cpu_node(i, NULL); | |
602 | if (!np) | |
603 | continue; | |
604 | prop = of_get_property(np, "ibm,chip-id", &plen); | |
605 | if (prop && plen == sizeof(int) && | |
606 | of_read_number(prop, 1) == chipid) { | |
607 | if (add) { | |
608 | cpumask_set_cpu(cpu, cpu_core_mask(i)); | |
609 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
610 | } else { | |
611 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); | |
612 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
613 | } | |
614 | } | |
615 | of_node_put(np); | |
616 | } | |
617 | } | |
618 | ||
104699c0 | 619 | /* Must be called when no change can occur to cpu_present_mask, |
440a0857 NL |
620 | * i.e. during cpu online or offline. |
621 | */ | |
622 | static struct device_node *cpu_to_l2cache(int cpu) | |
623 | { | |
624 | struct device_node *np; | |
b2ea25b9 | 625 | struct device_node *cache; |
440a0857 NL |
626 | |
627 | if (!cpu_present(cpu)) | |
628 | return NULL; | |
629 | ||
630 | np = of_get_cpu_node(cpu, NULL); | |
631 | if (np == NULL) | |
632 | return NULL; | |
633 | ||
b2ea25b9 NL |
634 | cache = of_find_next_cache_node(np); |
635 | ||
440a0857 NL |
636 | of_node_put(np); |
637 | ||
b2ea25b9 | 638 | return cache; |
440a0857 | 639 | } |
1da177e4 | 640 | |
a8a5356c PM |
641 | static void traverse_core_siblings(int cpu, bool add) |
642 | { | |
256f2d4b | 643 | struct device_node *l2_cache, *np; |
a8a5356c | 644 | const struct cpumask *mask; |
256f2d4b PM |
645 | int i, chip, plen; |
646 | const __be32 *prop; | |
647 | ||
648 | /* First see if we have ibm,chip-id properties in cpu nodes */ | |
649 | np = of_get_cpu_node(cpu, NULL); | |
650 | if (np) { | |
651 | chip = -1; | |
652 | prop = of_get_property(np, "ibm,chip-id", &plen); | |
653 | if (prop && plen == sizeof(int)) | |
654 | chip = of_read_number(prop, 1); | |
655 | of_node_put(np); | |
656 | if (chip >= 0) { | |
657 | traverse_siblings_chip_id(cpu, add, chip); | |
658 | return; | |
659 | } | |
660 | } | |
a8a5356c PM |
661 | |
662 | l2_cache = cpu_to_l2cache(cpu); | |
663 | mask = add ? cpu_online_mask : cpu_present_mask; | |
664 | for_each_cpu(i, mask) { | |
256f2d4b | 665 | np = cpu_to_l2cache(i); |
a8a5356c PM |
666 | if (!np) |
667 | continue; | |
668 | if (np == l2_cache) { | |
669 | if (add) { | |
670 | cpumask_set_cpu(cpu, cpu_core_mask(i)); | |
671 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
672 | } else { | |
673 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); | |
674 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
675 | } | |
676 | } | |
677 | of_node_put(np); | |
678 | } | |
679 | of_node_put(l2_cache); | |
680 | } | |
681 | ||
1da177e4 | 682 | /* Activate a secondary processor. */ |
061d19f2 | 683 | void start_secondary(void *unused) |
1da177e4 LT |
684 | { |
685 | unsigned int cpu = smp_processor_id(); | |
e2075f79 | 686 | int i, base; |
1da177e4 LT |
687 | |
688 | atomic_inc(&init_mm.mm_count); | |
689 | current->active_mm = &init_mm; | |
690 | ||
691 | smp_store_cpu_info(cpu); | |
5ad57078 | 692 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 693 | preempt_disable(); |
1da177e4 LT |
694 | cpu_callin_map[cpu] = 1; |
695 | ||
757cbd46 KG |
696 | if (smp_ops->setup_cpu) |
697 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
698 | if (smp_ops->take_timebase) |
699 | smp_ops->take_timebase(); | |
700 | ||
d831d0b8 TB |
701 | secondary_cpu_time_init(); |
702 | ||
aeeafbfa BH |
703 | #ifdef CONFIG_PPC64 |
704 | if (system_state == SYSTEM_RUNNING) | |
705 | vdso_data->processorCount++; | |
18ad51dd AB |
706 | |
707 | vdso_getcpu_init(); | |
aeeafbfa | 708 | #endif |
e2075f79 | 709 | /* Update sibling maps */ |
99d86705 | 710 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 711 | for (i = 0; i < threads_per_core; i++) { |
cce606fe | 712 | if (cpu_is_offline(base + i) && (cpu != base + i)) |
e2075f79 | 713 | continue; |
cc1ba8ea AB |
714 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
715 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
716 | |
717 | /* cpu_core_map should be a superset of | |
718 | * cpu_sibling_map even if we don't have cache | |
719 | * information, so update the former here, too. | |
720 | */ | |
cc1ba8ea AB |
721 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
722 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 723 | } |
a8a5356c | 724 | traverse_core_siblings(cpu, true); |
1da177e4 | 725 | |
8c272261 NA |
726 | /* |
727 | * numa_node_id() works after this. | |
728 | */ | |
729 | set_numa_node(numa_cpu_lookup_table[cpu]); | |
64bb80d8 | 730 | set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu])); |
8c272261 | 731 | |
cce606fe LZ |
732 | smp_wmb(); |
733 | notify_cpu_starting(cpu); | |
734 | set_cpu_online(cpu, true); | |
735 | ||
1da177e4 LT |
736 | local_irq_enable(); |
737 | ||
799fef06 | 738 | cpu_startup_entry(CPUHP_ONLINE); |
fa3f82c8 BH |
739 | |
740 | BUG(); | |
1da177e4 LT |
741 | } |
742 | ||
743 | int setup_profiling_timer(unsigned int multiplier) | |
744 | { | |
745 | return 0; | |
746 | } | |
747 | ||
607b45e9 VG |
748 | #ifdef CONFIG_SCHED_SMT |
749 | /* cpumask of CPUs with asymetric SMT dependancy */ | |
b6220ad6 | 750 | static int powerpc_smt_flags(void) |
607b45e9 | 751 | { |
5d4dfddd | 752 | int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES; |
607b45e9 VG |
753 | |
754 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
755 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
756 | flags |= SD_ASYM_PACKING; | |
757 | } | |
758 | return flags; | |
759 | } | |
760 | #endif | |
761 | ||
762 | static struct sched_domain_topology_level powerpc_topology[] = { | |
763 | #ifdef CONFIG_SCHED_SMT | |
764 | { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) }, | |
765 | #endif | |
766 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, | |
767 | { NULL, }, | |
768 | }; | |
769 | ||
1da177e4 LT |
770 | void __init smp_cpus_done(unsigned int max_cpus) |
771 | { | |
bfb9126d | 772 | cpumask_var_t old_mask; |
1da177e4 LT |
773 | |
774 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
775 | * init thread may have been "borrowed" by another CPU in the meantime | |
776 | * se we pin us down to CPU 0 for a short while | |
777 | */ | |
bfb9126d | 778 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
104699c0 | 779 | cpumask_copy(old_mask, tsk_cpus_allowed(current)); |
21dbeb91 | 780 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 781 | |
757cbd46 | 782 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 783 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 784 | |
bfb9126d AB |
785 | set_cpus_allowed_ptr(current, old_mask); |
786 | ||
787 | free_cpumask_var(old_mask); | |
4b703a23 | 788 | |
d7294445 BH |
789 | if (smp_ops && smp_ops->bringup_done) |
790 | smp_ops->bringup_done(); | |
791 | ||
4b703a23 | 792 | dump_numa_cpu_topology(); |
d7294445 | 793 | |
607b45e9 | 794 | set_sched_topology(powerpc_topology); |
1da177e4 | 795 | |
e1f0ece1 MN |
796 | } |
797 | ||
1da177e4 LT |
798 | #ifdef CONFIG_HOTPLUG_CPU |
799 | int __cpu_disable(void) | |
800 | { | |
e2075f79 NL |
801 | int cpu = smp_processor_id(); |
802 | int base, i; | |
803 | int err; | |
1da177e4 | 804 | |
e2075f79 NL |
805 | if (!smp_ops->cpu_disable) |
806 | return -ENOSYS; | |
807 | ||
808 | err = smp_ops->cpu_disable(); | |
809 | if (err) | |
810 | return err; | |
811 | ||
812 | /* Update sibling maps */ | |
99d86705 | 813 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 814 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
815 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
816 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
817 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
818 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 | 819 | } |
a8a5356c | 820 | traverse_core_siblings(cpu, false); |
e2075f79 NL |
821 | |
822 | return 0; | |
1da177e4 LT |
823 | } |
824 | ||
825 | void __cpu_die(unsigned int cpu) | |
826 | { | |
827 | if (smp_ops->cpu_die) | |
828 | smp_ops->cpu_die(cpu); | |
829 | } | |
d0174c72 | 830 | |
abb17f9c MM |
831 | void cpu_die(void) |
832 | { | |
833 | if (ppc_md.cpu_die) | |
834 | ppc_md.cpu_die(); | |
fa3f82c8 BH |
835 | |
836 | /* If we return, we re-enter start_secondary */ | |
837 | start_secondary_resume(); | |
abb17f9c | 838 | } |
fa3f82c8 | 839 | |
1da177e4 | 840 | #endif |