Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 | 20 | #include <linux/kernel.h> |
4b16f8e2 | 21 | #include <linux/export.h> |
1da177e4 LT |
22 | #include <linux/sched.h> |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
8a25a2fd | 30 | #include <linux/device.h> |
1da177e4 LT |
31 | #include <linux/cpu.h> |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
60063497 | 36 | #include <linux/atomic.h> |
1da177e4 LT |
37 | #include <asm/irq.h> |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/prom.h> | |
41 | #include <asm/smp.h> | |
1da177e4 LT |
42 | #include <asm/time.h> |
43 | #include <asm/machdep.h> | |
e2075f79 | 44 | #include <asm/cputhreads.h> |
1da177e4 | 45 | #include <asm/cputable.h> |
bbeb3f4c | 46 | #include <asm/mpic.h> |
a7f290da | 47 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
48 | #ifdef CONFIG_PPC64 |
49 | #include <asm/paca.h> | |
50 | #endif | |
ae3a197e | 51 | #include <asm/debug.h> |
5ad57078 | 52 | |
1da177e4 | 53 | #ifdef DEBUG |
f9e4ec57 | 54 | #include <asm/udbg.h> |
1da177e4 LT |
55 | #define DBG(fmt...) udbg_printf(fmt) |
56 | #else | |
57 | #define DBG(fmt...) | |
58 | #endif | |
59 | ||
c56e5853 | 60 | #ifdef CONFIG_HOTPLUG_CPU |
fb82b839 BH |
61 | /* State of each CPU during hotplug phases */ |
62 | static DEFINE_PER_CPU(int, cpu_state) = { 0 }; | |
c56e5853 BH |
63 | #endif |
64 | ||
f9e4ec57 ME |
65 | struct thread_info *secondary_ti; |
66 | ||
cc1ba8ea AB |
67 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
68 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 69 | |
d5a7430d | 70 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 71 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 72 | |
5ad57078 | 73 | /* SMP operations for this machine */ |
1da177e4 LT |
74 | struct smp_ops_t *smp_ops; |
75 | ||
7ccbe504 BH |
76 | /* Can't be static due to PowerMac hackery */ |
77 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 78 | |
1da177e4 LT |
79 | int smt_enabled_at_boot = 1; |
80 | ||
cc532915 ME |
81 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
82 | ||
5ad57078 | 83 | #ifdef CONFIG_PPC64 |
de300974 | 84 | int __devinit smp_generic_kick_cpu(int nr) |
1da177e4 LT |
85 | { |
86 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
87 | ||
88 | /* | |
89 | * The processor is currently spinning, waiting for the | |
90 | * cpu_start field to become non-zero After we set cpu_start, | |
91 | * the processor will continue on to secondary_start | |
92 | */ | |
fb82b839 BH |
93 | if (!paca[nr].cpu_start) { |
94 | paca[nr].cpu_start = 1; | |
95 | smp_mb(); | |
96 | return 0; | |
97 | } | |
98 | ||
99 | #ifdef CONFIG_HOTPLUG_CPU | |
100 | /* | |
101 | * Ok it's not there, so it might be soft-unplugged, let's | |
102 | * try to bring it back | |
103 | */ | |
104 | per_cpu(cpu_state, nr) = CPU_UP_PREPARE; | |
105 | smp_wmb(); | |
106 | smp_send_reschedule(nr); | |
107 | #endif /* CONFIG_HOTPLUG_CPU */ | |
de300974 ME |
108 | |
109 | return 0; | |
1da177e4 | 110 | } |
fb82b839 | 111 | #endif /* CONFIG_PPC64 */ |
1da177e4 | 112 | |
25ddd738 MM |
113 | static irqreturn_t call_function_action(int irq, void *data) |
114 | { | |
115 | generic_smp_call_function_interrupt(); | |
116 | return IRQ_HANDLED; | |
117 | } | |
118 | ||
119 | static irqreturn_t reschedule_action(int irq, void *data) | |
120 | { | |
184748cc | 121 | scheduler_ipi(); |
25ddd738 MM |
122 | return IRQ_HANDLED; |
123 | } | |
124 | ||
125 | static irqreturn_t call_function_single_action(int irq, void *data) | |
126 | { | |
127 | generic_smp_call_function_single_interrupt(); | |
128 | return IRQ_HANDLED; | |
129 | } | |
130 | ||
7ef71d75 | 131 | static irqreturn_t debug_ipi_action(int irq, void *data) |
25ddd738 | 132 | { |
23d72bfd MM |
133 | if (crash_ipi_function_ptr) { |
134 | crash_ipi_function_ptr(get_irq_regs()); | |
135 | return IRQ_HANDLED; | |
136 | } | |
137 | ||
138 | #ifdef CONFIG_DEBUGGER | |
139 | debugger_ipi(get_irq_regs()); | |
140 | #endif /* CONFIG_DEBUGGER */ | |
141 | ||
25ddd738 MM |
142 | return IRQ_HANDLED; |
143 | } | |
144 | ||
145 | static irq_handler_t smp_ipi_action[] = { | |
146 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
147 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
148 | [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action, | |
149 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, | |
150 | }; | |
151 | ||
152 | const char *smp_ipi_name[] = { | |
153 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
154 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
155 | [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single", | |
156 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", | |
157 | }; | |
158 | ||
159 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
160 | int smp_request_message_ipi(int virq, int msg) | |
161 | { | |
162 | int err; | |
163 | ||
164 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
165 | return -EINVAL; | |
166 | } | |
167 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
168 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
169 | return 1; | |
170 | } | |
171 | #endif | |
3b5e16d7 TG |
172 | err = request_irq(virq, smp_ipi_action[msg], |
173 | IRQF_PERCPU | IRQF_NO_THREAD, | |
25ddd738 MM |
174 | smp_ipi_name[msg], 0); |
175 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", | |
176 | virq, smp_ipi_name[msg], err); | |
177 | ||
178 | return err; | |
179 | } | |
180 | ||
1ece355b | 181 | #ifdef CONFIG_PPC_SMP_MUXED_IPI |
23d72bfd | 182 | struct cpu_messages { |
71454272 | 183 | int messages; /* current messages */ |
23d72bfd MM |
184 | unsigned long data; /* data for cause ipi */ |
185 | }; | |
186 | static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message); | |
187 | ||
188 | void smp_muxed_ipi_set_data(int cpu, unsigned long data) | |
189 | { | |
190 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
191 | ||
192 | info->data = data; | |
193 | } | |
194 | ||
195 | void smp_muxed_ipi_message_pass(int cpu, int msg) | |
196 | { | |
197 | struct cpu_messages *info = &per_cpu(ipi_message, cpu); | |
71454272 | 198 | char *message = (char *)&info->messages; |
23d72bfd | 199 | |
71454272 | 200 | message[msg] = 1; |
23d72bfd MM |
201 | mb(); |
202 | smp_ops->cause_ipi(cpu, info->data); | |
203 | } | |
204 | ||
23d72bfd MM |
205 | irqreturn_t smp_ipi_demux(void) |
206 | { | |
207 | struct cpu_messages *info = &__get_cpu_var(ipi_message); | |
71454272 | 208 | unsigned int all; |
23d72bfd MM |
209 | |
210 | mb(); /* order any irq clear */ | |
71454272 MM |
211 | |
212 | do { | |
213 | all = xchg_local(&info->messages, 0); | |
214 | ||
215 | #ifdef __BIG_ENDIAN | |
216 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION))) | |
23d72bfd | 217 | generic_smp_call_function_interrupt(); |
71454272 | 218 | if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE))) |
880102e7 | 219 | scheduler_ipi(); |
71454272 | 220 | if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE))) |
23d72bfd | 221 | generic_smp_call_function_single_interrupt(); |
71454272 | 222 | if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK))) |
23d72bfd | 223 | debug_ipi_action(0, NULL); |
71454272 MM |
224 | #else |
225 | #error Unsupported ENDIAN | |
23d72bfd | 226 | #endif |
71454272 MM |
227 | } while (info->messages); |
228 | ||
23d72bfd MM |
229 | return IRQ_HANDLED; |
230 | } | |
1ece355b | 231 | #endif /* CONFIG_PPC_SMP_MUXED_IPI */ |
23d72bfd | 232 | |
9ca980dc PM |
233 | static inline void do_message_pass(int cpu, int msg) |
234 | { | |
235 | if (smp_ops->message_pass) | |
236 | smp_ops->message_pass(cpu, msg); | |
237 | #ifdef CONFIG_PPC_SMP_MUXED_IPI | |
238 | else | |
239 | smp_muxed_ipi_message_pass(cpu, msg); | |
240 | #endif | |
241 | } | |
242 | ||
1da177e4 LT |
243 | void smp_send_reschedule(int cpu) |
244 | { | |
8cffc6ac | 245 | if (likely(smp_ops)) |
9ca980dc | 246 | do_message_pass(cpu, PPC_MSG_RESCHEDULE); |
1da177e4 | 247 | } |
de56a948 | 248 | EXPORT_SYMBOL_GPL(smp_send_reschedule); |
1da177e4 | 249 | |
b7d7a240 JA |
250 | void arch_send_call_function_single_ipi(int cpu) |
251 | { | |
9ca980dc | 252 | do_message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); |
b7d7a240 JA |
253 | } |
254 | ||
f063ea02 | 255 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
256 | { |
257 | unsigned int cpu; | |
258 | ||
f063ea02 | 259 | for_each_cpu(cpu, mask) |
9ca980dc | 260 | do_message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
b7d7a240 JA |
261 | } |
262 | ||
e0476371 MM |
263 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
264 | void smp_send_debugger_break(void) | |
1da177e4 | 265 | { |
e0476371 MM |
266 | int cpu; |
267 | int me = raw_smp_processor_id(); | |
268 | ||
269 | if (unlikely(!smp_ops)) | |
270 | return; | |
271 | ||
272 | for_each_online_cpu(cpu) | |
273 | if (cpu != me) | |
9ca980dc | 274 | do_message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); |
1da177e4 LT |
275 | } |
276 | #endif | |
277 | ||
cc532915 ME |
278 | #ifdef CONFIG_KEXEC |
279 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
280 | { | |
281 | crash_ipi_function_ptr = crash_ipi_callback; | |
e0476371 | 282 | if (crash_ipi_callback) { |
cc532915 | 283 | mb(); |
e0476371 | 284 | smp_send_debugger_break(); |
cc532915 ME |
285 | } |
286 | } | |
287 | #endif | |
288 | ||
1da177e4 LT |
289 | static void stop_this_cpu(void *dummy) |
290 | { | |
8389b37d VB |
291 | /* Remove this CPU */ |
292 | set_cpu_online(smp_processor_id(), false); | |
293 | ||
1da177e4 LT |
294 | local_irq_disable(); |
295 | while (1) | |
296 | ; | |
297 | } | |
298 | ||
8fd7675c SS |
299 | void smp_send_stop(void) |
300 | { | |
8691e5a8 | 301 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
302 | } |
303 | ||
1da177e4 LT |
304 | struct thread_info *current_set[NR_CPUS]; |
305 | ||
1da177e4 LT |
306 | static void __devinit smp_store_cpu_info(int id) |
307 | { | |
6b7487fc | 308 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
3160b097 BB |
309 | #ifdef CONFIG_PPC_FSL_BOOK3E |
310 | per_cpu(next_tlbcam_idx, id) | |
311 | = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1; | |
312 | #endif | |
1da177e4 LT |
313 | } |
314 | ||
1da177e4 LT |
315 | void __init smp_prepare_cpus(unsigned int max_cpus) |
316 | { | |
317 | unsigned int cpu; | |
318 | ||
319 | DBG("smp_prepare_cpus\n"); | |
320 | ||
321 | /* | |
322 | * setup_cpu may need to be called on the boot cpu. We havent | |
323 | * spun any cpus up but lets be paranoid. | |
324 | */ | |
325 | BUG_ON(boot_cpuid != smp_processor_id()); | |
326 | ||
327 | /* Fixup boot cpu */ | |
328 | smp_store_cpu_info(boot_cpuid); | |
329 | cpu_callin_map[boot_cpuid] = 1; | |
330 | ||
cc1ba8ea AB |
331 | for_each_possible_cpu(cpu) { |
332 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
333 | GFP_KERNEL, cpu_to_node(cpu)); | |
334 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
335 | GFP_KERNEL, cpu_to_node(cpu)); | |
336 | } | |
337 | ||
338 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
339 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
340 | ||
8cffc6ac | 341 | if (smp_ops) |
757cbd46 KG |
342 | if (smp_ops->probe) |
343 | max_cpus = smp_ops->probe(); | |
344 | else | |
345 | max_cpus = NR_CPUS; | |
8cffc6ac BH |
346 | else |
347 | max_cpus = 1; | |
1da177e4 LT |
348 | } |
349 | ||
350 | void __devinit smp_prepare_boot_cpu(void) | |
351 | { | |
352 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 353 | #ifdef CONFIG_PPC64 |
1da177e4 | 354 | paca[boot_cpuid].__current = current; |
5ad57078 | 355 | #endif |
b5e2fc1c | 356 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
357 | } |
358 | ||
359 | #ifdef CONFIG_HOTPLUG_CPU | |
1da177e4 LT |
360 | |
361 | int generic_cpu_disable(void) | |
362 | { | |
363 | unsigned int cpu = smp_processor_id(); | |
364 | ||
365 | if (cpu == boot_cpuid) | |
366 | return -EBUSY; | |
367 | ||
ea0f1cab | 368 | set_cpu_online(cpu, false); |
799d6046 | 369 | #ifdef CONFIG_PPC64 |
a7f290da | 370 | vdso_data->processorCount--; |
094fe2e7 | 371 | #endif |
1c91cc57 | 372 | migrate_irqs(); |
1da177e4 LT |
373 | return 0; |
374 | } | |
375 | ||
1da177e4 LT |
376 | void generic_cpu_die(unsigned int cpu) |
377 | { | |
378 | int i; | |
379 | ||
380 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 381 | smp_rmb(); |
1da177e4 LT |
382 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
383 | return; | |
384 | msleep(100); | |
385 | } | |
386 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
387 | } | |
388 | ||
389 | void generic_mach_cpu_die(void) | |
390 | { | |
391 | unsigned int cpu; | |
392 | ||
393 | local_irq_disable(); | |
4fcb8833 | 394 | idle_task_exit(); |
1da177e4 LT |
395 | cpu = smp_processor_id(); |
396 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
397 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 398 | smp_wmb(); |
1da177e4 LT |
399 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
400 | cpu_relax(); | |
1da177e4 | 401 | } |
105765f4 BH |
402 | |
403 | void generic_set_cpu_dead(unsigned int cpu) | |
404 | { | |
405 | per_cpu(cpu_state, cpu) = CPU_DEAD; | |
406 | } | |
fb82b839 BH |
407 | |
408 | int generic_check_cpu_restart(unsigned int cpu) | |
409 | { | |
410 | return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE; | |
411 | } | |
1da177e4 LT |
412 | #endif |
413 | ||
17e32eac | 414 | static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle) |
c56e5853 | 415 | { |
17e32eac | 416 | struct thread_info *ti = task_thread_info(idle); |
c56e5853 BH |
417 | |
418 | #ifdef CONFIG_PPC64 | |
17e32eac | 419 | paca[cpu].__current = idle; |
c56e5853 BH |
420 | paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD; |
421 | #endif | |
422 | ti->cpu = cpu; | |
17e32eac | 423 | secondary_ti = current_set[cpu] = ti; |
c56e5853 BH |
424 | } |
425 | ||
8239c25f | 426 | int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 427 | { |
c56e5853 | 428 | int rc, c; |
1da177e4 | 429 | |
8cffc6ac BH |
430 | if (smp_ops == NULL || |
431 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
432 | return -EINVAL; |
433 | ||
17e32eac | 434 | cpu_idle_thread_init(cpu, tidle); |
c560bbce | 435 | |
1da177e4 LT |
436 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
437 | * hotplug | |
438 | */ | |
439 | cpu_callin_map[cpu] = 0; | |
440 | ||
441 | /* The information for processor bringup must | |
442 | * be written out to main store before we release | |
443 | * the processor. | |
444 | */ | |
0d8d4d42 | 445 | smp_mb(); |
1da177e4 LT |
446 | |
447 | /* wake up cpus */ | |
448 | DBG("smp: kicking cpu %d\n", cpu); | |
de300974 ME |
449 | rc = smp_ops->kick_cpu(cpu); |
450 | if (rc) { | |
451 | pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc); | |
452 | return rc; | |
453 | } | |
1da177e4 LT |
454 | |
455 | /* | |
456 | * wait to see if the cpu made a callin (is actually up). | |
457 | * use this value that I found through experimentation. | |
458 | * -- Cort | |
459 | */ | |
460 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 461 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
462 | udelay(100); |
463 | #ifdef CONFIG_HOTPLUG_CPU | |
464 | else | |
465 | /* | |
466 | * CPUs can take much longer to come up in the | |
467 | * hotplug case. Wait five seconds. | |
468 | */ | |
67764263 GS |
469 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
470 | msleep(1); | |
1da177e4 LT |
471 | #endif |
472 | ||
473 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 474 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
475 | return -ENOENT; |
476 | } | |
477 | ||
6685a477 | 478 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
479 | |
480 | if (smp_ops->give_timebase) | |
481 | smp_ops->give_timebase(); | |
482 | ||
483 | /* Wait until cpu puts itself in the online map */ | |
484 | while (!cpu_online(cpu)) | |
485 | cpu_relax(); | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
e9efed3b NL |
490 | /* Return the value of the reg property corresponding to the given |
491 | * logical cpu. | |
492 | */ | |
493 | int cpu_to_core_id(int cpu) | |
494 | { | |
495 | struct device_node *np; | |
496 | const int *reg; | |
497 | int id = -1; | |
498 | ||
499 | np = of_get_cpu_node(cpu, NULL); | |
500 | if (!np) | |
501 | goto out; | |
502 | ||
503 | reg = of_get_property(np, "reg", NULL); | |
504 | if (!reg) | |
505 | goto out; | |
506 | ||
507 | id = *reg; | |
508 | out: | |
509 | of_node_put(np); | |
510 | return id; | |
511 | } | |
512 | ||
99d86705 VS |
513 | /* Helper routines for cpu to core mapping */ |
514 | int cpu_core_index_of_thread(int cpu) | |
515 | { | |
516 | return cpu >> threads_shift; | |
517 | } | |
518 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
519 | ||
520 | int cpu_first_thread_of_core(int core) | |
521 | { | |
522 | return core << threads_shift; | |
523 | } | |
524 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
525 | ||
104699c0 | 526 | /* Must be called when no change can occur to cpu_present_mask, |
440a0857 NL |
527 | * i.e. during cpu online or offline. |
528 | */ | |
529 | static struct device_node *cpu_to_l2cache(int cpu) | |
530 | { | |
531 | struct device_node *np; | |
b2ea25b9 | 532 | struct device_node *cache; |
440a0857 NL |
533 | |
534 | if (!cpu_present(cpu)) | |
535 | return NULL; | |
536 | ||
537 | np = of_get_cpu_node(cpu, NULL); | |
538 | if (np == NULL) | |
539 | return NULL; | |
540 | ||
b2ea25b9 NL |
541 | cache = of_find_next_cache_node(np); |
542 | ||
440a0857 NL |
543 | of_node_put(np); |
544 | ||
b2ea25b9 | 545 | return cache; |
440a0857 | 546 | } |
1da177e4 LT |
547 | |
548 | /* Activate a secondary processor. */ | |
fa3f82c8 | 549 | void __devinit start_secondary(void *unused) |
1da177e4 LT |
550 | { |
551 | unsigned int cpu = smp_processor_id(); | |
440a0857 | 552 | struct device_node *l2_cache; |
e2075f79 | 553 | int i, base; |
1da177e4 LT |
554 | |
555 | atomic_inc(&init_mm.mm_count); | |
556 | current->active_mm = &init_mm; | |
557 | ||
558 | smp_store_cpu_info(cpu); | |
5ad57078 | 559 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 560 | preempt_disable(); |
1da177e4 LT |
561 | cpu_callin_map[cpu] = 1; |
562 | ||
757cbd46 KG |
563 | if (smp_ops->setup_cpu) |
564 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
565 | if (smp_ops->take_timebase) |
566 | smp_ops->take_timebase(); | |
567 | ||
d831d0b8 TB |
568 | secondary_cpu_time_init(); |
569 | ||
aeeafbfa BH |
570 | #ifdef CONFIG_PPC64 |
571 | if (system_state == SYSTEM_RUNNING) | |
572 | vdso_data->processorCount++; | |
573 | #endif | |
e545a614 | 574 | notify_cpu_starting(cpu); |
ea0f1cab | 575 | set_cpu_online(cpu, true); |
e2075f79 | 576 | /* Update sibling maps */ |
99d86705 | 577 | base = cpu_first_thread_sibling(cpu); |
e2075f79 NL |
578 | for (i = 0; i < threads_per_core; i++) { |
579 | if (cpu_is_offline(base + i)) | |
580 | continue; | |
cc1ba8ea AB |
581 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
582 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
583 | |
584 | /* cpu_core_map should be a superset of | |
585 | * cpu_sibling_map even if we don't have cache | |
586 | * information, so update the former here, too. | |
587 | */ | |
cc1ba8ea AB |
588 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
589 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 590 | } |
440a0857 NL |
591 | l2_cache = cpu_to_l2cache(cpu); |
592 | for_each_online_cpu(i) { | |
593 | struct device_node *np = cpu_to_l2cache(i); | |
594 | if (!np) | |
595 | continue; | |
596 | if (np == l2_cache) { | |
cc1ba8ea AB |
597 | cpumask_set_cpu(cpu, cpu_core_mask(i)); |
598 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
599 | } |
600 | of_node_put(np); | |
601 | } | |
602 | of_node_put(l2_cache); | |
1da177e4 LT |
603 | |
604 | local_irq_enable(); | |
605 | ||
606 | cpu_idle(); | |
fa3f82c8 BH |
607 | |
608 | BUG(); | |
1da177e4 LT |
609 | } |
610 | ||
611 | int setup_profiling_timer(unsigned int multiplier) | |
612 | { | |
613 | return 0; | |
614 | } | |
615 | ||
616 | void __init smp_cpus_done(unsigned int max_cpus) | |
617 | { | |
bfb9126d | 618 | cpumask_var_t old_mask; |
1da177e4 LT |
619 | |
620 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
621 | * init thread may have been "borrowed" by another CPU in the meantime | |
622 | * se we pin us down to CPU 0 for a short while | |
623 | */ | |
bfb9126d | 624 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
104699c0 | 625 | cpumask_copy(old_mask, tsk_cpus_allowed(current)); |
21dbeb91 | 626 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 627 | |
757cbd46 | 628 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 629 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 630 | |
bfb9126d AB |
631 | set_cpus_allowed_ptr(current, old_mask); |
632 | ||
633 | free_cpumask_var(old_mask); | |
4b703a23 | 634 | |
d7294445 BH |
635 | if (smp_ops && smp_ops->bringup_done) |
636 | smp_ops->bringup_done(); | |
637 | ||
4b703a23 | 638 | dump_numa_cpu_topology(); |
d7294445 | 639 | |
1da177e4 LT |
640 | } |
641 | ||
e1f0ece1 MN |
642 | int arch_sd_sibling_asym_packing(void) |
643 | { | |
644 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
645 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
646 | return SD_ASYM_PACKING; | |
647 | } | |
648 | return 0; | |
649 | } | |
650 | ||
1da177e4 LT |
651 | #ifdef CONFIG_HOTPLUG_CPU |
652 | int __cpu_disable(void) | |
653 | { | |
440a0857 | 654 | struct device_node *l2_cache; |
e2075f79 NL |
655 | int cpu = smp_processor_id(); |
656 | int base, i; | |
657 | int err; | |
1da177e4 | 658 | |
e2075f79 NL |
659 | if (!smp_ops->cpu_disable) |
660 | return -ENOSYS; | |
661 | ||
662 | err = smp_ops->cpu_disable(); | |
663 | if (err) | |
664 | return err; | |
665 | ||
666 | /* Update sibling maps */ | |
99d86705 | 667 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 668 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
669 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
670 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
671 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
672 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 NL |
673 | } |
674 | ||
675 | l2_cache = cpu_to_l2cache(cpu); | |
676 | for_each_present_cpu(i) { | |
677 | struct device_node *np = cpu_to_l2cache(i); | |
678 | if (!np) | |
679 | continue; | |
680 | if (np == l2_cache) { | |
cc1ba8ea AB |
681 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); |
682 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
683 | } |
684 | of_node_put(np); | |
e2075f79 | 685 | } |
440a0857 NL |
686 | of_node_put(l2_cache); |
687 | ||
e2075f79 NL |
688 | |
689 | return 0; | |
1da177e4 LT |
690 | } |
691 | ||
692 | void __cpu_die(unsigned int cpu) | |
693 | { | |
694 | if (smp_ops->cpu_die) | |
695 | smp_ops->cpu_die(cpu); | |
696 | } | |
d0174c72 NF |
697 | |
698 | static DEFINE_MUTEX(powerpc_cpu_hotplug_driver_mutex); | |
699 | ||
700 | void cpu_hotplug_driver_lock() | |
701 | { | |
702 | mutex_lock(&powerpc_cpu_hotplug_driver_mutex); | |
703 | } | |
704 | ||
705 | void cpu_hotplug_driver_unlock() | |
706 | { | |
707 | mutex_unlock(&powerpc_cpu_hotplug_driver_mutex); | |
708 | } | |
abb17f9c MM |
709 | |
710 | void cpu_die(void) | |
711 | { | |
712 | if (ppc_md.cpu_die) | |
713 | ppc_md.cpu_die(); | |
fa3f82c8 BH |
714 | |
715 | /* If we return, we re-enter start_secondary */ | |
716 | start_secondary_resume(); | |
abb17f9c | 717 | } |
fa3f82c8 | 718 | |
1da177e4 | 719 | #endif |