Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * SMP support for ppc. | |
3 | * | |
4 | * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great | |
5 | * deal of code from the sparc and intel versions. | |
6 | * | |
7 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> | |
8 | * | |
9 | * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and | |
10 | * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version | |
15 | * 2 of the License, or (at your option) any later version. | |
16 | */ | |
17 | ||
18 | #undef DEBUG | |
19 | ||
1da177e4 LT |
20 | #include <linux/kernel.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/sched.h> | |
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/cache.h> | |
29 | #include <linux/err.h> | |
30 | #include <linux/sysdev.h> | |
31 | #include <linux/cpu.h> | |
32 | #include <linux/notifier.h> | |
4b703a23 | 33 | #include <linux/topology.h> |
1da177e4 LT |
34 | |
35 | #include <asm/ptrace.h> | |
36 | #include <asm/atomic.h> | |
37 | #include <asm/irq.h> | |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/prom.h> | |
41 | #include <asm/smp.h> | |
1da177e4 LT |
42 | #include <asm/time.h> |
43 | #include <asm/machdep.h> | |
e2075f79 | 44 | #include <asm/cputhreads.h> |
1da177e4 LT |
45 | #include <asm/cputable.h> |
46 | #include <asm/system.h> | |
bbeb3f4c | 47 | #include <asm/mpic.h> |
a7f290da | 48 | #include <asm/vdso_datapage.h> |
5ad57078 PM |
49 | #ifdef CONFIG_PPC64 |
50 | #include <asm/paca.h> | |
51 | #endif | |
52 | ||
1da177e4 | 53 | #ifdef DEBUG |
f9e4ec57 | 54 | #include <asm/udbg.h> |
1da177e4 LT |
55 | #define DBG(fmt...) udbg_printf(fmt) |
56 | #else | |
57 | #define DBG(fmt...) | |
58 | #endif | |
59 | ||
c56e5853 BH |
60 | |
61 | /* Store all idle threads, this can be reused instead of creating | |
62 | * a new thread. Also avoids complicated thread destroy functionality | |
63 | * for idle threads. | |
64 | */ | |
65 | #ifdef CONFIG_HOTPLUG_CPU | |
66 | /* | |
67 | * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is | |
68 | * removed after init for !CONFIG_HOTPLUG_CPU. | |
69 | */ | |
70 | static DEFINE_PER_CPU(struct task_struct *, idle_thread_array); | |
71 | #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x)) | |
72 | #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p)) | |
73 | #else | |
74 | static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ; | |
75 | #define get_idle_for_cpu(x) (idle_thread_array[(x)]) | |
76 | #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p)) | |
77 | #endif | |
78 | ||
f9e4ec57 ME |
79 | struct thread_info *secondary_ti; |
80 | ||
cc1ba8ea AB |
81 | DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
82 | DEFINE_PER_CPU(cpumask_var_t, cpu_core_map); | |
1da177e4 | 83 | |
d5a7430d | 84 | EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); |
440a0857 | 85 | EXPORT_PER_CPU_SYMBOL(cpu_core_map); |
1da177e4 | 86 | |
5ad57078 | 87 | /* SMP operations for this machine */ |
1da177e4 LT |
88 | struct smp_ops_t *smp_ops; |
89 | ||
7ccbe504 BH |
90 | /* Can't be static due to PowerMac hackery */ |
91 | volatile unsigned int cpu_callin_map[NR_CPUS]; | |
1da177e4 | 92 | |
1da177e4 LT |
93 | int smt_enabled_at_boot = 1; |
94 | ||
cc532915 ME |
95 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
96 | ||
5ad57078 | 97 | #ifdef CONFIG_PPC64 |
de300974 | 98 | int __devinit smp_generic_kick_cpu(int nr) |
1da177e4 LT |
99 | { |
100 | BUG_ON(nr < 0 || nr >= NR_CPUS); | |
101 | ||
102 | /* | |
103 | * The processor is currently spinning, waiting for the | |
104 | * cpu_start field to become non-zero After we set cpu_start, | |
105 | * the processor will continue on to secondary_start | |
106 | */ | |
107 | paca[nr].cpu_start = 1; | |
0d8d4d42 | 108 | smp_mb(); |
de300974 ME |
109 | |
110 | return 0; | |
1da177e4 | 111 | } |
5ad57078 | 112 | #endif |
1da177e4 | 113 | |
7d12e780 | 114 | void smp_message_recv(int msg) |
1da177e4 LT |
115 | { |
116 | switch(msg) { | |
117 | case PPC_MSG_CALL_FUNCTION: | |
b7d7a240 | 118 | generic_smp_call_function_interrupt(); |
1da177e4 | 119 | break; |
5ad57078 | 120 | case PPC_MSG_RESCHEDULE: |
22d660ff | 121 | /* we notice need_resched on exit */ |
1da177e4 | 122 | break; |
b7d7a240 JA |
123 | case PPC_MSG_CALL_FUNC_SINGLE: |
124 | generic_smp_call_function_single_interrupt(); | |
125 | break; | |
1da177e4 | 126 | case PPC_MSG_DEBUGGER_BREAK: |
cc532915 | 127 | if (crash_ipi_function_ptr) { |
7d12e780 | 128 | crash_ipi_function_ptr(get_irq_regs()); |
cc532915 ME |
129 | break; |
130 | } | |
131 | #ifdef CONFIG_DEBUGGER | |
7d12e780 | 132 | debugger_ipi(get_irq_regs()); |
1da177e4 | 133 | break; |
cc532915 ME |
134 | #endif /* CONFIG_DEBUGGER */ |
135 | /* FALLTHROUGH */ | |
1da177e4 LT |
136 | default: |
137 | printk("SMP %d: smp_message_recv(): unknown msg %d\n", | |
138 | smp_processor_id(), msg); | |
139 | break; | |
140 | } | |
141 | } | |
142 | ||
25ddd738 MM |
143 | static irqreturn_t call_function_action(int irq, void *data) |
144 | { | |
145 | generic_smp_call_function_interrupt(); | |
146 | return IRQ_HANDLED; | |
147 | } | |
148 | ||
149 | static irqreturn_t reschedule_action(int irq, void *data) | |
150 | { | |
151 | /* we just need the return path side effect of checking need_resched */ | |
152 | return IRQ_HANDLED; | |
153 | } | |
154 | ||
155 | static irqreturn_t call_function_single_action(int irq, void *data) | |
156 | { | |
157 | generic_smp_call_function_single_interrupt(); | |
158 | return IRQ_HANDLED; | |
159 | } | |
160 | ||
161 | static irqreturn_t debug_ipi_action(int irq, void *data) | |
162 | { | |
163 | smp_message_recv(PPC_MSG_DEBUGGER_BREAK); | |
164 | return IRQ_HANDLED; | |
165 | } | |
166 | ||
167 | static irq_handler_t smp_ipi_action[] = { | |
168 | [PPC_MSG_CALL_FUNCTION] = call_function_action, | |
169 | [PPC_MSG_RESCHEDULE] = reschedule_action, | |
170 | [PPC_MSG_CALL_FUNC_SINGLE] = call_function_single_action, | |
171 | [PPC_MSG_DEBUGGER_BREAK] = debug_ipi_action, | |
172 | }; | |
173 | ||
174 | const char *smp_ipi_name[] = { | |
175 | [PPC_MSG_CALL_FUNCTION] = "ipi call function", | |
176 | [PPC_MSG_RESCHEDULE] = "ipi reschedule", | |
177 | [PPC_MSG_CALL_FUNC_SINGLE] = "ipi call function single", | |
178 | [PPC_MSG_DEBUGGER_BREAK] = "ipi debugger", | |
179 | }; | |
180 | ||
181 | /* optional function to request ipi, for controllers with >= 4 ipis */ | |
182 | int smp_request_message_ipi(int virq, int msg) | |
183 | { | |
184 | int err; | |
185 | ||
186 | if (msg < 0 || msg > PPC_MSG_DEBUGGER_BREAK) { | |
187 | return -EINVAL; | |
188 | } | |
189 | #if !defined(CONFIG_DEBUGGER) && !defined(CONFIG_KEXEC) | |
190 | if (msg == PPC_MSG_DEBUGGER_BREAK) { | |
191 | return 1; | |
192 | } | |
193 | #endif | |
194 | err = request_irq(virq, smp_ipi_action[msg], IRQF_DISABLED|IRQF_PERCPU, | |
195 | smp_ipi_name[msg], 0); | |
196 | WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n", | |
197 | virq, smp_ipi_name[msg], err); | |
198 | ||
199 | return err; | |
200 | } | |
201 | ||
1da177e4 LT |
202 | void smp_send_reschedule(int cpu) |
203 | { | |
8cffc6ac BH |
204 | if (likely(smp_ops)) |
205 | smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); | |
1da177e4 LT |
206 | } |
207 | ||
b7d7a240 JA |
208 | void arch_send_call_function_single_ipi(int cpu) |
209 | { | |
210 | smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); | |
211 | } | |
212 | ||
f063ea02 | 213 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
b7d7a240 JA |
214 | { |
215 | unsigned int cpu; | |
216 | ||
f063ea02 | 217 | for_each_cpu(cpu, mask) |
b7d7a240 JA |
218 | smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION); |
219 | } | |
220 | ||
1da177e4 LT |
221 | #ifdef CONFIG_DEBUGGER |
222 | void smp_send_debugger_break(int cpu) | |
223 | { | |
8cffc6ac BH |
224 | if (likely(smp_ops)) |
225 | smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); | |
1da177e4 LT |
226 | } |
227 | #endif | |
228 | ||
cc532915 ME |
229 | #ifdef CONFIG_KEXEC |
230 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | |
231 | { | |
232 | crash_ipi_function_ptr = crash_ipi_callback; | |
8cffc6ac | 233 | if (crash_ipi_callback && smp_ops) { |
cc532915 ME |
234 | mb(); |
235 | smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_DEBUGGER_BREAK); | |
236 | } | |
237 | } | |
238 | #endif | |
239 | ||
1da177e4 LT |
240 | static void stop_this_cpu(void *dummy) |
241 | { | |
8389b37d VB |
242 | /* Remove this CPU */ |
243 | set_cpu_online(smp_processor_id(), false); | |
244 | ||
1da177e4 LT |
245 | local_irq_disable(); |
246 | while (1) | |
247 | ; | |
248 | } | |
249 | ||
8fd7675c SS |
250 | void smp_send_stop(void) |
251 | { | |
8691e5a8 | 252 | smp_call_function(stop_this_cpu, NULL, 0); |
1da177e4 LT |
253 | } |
254 | ||
1da177e4 LT |
255 | struct thread_info *current_set[NR_CPUS]; |
256 | ||
1da177e4 LT |
257 | static void __devinit smp_store_cpu_info(int id) |
258 | { | |
6b7487fc | 259 | per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR); |
1da177e4 LT |
260 | } |
261 | ||
1da177e4 LT |
262 | void __init smp_prepare_cpus(unsigned int max_cpus) |
263 | { | |
264 | unsigned int cpu; | |
265 | ||
266 | DBG("smp_prepare_cpus\n"); | |
267 | ||
268 | /* | |
269 | * setup_cpu may need to be called on the boot cpu. We havent | |
270 | * spun any cpus up but lets be paranoid. | |
271 | */ | |
272 | BUG_ON(boot_cpuid != smp_processor_id()); | |
273 | ||
274 | /* Fixup boot cpu */ | |
275 | smp_store_cpu_info(boot_cpuid); | |
276 | cpu_callin_map[boot_cpuid] = 1; | |
277 | ||
cc1ba8ea AB |
278 | for_each_possible_cpu(cpu) { |
279 | zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu), | |
280 | GFP_KERNEL, cpu_to_node(cpu)); | |
281 | zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu), | |
282 | GFP_KERNEL, cpu_to_node(cpu)); | |
283 | } | |
284 | ||
285 | cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); | |
286 | cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); | |
287 | ||
8cffc6ac | 288 | if (smp_ops) |
757cbd46 KG |
289 | if (smp_ops->probe) |
290 | max_cpus = smp_ops->probe(); | |
291 | else | |
292 | max_cpus = NR_CPUS; | |
8cffc6ac BH |
293 | else |
294 | max_cpus = 1; | |
1da177e4 LT |
295 | } |
296 | ||
297 | void __devinit smp_prepare_boot_cpu(void) | |
298 | { | |
299 | BUG_ON(smp_processor_id() != boot_cpuid); | |
5ad57078 | 300 | #ifdef CONFIG_PPC64 |
1da177e4 | 301 | paca[boot_cpuid].__current = current; |
5ad57078 | 302 | #endif |
b5e2fc1c | 303 | current_set[boot_cpuid] = task_thread_info(current); |
1da177e4 LT |
304 | } |
305 | ||
306 | #ifdef CONFIG_HOTPLUG_CPU | |
307 | /* State of each CPU during hotplug phases */ | |
105765f4 | 308 | static DEFINE_PER_CPU(int, cpu_state) = { 0 }; |
1da177e4 LT |
309 | |
310 | int generic_cpu_disable(void) | |
311 | { | |
312 | unsigned int cpu = smp_processor_id(); | |
313 | ||
314 | if (cpu == boot_cpuid) | |
315 | return -EBUSY; | |
316 | ||
ea0f1cab | 317 | set_cpu_online(cpu, false); |
799d6046 | 318 | #ifdef CONFIG_PPC64 |
a7f290da | 319 | vdso_data->processorCount--; |
094fe2e7 | 320 | #endif |
1c91cc57 | 321 | migrate_irqs(); |
1da177e4 LT |
322 | return 0; |
323 | } | |
324 | ||
1da177e4 LT |
325 | void generic_cpu_die(unsigned int cpu) |
326 | { | |
327 | int i; | |
328 | ||
329 | for (i = 0; i < 100; i++) { | |
0d8d4d42 | 330 | smp_rmb(); |
1da177e4 LT |
331 | if (per_cpu(cpu_state, cpu) == CPU_DEAD) |
332 | return; | |
333 | msleep(100); | |
334 | } | |
335 | printk(KERN_ERR "CPU%d didn't die...\n", cpu); | |
336 | } | |
337 | ||
338 | void generic_mach_cpu_die(void) | |
339 | { | |
340 | unsigned int cpu; | |
341 | ||
342 | local_irq_disable(); | |
4fcb8833 | 343 | idle_task_exit(); |
1da177e4 LT |
344 | cpu = smp_processor_id(); |
345 | printk(KERN_DEBUG "CPU%d offline\n", cpu); | |
346 | __get_cpu_var(cpu_state) = CPU_DEAD; | |
0d8d4d42 | 347 | smp_wmb(); |
1da177e4 LT |
348 | while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE) |
349 | cpu_relax(); | |
1da177e4 | 350 | } |
105765f4 BH |
351 | |
352 | void generic_set_cpu_dead(unsigned int cpu) | |
353 | { | |
354 | per_cpu(cpu_state, cpu) = CPU_DEAD; | |
355 | } | |
1da177e4 LT |
356 | #endif |
357 | ||
c56e5853 BH |
358 | struct create_idle { |
359 | struct work_struct work; | |
360 | struct task_struct *idle; | |
361 | struct completion done; | |
362 | int cpu; | |
363 | }; | |
364 | ||
365 | static void __cpuinit do_fork_idle(struct work_struct *work) | |
366 | { | |
367 | struct create_idle *c_idle = | |
368 | container_of(work, struct create_idle, work); | |
369 | ||
370 | c_idle->idle = fork_idle(c_idle->cpu); | |
371 | complete(&c_idle->done); | |
372 | } | |
373 | ||
374 | static int __cpuinit create_idle(unsigned int cpu) | |
375 | { | |
376 | struct thread_info *ti; | |
377 | struct create_idle c_idle = { | |
378 | .cpu = cpu, | |
379 | .done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done), | |
380 | }; | |
381 | INIT_WORK_ONSTACK(&c_idle.work, do_fork_idle); | |
382 | ||
383 | c_idle.idle = get_idle_for_cpu(cpu); | |
384 | ||
385 | /* We can't use kernel_thread since we must avoid to | |
386 | * reschedule the child. We use a workqueue because | |
387 | * we want to fork from a kernel thread, not whatever | |
388 | * userspace process happens to be trying to online us. | |
389 | */ | |
390 | if (!c_idle.idle) { | |
391 | schedule_work(&c_idle.work); | |
392 | wait_for_completion(&c_idle.done); | |
393 | } else | |
394 | init_idle(c_idle.idle, cpu); | |
395 | if (IS_ERR(c_idle.idle)) { | |
396 | pr_err("Failed fork for CPU %u: %li", cpu, PTR_ERR(c_idle.idle)); | |
397 | return PTR_ERR(c_idle.idle); | |
398 | } | |
399 | ti = task_thread_info(c_idle.idle); | |
400 | ||
401 | #ifdef CONFIG_PPC64 | |
402 | paca[cpu].__current = c_idle.idle; | |
403 | paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD; | |
404 | #endif | |
405 | ti->cpu = cpu; | |
406 | current_set[cpu] = ti; | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
b282b6f8 | 411 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 412 | { |
c56e5853 | 413 | int rc, c; |
1da177e4 | 414 | |
5ad57078 | 415 | secondary_ti = current_set[cpu]; |
1da177e4 | 416 | |
8cffc6ac BH |
417 | if (smp_ops == NULL || |
418 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | |
1da177e4 LT |
419 | return -EINVAL; |
420 | ||
c56e5853 BH |
421 | /* Make sure we have an idle thread */ |
422 | rc = create_idle(cpu); | |
423 | if (rc) | |
424 | return rc; | |
425 | ||
1da177e4 LT |
426 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
427 | * hotplug | |
428 | */ | |
429 | cpu_callin_map[cpu] = 0; | |
430 | ||
431 | /* The information for processor bringup must | |
432 | * be written out to main store before we release | |
433 | * the processor. | |
434 | */ | |
0d8d4d42 | 435 | smp_mb(); |
1da177e4 LT |
436 | |
437 | /* wake up cpus */ | |
438 | DBG("smp: kicking cpu %d\n", cpu); | |
de300974 ME |
439 | rc = smp_ops->kick_cpu(cpu); |
440 | if (rc) { | |
441 | pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc); | |
442 | return rc; | |
443 | } | |
1da177e4 LT |
444 | |
445 | /* | |
446 | * wait to see if the cpu made a callin (is actually up). | |
447 | * use this value that I found through experimentation. | |
448 | * -- Cort | |
449 | */ | |
450 | if (system_state < SYSTEM_RUNNING) | |
ee0339f2 | 451 | for (c = 50000; c && !cpu_callin_map[cpu]; c--) |
1da177e4 LT |
452 | udelay(100); |
453 | #ifdef CONFIG_HOTPLUG_CPU | |
454 | else | |
455 | /* | |
456 | * CPUs can take much longer to come up in the | |
457 | * hotplug case. Wait five seconds. | |
458 | */ | |
67764263 GS |
459 | for (c = 5000; c && !cpu_callin_map[cpu]; c--) |
460 | msleep(1); | |
1da177e4 LT |
461 | #endif |
462 | ||
463 | if (!cpu_callin_map[cpu]) { | |
6685a477 | 464 | printk(KERN_ERR "Processor %u is stuck.\n", cpu); |
1da177e4 LT |
465 | return -ENOENT; |
466 | } | |
467 | ||
6685a477 | 468 | DBG("Processor %u found.\n", cpu); |
1da177e4 LT |
469 | |
470 | if (smp_ops->give_timebase) | |
471 | smp_ops->give_timebase(); | |
472 | ||
473 | /* Wait until cpu puts itself in the online map */ | |
474 | while (!cpu_online(cpu)) | |
475 | cpu_relax(); | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
e9efed3b NL |
480 | /* Return the value of the reg property corresponding to the given |
481 | * logical cpu. | |
482 | */ | |
483 | int cpu_to_core_id(int cpu) | |
484 | { | |
485 | struct device_node *np; | |
486 | const int *reg; | |
487 | int id = -1; | |
488 | ||
489 | np = of_get_cpu_node(cpu, NULL); | |
490 | if (!np) | |
491 | goto out; | |
492 | ||
493 | reg = of_get_property(np, "reg", NULL); | |
494 | if (!reg) | |
495 | goto out; | |
496 | ||
497 | id = *reg; | |
498 | out: | |
499 | of_node_put(np); | |
500 | return id; | |
501 | } | |
502 | ||
99d86705 VS |
503 | /* Helper routines for cpu to core mapping */ |
504 | int cpu_core_index_of_thread(int cpu) | |
505 | { | |
506 | return cpu >> threads_shift; | |
507 | } | |
508 | EXPORT_SYMBOL_GPL(cpu_core_index_of_thread); | |
509 | ||
510 | int cpu_first_thread_of_core(int core) | |
511 | { | |
512 | return core << threads_shift; | |
513 | } | |
514 | EXPORT_SYMBOL_GPL(cpu_first_thread_of_core); | |
515 | ||
104699c0 | 516 | /* Must be called when no change can occur to cpu_present_mask, |
440a0857 NL |
517 | * i.e. during cpu online or offline. |
518 | */ | |
519 | static struct device_node *cpu_to_l2cache(int cpu) | |
520 | { | |
521 | struct device_node *np; | |
b2ea25b9 | 522 | struct device_node *cache; |
440a0857 NL |
523 | |
524 | if (!cpu_present(cpu)) | |
525 | return NULL; | |
526 | ||
527 | np = of_get_cpu_node(cpu, NULL); | |
528 | if (np == NULL) | |
529 | return NULL; | |
530 | ||
b2ea25b9 NL |
531 | cache = of_find_next_cache_node(np); |
532 | ||
440a0857 NL |
533 | of_node_put(np); |
534 | ||
b2ea25b9 | 535 | return cache; |
440a0857 | 536 | } |
1da177e4 LT |
537 | |
538 | /* Activate a secondary processor. */ | |
fa3f82c8 | 539 | void __devinit start_secondary(void *unused) |
1da177e4 LT |
540 | { |
541 | unsigned int cpu = smp_processor_id(); | |
440a0857 | 542 | struct device_node *l2_cache; |
e2075f79 | 543 | int i, base; |
1da177e4 LT |
544 | |
545 | atomic_inc(&init_mm.mm_count); | |
546 | current->active_mm = &init_mm; | |
547 | ||
548 | smp_store_cpu_info(cpu); | |
5ad57078 | 549 | set_dec(tb_ticks_per_jiffy); |
e4d76e1c | 550 | preempt_disable(); |
1da177e4 LT |
551 | cpu_callin_map[cpu] = 1; |
552 | ||
757cbd46 KG |
553 | if (smp_ops->setup_cpu) |
554 | smp_ops->setup_cpu(cpu); | |
1da177e4 LT |
555 | if (smp_ops->take_timebase) |
556 | smp_ops->take_timebase(); | |
557 | ||
d831d0b8 TB |
558 | secondary_cpu_time_init(); |
559 | ||
aeeafbfa BH |
560 | #ifdef CONFIG_PPC64 |
561 | if (system_state == SYSTEM_RUNNING) | |
562 | vdso_data->processorCount++; | |
563 | #endif | |
b7d7a240 | 564 | ipi_call_lock(); |
e545a614 | 565 | notify_cpu_starting(cpu); |
ea0f1cab | 566 | set_cpu_online(cpu, true); |
e2075f79 | 567 | /* Update sibling maps */ |
99d86705 | 568 | base = cpu_first_thread_sibling(cpu); |
e2075f79 NL |
569 | for (i = 0; i < threads_per_core; i++) { |
570 | if (cpu_is_offline(base + i)) | |
571 | continue; | |
cc1ba8ea AB |
572 | cpumask_set_cpu(cpu, cpu_sibling_mask(base + i)); |
573 | cpumask_set_cpu(base + i, cpu_sibling_mask(cpu)); | |
440a0857 NL |
574 | |
575 | /* cpu_core_map should be a superset of | |
576 | * cpu_sibling_map even if we don't have cache | |
577 | * information, so update the former here, too. | |
578 | */ | |
cc1ba8ea AB |
579 | cpumask_set_cpu(cpu, cpu_core_mask(base + i)); |
580 | cpumask_set_cpu(base + i, cpu_core_mask(cpu)); | |
e2075f79 | 581 | } |
440a0857 NL |
582 | l2_cache = cpu_to_l2cache(cpu); |
583 | for_each_online_cpu(i) { | |
584 | struct device_node *np = cpu_to_l2cache(i); | |
585 | if (!np) | |
586 | continue; | |
587 | if (np == l2_cache) { | |
cc1ba8ea AB |
588 | cpumask_set_cpu(cpu, cpu_core_mask(i)); |
589 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
590 | } |
591 | of_node_put(np); | |
592 | } | |
593 | of_node_put(l2_cache); | |
b7d7a240 | 594 | ipi_call_unlock(); |
1da177e4 LT |
595 | |
596 | local_irq_enable(); | |
597 | ||
598 | cpu_idle(); | |
fa3f82c8 BH |
599 | |
600 | BUG(); | |
1da177e4 LT |
601 | } |
602 | ||
603 | int setup_profiling_timer(unsigned int multiplier) | |
604 | { | |
605 | return 0; | |
606 | } | |
607 | ||
608 | void __init smp_cpus_done(unsigned int max_cpus) | |
609 | { | |
bfb9126d | 610 | cpumask_var_t old_mask; |
1da177e4 LT |
611 | |
612 | /* We want the setup_cpu() here to be called from CPU 0, but our | |
613 | * init thread may have been "borrowed" by another CPU in the meantime | |
614 | * se we pin us down to CPU 0 for a short while | |
615 | */ | |
bfb9126d | 616 | alloc_cpumask_var(&old_mask, GFP_NOWAIT); |
104699c0 | 617 | cpumask_copy(old_mask, tsk_cpus_allowed(current)); |
21dbeb91 | 618 | set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid)); |
1da177e4 | 619 | |
757cbd46 | 620 | if (smp_ops && smp_ops->setup_cpu) |
8cffc6ac | 621 | smp_ops->setup_cpu(boot_cpuid); |
1da177e4 | 622 | |
bfb9126d AB |
623 | set_cpus_allowed_ptr(current, old_mask); |
624 | ||
625 | free_cpumask_var(old_mask); | |
4b703a23 | 626 | |
d7294445 BH |
627 | if (smp_ops && smp_ops->bringup_done) |
628 | smp_ops->bringup_done(); | |
629 | ||
4b703a23 | 630 | dump_numa_cpu_topology(); |
d7294445 | 631 | |
1da177e4 LT |
632 | } |
633 | ||
e1f0ece1 MN |
634 | int arch_sd_sibling_asym_packing(void) |
635 | { | |
636 | if (cpu_has_feature(CPU_FTR_ASYM_SMT)) { | |
637 | printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n"); | |
638 | return SD_ASYM_PACKING; | |
639 | } | |
640 | return 0; | |
641 | } | |
642 | ||
1da177e4 LT |
643 | #ifdef CONFIG_HOTPLUG_CPU |
644 | int __cpu_disable(void) | |
645 | { | |
440a0857 | 646 | struct device_node *l2_cache; |
e2075f79 NL |
647 | int cpu = smp_processor_id(); |
648 | int base, i; | |
649 | int err; | |
1da177e4 | 650 | |
e2075f79 NL |
651 | if (!smp_ops->cpu_disable) |
652 | return -ENOSYS; | |
653 | ||
654 | err = smp_ops->cpu_disable(); | |
655 | if (err) | |
656 | return err; | |
657 | ||
658 | /* Update sibling maps */ | |
99d86705 | 659 | base = cpu_first_thread_sibling(cpu); |
e2075f79 | 660 | for (i = 0; i < threads_per_core; i++) { |
cc1ba8ea AB |
661 | cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i)); |
662 | cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu)); | |
663 | cpumask_clear_cpu(cpu, cpu_core_mask(base + i)); | |
664 | cpumask_clear_cpu(base + i, cpu_core_mask(cpu)); | |
440a0857 NL |
665 | } |
666 | ||
667 | l2_cache = cpu_to_l2cache(cpu); | |
668 | for_each_present_cpu(i) { | |
669 | struct device_node *np = cpu_to_l2cache(i); | |
670 | if (!np) | |
671 | continue; | |
672 | if (np == l2_cache) { | |
cc1ba8ea AB |
673 | cpumask_clear_cpu(cpu, cpu_core_mask(i)); |
674 | cpumask_clear_cpu(i, cpu_core_mask(cpu)); | |
440a0857 NL |
675 | } |
676 | of_node_put(np); | |
e2075f79 | 677 | } |
440a0857 NL |
678 | of_node_put(l2_cache); |
679 | ||
e2075f79 NL |
680 | |
681 | return 0; | |
1da177e4 LT |
682 | } |
683 | ||
684 | void __cpu_die(unsigned int cpu) | |
685 | { | |
686 | if (smp_ops->cpu_die) | |
687 | smp_ops->cpu_die(cpu); | |
688 | } | |
d0174c72 NF |
689 | |
690 | static DEFINE_MUTEX(powerpc_cpu_hotplug_driver_mutex); | |
691 | ||
692 | void cpu_hotplug_driver_lock() | |
693 | { | |
694 | mutex_lock(&powerpc_cpu_hotplug_driver_mutex); | |
695 | } | |
696 | ||
697 | void cpu_hotplug_driver_unlock() | |
698 | { | |
699 | mutex_unlock(&powerpc_cpu_hotplug_driver_mutex); | |
700 | } | |
abb17f9c MM |
701 | |
702 | void cpu_die(void) | |
703 | { | |
704 | if (ppc_md.cpu_die) | |
705 | ppc_md.cpu_die(); | |
fa3f82c8 BH |
706 | |
707 | /* If we return, we re-enter start_secondary */ | |
708 | start_secondary_resume(); | |
abb17f9c | 709 | } |
fa3f82c8 | 710 | |
1da177e4 | 711 | #endif |