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powerpc/mm/radix: Update LPCR only if it is powernv
[deliverable/linux.git] / arch / powerpc / kvm / book3s.c
CommitLineData
2f4cf5e4
AG		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 *
8 * Description:
9 * This file is derived from arch/powerpc/kvm/44x.c,
10 * by Hollis Blanchard <hollisb@us.ibm.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License, version 2, as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/kvm_host.h>
18#include <linux/err.h>
66b15db6 19#include <linux/export.h>
329d20ba 20#include <linux/slab.h>
398a76c6
AG		 21#include <linux/module.h>
22#include <linux/miscdevice.h>
2f4cf5e4
AG		 23
24#include <asm/reg.h>
25#include <asm/cputable.h>
26#include <asm/cacheflush.h>
27#include <asm/tlbflush.h>
28#include <asm/uaccess.h>
29#include <asm/io.h>
30#include <asm/kvm_ppc.h>
31#include <asm/kvm_book3s.h>
32#include <asm/mmu_context.h>
149dbdb1 33#include <asm/page.h>
5a0e3ad6 34#include <linux/gfp.h>
2f4cf5e4
AG		 35#include <linux/sched.h>
36#include <linux/vmalloc.h>
9fb244a2 37#include <linux/highmem.h>
2f4cf5e4 38
cbbc58d4 39#include "book3s.h"
c4befc58
PM		 40#include "trace.h"
41
2f4cf5e4
AG		 42#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
43
44/* #define EXIT_DEBUG */
07b0907d 45
2f4cf5e4
AG		 46struct kvm_stats_debugfs_item debugfs_entries[] = {
47 { "exits", VCPU_STAT(sum_exits) },
48 { "mmio", VCPU_STAT(mmio_exits) },
49 { "sig", VCPU_STAT(signal_exits) },
50 { "sysc", VCPU_STAT(syscall_exits) },
51 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
52 { "dec", VCPU_STAT(dec_exits) },
53 { "ext_intr", VCPU_STAT(ext_intr_exits) },
54 { "queue_intr", VCPU_STAT(queue_intr) },
f7819512 55 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
62bea5bf 56 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
3491caf2 57 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
2f4cf5e4
AG		 58 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
59 { "pf_storage", VCPU_STAT(pf_storage) },
60 { "sp_storage", VCPU_STAT(sp_storage) },
61 { "pf_instruc", VCPU_STAT(pf_instruc) },
62 { "sp_instruc", VCPU_STAT(sp_instruc) },
63 { "ld", VCPU_STAT(ld) },
64 { "ld_slow", VCPU_STAT(ld_slow) },
65 { "st", VCPU_STAT(st) },
66 { "st_slow", VCPU_STAT(st_slow) },
67 { NULL }
68};
69
c01e3f66
AG		 70void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
71{
72 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
73 ulong pc = kvmppc_get_pc(vcpu);
74 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
75 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
76 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
77 }
78}
79EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
80
699cc876
AK		 81static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
82{
a78b55d1 83 if (!is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 84 return to_book3s(vcpu)->hior;
85 return 0;
86}
87
88static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
89 unsigned long pending_now, unsigned long old_pending)
90{
a78b55d1 91 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 92 return;
93 if (pending_now)
5deb8e7a 94 kvmppc_set_int_pending(vcpu, 1);
699cc876 95 else if (old_pending)
5deb8e7a 96 kvmppc_set_int_pending(vcpu, 0);
699cc876
AK		 97}
98
99static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
100{
101 ulong crit_raw;
102 ulong crit_r1;
103 bool crit;
104
a78b55d1 105 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 106 return false;
107
5deb8e7a 108 crit_raw = kvmppc_get_critical(vcpu);
699cc876
AK		 109 crit_r1 = kvmppc_get_gpr(vcpu, 1);
110
111 /* Truncate crit indicators in 32 bit mode */
5deb8e7a 112 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
699cc876
AK		 113 crit_raw &= 0xffffffff;
114 crit_r1 &= 0xffffffff;
115 }
116
117 /* Critical section when crit == r1 */
118 crit = (crit_raw == crit_r1);
119 /* ... and we're in supervisor mode */
5deb8e7a 120 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
699cc876
AK		 121
122 return crit;
123}
124
2f4cf5e4
AG		 125void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
126{
c01e3f66 127 kvmppc_unfixup_split_real(vcpu);
5deb8e7a
AG		 128 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
129 kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags);
f05ed4d5 130 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
2f4cf5e4
AG		 131 vcpu->arch.mmu.reset_msr(vcpu);
132}
133
583617b7 134static int kvmppc_book3s_vec2irqprio(unsigned int vec)
2f4cf5e4
AG		 135{
136 unsigned int prio;
137
2f4cf5e4
AG		 138 switch (vec) {
139 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
140 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
141 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
142 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
143 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
144 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
145 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
17bd1580 146 case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break;
2f4cf5e4
AG		 147 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
148 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
149 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
150 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
151 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
152 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
153 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
154 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
616dff86 155 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
2f4cf5e4
AG		 156 default: prio = BOOK3S_IRQPRIO_MAX; break;
157 }
158
583617b7
AG		 159 return prio;
160}
161
bc5ad3f3 162void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
7706664d
AG		 163 unsigned int vec)
164{
f05ed4d5
PM		 165 unsigned long old_pending = vcpu->arch.pending_exceptions;
166
7706664d
AG		 167 clear_bit(kvmppc_book3s_vec2irqprio(vec),
168 &vcpu->arch.pending_exceptions);
9ee18b1e 169
f05ed4d5
PM		 170 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
171 old_pending);
7706664d
AG		 172}
173
583617b7
AG		 174void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
175{
176 vcpu->stat.queue_intr++;
177
178 set_bit(kvmppc_book3s_vec2irqprio(vec),
179 &vcpu->arch.pending_exceptions);
2f4cf5e4
AG		 180#ifdef EXIT_DEBUG
181 printk(KERN_INFO "Queueing interrupt %x\n", vec);
182#endif
183}
2ba9f0d8 184EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
2f4cf5e4 185
25a8a02d 186void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
2f4cf5e4 187{
3cf658b6
PM		 188 /* might as well deliver this straight away */
189 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
2f4cf5e4 190}
2ba9f0d8 191EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
2f4cf5e4
AG		 192
193void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
194{
195 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
196}
2ba9f0d8 197EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
2f4cf5e4
AG		 198
199int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
200{
44075d95 201 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2f4cf5e4 202}
2ba9f0d8 203EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
2f4cf5e4 204
7706664d
AG		 205void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
206{
207 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
208}
2ba9f0d8 209EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
7706664d 210
2f4cf5e4
AG		 211void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
212 struct kvm_interrupt *irq)
213{
17bd1580
AG		 214 unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
215
216 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
217 vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
218
219 kvmppc_book3s_queue_irqprio(vcpu, vec);
2f4cf5e4
AG		 220}
221
4fe27d2a 222void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
18978768
AG		 223{
224 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
17bd1580 225 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
18978768
AG		 226}
227
8de12015
AG		 228void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
229 ulong flags)
230{
231 kvmppc_set_dar(vcpu, dar);
232 kvmppc_set_dsisr(vcpu, flags);
233 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
234}
235
236void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
237{
238 u64 msr = kvmppc_get_msr(vcpu);
239 msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
240 msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT);
241 kvmppc_set_msr_fast(vcpu, msr);
242 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
243}
244
5358a963
TH		 245static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
246 unsigned int priority)
2f4cf5e4
AG		 247{
248 int deliver = 1;
249 int vec = 0;
f05ed4d5 250 bool crit = kvmppc_critical_section(vcpu);
2f4cf5e4
AG		 251
252 switch (priority) {
253 case BOOK3S_IRQPRIO_DECREMENTER:
5deb8e7a 254 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 255 vec = BOOK3S_INTERRUPT_DECREMENTER;
256 break;
257 case BOOK3S_IRQPRIO_EXTERNAL:
17bd1580 258 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
5deb8e7a 259 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 260 vec = BOOK3S_INTERRUPT_EXTERNAL;
261 break;
262 case BOOK3S_IRQPRIO_SYSTEM_RESET:
263 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
264 break;
265 case BOOK3S_IRQPRIO_MACHINE_CHECK:
266 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
267 break;
268 case BOOK3S_IRQPRIO_DATA_STORAGE:
269 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
270 break;
271 case BOOK3S_IRQPRIO_INST_STORAGE:
272 vec = BOOK3S_INTERRUPT_INST_STORAGE;
273 break;
274 case BOOK3S_IRQPRIO_DATA_SEGMENT:
275 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
276 break;
277 case BOOK3S_IRQPRIO_INST_SEGMENT:
278 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
279 break;
280 case BOOK3S_IRQPRIO_ALIGNMENT:
281 vec = BOOK3S_INTERRUPT_ALIGNMENT;
282 break;
283 case BOOK3S_IRQPRIO_PROGRAM:
284 vec = BOOK3S_INTERRUPT_PROGRAM;
285 break;
286 case BOOK3S_IRQPRIO_VSX:
287 vec = BOOK3S_INTERRUPT_VSX;
288 break;
289 case BOOK3S_IRQPRIO_ALTIVEC:
290 vec = BOOK3S_INTERRUPT_ALTIVEC;
291 break;
292 case BOOK3S_IRQPRIO_FP_UNAVAIL:
293 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
294 break;
295 case BOOK3S_IRQPRIO_SYSCALL:
296 vec = BOOK3S_INTERRUPT_SYSCALL;
297 break;
298 case BOOK3S_IRQPRIO_DEBUG:
299 vec = BOOK3S_INTERRUPT_TRACE;
300 break;
301 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
302 vec = BOOK3S_INTERRUPT_PERFMON;
303 break;
616dff86
AG		 304 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
305 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
306 break;
2f4cf5e4
AG		 307 default:
308 deliver = 0;
309 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
310 break;
311 }
312
313#if 0
314 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
315#endif
316
317 if (deliver)
3cf658b6 318 kvmppc_inject_interrupt(vcpu, vec, 0);
2f4cf5e4
AG		 319
320 return deliver;
321}
322
17bd1580
AG		 323/*
324 * This function determines if an irqprio should be cleared once issued.
325 */
326static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
327{
328 switch (priority) {
329 case BOOK3S_IRQPRIO_DECREMENTER:
330 /* DEC interrupts get cleared by mtdec */
331 return false;
332 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
333 /* External interrupts get cleared by userspace */
334 return false;
335 }
336
337 return true;
338}
339
a8e4ef84 340int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
2f4cf5e4
AG		 341{
342 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 343 unsigned long old_pending = vcpu->arch.pending_exceptions;
2f4cf5e4
AG		 344 unsigned int priority;
345
2f4cf5e4
AG		 346#ifdef EXIT_DEBUG
347 if (vcpu->arch.pending_exceptions)
348 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
349#endif
350 priority = __ffs(*pending);
ada7ba17 351 while (priority < BOOK3S_IRQPRIO_MAX) {
7706664d 352 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
17bd1580 353 clear_irqprio(vcpu, priority)) {
2f4cf5e4
AG		 354 clear_bit(priority, &vcpu->arch.pending_exceptions);
355 break;
356 }
357
358 priority = find_next_bit(pending,
359 BITS_PER_BYTE * sizeof(*pending),
360 priority + 1);
361 }
90bba358
AG		 362
363 /* Tell the guest about our interrupt status */
f05ed4d5 364 kvmppc_update_int_pending(vcpu, *pending, old_pending);
a8e4ef84
AG		 365
366 return 0;
2f4cf5e4 367}
2ba9f0d8 368EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
2f4cf5e4 369
ba049e93 370kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
93b159b4 371 bool *writable)
e8508940 372{
89b68c96
AG		 373 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
374 gfn_t gfn = gpa >> PAGE_SHIFT;
e8508940 375
5deb8e7a 376 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
bbcc9c06
BH		 377 mp_pa = (uint32_t)mp_pa;
378
e8508940 379 /* Magic page override */
89b68c96
AG		 380 gpa &= ~0xFFFULL;
381 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
e8508940 382 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
ba049e93 383 kvm_pfn_t pfn;
e8508940 384
ba049e93 385 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
e8508940 386 get_page(pfn_to_page(pfn));
93b159b4
PM		 387 if (writable)
388 *writable = true;
e8508940
AG		 389 return pfn;
390 }
391
93b159b4 392 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
e8508940 393}
89b68c96 394EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
e8508940 395
7d15c06f
AG		 396int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
397 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
2f4cf5e4 398{
7d15c06f
AG		 399 bool data = (xlid == XLATE_DATA);
400 bool iswrite = (xlrw == XLATE_WRITE);
5deb8e7a 401 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
2f4cf5e4
AG		 402 int r;
403
404 if (relocated) {
93b159b4 405 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
2f4cf5e4
AG		 406 } else {
407 pte->eaddr = eaddr;
28e83b4f 408 pte->raddr = eaddr & KVM_PAM;
3eeafd7d 409 pte->vpage = VSID_REAL | eaddr >> 12;
2f4cf5e4
AG		 410 pte->may_read = true;
411 pte->may_write = true;
412 pte->may_execute = true;
413 r = 0;
c01e3f66
AG		 414
415 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
416 !data) {
417 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
418 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
419 pte->raddr &= ~SPLIT_HACK_MASK;
420 }
2f4cf5e4
AG		 421 }
422
423 return r;
424}
425
51f04726
MC		 426int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
427 u32 *inst)
428{
429 ulong pc = kvmppc_get_pc(vcpu);
430 int r;
431
432 if (type == INST_SC)
433 pc -= 4;
434
435 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
436 if (r == EMULATE_DONE)
437 return r;
438 else
439 return EMULATE_AGAIN;
440}
441EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
442
2f4cf5e4
AG		 443int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
444{
445 return 0;
446}
447
f61c94bb
BB		 448int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
449{
450 return 0;
451}
452
453void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
454{
455}
456
3a167bea
AK		 457int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
458 struct kvm_sregs *sregs)
459{
cbbc58d4 460 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
3a167bea
AK		 461}
462
463int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
464 struct kvm_sregs *sregs)
465{
cbbc58d4 466 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
3a167bea
AK		 467}
468
2f4cf5e4
AG		 469int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
470{
471 int i;
472
c7f38f46 473 regs->pc = kvmppc_get_pc(vcpu);
992b5b29 474 regs->cr = kvmppc_get_cr(vcpu);
c7f38f46
AG		 475 regs->ctr = kvmppc_get_ctr(vcpu);
476 regs->lr = kvmppc_get_lr(vcpu);
992b5b29 477 regs->xer = kvmppc_get_xer(vcpu);
5deb8e7a
AG		 478 regs->msr = kvmppc_get_msr(vcpu);
479 regs->srr0 = kvmppc_get_srr0(vcpu);
480 regs->srr1 = kvmppc_get_srr1(vcpu);
2f4cf5e4 481 regs->pid = vcpu->arch.pid;
5deb8e7a
AG		 482 regs->sprg0 = kvmppc_get_sprg0(vcpu);
483 regs->sprg1 = kvmppc_get_sprg1(vcpu);
484 regs->sprg2 = kvmppc_get_sprg2(vcpu);
485 regs->sprg3 = kvmppc_get_sprg3(vcpu);
486 regs->sprg4 = kvmppc_get_sprg4(vcpu);
487 regs->sprg5 = kvmppc_get_sprg5(vcpu);
488 regs->sprg6 = kvmppc_get_sprg6(vcpu);
489 regs->sprg7 = kvmppc_get_sprg7(vcpu);
2f4cf5e4
AG		 490
491 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 492 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
2f4cf5e4
AG		 493
494 return 0;
495}
496
497int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
498{
499 int i;
500
c7f38f46 501 kvmppc_set_pc(vcpu, regs->pc);
992b5b29 502 kvmppc_set_cr(vcpu, regs->cr);
c7f38f46
AG		 503 kvmppc_set_ctr(vcpu, regs->ctr);
504 kvmppc_set_lr(vcpu, regs->lr);
992b5b29 505 kvmppc_set_xer(vcpu, regs->xer);
2f4cf5e4 506 kvmppc_set_msr(vcpu, regs->msr);
5deb8e7a
AG		 507 kvmppc_set_srr0(vcpu, regs->srr0);
508 kvmppc_set_srr1(vcpu, regs->srr1);
509 kvmppc_set_sprg0(vcpu, regs->sprg0);
510 kvmppc_set_sprg1(vcpu, regs->sprg1);
511 kvmppc_set_sprg2(vcpu, regs->sprg2);
512 kvmppc_set_sprg3(vcpu, regs->sprg3);
513 kvmppc_set_sprg4(vcpu, regs->sprg4);
514 kvmppc_set_sprg5(vcpu, regs->sprg5);
515 kvmppc_set_sprg6(vcpu, regs->sprg6);
516 kvmppc_set_sprg7(vcpu, regs->sprg7);
2f4cf5e4 517
8e5b26b5
AG		 518 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
519 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
2f4cf5e4
AG		 520
521 return 0;
522}
523
2f4cf5e4
AG		 524int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
525{
526 return -ENOTSUPP;
527}
528
529int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
530{
531 return -ENOTSUPP;
532}
533
8a41ea53
MC		 534int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
535 union kvmppc_one_reg *val)
a136a8bd 536{
8a41ea53 537 int r = 0;
a8bd19ef 538 long int i;
a136a8bd 539
8a41ea53 540 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
a136a8bd
PM		 541 if (r == -EINVAL) {
542 r = 0;
8a41ea53 543 switch (id) {
a136a8bd 544 case KVM_REG_PPC_DAR:
8a41ea53 545 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
a136a8bd
PM		 546 break;
547 case KVM_REG_PPC_DSISR:
8a41ea53 548 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
a136a8bd 549 break;
a8bd19ef 550 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 551 i = id - KVM_REG_PPC_FPR0;
552 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
a8bd19ef
PM		 553 break;
554 case KVM_REG_PPC_FPSCR:
8a41ea53 555 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
a8bd19ef 556 break;
efff1912
PM		 557#ifdef CONFIG_VSX
558 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
559 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 560 i = id - KVM_REG_PPC_VSR0;
561 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
562 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
efff1912
PM		 563 } else {
564 r = -ENXIO;
565 }
566 break;
567#endif /* CONFIG_VSX */
8a41ea53
MC		 568 case KVM_REG_PPC_DEBUG_INST:
569 *val = get_reg_val(id, INS_TW);
8c32a2ea 570 break;
8b78645c
PM		 571#ifdef CONFIG_KVM_XICS
572 case KVM_REG_PPC_ICP_STATE:
573 if (!vcpu->arch.icp) {
574 r = -ENXIO;
575 break;
576 }
8a41ea53 577 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
8b78645c
PM		 578 break;
579#endif /* CONFIG_KVM_XICS */
616dff86 580 case KVM_REG_PPC_FSCR:
8a41ea53 581 *val = get_reg_val(id, vcpu->arch.fscr);
616dff86 582 break;
e14e7a1e 583 case KVM_REG_PPC_TAR:
8a41ea53 584 *val = get_reg_val(id, vcpu->arch.tar);
e14e7a1e 585 break;
2e23f544 586 case KVM_REG_PPC_EBBHR:
8a41ea53 587 *val = get_reg_val(id, vcpu->arch.ebbhr);
2e23f544
AG		 588 break;
589 case KVM_REG_PPC_EBBRR:
8a41ea53 590 *val = get_reg_val(id, vcpu->arch.ebbrr);
2e23f544
AG		 591 break;
592 case KVM_REG_PPC_BESCR:
8a41ea53 593 *val = get_reg_val(id, vcpu->arch.bescr);
2e23f544 594 break;
8f42ab27 595 case KVM_REG_PPC_VTB:
8a41ea53 596 *val = get_reg_val(id, vcpu->arch.vtb);
8f42ab27 597 break;
06da28e7 598 case KVM_REG_PPC_IC:
8a41ea53 599 *val = get_reg_val(id, vcpu->arch.ic);
06da28e7 600 break;
a136a8bd
PM		 601 default:
602 r = -EINVAL;
603 break;
604 }
605 }
a136a8bd
PM		 606
607 return r;
608}
609
8a41ea53
MC		 610int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
611 union kvmppc_one_reg *val)
a136a8bd 612{
8a41ea53 613 int r = 0;
a8bd19ef 614 long int i;
a136a8bd 615
8a41ea53 616 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
a136a8bd
PM		 617 if (r == -EINVAL) {
618 r = 0;
8a41ea53 619 switch (id) {
a136a8bd 620 case KVM_REG_PPC_DAR:
8a41ea53 621 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
a136a8bd
PM		 622 break;
623 case KVM_REG_PPC_DSISR:
8a41ea53 624 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
a136a8bd 625 break;
a8bd19ef 626 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 627 i = id - KVM_REG_PPC_FPR0;
628 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
a8bd19ef
PM		 629 break;
630 case KVM_REG_PPC_FPSCR:
8a41ea53 631 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
a8bd19ef 632 break;
efff1912
PM		 633#ifdef CONFIG_VSX
634 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
635 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 636 i = id - KVM_REG_PPC_VSR0;
637 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
638 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
efff1912
PM		 639 } else {
640 r = -ENXIO;
641 }
642 break;
643#endif /* CONFIG_VSX */
8b78645c
PM		 644#ifdef CONFIG_KVM_XICS
645 case KVM_REG_PPC_ICP_STATE:
646 if (!vcpu->arch.icp) {
647 r = -ENXIO;
648 break;
649 }
650 r = kvmppc_xics_set_icp(vcpu,
8a41ea53 651 set_reg_val(id, *val));
8b78645c
PM		 652 break;
653#endif /* CONFIG_KVM_XICS */
616dff86 654 case KVM_REG_PPC_FSCR:
8a41ea53 655 vcpu->arch.fscr = set_reg_val(id, *val);
616dff86 656 break;
e14e7a1e 657 case KVM_REG_PPC_TAR:
8a41ea53 658 vcpu->arch.tar = set_reg_val(id, *val);
e14e7a1e 659 break;
2e23f544 660 case KVM_REG_PPC_EBBHR:
8a41ea53 661 vcpu->arch.ebbhr = set_reg_val(id, *val);
2e23f544
AG		 662 break;
663 case KVM_REG_PPC_EBBRR:
8a41ea53 664 vcpu->arch.ebbrr = set_reg_val(id, *val);
2e23f544
AG		 665 break;
666 case KVM_REG_PPC_BESCR:
8a41ea53 667 vcpu->arch.bescr = set_reg_val(id, *val);
2e23f544 668 break;
8f42ab27 669 case KVM_REG_PPC_VTB:
8a41ea53 670 vcpu->arch.vtb = set_reg_val(id, *val);
8f42ab27 671 break;
06da28e7 672 case KVM_REG_PPC_IC:
8a41ea53 673 vcpu->arch.ic = set_reg_val(id, *val);
06da28e7 674 break;
a136a8bd
PM		 675 default:
676 r = -EINVAL;
677 break;
678 }
679 }
680
681 return r;
682}
683
3a167bea
AK		 684void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
685{
cbbc58d4 686 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
3a167bea
AK		 687}
688
689void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
690{
cbbc58d4 691 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
3a167bea
AK		 692}
693
694void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
695{
cbbc58d4 696 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
3a167bea 697}
2ba9f0d8 698EXPORT_SYMBOL_GPL(kvmppc_set_msr);
3a167bea
AK		 699
700int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
701{
cbbc58d4 702 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
3a167bea
AK		 703}
704
2f4cf5e4
AG		 705int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
706 struct kvm_translation *tr)
707{
708 return 0;
709}
710
092d62ee
BB		 711int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
712 struct kvm_guest_debug *dbg)
713{
a59c1d9e
MS		 714 vcpu->guest_debug = dbg->control;
715 return 0;
092d62ee
BB		 716}
717
d02d4d15 718void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
dfd4d47e 719{
dfd4d47e
SW		 720 kvmppc_core_queue_dec(vcpu);
721 kvm_vcpu_kick(vcpu);
722}
3a167bea
AK		 723
724struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
725{
cbbc58d4 726 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
3a167bea
AK		 727}
728
729void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
730{
cbbc58d4 731 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
3a167bea
AK		 732}
733
734int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
735{
cbbc58d4 736 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
3a167bea
AK		 737}
738
739int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
740{
cbbc58d4 741 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
3a167bea
AK		 742}
743
5587027c 744void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
3a167bea
AK		 745 struct kvm_memory_slot *dont)
746{
cbbc58d4 747 kvm->arch.kvm_ops->free_memslot(free, dont);
3a167bea
AK		 748}
749
5587027c 750int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
3a167bea
AK		 751 unsigned long npages)
752{
cbbc58d4 753 return kvm->arch.kvm_ops->create_memslot(slot, npages);
3a167bea
AK		 754}
755
756void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
757{
cbbc58d4 758 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
3a167bea
AK		 759}
760
761int kvmppc_core_prepare_memory_region(struct kvm *kvm,
762 struct kvm_memory_slot *memslot,
09170a49 763 const struct kvm_userspace_memory_region *mem)
3a167bea 764{
cbbc58d4 765 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
3a167bea
AK		 766}
767
768void kvmppc_core_commit_memory_region(struct kvm *kvm,
09170a49 769 const struct kvm_userspace_memory_region *mem,
f36f3f28
PB		 770 const struct kvm_memory_slot *old,
771 const struct kvm_memory_slot *new)
3a167bea 772{
f36f3f28 773 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new);
3a167bea
AK		 774}
775
776int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
777{
cbbc58d4 778 return kvm->arch.kvm_ops->unmap_hva(kvm, hva);
3a167bea 779}
2ba9f0d8 780EXPORT_SYMBOL_GPL(kvm_unmap_hva);
3a167bea
AK		 781
782int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
783{
cbbc58d4 784 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
3a167bea
AK		 785}
786
57128468 787int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
3a167bea 788{
57128468 789 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
3a167bea
AK		 790}
791
792int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
793{
cbbc58d4 794 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
3a167bea
AK		 795}
796
797void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
798{
cbbc58d4 799 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
3a167bea
AK		 800}
801
802void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
803{
cbbc58d4 804 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
3a167bea
AK		 805}
806
807int kvmppc_core_init_vm(struct kvm *kvm)
808{
809
810#ifdef CONFIG_PPC64
366baf28 811 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
3a167bea
AK		 812 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
813#endif
814
cbbc58d4 815 return kvm->arch.kvm_ops->init_vm(kvm);
3a167bea
AK		 816}
817
818void kvmppc_core_destroy_vm(struct kvm *kvm)
819{
cbbc58d4 820 kvm->arch.kvm_ops->destroy_vm(kvm);
3a167bea
AK		 821
822#ifdef CONFIG_PPC64
823 kvmppc_rtas_tokens_free(kvm);
824 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
825#endif
826}
827
99342cf8
DG		 828int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
829{
830 unsigned long size = kvmppc_get_gpr(vcpu, 4);
831 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
832 u64 buf;
3eb4ee68 833 int srcu_idx;
99342cf8
DG		 834 int ret;
835
836 if (!is_power_of_2(size) || (size > sizeof(buf)))
837 return H_TOO_HARD;
838
3eb4ee68 839 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 840 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 841 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 842 if (ret != 0)
843 return H_TOO_HARD;
844
845 switch (size) {
846 case 1:
847 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
848 break;
849
850 case 2:
851 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
852 break;
853
854 case 4:
855 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
856 break;
857
858 case 8:
859 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
860 break;
861
862 default:
863 BUG();
864 }
865
866 return H_SUCCESS;
867}
868EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
869
870int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
871{
872 unsigned long size = kvmppc_get_gpr(vcpu, 4);
873 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
874 unsigned long val = kvmppc_get_gpr(vcpu, 6);
875 u64 buf;
3eb4ee68 876 int srcu_idx;
99342cf8
DG		 877 int ret;
878
879 switch (size) {
880 case 1:
881 *(u8 *)&buf = val;
882 break;
883
884 case 2:
885 *(__be16 *)&buf = cpu_to_be16(val);
886 break;
887
888 case 4:
889 *(__be32 *)&buf = cpu_to_be32(val);
890 break;
891
892 case 8:
893 *(__be64 *)&buf = cpu_to_be64(val);
894 break;
895
896 default:
897 return H_TOO_HARD;
898 }
899
3eb4ee68 900 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 901 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 902 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 903 if (ret != 0)
904 return H_TOO_HARD;
905
906 return H_SUCCESS;
907}
908EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
909
3a167bea
AK		 910int kvmppc_core_check_processor_compat(void)
911{
cbbc58d4
AK		 912 /*
913 * We always return 0 for book3s. We check
60acc4eb 914 * for compatibility while loading the HV
cbbc58d4
AK		 915 * or PR module
916 */
917 return 0;
918}
919
ae2113a4
PM		 920int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
921{
922 return kvm->arch.kvm_ops->hcall_implemented(hcall);
923}
924
cbbc58d4
AK		 925static int kvmppc_book3s_init(void)
926{
927 int r;
928
929 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
930 if (r)
931 return r;
ab78475c 932#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 933 r = kvmppc_book3s_init_pr();
934#endif
935 return r;
936
937}
938
939static void kvmppc_book3s_exit(void)
940{
ab78475c 941#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 942 kvmppc_book3s_exit_pr();
943#endif
944 kvm_exit();
3a167bea 945}
cbbc58d4
AK		 946
947module_init(kvmppc_book3s_init);
948module_exit(kvmppc_book3s_exit);
398a76c6
AG		 949
950/* On 32bit this is our one and only kernel module */
ab78475c 951#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
398a76c6
AG		 952MODULE_ALIAS_MISCDEV(KVM_MINOR);
953MODULE_ALIAS("devname:kvm");
954#endif
Linux kernel - Deliverables
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