[deliverable/linux.git] / arch / powerpc / kvm / book3s_32_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>

/* #define DEBUG_MMU */
/* #define DEBUG_MMU_PTE */
/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

#ifdef DEBUG_MMU_PTE
#define dprintk_pte(X...) printk(KERN_INFO X)
#else
#define dprintk_pte(X...) do { } while(0)
#endif

#define PTEG_FLAG_ACCESSED	0x00000100
#define PTEG_FLAG_DIRTY		0x00000080
#ifndef SID_SHIFT
#define SID_SHIFT		28
#endif

static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
{
#ifdef DEBUG_MMU_PTE_IP
	return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
#else
	return true;
#endif
}

static inline u32 sr_vsid(u32 sr_raw)
{
	return sr_raw & 0x0fffffff;
}

static inline bool sr_valid(u32 sr_raw)
{
	return (sr_raw & 0x80000000) ? false : true;
}

static inline bool sr_ks(u32 sr_raw)
{
	return (sr_raw & 0x40000000) ? true: false;
}

static inline bool sr_kp(u32 sr_raw)
{
	return (sr_raw & 0x20000000) ? true: false;
}

static inline bool sr_nx(u32 sr_raw)
{
	return (sr_raw & 0x10000000) ? true: false;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite);
static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid);

static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
{
	return vcpu->arch.shared->sr[(eaddr >> 28) & 0xf];
}

static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	u64 vsid;
	struct kvmppc_pte pte;

	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
		return pte.vpage;

	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
	return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
}

static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, 0);
}

static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
				      u32 sre, gva_t eaddr,
				      bool primary)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	u32 page, hash, pteg, htabmask;
	hva_t r;

	page = (eaddr & 0x0FFFFFFF) >> 12;
	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;

	hash = ((sr_vsid(sre) ^ page) << 6);
	if (!primary)
		hash = ~hash;
	hash &= htabmask;

	pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;

	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
		kvmppc_get_pc(&vcpu_book3s->vcpu), eaddr, vcpu_book3s->sdr1, pteg,
		sr_vsid(sre));

	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
{
	return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
	       (primary ? 0 : 0x40) | 0x80000000;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_bat *bat;
	int i;

	for (i = 0; i < 8; i++) {
		if (data)
			bat = &vcpu_book3s->dbat[i];
		else
			bat = &vcpu_book3s->ibat[i];

		if (vcpu->arch.shared->msr & MSR_PR) {
			if (!bat->vp)
				continue;
		} else {
			if (!bat->vs)
				continue;
		}

		if (check_debug_ip(vcpu))
		{
			dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
				    data ? 'd' : 'i', i, eaddr, bat->bepi,
				    bat->bepi_mask);
		}
		if ((eaddr & bat->bepi_mask) == bat->bepi) {
			u64 vsid;
			kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
				eaddr >> SID_SHIFT, &vsid);
			vsid <<= 16;
			pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;

			pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
			pte->may_read = bat->pp;
			pte->may_write = bat->pp > 1;
			pte->may_execute = true;
			if (!pte->may_read) {
				printk(KERN_INFO "BAT is not readable!\n");
				continue;
			}
			if (iswrite && !pte->may_write) {
				dprintk_pte("BAT is read-only!\n");
				continue;
			}

			return 0;
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
				     struct kvmppc_pte *pte, bool data,
				     bool iswrite, bool primary)
{
	u32 sre;
	hva_t ptegp;
	u32 pteg[16];
	u32 pte0, pte1;
	u32 ptem = 0;
	int i;
	int found = 0;

	sre = find_sr(vcpu, eaddr);

	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
		    sr_vsid(sre), sre);

	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);

	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
	if (kvm_is_error_hva(ptegp)) {
		printk(KERN_INFO "KVM: Invalid PTEG!\n");
		goto no_page_found;
	}

	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	for (i=0; i<16; i+=2) {
		pte0 = be32_to_cpu(pteg[i]);
		pte1 = be32_to_cpu(pteg[i + 1]);
		if (ptem == pte0) {
			u8 pp;

			pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
			pp = pte1 & 3;

			if ((sr_kp(sre) &&  (vcpu->arch.shared->msr & MSR_PR)) ||
			    (sr_ks(sre) && !(vcpu->arch.shared->msr & MSR_PR)))
				pp |= 4;

			pte->may_write = false;
			pte->may_read = false;
			pte->may_execute = true;
			switch (pp) {
				case 0:
				case 1:
				case 2:
				case 6:
					pte->may_write = true;
				case 3:
				case 5:
				case 7:
					pte->may_read = true;
					break;
			}

			dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
				    pte0, pte1, pp);
			found = 1;
			break;
		}
	}

	/* Update PTE C and A bits, so the guest's swapper knows we used the
	   page */
	if (found) {
		u32 pte_r = pte1;
		char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));

		/*
		 * Use single-byte writes to update the HPTE, to
		 * conform to what real hardware does.
		 */
		if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
			pte_r |= PTEG_FLAG_ACCESSED;
			put_user(pte_r >> 8, addr + 2);
		}
		if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
			pte_r |= PTEG_FLAG_DIRTY;
			put_user(pte_r, addr + 3);
		}
		if (!pte->may_read || (iswrite && !pte->may_write))
			return -EPERM;
		return 0;
	}

no_page_found:

	if (check_debug_ip(vcpu)) {
		dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
			    to_book3s(vcpu)->sdr1, ptegp);
		for (i=0; i<16; i+=2) {
			dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
				    i, be32_to_cpu(pteg[i]),
				    be32_to_cpu(pteg[i+1]), ptem);
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				      struct kvmppc_pte *pte, bool data,
				      bool iswrite)
{
	int r;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	pte->eaddr = eaddr;
	pte->page_size = MMU_PAGE_4K;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(vcpu->arch.shared->msr & MSR_PR)) {
		pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
		pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
		pte->raddr &= KVM_PAM;
		pte->may_execute = true;
		pte->may_read = true;
		pte->may_write = true;

		return 0;
	}

	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
	if (r < 0)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, true);
	if (r < 0)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, false);

	return r;
}


static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
{
	return vcpu->arch.shared->sr[srnum];
}

static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	vcpu->arch.shared->sr[srnum] = value;
	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
}

static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
{
	int i;
	struct kvm_vcpu *v;

	/* flush this VA on all cpus */
	kvm_for_each_vcpu(i, v, vcpu->kvm)
		kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
}

static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	u32 sr;
	u64 gvsid = esid;

	if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
		sr = find_sr(vcpu, ea);
		if (sr_valid(sr))
			gvsid = sr_vsid(sr);
	}

	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	   that in the real-mode context (and hope RM doesn't access
	   high memory) */
	switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		*vsid = VSID_REAL_IR | gvsid;
		break;
	case MSR_DR:
		*vsid = VSID_REAL_DR | gvsid;
		break;
	case MSR_DR|MSR_IR:
		if (sr_valid(sr))
			*vsid = sr_vsid(sr);
		else
			*vsid = VSID_BAT | gvsid;
		break;
	default:
		BUG();
	}

	if (vcpu->arch.shared->msr & MSR_PR)
		*vsid |= VSID_PR;

	return 0;
}

static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return true;
}


void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;

	mmu->slbmte = NULL;
	mmu->slbmfee = NULL;
	mmu->slbmfev = NULL;
	mmu->slbie = NULL;
	mmu->slbia = NULL;
}
Commit	Line	Data
01235180 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
	29
	30	/* #define DEBUG_MMU */
	31	/* #define DEBUG_MMU_PTE */
	32	/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
	33
	34	#ifdef DEBUG_MMU
	35	#define dprintk(X...) printk(KERN_INFO X)
	36	#else
	37	#define dprintk(X...) do { } while(0)
	38	#endif
	39
e425a6de	40	#ifdef DEBUG_MMU_PTE
01235180 AG	41	#define dprintk_pte(X...) printk(KERN_INFO X)
	42	#else
	43	#define dprintk_pte(X...) do { } while(0)
	44	#endif
	45
	46	#define PTEG_FLAG_ACCESSED 0x00000100
	47	#define PTEG_FLAG_DIRTY 0x00000080
07b0907d AG	48	#ifndef SID_SHIFT
	49	#define SID_SHIFT 28
	50	#endif
01235180 AG	51
	52	static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
	53	{
	54	#ifdef DEBUG_MMU_PTE_IP
	55	return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
	56	#else
	57	return true;
	58	#endif
	59	}
	60
8e865178 AG	61	static inline u32 sr_vsid(u32 sr_raw)
	62	{
	63	return sr_raw & 0x0fffffff;
	64	}
	65
	66	static inline bool sr_valid(u32 sr_raw)
	67	{
	68	return (sr_raw & 0x80000000) ? false : true;
	69	}
	70
	71	static inline bool sr_ks(u32 sr_raw)
	72	{
	73	return (sr_raw & 0x40000000) ? true: false;
	74	}
	75
	76	static inline bool sr_kp(u32 sr_raw)
	77	{
	78	return (sr_raw & 0x20000000) ? true: false;
	79	}
	80
	81	static inline bool sr_nx(u32 sr_raw)
	82	{
	83	return (sr_raw & 0x10000000) ? true: false;
	84	}
	85
01235180	86	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	87	struct kvmppc_pte *pte, bool data,
93b159b4 PM	88	bool iswrite);
af7b4d10	89	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
4b389ca2	90	u64 *vsid);
01235180	91
df1bfa25	92	static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
01235180	93	{
df1bfa25	94	return vcpu->arch.shared->sr[(eaddr >> 28) & 0xf];
01235180 AG	95	}
	96
	97	static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	98	bool data)
	99	{
4b389ca2	100	u64 vsid;
01235180 AG	101	struct kvmppc_pte pte;
01235180 AG	102
93b159b4	103	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
01235180 AG	104	return pte.vpage;
01235180 AG	105
4b389ca2 AG	106	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
4b389ca2 AG	107	return (((u64)eaddr >> 12) & 0xffff) \| (vsid << 16);
01235180 AG	108	}
	109
	110	static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
	111	{
	112	kvmppc_set_msr(vcpu, 0);
	113	}
	114
3ff95502	115	static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
8e865178	116	u32 sre, gva_t eaddr,
01235180 AG	117	bool primary)
01235180 AG	118	{
3ff95502	119	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
01235180 AG	120	u32 page, hash, pteg, htabmask;
	121	hva_t r;
	122
	123	page = (eaddr & 0x0FFFFFFF) >> 12;
	124	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) \| 0xFFC0;
	125
8e865178	126	hash = ((sr_vsid(sre) ^ page) << 6);
01235180 AG	127	if (!primary)
	128	hash = ~hash;
	129	hash &= htabmask;
	130
	131	pteg = (vcpu_book3s->sdr1 & 0xffff0000) \| hash;
	132
	133	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
53021042	134	kvmppc_get_pc(&vcpu_book3s->vcpu), eaddr, vcpu_book3s->sdr1, pteg,
8e865178	135	sr_vsid(sre));
01235180	136
3ff95502	137	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
01235180 AG	138	if (kvm_is_error_hva(r))
	139	return r;
	140	return r \| (pteg & ~PAGE_MASK);
	141	}
	142
8e865178	143	static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
01235180	144	{
8e865178	145	return ((eaddr & 0x0fffffff) >> 22) \| (sr_vsid(sre) << 7) \|
01235180 AG	146	(primary ? 0 : 0x40) \| 0x80000000;
	147	}
	148
	149	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	150	struct kvmppc_pte *pte, bool data,
93b159b4 PM	151	bool iswrite)
01235180 AG	152	{
	153	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	154	struct kvmppc_bat *bat;
	155	int i;
	156
	157	for (i = 0; i < 8; i++) {
	158	if (data)
	159	bat = &vcpu_book3s->dbat[i];
	160	else
	161	bat = &vcpu_book3s->ibat[i];
	162
666e7252	163	if (vcpu->arch.shared->msr & MSR_PR) {
01235180 AG	164	if (!bat->vp)
	165	continue;
	166	} else {
	167	if (!bat->vs)
	168	continue;
	169	}
	170
	171	if (check_debug_ip(vcpu))
	172	{
	173	dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
	174	data ? 'd' : 'i', i, eaddr, bat->bepi,
	175	bat->bepi_mask);
	176	}
	177	if ((eaddr & bat->bepi_mask) == bat->bepi) {
4b389ca2 AG	178	u64 vsid;
	179	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
	180	eaddr >> SID_SHIFT, &vsid);
	181	vsid <<= 16;
	182	pte->vpage = (((u64)eaddr >> 12) & 0xffff) \| vsid;
	183
01235180	184	pte->raddr = bat->brpn \| (eaddr & ~bat->bepi_mask);
01235180 AG	185	pte->may_read = bat->pp;
	186	pte->may_write = bat->pp > 1;
	187	pte->may_execute = true;
	188	if (!pte->may_read) {
	189	printk(KERN_INFO "BAT is not readable!\n");
	190	continue;
	191	}
93b159b4	192	if (iswrite && !pte->may_write) {
01235180 AG	193	dprintk_pte("BAT is read-only!\n");
	194	continue;
	195	}
	196
	197	return 0;
	198	}
	199	}
	200
	201	return -ENOENT;
	202	}
	203
	204	static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
	205	struct kvmppc_pte *pte, bool data,
93b159b4	206	bool iswrite, bool primary)
01235180	207	{
8e865178	208	u32 sre;
01235180 AG	209	hva_t ptegp;
01235180 AG	210	u32 pteg[16];
860540bc	211	u32 pte0, pte1;
af7b4d10	212	u32 ptem = 0;
01235180 AG	213	int i;
	214	int found = 0;
	215
df1bfa25	216	sre = find_sr(vcpu, eaddr);
01235180 AG	217
01235180 AG	218	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
8e865178	219	sr_vsid(sre), sre);
01235180 AG	220
	221	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	222
3ff95502	223	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
01235180 AG	224	if (kvm_is_error_hva(ptegp)) {
	225	printk(KERN_INFO "KVM: Invalid PTEG!\n");
	226	goto no_page_found;
	227	}
	228
	229	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
	230
	231	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
	232	printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
	233	goto no_page_found;
	234	}
	235
	236	for (i=0; i<16; i+=2) {
860540bc AG	237	pte0 = be32_to_cpu(pteg[i]);
	238	pte1 = be32_to_cpu(pteg[i + 1]);
	239	if (ptem == pte0) {
01235180 AG	240	u8 pp;
01235180 AG	241
860540bc AG	242	pte->raddr = (pte1 & ~(0xFFFULL)) \| (eaddr & 0xFFF);
860540bc AG	243	pp = pte1 & 3;
01235180	244
8e865178 AG	245	if ((sr_kp(sre) && (vcpu->arch.shared->msr & MSR_PR)) \|\|
8e865178 AG	246	(sr_ks(sre) && !(vcpu->arch.shared->msr & MSR_PR)))
01235180 AG	247	pp \|= 4;
	248
	249	pte->may_write = false;
	250	pte->may_read = false;
	251	pte->may_execute = true;
	252	switch (pp) {
	253	case 0:
	254	case 1:
	255	case 2:
	256	case 6:
	257	pte->may_write = true;
	258	case 3:
	259	case 5:
	260	case 7:
	261	pte->may_read = true;
	262	break;
	263	}
	264
01235180	265	dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
860540bc	266	pte0, pte1, pp);
01235180 AG	267	found = 1;
	268	break;
	269	}
	270	}
	271
	272	/* Update PTE C and A bits, so the guest's swapper knows we used the
	273	page */
	274	if (found) {
860540bc	275	u32 pte_r = pte1;
740f834e	276	char __user addr = (char __user ) (ptegp + (i+1) * sizeof(u32));
9308ab8e PM	277
	278	/*
	279	* Use single-byte writes to update the HPTE, to
	280	* conform to what real hardware does.
	281	*/
	282	if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
	283	pte_r \|= PTEG_FLAG_ACCESSED;
	284	put_user(pte_r >> 8, addr + 2);
	285	}
93b159b4	286	if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
9308ab8e PM	287	pte_r \|= PTEG_FLAG_DIRTY;
	288	put_user(pte_r, addr + 3);
	289	}
93b159b4 PM	290	if (!pte->may_read \|\| (iswrite && !pte->may_write))
93b159b4 PM	291	return -EPERM;
01235180 AG	292	return 0;
	293	}
	294
	295	no_page_found:
	296
	297	if (check_debug_ip(vcpu)) {
	298	dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
	299	to_book3s(vcpu)->sdr1, ptegp);
	300	for (i=0; i<16; i+=2) {
53021042	301	dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n",
860540bc AG	302	i, be32_to_cpu(pteg[i]),
860540bc AG	303	be32_to_cpu(pteg[i+1]), ptem);
01235180 AG	304	}
	305	}
	306
	307	return -ENOENT;
	308	}
	309
	310	static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	311	struct kvmppc_pte *pte, bool data,
93b159b4 PM	312	bool iswrite)
01235180 AG	313	{
01235180 AG	314	int r;
e8508940	315	ulong mp_ea = vcpu->arch.magic_page_ea;
01235180 AG	316
01235180 AG	317	pte->eaddr = eaddr;
c9029c34	318	pte->page_size = MMU_PAGE_4K;
e8508940 AG	319
	320	/* Magic page override */
	321	if (unlikely(mp_ea) &&
	322	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	323	!(vcpu->arch.shared->msr & MSR_PR)) {
	324	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	325	pte->raddr = vcpu->arch.magic_page_pa \| (pte->raddr & 0xfff);
	326	pte->raddr &= KVM_PAM;
	327	pte->may_execute = true;
	328	pte->may_read = true;
	329	pte->may_write = true;
	330
	331	return 0;
	332	}
	333
93b159b4	334	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
01235180	335	if (r < 0)
93b159b4 PM	336	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	337	data, iswrite, true);
01235180	338	if (r < 0)
93b159b4 PM	339	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	340	data, iswrite, false);
01235180 AG	341
	342	return r;
	343	}
	344
	345
	346	static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
	347	{
df1bfa25	348	return vcpu->arch.shared->sr[srnum];
01235180 AG	349	}
	350
	351	static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	352	ulong value)
	353	{
df1bfa25	354	vcpu->arch.shared->sr[srnum] = value;
01235180 AG	355	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
	356	}
	357
	358	static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
	359	{
9308ab8e PM	360	int i;
	361	struct kvm_vcpu *v;
	362
	363	/* flush this VA on all cpus */
	364	kvm_for_each_vcpu(i, v, vcpu->kvm)
	365	kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
01235180 AG	366	}
01235180 AG	367
af7b4d10	368	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
01235180 AG	369	u64 *vsid)
01235180 AG	370	{
f7bc74e1	371	ulong ea = esid << SID_SHIFT;
8e865178	372	u32 sr;
f7bc74e1 AG	373	u64 gvsid = esid;
f7bc74e1 AG	374
666e7252	375	if (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
df1bfa25	376	sr = find_sr(vcpu, ea);
8e865178 AG	377	if (sr_valid(sr))
8e865178 AG	378	gvsid = sr_vsid(sr);
f7bc74e1 AG	379	}
f7bc74e1 AG	380
01235180 AG	381	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	382	that in the real-mode context (and hope RM doesn't access
	383	high memory) */
666e7252	384	switch (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
01235180	385	case 0:
f7bc74e1	386	*vsid = VSID_REAL \| esid;
01235180 AG	387	break;
01235180 AG	388	case MSR_IR:
f7bc74e1	389	*vsid = VSID_REAL_IR \| gvsid;
01235180 AG	390	break;
01235180 AG	391	case MSR_DR:
f7bc74e1	392	*vsid = VSID_REAL_DR \| gvsid;
01235180 AG	393	break;
01235180 AG	394	case MSR_DR\|MSR_IR:
8e865178 AG	395	if (sr_valid(sr))
8e865178 AG	396	*vsid = sr_vsid(sr);
4d29bdbf AG	397	else
4d29bdbf AG	398	*vsid = VSID_BAT \| gvsid;
01235180	399	break;
01235180 AG	400	default:
	401	BUG();
	402	}
	403
666e7252	404	if (vcpu->arch.shared->msr & MSR_PR)
4b389ca2 AG	405	*vsid \|= VSID_PR;
4b389ca2 AG	406
01235180 AG	407	return 0;
	408	}
	409
	410	static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
	411	{
	412	return true;
	413	}
	414
	415
	416	void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
	417	{
	418	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	419
	420	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	421	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	422	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	423	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	424	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	425	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	426	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	427	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
	428
	429	mmu->slbmte = NULL;
	430	mmu->slbmfee = NULL;
	431	mmu->slbmfev = NULL;
	432	mmu->slbie = NULL;
	433	mmu->slbia = NULL;
	434	}