[deliverable/linux.git] / arch / powerpc / kvm / book3s_32_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>

/* #define DEBUG_MMU */
/* #define DEBUG_MMU_PTE */
/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

#ifdef DEBUG_MMU_PTE
#define dprintk_pte(X...) printk(KERN_INFO X)
#else
#define dprintk_pte(X...) do { } while(0)
#endif

#define PTEG_FLAG_ACCESSED	0x00000100
#define PTEG_FLAG_DIRTY		0x00000080
#ifndef SID_SHIFT
#define SID_SHIFT		28
#endif

static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
{
#ifdef DEBUG_MMU_PTE_IP
	return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
#else
	return true;
#endif
}

static inline u32 sr_vsid(u32 sr_raw)
{
	return sr_raw & 0x0fffffff;
}

static inline bool sr_valid(u32 sr_raw)
{
	return (sr_raw & 0x80000000) ? false : true;
}

static inline bool sr_ks(u32 sr_raw)
{
	return (sr_raw & 0x40000000) ? true: false;
}

static inline bool sr_kp(u32 sr_raw)
{
	return (sr_raw & 0x20000000) ? true: false;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite);
static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid);

static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
{
	return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
}

static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	u64 vsid;
	struct kvmppc_pte pte;

	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
		return pte.vpage;

	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
	return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
}

static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, 0);
}

static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
				      u32 sre, gva_t eaddr,
				      bool primary)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	u32 page, hash, pteg, htabmask;
	hva_t r;

	page = (eaddr & 0x0FFFFFFF) >> 12;
	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;

	hash = ((sr_vsid(sre) ^ page) << 6);
	if (!primary)
		hash = ~hash;
	hash &= htabmask;

	pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;

	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
		kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
		sr_vsid(sre));

	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
{
	return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
	       (primary ? 0 : 0x40) | 0x80000000;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_bat *bat;
	int i;

	for (i = 0; i < 8; i++) {
		if (data)
			bat = &vcpu_book3s->dbat[i];
		else
			bat = &vcpu_book3s->ibat[i];

		if (kvmppc_get_msr(vcpu) & MSR_PR) {
			if (!bat->vp)
				continue;
		} else {
			if (!bat->vs)
				continue;
		}

		if (check_debug_ip(vcpu))
		{
			dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
				    data ? 'd' : 'i', i, eaddr, bat->bepi,
				    bat->bepi_mask);
		}
		if ((eaddr & bat->bepi_mask) == bat->bepi) {
			u64 vsid;
			kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
				eaddr >> SID_SHIFT, &vsid);
			vsid <<= 16;
			pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;

			pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
			pte->may_read = bat->pp;
			pte->may_write = bat->pp > 1;
			pte->may_execute = true;
			if (!pte->may_read) {
				printk(KERN_INFO "BAT is not readable!\n");
				continue;
			}
			if (iswrite && !pte->may_write) {
				dprintk_pte("BAT is read-only!\n");
				continue;
			}

			return 0;
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
				     struct kvmppc_pte *pte, bool data,
				     bool iswrite, bool primary)
{
	u32 sre;
	hva_t ptegp;
	u32 pteg[16];
	u32 pte0, pte1;
	u32 ptem = 0;
	int i;
	int found = 0;

	sre = find_sr(vcpu, eaddr);

	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
		    sr_vsid(sre), sre);

	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);

	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
	if (kvm_is_error_hva(ptegp)) {
		printk(KERN_INFO "KVM: Invalid PTEG!\n");
		goto no_page_found;
	}

	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	for (i=0; i<16; i+=2) {
		pte0 = be32_to_cpu(pteg[i]);
		pte1 = be32_to_cpu(pteg[i + 1]);
		if (ptem == pte0) {
			u8 pp;

			pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
			pp = pte1 & 3;

			if ((sr_kp(sre) &&  (kvmppc_get_msr(vcpu) & MSR_PR)) ||
			    (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
				pp |= 4;

			pte->may_write = false;
			pte->may_read = false;
			pte->may_execute = true;
			switch (pp) {
				case 0:
				case 1:
				case 2:
				case 6:
					pte->may_write = true;
				case 3:
				case 5:
				case 7:
					pte->may_read = true;
					break;
			}

			dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
				    pte0, pte1, pp);
			found = 1;
			break;
		}
	}

	/* Update PTE C and A bits, so the guest's swapper knows we used the
	   page */
	if (found) {
		u32 pte_r = pte1;
		char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));

		/*
		 * Use single-byte writes to update the HPTE, to
		 * conform to what real hardware does.
		 */
		if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
			pte_r |= PTEG_FLAG_ACCESSED;
			put_user(pte_r >> 8, addr + 2);
		}
		if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
			pte_r |= PTEG_FLAG_DIRTY;
			put_user(pte_r, addr + 3);
		}
		if (!pte->may_read || (iswrite && !pte->may_write))
			return -EPERM;
		return 0;
	}

no_page_found:

	if (check_debug_ip(vcpu)) {
		dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
			    to_book3s(vcpu)->sdr1, ptegp);
		for (i=0; i<16; i+=2) {
			dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
				    i, be32_to_cpu(pteg[i]),
				    be32_to_cpu(pteg[i+1]), ptem);
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				      struct kvmppc_pte *pte, bool data,
				      bool iswrite)
{
	int r;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	pte->eaddr = eaddr;
	pte->page_size = MMU_PAGE_4K;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
		pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
		pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
		pte->raddr &= KVM_PAM;
		pte->may_execute = true;
		pte->may_read = true;
		pte->may_write = true;

		return 0;
	}

	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
	if (r < 0)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, true);
	if (r == -ENOENT)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, false);

	return r;
}


static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
{
	return kvmppc_get_sr(vcpu, srnum);
}

static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	kvmppc_set_sr(vcpu, srnum, value);
	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
}

static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
{
	int i;
	struct kvm_vcpu *v;

	/* flush this VA on all cpus */
	kvm_for_each_vcpu(i, v, vcpu->kvm)
		kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
}

static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	u32 sr;
	u64 gvsid = esid;
	u64 msr = kvmppc_get_msr(vcpu);

	if (msr & (MSR_DR|MSR_IR)) {
		sr = find_sr(vcpu, ea);
		if (sr_valid(sr))
			gvsid = sr_vsid(sr);
	}

	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	   that in the real-mode context (and hope RM doesn't access
	   high memory) */
	switch (msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		*vsid = VSID_REAL_IR | gvsid;
		break;
	case MSR_DR:
		*vsid = VSID_REAL_DR | gvsid;
		break;
	case MSR_DR|MSR_IR:
		if (sr_valid(sr))
			*vsid = sr_vsid(sr);
		else
			*vsid = VSID_BAT | gvsid;
		break;
	default:
		BUG();
	}

	if (msr & MSR_PR)
		*vsid |= VSID_PR;

	return 0;
}

static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return true;
}


void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;

	mmu->slbmte = NULL;
	mmu->slbmfee = NULL;
	mmu->slbmfev = NULL;
	mmu->slbie = NULL;
	mmu->slbia = NULL;
}
Commit	Line	Data
01235180 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
	29
	30	/* #define DEBUG_MMU */
	31	/* #define DEBUG_MMU_PTE */
	32	/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
	33
	34	#ifdef DEBUG_MMU
	35	#define dprintk(X...) printk(KERN_INFO X)
	36	#else
	37	#define dprintk(X...) do { } while(0)
	38	#endif
	39
e425a6de	40	#ifdef DEBUG_MMU_PTE
01235180 AG	41	#define dprintk_pte(X...) printk(KERN_INFO X)
	42	#else
	43	#define dprintk_pte(X...) do { } while(0)
	44	#endif
	45
	46	#define PTEG_FLAG_ACCESSED 0x00000100
	47	#define PTEG_FLAG_DIRTY 0x00000080
07b0907d AG	48	#ifndef SID_SHIFT
	49	#define SID_SHIFT 28
	50	#endif
01235180 AG	51
	52	static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
	53	{
	54	#ifdef DEBUG_MMU_PTE_IP
	55	return vcpu->arch.pc == DEBUG_MMU_PTE_IP;
	56	#else
	57	return true;
	58	#endif
	59	}
	60
8e865178 AG	61	static inline u32 sr_vsid(u32 sr_raw)
	62	{
	63	return sr_raw & 0x0fffffff;
	64	}
	65
	66	static inline bool sr_valid(u32 sr_raw)
	67	{
	68	return (sr_raw & 0x80000000) ? false : true;
	69	}
	70
	71	static inline bool sr_ks(u32 sr_raw)
	72	{
	73	return (sr_raw & 0x40000000) ? true: false;
	74	}
	75
	76	static inline bool sr_kp(u32 sr_raw)
	77	{
	78	return (sr_raw & 0x20000000) ? true: false;
	79	}
	80
01235180	81	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	82	struct kvmppc_pte *pte, bool data,
93b159b4 PM	83	bool iswrite);
af7b4d10	84	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
4b389ca2	85	u64 *vsid);
01235180	86
df1bfa25	87	static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
01235180	88	{
5deb8e7a	89	return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
01235180 AG	90	}
	91
	92	static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	93	bool data)
	94	{
4b389ca2	95	u64 vsid;
01235180 AG	96	struct kvmppc_pte pte;
01235180 AG	97
93b159b4	98	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
01235180 AG	99	return pte.vpage;
01235180 AG	100
4b389ca2 AG	101	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
4b389ca2 AG	102	return (((u64)eaddr >> 12) & 0xffff) \| (vsid << 16);
01235180 AG	103	}
	104
	105	static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
	106	{
	107	kvmppc_set_msr(vcpu, 0);
	108	}
	109
3ff95502	110	static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
8e865178	111	u32 sre, gva_t eaddr,
01235180 AG	112	bool primary)
01235180 AG	113	{
3ff95502	114	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
01235180 AG	115	u32 page, hash, pteg, htabmask;
	116	hva_t r;
	117
	118	page = (eaddr & 0x0FFFFFFF) >> 12;
	119	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) \| 0xFFC0;
	120
8e865178	121	hash = ((sr_vsid(sre) ^ page) << 6);
01235180 AG	122	if (!primary)
	123	hash = ~hash;
	124	hash &= htabmask;
	125
	126	pteg = (vcpu_book3s->sdr1 & 0xffff0000) \| hash;
	127
	128	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
cd087eef	129	kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
8e865178	130	sr_vsid(sre));
01235180	131
3ff95502	132	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
01235180 AG	133	if (kvm_is_error_hva(r))
	134	return r;
	135	return r \| (pteg & ~PAGE_MASK);
	136	}
	137
8e865178	138	static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
01235180	139	{
8e865178	140	return ((eaddr & 0x0fffffff) >> 22) \| (sr_vsid(sre) << 7) \|
01235180 AG	141	(primary ? 0 : 0x40) \| 0x80000000;
	142	}
	143
	144	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	145	struct kvmppc_pte *pte, bool data,
93b159b4 PM	146	bool iswrite)
01235180 AG	147	{
	148	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	149	struct kvmppc_bat *bat;
	150	int i;
	151
	152	for (i = 0; i < 8; i++) {
	153	if (data)
	154	bat = &vcpu_book3s->dbat[i];
	155	else
	156	bat = &vcpu_book3s->ibat[i];
	157
5deb8e7a	158	if (kvmppc_get_msr(vcpu) & MSR_PR) {
01235180 AG	159	if (!bat->vp)
	160	continue;
	161	} else {
	162	if (!bat->vs)
	163	continue;
	164	}
	165
	166	if (check_debug_ip(vcpu))
	167	{
	168	dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
	169	data ? 'd' : 'i', i, eaddr, bat->bepi,
	170	bat->bepi_mask);
	171	}
	172	if ((eaddr & bat->bepi_mask) == bat->bepi) {
4b389ca2 AG	173	u64 vsid;
	174	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
	175	eaddr >> SID_SHIFT, &vsid);
	176	vsid <<= 16;
	177	pte->vpage = (((u64)eaddr >> 12) & 0xffff) \| vsid;
	178
01235180	179	pte->raddr = bat->brpn \| (eaddr & ~bat->bepi_mask);
01235180 AG	180	pte->may_read = bat->pp;
	181	pte->may_write = bat->pp > 1;
	182	pte->may_execute = true;
	183	if (!pte->may_read) {
	184	printk(KERN_INFO "BAT is not readable!\n");
	185	continue;
	186	}
93b159b4	187	if (iswrite && !pte->may_write) {
01235180 AG	188	dprintk_pte("BAT is read-only!\n");
	189	continue;
	190	}
	191
	192	return 0;
	193	}
	194	}
	195
	196	return -ENOENT;
	197	}
	198
	199	static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
	200	struct kvmppc_pte *pte, bool data,
93b159b4	201	bool iswrite, bool primary)
01235180	202	{
8e865178	203	u32 sre;
01235180 AG	204	hva_t ptegp;
01235180 AG	205	u32 pteg[16];
860540bc	206	u32 pte0, pte1;
af7b4d10	207	u32 ptem = 0;
01235180 AG	208	int i;
	209	int found = 0;
	210
df1bfa25	211	sre = find_sr(vcpu, eaddr);
01235180 AG	212
01235180 AG	213	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
8e865178	214	sr_vsid(sre), sre);
01235180 AG	215
	216	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	217
3ff95502	218	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
01235180 AG	219	if (kvm_is_error_hva(ptegp)) {
	220	printk(KERN_INFO "KVM: Invalid PTEG!\n");
	221	goto no_page_found;
	222	}
	223
	224	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
	225
	226	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
	227	printk(KERN_ERR "KVM: Can't copy data from 0x%lx!\n", ptegp);
	228	goto no_page_found;
	229	}
	230
	231	for (i=0; i<16; i+=2) {
860540bc AG	232	pte0 = be32_to_cpu(pteg[i]);
	233	pte1 = be32_to_cpu(pteg[i + 1]);
	234	if (ptem == pte0) {
01235180 AG	235	u8 pp;
01235180 AG	236
860540bc AG	237	pte->raddr = (pte1 & ~(0xFFFULL)) \| (eaddr & 0xFFF);
860540bc AG	238	pp = pte1 & 3;
01235180	239
5deb8e7a AG	240	if ((sr_kp(sre) && (kvmppc_get_msr(vcpu) & MSR_PR)) \|\|
5deb8e7a AG	241	(sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
01235180 AG	242	pp \|= 4;
	243
	244	pte->may_write = false;
	245	pte->may_read = false;
	246	pte->may_execute = true;
	247	switch (pp) {
	248	case 0:
	249	case 1:
	250	case 2:
	251	case 6:
	252	pte->may_write = true;
	253	case 3:
	254	case 5:
	255	case 7:
	256	pte->may_read = true;
	257	break;
	258	}
	259
01235180	260	dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
860540bc	261	pte0, pte1, pp);
01235180 AG	262	found = 1;
	263	break;
	264	}
	265	}
	266
	267	/* Update PTE C and A bits, so the guest's swapper knows we used the
	268	page */
	269	if (found) {
860540bc	270	u32 pte_r = pte1;
740f834e	271	char __user addr = (char __user ) (ptegp + (i+1) * sizeof(u32));
9308ab8e PM	272
	273	/*
	274	* Use single-byte writes to update the HPTE, to
	275	* conform to what real hardware does.
	276	*/
	277	if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
	278	pte_r \|= PTEG_FLAG_ACCESSED;
	279	put_user(pte_r >> 8, addr + 2);
	280	}
93b159b4	281	if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
9308ab8e PM	282	pte_r \|= PTEG_FLAG_DIRTY;
	283	put_user(pte_r, addr + 3);
	284	}
93b159b4 PM	285	if (!pte->may_read \|\| (iswrite && !pte->may_write))
93b159b4 PM	286	return -EPERM;
01235180 AG	287	return 0;
	288	}
	289
	290	no_page_found:
	291
	292	if (check_debug_ip(vcpu)) {
	293	dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
	294	to_book3s(vcpu)->sdr1, ptegp);
	295	for (i=0; i<16; i+=2) {
53021042	296	dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n",
860540bc AG	297	i, be32_to_cpu(pteg[i]),
860540bc AG	298	be32_to_cpu(pteg[i+1]), ptem);
01235180 AG	299	}
	300	}
	301
	302	return -ENOENT;
	303	}
	304
	305	static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	306	struct kvmppc_pte *pte, bool data,
93b159b4 PM	307	bool iswrite)
01235180 AG	308	{
01235180 AG	309	int r;
e8508940	310	ulong mp_ea = vcpu->arch.magic_page_ea;
01235180 AG	311
01235180 AG	312	pte->eaddr = eaddr;
c9029c34	313	pte->page_size = MMU_PAGE_4K;
e8508940 AG	314
	315	/* Magic page override */
	316	if (unlikely(mp_ea) &&
	317	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
5deb8e7a	318	!(kvmppc_get_msr(vcpu) & MSR_PR)) {
e8508940 AG	319	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	320	pte->raddr = vcpu->arch.magic_page_pa \| (pte->raddr & 0xfff);
	321	pte->raddr &= KVM_PAM;
	322	pte->may_execute = true;
	323	pte->may_read = true;
	324	pte->may_write = true;
	325
	326	return 0;
	327	}
	328
93b159b4	329	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
01235180	330	if (r < 0)
93b159b4 PM	331	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	332	data, iswrite, true);
2e27ecc9	333	if (r == -ENOENT)
93b159b4 PM	334	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	335	data, iswrite, false);
01235180 AG	336
	337	return r;
	338	}
	339
	340
	341	static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
	342	{
5deb8e7a	343	return kvmppc_get_sr(vcpu, srnum);
01235180 AG	344	}
	345
	346	static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	347	ulong value)
	348	{
5deb8e7a	349	kvmppc_set_sr(vcpu, srnum, value);
01235180 AG	350	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
	351	}
	352
	353	static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
	354	{
9308ab8e PM	355	int i;
	356	struct kvm_vcpu *v;
	357
	358	/* flush this VA on all cpus */
	359	kvm_for_each_vcpu(i, v, vcpu->kvm)
	360	kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
01235180 AG	361	}
01235180 AG	362
af7b4d10	363	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
01235180 AG	364	u64 *vsid)
01235180 AG	365	{
f7bc74e1	366	ulong ea = esid << SID_SHIFT;
8e865178	367	u32 sr;
f7bc74e1	368	u64 gvsid = esid;
5deb8e7a	369	u64 msr = kvmppc_get_msr(vcpu);
f7bc74e1	370
5deb8e7a	371	if (msr & (MSR_DR\|MSR_IR)) {
df1bfa25	372	sr = find_sr(vcpu, ea);
8e865178 AG	373	if (sr_valid(sr))
8e865178 AG	374	gvsid = sr_vsid(sr);
f7bc74e1 AG	375	}
f7bc74e1 AG	376
01235180 AG	377	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	378	that in the real-mode context (and hope RM doesn't access
	379	high memory) */
5deb8e7a	380	switch (msr & (MSR_DR\|MSR_IR)) {
01235180	381	case 0:
f7bc74e1	382	*vsid = VSID_REAL \| esid;
01235180 AG	383	break;
01235180 AG	384	case MSR_IR:
f7bc74e1	385	*vsid = VSID_REAL_IR \| gvsid;
01235180 AG	386	break;
01235180 AG	387	case MSR_DR:
f7bc74e1	388	*vsid = VSID_REAL_DR \| gvsid;
01235180 AG	389	break;
01235180 AG	390	case MSR_DR\|MSR_IR:
8e865178 AG	391	if (sr_valid(sr))
8e865178 AG	392	*vsid = sr_vsid(sr);
4d29bdbf AG	393	else
4d29bdbf AG	394	*vsid = VSID_BAT \| gvsid;
01235180	395	break;
01235180 AG	396	default:
	397	BUG();
	398	}
	399
5deb8e7a	400	if (msr & MSR_PR)
4b389ca2 AG	401	*vsid \|= VSID_PR;
4b389ca2 AG	402
01235180 AG	403	return 0;
	404	}
	405
	406	static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
	407	{
	408	return true;
	409	}
	410
	411
	412	void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
	413	{
	414	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	415
	416	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	417	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	418	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	419	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	420	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	421	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	422	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	423	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
	424
	425	mmu->slbmte = NULL;
	426	mmu->slbmfee = NULL;
	427	mmu->slbmfev = NULL;
	428	mmu->slbie = NULL;
	429	mmu->slbia = NULL;
	430	}