[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>

/* #define DEBUG_MMU */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, MSR_SF);
}

static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
				struct kvm_vcpu *vcpu,
				gva_t eaddr)
{
	int i;
	u64 esid = GET_ESID(eaddr);
	u64 esid_1t = GET_ESID_1T(eaddr);

	for (i = 0; i < vcpu->arch.slb_nr; i++) {
		u64 cmp_esid = esid;

		if (!vcpu->arch.slb[i].valid)
			continue;

		if (vcpu->arch.slb[i].tb)
			cmp_esid = esid_1t;

		if (vcpu->arch.slb[i].esid == cmp_esid)
			return &vcpu->arch.slb[i];
	}

	dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
		eaddr, esid, esid_1t);
	for (i = 0; i < vcpu->arch.slb_nr; i++) {
	    if (vcpu->arch.slb[i].vsid)
		dprintk("  %d: %c%c%c %llx %llx\n", i,
			vcpu->arch.slb[i].valid ? 'v' : ' ',
			vcpu->arch.slb[i].large ? 'l' : ' ',
			vcpu->arch.slb[i].tb    ? 't' : ' ',
			vcpu->arch.slb[i].esid,
			vcpu->arch.slb[i].vsid);
	}

	return NULL;
}

static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	struct kvmppc_slb *slb;

	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slb)
		return 0;

	if (slb->tb)
		return (((u64)eaddr >> 12) & 0xfffffff) |
		       (((u64)slb->vsid) << 28);

	return (((u64)eaddr >> 12) & 0xffff) | (((u64)slb->vsid) << 16);
}

static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
{
	return slbe->large ? 24 : 12;
}

static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	return ((eaddr & 0xfffffff) >> p);
}

static hva_t kvmppc_mmu_book3s_64_get_pteg(
				struct kvmppc_vcpu_book3s *vcpu_book3s,
				struct kvmppc_slb *slbe, gva_t eaddr,
				bool second)
{
	u64 hash, pteg, htabsize;
	u32 page;
	hva_t r;

	page = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);

	hash = slbe->vsid ^ page;
	if (second)
		hash = ~hash;
	hash &= ((1ULL << 39ULL) - 1ULL);
	hash &= htabsize;
	hash <<= 7ULL;

	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	pteg |= hash;

	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
		page, vcpu_book3s->sdr1, pteg, slbe->vsid);

	/* When running a PAPR guest, SDR1 contains a HVA address instead
           of a GPA */
	if (vcpu_book3s->vcpu.arch.papr_enabled)
		r = pteg;
	else
		r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);

	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	u64 avpn;

	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	avpn |= slbe->vsid << (28 - p);

	if (p < 24)
		avpn >>= ((80 - p) - 56) - 8;
	else
		avpn <<= 8;

	return avpn;
}

static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				struct kvmppc_pte *gpte, bool data)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;
	hva_t ptegp;
	u64 pteg[16];
	u64 avpn = 0;
	int i;
	u8 key = 0;
	bool found = false;
	bool perm_err = false;
	int second = 0;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(vcpu->arch.shared->msr & MSR_PR)) {
		gpte->eaddr = eaddr;
		gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
		gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
		gpte->raddr &= KVM_PAM;
		gpte->may_execute = true;
		gpte->may_read = true;
		gpte->may_write = true;

		return 0;
	}

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
	if (!slbe)
		goto no_seg_found;

do_second:
	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
	if (kvm_is_error_hva(ptegp))
		goto no_page_found;

	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
		key = 4;
	else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
		key = 4;

	for (i=0; i<16; i+=2) {
		u64 v = pteg[i];
		u64 r = pteg[i+1];

		/* Valid check */
		if (!(v & HPTE_V_VALID))
			continue;
		/* Hash check */
		if ((v & HPTE_V_SECONDARY) != second)
			continue;

		/* AVPN compare */
		if (HPTE_V_AVPN_VAL(avpn) == HPTE_V_AVPN_VAL(v)) {
			u8 pp = (r & HPTE_R_PP) | key;
			int eaddr_mask = 0xFFF;

			gpte->eaddr = eaddr;
			gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
								    eaddr,
								    data);
			if (slbe->large)
				eaddr_mask = 0xFFFFFF;
			gpte->raddr = (r & HPTE_R_RPN) | (eaddr & eaddr_mask);
			gpte->may_execute = ((r & HPTE_R_N) ? false : true);
			gpte->may_read = false;
			gpte->may_write = false;

			switch (pp) {
			case 0:
			case 1:
			case 2:
			case 6:
				gpte->may_write = true;
				/* fall through */
			case 3:
			case 5:
			case 7:
				gpte->may_read = true;
				break;
			}

			if (!gpte->may_read) {
				perm_err = true;
				continue;
			}

			dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
				"-> 0x%lx\n",
				eaddr, avpn, gpte->vpage, gpte->raddr);
			found = true;
			break;
		}
	}

	/* Update PTE R and C bits, so the guest's swapper knows we used the
	 * page */
	if (found) {
		u32 oldr = pteg[i+1];

		if (gpte->may_read) {
			/* Set the accessed flag */
			pteg[i+1] |= HPTE_R_R;
		}
		if (gpte->may_write) {
			/* Set the dirty flag */
			pteg[i+1] |= HPTE_R_C;
		} else {
			dprintk("KVM: Mapping read-only page!\n");
		}

		/* Write back into the PTEG */
		if (pteg[i+1] != oldr)
			copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));

		return 0;
	} else {
		dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
			"ptegp=0x%lx)\n",
			eaddr, to_book3s(vcpu)->sdr1, ptegp);
		for (i = 0; i < 16; i += 2)
			dprintk("   %02d: 0x%llx - 0x%llx (0x%llx)\n",
				i, pteg[i], pteg[i+1], avpn);

		if (!second) {
			second = HPTE_V_SECONDARY;
			goto do_second;
		}
	}


no_page_found:


	if (perm_err)
		return -EPERM;

	return -ENOENT;

no_seg_found:

	dprintk("KVM MMU: Trigger segment fault\n");
	return -EINVAL;
}

static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	u64 esid, esid_1t;
	int slb_nr;
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);

	vcpu_book3s = to_book3s(vcpu);

	esid = GET_ESID(rb);
	esid_1t = GET_ESID_1T(rb);
	slb_nr = rb & 0xfff;

	if (slb_nr > vcpu->arch.slb_nr)
		return;

	slbe = &vcpu->arch.slb[slb_nr];

	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
	slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
	slbe->esid  = slbe->tb ? esid_1t : esid;
	slbe->vsid  = rs >> 12;
	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
	slbe->Kp    = (rs & SLB_VSID_KP) ? 1 : 0;
	slbe->nx    = (rs & SLB_VSID_N) ? 1 : 0;
	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;

	slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
	slbe->origv = rs;

	/* Map the new segment */
	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
}

static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->orige;
}

static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu->arch.slb_nr)
		return 0;

	slbe = &vcpu->arch.slb[slb_nr];

	return slbe->origv;
}

static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
{
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbie(0x%llx)\n", ea);

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);

	if (!slbe)
		return;

	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);

	slbe->valid = false;

	kvmppc_mmu_map_segment(vcpu, ea);
}

static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
{
	int i;

	dprintk("KVM MMU: slbia()\n");

	for (i = 1; i < vcpu->arch.slb_nr; i++)
		vcpu->arch.slb[i].valid = false;

	if (vcpu->arch.shared->msr & MSR_IR) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
	}
}

static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	u64 rb = 0, rs = 0;

	/*
	 * According to Book3 2.01 mtsrin is implemented as:
	 *
	 * The SLB entry specified by (RB)32:35 is loaded from register
	 * RS, as follows.
	 *
	 * SLBE Bit	Source			SLB Field
	 *
	 * 0:31		0x0000_0000		ESID-0:31
	 * 32:35	(RB)32:35		ESID-32:35
	 * 36		0b1			V
	 * 37:61	0x00_0000|| 0b0		VSID-0:24
	 * 62:88	(RS)37:63		VSID-25:51
	 * 89:91	(RS)33:35		Ks Kp N
	 * 92		(RS)36			L ((RS)36 must be 0b0)
	 * 93		0b0			C
	 */

	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);

	/* ESID = srnum */
	rb |= (srnum & 0xf) << 28;
	/* Set the valid bit */
	rb |= 1 << 27;
	/* Index = ESID */
	rb |= srnum;

	/* VSID = VSID */
	rs |= (value & 0xfffffff) << 12;
	/* flags = flags */
	rs |= ((value >> 28) & 0x7) << 9;

	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
}

static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
				       bool large)
{
	u64 mask = 0xFFFFFFFFFULL;

	dprintk("KVM MMU: tlbie(0x%lx)\n", va);

	if (large)
		mask = 0xFFFFFF000ULL;
	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
}

static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	struct kvmppc_slb *slb;
	u64 gvsid = esid;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
		slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
		if (slb)
			gvsid = slb->vsid;
	}

	switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		*vsid = VSID_REAL_IR | gvsid;
		break;
	case MSR_DR:
		*vsid = VSID_REAL_DR | gvsid;
		break;
	case MSR_DR|MSR_IR:
		if (!slb)
			goto no_slb;

		*vsid = gvsid;
		break;
	default:
		BUG();
		break;
	}

	if (vcpu->arch.shared->msr & MSR_PR)
		*vsid |= VSID_PR;

	return 0;

no_slb:
	/* Catch magic page case */
	if (unlikely(mp_ea) &&
	    unlikely(esid == (mp_ea >> SID_SHIFT)) &&
	    !(vcpu->arch.shared->msr & MSR_PR)) {
		*vsid = VSID_REAL | esid;
		return 0;
	}

	return -EINVAL;
}

static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return (to_book3s(vcpu)->hid[5] & 0x80);
}

void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mfsrin = NULL;
	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
}
Commit	Line	Data
e71b2a39 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
	29
	30	/* #define DEBUG_MMU */
	31
	32	#ifdef DEBUG_MMU
	33	#define dprintk(X...) printk(KERN_INFO X)
	34	#else
	35	#define dprintk(X...) do { } while(0)
	36	#endif
	37
	38	static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
	39	{
	40	kvmppc_set_msr(vcpu, MSR_SF);
	41	}
	42
	43	static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
c4befc58	44	struct kvm_vcpu *vcpu,
e71b2a39 AG	45	gva_t eaddr)
	46	{
	47	int i;
	48	u64 esid = GET_ESID(eaddr);
	49	u64 esid_1t = GET_ESID_1T(eaddr);
	50
c4befc58	51	for (i = 0; i < vcpu->arch.slb_nr; i++) {
e71b2a39 AG	52	u64 cmp_esid = esid;
e71b2a39 AG	53
c4befc58	54	if (!vcpu->arch.slb[i].valid)
e71b2a39 AG	55	continue;
e71b2a39 AG	56
c4befc58	57	if (vcpu->arch.slb[i].tb)
e71b2a39 AG	58	cmp_esid = esid_1t;
e71b2a39 AG	59
c4befc58 PM	60	if (vcpu->arch.slb[i].esid == cmp_esid)
c4befc58 PM	61	return &vcpu->arch.slb[i];
e71b2a39 AG	62	}
	63
	64	dprintk("KVM: No SLB entry found for 0x%lx [%llx \| %llx]\n",
	65	eaddr, esid, esid_1t);
c4befc58 PM	66	for (i = 0; i < vcpu->arch.slb_nr; i++) {
c4befc58 PM	67	if (vcpu->arch.slb[i].vsid)
4b5c9b7f	68	dprintk(" %d: %c%c%c %llx %llx\n", i,
c4befc58 PM	69	vcpu->arch.slb[i].valid ? 'v' : ' ',
	70	vcpu->arch.slb[i].large ? 'l' : ' ',
	71	vcpu->arch.slb[i].tb ? 't' : ' ',
	72	vcpu->arch.slb[i].esid,
	73	vcpu->arch.slb[i].vsid);
e71b2a39 AG	74	}
	75
	76	return NULL;
	77	}
	78
	79	static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	80	bool data)
	81	{
	82	struct kvmppc_slb *slb;
	83
c4befc58	84	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	85	if (!slb)
	86	return 0;
	87
4b5c9b7f	88	if (slb->tb)
e71b2a39 AG	89	return (((u64)eaddr >> 12) & 0xfffffff) \|
	90	(((u64)slb->vsid) << 28);
	91
	92	return (((u64)eaddr >> 12) & 0xffff) \| (((u64)slb->vsid) << 16);
	93	}
	94
	95	static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
	96	{
	97	return slbe->large ? 24 : 12;
	98	}
	99
	100	static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
	101	{
	102	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	103	return ((eaddr & 0xfffffff) >> p);
	104	}
	105
	106	static hva_t kvmppc_mmu_book3s_64_get_pteg(
	107	struct kvmppc_vcpu_book3s *vcpu_book3s,
	108	struct kvmppc_slb *slbe, gva_t eaddr,
	109	bool second)
	110	{
	111	u64 hash, pteg, htabsize;
	112	u32 page;
	113	hva_t r;
	114
	115	page = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	116	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
	117
	118	hash = slbe->vsid ^ page;
	119	if (second)
	120	hash = ~hash;
	121	hash &= ((1ULL << 39ULL) - 1ULL);
	122	hash &= htabsize;
	123	hash <<= 7ULL;
	124
	125	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	126	pteg \|= hash;
	127
	128	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
	129	page, vcpu_book3s->sdr1, pteg, slbe->vsid);
	130
04fcc11b AG	131	/* When running a PAPR guest, SDR1 contains a HVA address instead
	132	of a GPA */
	133	if (vcpu_book3s->vcpu.arch.papr_enabled)
	134	r = pteg;
	135	else
	136	r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
	137
e71b2a39 AG	138	if (kvm_is_error_hva(r))
	139	return r;
	140	return r \| (pteg & ~PAGE_MASK);
	141	}
	142
	143	static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
	144	{
	145	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	146	u64 avpn;
	147
	148	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	149	avpn \|= slbe->vsid << (28 - p);
	150
	151	if (p < 24)
	152	avpn >>= ((80 - p) - 56) - 8;
	153	else
	154	avpn <<= 8;
	155
	156	return avpn;
	157	}
	158
	159	static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
	160	struct kvmppc_pte *gpte, bool data)
	161	{
	162	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	163	struct kvmppc_slb *slbe;
	164	hva_t ptegp;
	165	u64 pteg[16];
	166	u64 avpn = 0;
	167	int i;
	168	u8 key = 0;
	169	bool found = false;
	170	bool perm_err = false;
	171	int second = 0;
e8508940 AG	172	ulong mp_ea = vcpu->arch.magic_page_ea;
	173
	174	/* Magic page override */
	175	if (unlikely(mp_ea) &&
	176	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	177	!(vcpu->arch.shared->msr & MSR_PR)) {
	178	gpte->eaddr = eaddr;
	179	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
	180	gpte->raddr = vcpu->arch.magic_page_pa \| (gpte->raddr & 0xfff);
	181	gpte->raddr &= KVM_PAM;
	182	gpte->may_execute = true;
	183	gpte->may_read = true;
	184	gpte->may_write = true;
	185
	186	return 0;
	187	}
e71b2a39	188
c4befc58	189	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr);
e71b2a39 AG	190	if (!slbe)
	191	goto no_seg_found;
	192
	193	do_second:
	194	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
	195	if (kvm_is_error_hva(ptegp))
	196	goto no_page_found;
	197
	198	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
	199
	200	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
	201	printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
	202	goto no_page_found;
	203	}
	204
666e7252	205	if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
e71b2a39	206	key = 4;
666e7252	207	else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
e71b2a39 AG	208	key = 4;
	209
	210	for (i=0; i<16; i+=2) {
	211	u64 v = pteg[i];
	212	u64 r = pteg[i+1];
	213
	214	/* Valid check */
	215	if (!(v & HPTE_V_VALID))
	216	continue;
	217	/* Hash check */
	218	if ((v & HPTE_V_SECONDARY) != second)
	219	continue;
	220
	221	/* AVPN compare */
	222	if (HPTE_V_AVPN_VAL(avpn) == HPTE_V_AVPN_VAL(v)) {
	223	u8 pp = (r & HPTE_R_PP) \| key;
	224	int eaddr_mask = 0xFFF;
	225
	226	gpte->eaddr = eaddr;
	227	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
	228	eaddr,
	229	data);
	230	if (slbe->large)
	231	eaddr_mask = 0xFFFFFF;
	232	gpte->raddr = (r & HPTE_R_RPN) \| (eaddr & eaddr_mask);
	233	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
	234	gpte->may_read = false;
	235	gpte->may_write = false;
	236
	237	switch (pp) {
	238	case 0:
	239	case 1:
	240	case 2:
	241	case 6:
	242	gpte->may_write = true;
	243	/* fall through */
	244	case 3:
	245	case 5:
	246	case 7:
	247	gpte->may_read = true;
	248	break;
	249	}
	250
	251	if (!gpte->may_read) {
	252	perm_err = true;
	253	continue;
	254	}
	255
	256	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
af7b4d10	257	"-> 0x%lx\n",
e71b2a39 AG	258	eaddr, avpn, gpte->vpage, gpte->raddr);
	259	found = true;
	260	break;
	261	}
	262	}
	263
	264	/* Update PTE R and C bits, so the guest's swapper knows we used the
	265	* page */
	266	if (found) {
	267	u32 oldr = pteg[i+1];
	268
	269	if (gpte->may_read) {
	270	/* Set the accessed flag */
	271	pteg[i+1] \|= HPTE_R_R;
	272	}
	273	if (gpte->may_write) {
	274	/* Set the dirty flag */
	275	pteg[i+1] \|= HPTE_R_C;
	276	} else {
	277	dprintk("KVM: Mapping read-only page!\n");
	278	}
	279
	280	/* Write back into the PTEG */
	281	if (pteg[i+1] != oldr)
	282	copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
	283
	284	return 0;
	285	} else {
	286	dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
	287	"ptegp=0x%lx)\n",
	288	eaddr, to_book3s(vcpu)->sdr1, ptegp);
	289	for (i = 0; i < 16; i += 2)
	290	dprintk(" %02d: 0x%llx - 0x%llx (0x%llx)\n",
	291	i, pteg[i], pteg[i+1], avpn);
	292
	293	if (!second) {
	294	second = HPTE_V_SECONDARY;
	295	goto do_second;
	296	}
	297	}
	298
	299
	300	no_page_found:
	301
	302
	303	if (perm_err)
	304	return -EPERM;
	305
	306	return -ENOENT;
	307
	308	no_seg_found:
	309
	310	dprintk("KVM MMU: Trigger segment fault\n");
	311	return -EINVAL;
	312	}
	313
	314	static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
	315	{
	316	struct kvmppc_vcpu_book3s *vcpu_book3s;
	317	u64 esid, esid_1t;
	318	int slb_nr;
	319	struct kvmppc_slb *slbe;
	320
	321	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
322
323	vcpu_book3s = to_book3s(vcpu);
324
325	esid = GET_ESID(rb);
326	esid_1t = GET_ESID_1T(rb);
327	slb_nr = rb & 0xfff;
328
c4befc58	329	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	330	return;
e71b2a39 AG	331
c4befc58	332	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	333
e71b2a39 AG	334	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
4b5c9b7f AG	335	slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
4b5c9b7f AG	336	slbe->esid = slbe->tb ? esid_1t : esid;
e71b2a39 AG	337	slbe->vsid = rs >> 12;
	338	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	339	slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
	340	slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
	341	slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
	342	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
	343
	344	slbe->orige = rb & (ESID_MASK \| SLB_ESID_V);
	345	slbe->origv = rs;
	346
	347	/* Map the new segment */
	348	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
	349	}
	350
	351	static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
	352	{
e71b2a39 AG	353	struct kvmppc_slb *slbe;
e71b2a39 AG	354
c4befc58	355	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	356	return 0;
e71b2a39 AG	357
c4befc58	358	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	359
	360	return slbe->orige;
	361	}
	362
	363	static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
	364	{
e71b2a39 AG	365	struct kvmppc_slb *slbe;
e71b2a39 AG	366
c4befc58	367	if (slb_nr > vcpu->arch.slb_nr)
e71b2a39 AG	368	return 0;
e71b2a39 AG	369
c4befc58	370	slbe = &vcpu->arch.slb[slb_nr];
e71b2a39 AG	371
	372	return slbe->origv;
	373	}
	374
	375	static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
	376	{
e71b2a39 AG	377	struct kvmppc_slb *slbe;
	378
	379	dprintk("KVM MMU: slbie(0x%llx)\n", ea);
	380
c4befc58	381	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
e71b2a39 AG	382
	383	if (!slbe)
	384	return;
	385
	386	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
	387
	388	slbe->valid = false;
	389
	390	kvmppc_mmu_map_segment(vcpu, ea);
	391	}
	392
	393	static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
	394	{
e71b2a39 AG	395	int i;
	396
	397	dprintk("KVM MMU: slbia()\n");
	398
c4befc58 PM	399	for (i = 1; i < vcpu->arch.slb_nr; i++)
c4befc58 PM	400	vcpu->arch.slb[i].valid = false;
e71b2a39	401
666e7252	402	if (vcpu->arch.shared->msr & MSR_IR) {
e71b2a39	403	kvmppc_mmu_flush_segments(vcpu);
c7f38f46	404	kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
e71b2a39 AG	405	}
	406	}
	407
	408	static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	409	ulong value)
	410	{
	411	u64 rb = 0, rs = 0;
	412
5279aeb4 AG	413	/*
	414	* According to Book3 2.01 mtsrin is implemented as:
	415	*
	416	* The SLB entry specified by (RB)32:35 is loaded from register
	417	* RS, as follows.
	418	*
	419	* SLBE Bit Source SLB Field
	420	*
	421	* 0:31 0x0000_0000 ESID-0:31
	422	* 32:35 (RB)32:35 ESID-32:35
	423	* 36 0b1 V
	424	* 37:61 0x00_0000\|\| 0b0 VSID-0:24
	425	* 62:88 (RS)37:63 VSID-25:51
	426	* 89:91 (RS)33:35 Ks Kp N
	427	* 92 (RS)36 L ((RS)36 must be 0b0)
	428	* 93 0b0 C
	429	*/
	430
	431	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
	432
e71b2a39 AG	433	/* ESID = srnum */
	434	rb \|= (srnum & 0xf) << 28;
	435	/* Set the valid bit */
	436	rb \|= 1 << 27;
	437	/* Index = ESID */
	438	rb \|= srnum;
	439
	440	/* VSID = VSID */
	441	rs \|= (value & 0xfffffff) << 12;
	442	/* flags = flags */
5279aeb4	443	rs \|= ((value >> 28) & 0x7) << 9;
e71b2a39 AG	444
	445	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
	446	}
	447
	448	static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
	449	bool large)
	450	{
	451	u64 mask = 0xFFFFFFFFFULL;
	452
	453	dprintk("KVM MMU: tlbie(0x%lx)\n", va);
	454
	455	if (large)
	456	mask = 0xFFFFFF000ULL;
	457	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
	458	}
	459
af7b4d10	460	static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
e71b2a39 AG	461	u64 *vsid)
e71b2a39 AG	462	{
f7bc74e1 AG	463	ulong ea = esid << SID_SHIFT;
	464	struct kvmppc_slb *slb;
	465	u64 gvsid = esid;
e8508940	466	ulong mp_ea = vcpu->arch.magic_page_ea;
f7bc74e1	467
666e7252	468	if (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
c4befc58	469	slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea);
f7bc74e1 AG	470	if (slb)
	471	gvsid = slb->vsid;
	472	}
	473
666e7252	474	switch (vcpu->arch.shared->msr & (MSR_DR\|MSR_IR)) {
e71b2a39	475	case 0:
f7bc74e1	476	*vsid = VSID_REAL \| esid;
e71b2a39 AG	477	break;
e71b2a39 AG	478	case MSR_IR:
f7bc74e1	479	*vsid = VSID_REAL_IR \| gvsid;
e71b2a39 AG	480	break;
e71b2a39 AG	481	case MSR_DR:
f7bc74e1	482	*vsid = VSID_REAL_DR \| gvsid;
e71b2a39 AG	483	break;
e71b2a39 AG	484	case MSR_DR\|MSR_IR:
f7bc74e1	485	if (!slb)
e8508940	486	goto no_slb;
e71b2a39	487
f7bc74e1	488	*vsid = gvsid;
e71b2a39	489	break;
e71b2a39 AG	490	default:
	491	BUG();
	492	break;
	493	}
	494
666e7252	495	if (vcpu->arch.shared->msr & MSR_PR)
63556441 AG	496	*vsid \|= VSID_PR;
63556441 AG	497
e71b2a39	498	return 0;
e8508940 AG	499
	500	no_slb:
	501	/* Catch magic page case */
	502	if (unlikely(mp_ea) &&
	503	unlikely(esid == (mp_ea >> SID_SHIFT)) &&
	504	!(vcpu->arch.shared->msr & MSR_PR)) {
	505	*vsid = VSID_REAL \| esid;
	506	return 0;
	507	}
	508
	509	return -EINVAL;
e71b2a39 AG	510	}
	511
	512	static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
	513	{
	514	return (to_book3s(vcpu)->hid[5] & 0x80);
	515	}
	516
	517	void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
	518	{
	519	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	520
	521	mmu->mfsrin = NULL;
	522	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	523	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	524	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	525	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	526	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	527	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	528	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	529	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	530	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	531	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	532	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	533	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
e15a1137 AG	534
e15a1137 AG	535	vcpu->arch.hflags \|= BOOK3S_HFLAG_SLB;
e71b2a39	536	}