[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/tlbflush.h>
#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>

/* #define DEBUG_MMU */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, MSR_SF);
}

static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
				struct kvmppc_vcpu_book3s *vcpu_book3s,
				gva_t eaddr)
{
	int i;
	u64 esid = GET_ESID(eaddr);
	u64 esid_1t = GET_ESID_1T(eaddr);

	for (i = 0; i < vcpu_book3s->slb_nr; i++) {
		u64 cmp_esid = esid;

		if (!vcpu_book3s->slb[i].valid)
			continue;

		if (vcpu_book3s->slb[i].tb)
			cmp_esid = esid_1t;

		if (vcpu_book3s->slb[i].esid == cmp_esid)
			return &vcpu_book3s->slb[i];
	}

	dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n",
		eaddr, esid, esid_1t);
	for (i = 0; i < vcpu_book3s->slb_nr; i++) {
	    if (vcpu_book3s->slb[i].vsid)
		dprintk("  %d: %c%c%c %llx %llx\n", i,
			vcpu_book3s->slb[i].valid ? 'v' : ' ',
			vcpu_book3s->slb[i].large ? 'l' : ' ',
			vcpu_book3s->slb[i].tb    ? 't' : ' ',
			vcpu_book3s->slb[i].esid,
			vcpu_book3s->slb[i].vsid);
	}

	return NULL;
}

static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	struct kvmppc_slb *slb;

	slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), eaddr);
	if (!slb)
		return 0;

	if (slb->tb)
		return (((u64)eaddr >> 12) & 0xfffffff) |
		       (((u64)slb->vsid) << 28);

	return (((u64)eaddr >> 12) & 0xffff) | (((u64)slb->vsid) << 16);
}

static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
{
	return slbe->large ? 24 : 12;
}

static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	return ((eaddr & 0xfffffff) >> p);
}

static hva_t kvmppc_mmu_book3s_64_get_pteg(
				struct kvmppc_vcpu_book3s *vcpu_book3s,
				struct kvmppc_slb *slbe, gva_t eaddr,
				bool second)
{
	u64 hash, pteg, htabsize;
	u32 page;
	hva_t r;

	page = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);

	hash = slbe->vsid ^ page;
	if (second)
		hash = ~hash;
	hash &= ((1ULL << 39ULL) - 1ULL);
	hash &= htabsize;
	hash <<= 7ULL;

	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	pteg |= hash;

	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
		page, vcpu_book3s->sdr1, pteg, slbe->vsid);

	r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
{
	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	u64 avpn;

	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	avpn |= slbe->vsid << (28 - p);

	if (p < 24)
		avpn >>= ((80 - p) - 56) - 8;
	else
		avpn <<= 8;

	return avpn;
}

static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				struct kvmppc_pte *gpte, bool data)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;
	hva_t ptegp;
	u64 pteg[16];
	u64 avpn = 0;
	int i;
	u8 key = 0;
	bool found = false;
	bool perm_err = false;
	int second = 0;

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu_book3s, eaddr);
	if (!slbe)
		goto no_seg_found;

do_second:
	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
	if (kvm_is_error_hva(ptegp))
		goto no_page_found;

	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	if ((vcpu->arch.msr & MSR_PR) && slbe->Kp)
		key = 4;
	else if (!(vcpu->arch.msr & MSR_PR) && slbe->Ks)
		key = 4;

	for (i=0; i<16; i+=2) {
		u64 v = pteg[i];
		u64 r = pteg[i+1];

		/* Valid check */
		if (!(v & HPTE_V_VALID))
			continue;
		/* Hash check */
		if ((v & HPTE_V_SECONDARY) != second)
			continue;

		/* AVPN compare */
		if (HPTE_V_AVPN_VAL(avpn) == HPTE_V_AVPN_VAL(v)) {
			u8 pp = (r & HPTE_R_PP) | key;
			int eaddr_mask = 0xFFF;

			gpte->eaddr = eaddr;
			gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
								    eaddr,
								    data);
			if (slbe->large)
				eaddr_mask = 0xFFFFFF;
			gpte->raddr = (r & HPTE_R_RPN) | (eaddr & eaddr_mask);
			gpte->may_execute = ((r & HPTE_R_N) ? false : true);
			gpte->may_read = false;
			gpte->may_write = false;

			switch (pp) {
			case 0:
			case 1:
			case 2:
			case 6:
				gpte->may_write = true;
				/* fall through */
			case 3:
			case 5:
			case 7:
				gpte->may_read = true;
				break;
			}

			if (!gpte->may_read) {
				perm_err = true;
				continue;
			}

			dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
				"-> 0x%llx\n",
				eaddr, avpn, gpte->vpage, gpte->raddr);
			found = true;
			break;
		}
	}

	/* Update PTE R and C bits, so the guest's swapper knows we used the
	 * page */
	if (found) {
		u32 oldr = pteg[i+1];

		if (gpte->may_read) {
			/* Set the accessed flag */
			pteg[i+1] |= HPTE_R_R;
		}
		if (gpte->may_write) {
			/* Set the dirty flag */
			pteg[i+1] |= HPTE_R_C;
		} else {
			dprintk("KVM: Mapping read-only page!\n");
		}

		/* Write back into the PTEG */
		if (pteg[i+1] != oldr)
			copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));

		return 0;
	} else {
		dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
			"ptegp=0x%lx)\n",
			eaddr, to_book3s(vcpu)->sdr1, ptegp);
		for (i = 0; i < 16; i += 2)
			dprintk("   %02d: 0x%llx - 0x%llx (0x%llx)\n",
				i, pteg[i], pteg[i+1], avpn);

		if (!second) {
			second = HPTE_V_SECONDARY;
			goto do_second;
		}
	}


no_page_found:


	if (perm_err)
		return -EPERM;

	return -ENOENT;

no_seg_found:

	dprintk("KVM MMU: Trigger segment fault\n");
	return -EINVAL;
}

static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s;
	u64 esid, esid_1t;
	int slb_nr;
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);

	vcpu_book3s = to_book3s(vcpu);

	esid = GET_ESID(rb);
	esid_1t = GET_ESID_1T(rb);
	slb_nr = rb & 0xfff;

	if (slb_nr > vcpu_book3s->slb_nr)
		return;

	slbe = &vcpu_book3s->slb[slb_nr];

	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
	slbe->tb    = (rs & SLB_VSID_B_1T) ? 1 : 0;
	slbe->esid  = slbe->tb ? esid_1t : esid;
	slbe->vsid  = rs >> 12;
	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	slbe->Ks    = (rs & SLB_VSID_KS) ? 1 : 0;
	slbe->Kp    = (rs & SLB_VSID_KP) ? 1 : 0;
	slbe->nx    = (rs & SLB_VSID_N) ? 1 : 0;
	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;

	slbe->orige = rb & (ESID_MASK | SLB_ESID_V);
	slbe->origv = rs;

	/* Map the new segment */
	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
}

static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu_book3s->slb_nr)
		return 0;

	slbe = &vcpu_book3s->slb[slb_nr];

	return slbe->orige;
}

static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;

	if (slb_nr > vcpu_book3s->slb_nr)
		return 0;

	slbe = &vcpu_book3s->slb[slb_nr];

	return slbe->origv;
}

static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_slb *slbe;

	dprintk("KVM MMU: slbie(0x%llx)\n", ea);

	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu_book3s, ea);

	if (!slbe)
		return;

	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);

	slbe->valid = false;

	kvmppc_mmu_map_segment(vcpu, ea);
}

static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	int i;

	dprintk("KVM MMU: slbia()\n");

	for (i = 1; i < vcpu_book3s->slb_nr; i++)
		vcpu_book3s->slb[i].valid = false;

	if (vcpu->arch.msr & MSR_IR) {
		kvmppc_mmu_flush_segments(vcpu);
		kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
	}
}

static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	u64 rb = 0, rs = 0;

	/*
	 * According to Book3 2.01 mtsrin is implemented as:
	 *
	 * The SLB entry specified by (RB)32:35 is loaded from register
	 * RS, as follows.
	 *
	 * SLBE Bit	Source			SLB Field
	 *
	 * 0:31		0x0000_0000		ESID-0:31
	 * 32:35	(RB)32:35		ESID-32:35
	 * 36		0b1			V
	 * 37:61	0x00_0000|| 0b0		VSID-0:24
	 * 62:88	(RS)37:63		VSID-25:51
	 * 89:91	(RS)33:35		Ks Kp N
	 * 92		(RS)36			L ((RS)36 must be 0b0)
	 * 93		0b0			C
	 */

	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);

	/* ESID = srnum */
	rb |= (srnum & 0xf) << 28;
	/* Set the valid bit */
	rb |= 1 << 27;
	/* Index = ESID */
	rb |= srnum;

	/* VSID = VSID */
	rs |= (value & 0xfffffff) << 12;
	/* flags = flags */
	rs |= ((value >> 28) & 0x7) << 9;

	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
}

static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
				       bool large)
{
	u64 mask = 0xFFFFFFFFFULL;

	dprintk("KVM MMU: tlbie(0x%lx)\n", va);

	if (large)
		mask = 0xFFFFFF000ULL;
	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
}

static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid,
					     u64 *vsid)
{
	switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = (VSID_REAL >> 16) | esid;
		break;
	case MSR_IR:
		*vsid = (VSID_REAL_IR >> 16) | esid;
		break;
	case MSR_DR:
		*vsid = (VSID_REAL_DR >> 16) | esid;
		break;
	case MSR_DR|MSR_IR:
	{
		ulong ea;
		struct kvmppc_slb *slb;
		ea = esid << SID_SHIFT;
		slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), ea);
		if (slb)
			*vsid = slb->vsid;
		else
			return -ENOENT;

		break;
	}
	default:
		BUG();
		break;
	}

	return 0;
}

static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return (to_book3s(vcpu)->hid[5] & 0x80);
}

void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mfsrin = NULL;
	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;

	vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
}
Commit	Line	Data
e71b2a39 AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <linux/types.h>
	21	#include <linux/string.h>
	22	#include <linux/kvm.h>
	23	#include <linux/kvm_host.h>
	24	#include <linux/highmem.h>
	25
	26	#include <asm/tlbflush.h>
	27	#include <asm/kvm_ppc.h>
	28	#include <asm/kvm_book3s.h>
	29
	30	/* #define DEBUG_MMU */
	31
	32	#ifdef DEBUG_MMU
	33	#define dprintk(X...) printk(KERN_INFO X)
	34	#else
	35	#define dprintk(X...) do { } while(0)
	36	#endif
	37
	38	static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu)
	39	{
	40	kvmppc_set_msr(vcpu, MSR_SF);
	41	}
	42
	43	static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe(
	44	struct kvmppc_vcpu_book3s *vcpu_book3s,
	45	gva_t eaddr)
	46	{
	47	int i;
	48	u64 esid = GET_ESID(eaddr);
	49	u64 esid_1t = GET_ESID_1T(eaddr);
	50
	51	for (i = 0; i < vcpu_book3s->slb_nr; i++) {
	52	u64 cmp_esid = esid;
	53
	54	if (!vcpu_book3s->slb[i].valid)
	55	continue;
	56
4b5c9b7f	57	if (vcpu_book3s->slb[i].tb)
e71b2a39 AG	58	cmp_esid = esid_1t;
	59
	60	if (vcpu_book3s->slb[i].esid == cmp_esid)
	61	return &vcpu_book3s->slb[i];
	62	}
	63
	64	dprintk("KVM: No SLB entry found for 0x%lx [%llx \| %llx]\n",
	65	eaddr, esid, esid_1t);
	66	for (i = 0; i < vcpu_book3s->slb_nr; i++) {
	67	if (vcpu_book3s->slb[i].vsid)
4b5c9b7f	68	dprintk(" %d: %c%c%c %llx %llx\n", i,
e71b2a39 AG	69	vcpu_book3s->slb[i].valid ? 'v' : ' ',
e71b2a39 AG	70	vcpu_book3s->slb[i].large ? 'l' : ' ',
4b5c9b7f	71	vcpu_book3s->slb[i].tb ? 't' : ' ',
e71b2a39 AG	72	vcpu_book3s->slb[i].esid,
	73	vcpu_book3s->slb[i].vsid);
	74	}
	75
	76	return NULL;
	77	}
	78
	79	static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	80	bool data)
	81	{
	82	struct kvmppc_slb *slb;
	83
	84	slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), eaddr);
	85	if (!slb)
	86	return 0;
	87
4b5c9b7f	88	if (slb->tb)
e71b2a39 AG	89	return (((u64)eaddr >> 12) & 0xfffffff) \|
	90	(((u64)slb->vsid) << 28);
	91
	92	return (((u64)eaddr >> 12) & 0xffff) \| (((u64)slb->vsid) << 16);
	93	}
	94
	95	static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe)
	96	{
	97	return slbe->large ? 24 : 12;
	98	}
	99
	100	static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr)
	101	{
	102	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	103	return ((eaddr & 0xfffffff) >> p);
	104	}
	105
	106	static hva_t kvmppc_mmu_book3s_64_get_pteg(
	107	struct kvmppc_vcpu_book3s *vcpu_book3s,
	108	struct kvmppc_slb *slbe, gva_t eaddr,
	109	bool second)
	110	{
	111	u64 hash, pteg, htabsize;
	112	u32 page;
	113	hva_t r;
	114
	115	page = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	116	htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1);
	117
	118	hash = slbe->vsid ^ page;
	119	if (second)
	120	hash = ~hash;
	121	hash &= ((1ULL << 39ULL) - 1ULL);
	122	hash &= htabsize;
	123	hash <<= 7ULL;
	124
	125	pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL;
	126	pteg \|= hash;
	127
	128	dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n",
	129	page, vcpu_book3s->sdr1, pteg, slbe->vsid);
	130
	131	r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
	132	if (kvm_is_error_hva(r))
	133	return r;
	134	return r \| (pteg & ~PAGE_MASK);
	135	}
	136
	137	static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr)
	138	{
	139	int p = kvmppc_mmu_book3s_64_get_pagesize(slbe);
	140	u64 avpn;
	141
	142	avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr);
	143	avpn \|= slbe->vsid << (28 - p);
	144
	145	if (p < 24)
	146	avpn >>= ((80 - p) - 56) - 8;
	147	else
	148	avpn <<= 8;
	149
	150	return avpn;
	151	}
	152
153	static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
154	struct kvmppc_pte *gpte, bool data)
155	{
156	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
157	struct kvmppc_slb *slbe;
158	hva_t ptegp;
159	u64 pteg[16];
160	u64 avpn = 0;
161	int i;
162	u8 key = 0;
163	bool found = false;
164	bool perm_err = false;
165	int second = 0;
166
167	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu_book3s, eaddr);
168	if (!slbe)
169	goto no_seg_found;
170
171	do_second:
172	ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu_book3s, slbe, eaddr, second);
173	if (kvm_is_error_hva(ptegp))
174	goto no_page_found;
175
176	avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr);
177
178	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
179	printk(KERN_ERR "KVM can't copy data from 0x%lx!\n", ptegp);
180	goto no_page_found;
181	}
182
183	if ((vcpu->arch.msr & MSR_PR) && slbe->Kp)
184	key = 4;
185	else if (!(vcpu->arch.msr & MSR_PR) && slbe->Ks)
186	key = 4;
187
188	for (i=0; i<16; i+=2) {
189	u64 v = pteg[i];
190	u64 r = pteg[i+1];
191
192	/* Valid check */
193	if (!(v & HPTE_V_VALID))
194	continue;
195	/* Hash check */
196	if ((v & HPTE_V_SECONDARY) != second)
197	continue;
198
199	/* AVPN compare */
200	if (HPTE_V_AVPN_VAL(avpn) == HPTE_V_AVPN_VAL(v)) {
201	u8 pp = (r & HPTE_R_PP) \| key;
202	int eaddr_mask = 0xFFF;
203
204	gpte->eaddr = eaddr;
205	gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu,
206	eaddr,
207	data);
208	if (slbe->large)
209	eaddr_mask = 0xFFFFFF;
210	gpte->raddr = (r & HPTE_R_RPN) \| (eaddr & eaddr_mask);
211	gpte->may_execute = ((r & HPTE_R_N) ? false : true);
212	gpte->may_read = false;
213	gpte->may_write = false;
214
215	switch (pp) {
216	case 0:
217	case 1:
218	case 2:
219	case 6:
220	gpte->may_write = true;
221	/* fall through */
222	case 3:
223	case 5:
224	case 7:
225	gpte->may_read = true;
226	break;
227	}
228
229	if (!gpte->may_read) {
230	perm_err = true;
231	continue;
232	}
233
234	dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx "
235	"-> 0x%llx\n",
236	eaddr, avpn, gpte->vpage, gpte->raddr);
237	found = true;
238	break;
239	}
240	}
241
242	/* Update PTE R and C bits, so the guest's swapper knows we used the
243	* page */
244	if (found) {
245	u32 oldr = pteg[i+1];
246
247	if (gpte->may_read) {
248	/* Set the accessed flag */
249	pteg[i+1] \|= HPTE_R_R;
250	}
251	if (gpte->may_write) {
252	/* Set the dirty flag */
253	pteg[i+1] \|= HPTE_R_C;
254	} else {
255	dprintk("KVM: Mapping read-only page!\n");
256	}
257
258	/* Write back into the PTEG */
259	if (pteg[i+1] != oldr)
260	copy_to_user((void __user *)ptegp, pteg, sizeof(pteg));
261
262	return 0;
263	} else {
264	dprintk("KVM MMU: No PTE found (ea=0x%lx sdr1=0x%llx "
265	"ptegp=0x%lx)\n",
266	eaddr, to_book3s(vcpu)->sdr1, ptegp);
267	for (i = 0; i < 16; i += 2)
268	dprintk(" %02d: 0x%llx - 0x%llx (0x%llx)\n",
269	i, pteg[i], pteg[i+1], avpn);
270
271	if (!second) {
272	second = HPTE_V_SECONDARY;
273	goto do_second;
274	}
275	}
276
277
278	no_page_found:
279
280
281	if (perm_err)
282	return -EPERM;
283
284	return -ENOENT;
285
286	no_seg_found:
287
288	dprintk("KVM MMU: Trigger segment fault\n");
289	return -EINVAL;
290	}
291
292	static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb)
293	{
294	struct kvmppc_vcpu_book3s *vcpu_book3s;
295	u64 esid, esid_1t;
296	int slb_nr;
297	struct kvmppc_slb *slbe;
298
299	dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb);
300
301	vcpu_book3s = to_book3s(vcpu);
302
303	esid = GET_ESID(rb);
304	esid_1t = GET_ESID_1T(rb);
305	slb_nr = rb & 0xfff;
306
307	if (slb_nr > vcpu_book3s->slb_nr)
308	return;
309
310	slbe = &vcpu_book3s->slb[slb_nr];
311
312	slbe->large = (rs & SLB_VSID_L) ? 1 : 0;
4b5c9b7f AG	313	slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0;
4b5c9b7f AG	314	slbe->esid = slbe->tb ? esid_1t : esid;
e71b2a39 AG	315	slbe->vsid = rs >> 12;
	316	slbe->valid = (rb & SLB_ESID_V) ? 1 : 0;
	317	slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0;
	318	slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0;
	319	slbe->nx = (rs & SLB_VSID_N) ? 1 : 0;
	320	slbe->class = (rs & SLB_VSID_C) ? 1 : 0;
	321
	322	slbe->orige = rb & (ESID_MASK \| SLB_ESID_V);
	323	slbe->origv = rs;
	324
	325	/* Map the new segment */
	326	kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT);
	327	}
	328
	329	static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr)
	330	{
	331	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	332	struct kvmppc_slb *slbe;
	333
	334	if (slb_nr > vcpu_book3s->slb_nr)
	335	return 0;
	336
	337	slbe = &vcpu_book3s->slb[slb_nr];
	338
	339	return slbe->orige;
	340	}
	341
	342	static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr)
	343	{
	344	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	345	struct kvmppc_slb *slbe;
	346
	347	if (slb_nr > vcpu_book3s->slb_nr)
	348	return 0;
	349
	350	slbe = &vcpu_book3s->slb[slb_nr];
	351
	352	return slbe->origv;
	353	}
	354
	355	static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea)
	356	{
	357	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	358	struct kvmppc_slb *slbe;
	359
	360	dprintk("KVM MMU: slbie(0x%llx)\n", ea);
	361
	362	slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu_book3s, ea);
	363
	364	if (!slbe)
	365	return;
	366
	367	dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid);
	368
	369	slbe->valid = false;
	370
	371	kvmppc_mmu_map_segment(vcpu, ea);
	372	}
	373
	374	static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
	375	{
	376	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	377	int i;
	378
379	dprintk("KVM MMU: slbia()\n");
380
381	for (i = 1; i < vcpu_book3s->slb_nr; i++)
382	vcpu_book3s->slb[i].valid = false;
383
384	if (vcpu->arch.msr & MSR_IR) {
385	kvmppc_mmu_flush_segments(vcpu);
c7f38f46	386	kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
e71b2a39 AG	387	}
	388	}
	389
	390	static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	391	ulong value)
	392	{
	393	u64 rb = 0, rs = 0;
	394
5279aeb4 AG	395	/*
	396	* According to Book3 2.01 mtsrin is implemented as:
	397	*
	398	* The SLB entry specified by (RB)32:35 is loaded from register
	399	* RS, as follows.
	400	*
	401	* SLBE Bit Source SLB Field
	402	*
	403	* 0:31 0x0000_0000 ESID-0:31
	404	* 32:35 (RB)32:35 ESID-32:35
	405	* 36 0b1 V
	406	* 37:61 0x00_0000\|\| 0b0 VSID-0:24
	407	* 62:88 (RS)37:63 VSID-25:51
	408	* 89:91 (RS)33:35 Ks Kp N
	409	* 92 (RS)36 L ((RS)36 must be 0b0)
	410	* 93 0b0 C
	411	*/
	412
	413	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);
	414
e71b2a39 AG	415	/* ESID = srnum */
	416	rb \|= (srnum & 0xf) << 28;
	417	/* Set the valid bit */
	418	rb \|= 1 << 27;
	419	/* Index = ESID */
	420	rb \|= srnum;
	421
	422	/* VSID = VSID */
	423	rs \|= (value & 0xfffffff) << 12;
	424	/* flags = flags */
5279aeb4	425	rs \|= ((value >> 28) & 0x7) << 9;
e71b2a39 AG	426
	427	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);
	428	}
	429
	430	static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va,
	431	bool large)
	432	{
	433	u64 mask = 0xFFFFFFFFFULL;
	434
	435	dprintk("KVM MMU: tlbie(0x%lx)\n", va);
	436
	437	if (large)
	438	mask = 0xFFFFFF000ULL;
	439	kvmppc_mmu_pte_vflush(vcpu, va >> 12, mask);
	440	}
	441
	442	static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, u64 esid,
	443	u64 *vsid)
	444	{
	445	switch (vcpu->arch.msr & (MSR_DR\|MSR_IR)) {
	446	case 0:
	447	*vsid = (VSID_REAL >> 16) \| esid;
	448	break;
	449	case MSR_IR:
	450	*vsid = (VSID_REAL_IR >> 16) \| esid;
	451	break;
	452	case MSR_DR:
	453	*vsid = (VSID_REAL_DR >> 16) \| esid;
	454	break;
	455	case MSR_DR\|MSR_IR:
	456	{
	457	ulong ea;
	458	struct kvmppc_slb *slb;
	459	ea = esid << SID_SHIFT;
	460	slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), ea);
	461	if (slb)
	462	*vsid = slb->vsid;
	463	else
	464	return -ENOENT;
	465
	466	break;
	467	}
	468	default:
	469	BUG();
	470	break;
	471	}
	472
	473	return 0;
	474	}
	475
	476	static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
	477	{
	478	return (to_book3s(vcpu)->hid[5] & 0x80);
	479	}
	480
	481	void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu)
	482	{
	483	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	484
	485	mmu->mfsrin = NULL;
	486	mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin;
	487	mmu->slbmte = kvmppc_mmu_book3s_64_slbmte;
	488	mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee;
	489	mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev;
490	mmu->slbie = kvmppc_mmu_book3s_64_slbie;
491	mmu->slbia = kvmppc_mmu_book3s_64_slbia;
492	mmu->xlate = kvmppc_mmu_book3s_64_xlate;
493	mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr;
494	mmu->tlbie = kvmppc_mmu_book3s_64_tlbie;
495	mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid;
496	mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp;
497	mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32;
e15a1137 AG	498
e15a1137 AG	499	vcpu->arch.hflags \|= BOOK3S_HFLAG_SLB;
e71b2a39	500	}