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de56a948 PM |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * This program is distributed in the hope that it will be useful, | |
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
9 | * GNU General Public License for more details. | |
10 | * | |
11 | * You should have received a copy of the GNU General Public License | |
12 | * along with this program; if not, write to the Free Software | |
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | |
14 | * | |
15 | * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> | |
16 | */ | |
17 | ||
18 | #include <linux/types.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/kvm.h> | |
21 | #include <linux/kvm_host.h> | |
22 | #include <linux/highmem.h> | |
23 | #include <linux/gfp.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/hugetlb.h> | |
8936dda4 | 26 | #include <linux/vmalloc.h> |
2c9097e4 | 27 | #include <linux/srcu.h> |
de56a948 PM |
28 | |
29 | #include <asm/tlbflush.h> | |
30 | #include <asm/kvm_ppc.h> | |
31 | #include <asm/kvm_book3s.h> | |
32 | #include <asm/mmu-hash64.h> | |
33 | #include <asm/hvcall.h> | |
34 | #include <asm/synch.h> | |
35 | #include <asm/ppc-opcode.h> | |
36 | #include <asm/cputable.h> | |
37 | ||
9e368f29 PM |
38 | /* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */ |
39 | #define MAX_LPID_970 63 | |
de56a948 | 40 | |
32fad281 PM |
41 | /* Power architecture requires HPT is at least 256kB */ |
42 | #define PPC_MIN_HPT_ORDER 18 | |
43 | ||
7ed661bf PM |
44 | static long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags, |
45 | long pte_index, unsigned long pteh, | |
46 | unsigned long ptel, unsigned long *pte_idx_ret); | |
47 | ||
32fad281 | 48 | long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp) |
de56a948 PM |
49 | { |
50 | unsigned long hpt; | |
8936dda4 | 51 | struct revmap_entry *rev; |
d2a1b483 | 52 | struct kvmppc_linear_info *li; |
32fad281 | 53 | long order = kvm_hpt_order; |
de56a948 | 54 | |
32fad281 PM |
55 | if (htab_orderp) { |
56 | order = *htab_orderp; | |
57 | if (order < PPC_MIN_HPT_ORDER) | |
58 | order = PPC_MIN_HPT_ORDER; | |
59 | } | |
60 | ||
61 | /* | |
62 | * If the user wants a different size from default, | |
63 | * try first to allocate it from the kernel page allocator. | |
64 | */ | |
65 | hpt = 0; | |
66 | if (order != kvm_hpt_order) { | |
d2a1b483 | 67 | hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT| |
32fad281 PM |
68 | __GFP_NOWARN, order - PAGE_SHIFT); |
69 | if (!hpt) | |
70 | --order; | |
d2a1b483 AG |
71 | } |
72 | ||
32fad281 | 73 | /* Next try to allocate from the preallocated pool */ |
de56a948 | 74 | if (!hpt) { |
32fad281 PM |
75 | li = kvm_alloc_hpt(); |
76 | if (li) { | |
77 | hpt = (ulong)li->base_virt; | |
78 | kvm->arch.hpt_li = li; | |
79 | order = kvm_hpt_order; | |
80 | } | |
de56a948 | 81 | } |
32fad281 PM |
82 | |
83 | /* Lastly try successively smaller sizes from the page allocator */ | |
84 | while (!hpt && order > PPC_MIN_HPT_ORDER) { | |
85 | hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT| | |
86 | __GFP_NOWARN, order - PAGE_SHIFT); | |
87 | if (!hpt) | |
88 | --order; | |
89 | } | |
90 | ||
91 | if (!hpt) | |
92 | return -ENOMEM; | |
93 | ||
de56a948 | 94 | kvm->arch.hpt_virt = hpt; |
32fad281 PM |
95 | kvm->arch.hpt_order = order; |
96 | /* HPTEs are 2**4 bytes long */ | |
97 | kvm->arch.hpt_npte = 1ul << (order - 4); | |
98 | /* 128 (2**7) bytes in each HPTEG */ | |
99 | kvm->arch.hpt_mask = (1ul << (order - 7)) - 1; | |
de56a948 | 100 | |
8936dda4 | 101 | /* Allocate reverse map array */ |
32fad281 | 102 | rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte); |
8936dda4 PM |
103 | if (!rev) { |
104 | pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n"); | |
105 | goto out_freehpt; | |
106 | } | |
107 | kvm->arch.revmap = rev; | |
32fad281 | 108 | kvm->arch.sdr1 = __pa(hpt) | (order - 18); |
8936dda4 | 109 | |
32fad281 PM |
110 | pr_info("KVM guest htab at %lx (order %ld), LPID %x\n", |
111 | hpt, order, kvm->arch.lpid); | |
de56a948 | 112 | |
32fad281 PM |
113 | if (htab_orderp) |
114 | *htab_orderp = order; | |
de56a948 | 115 | return 0; |
8936dda4 | 116 | |
8936dda4 | 117 | out_freehpt: |
32fad281 PM |
118 | if (kvm->arch.hpt_li) |
119 | kvm_release_hpt(kvm->arch.hpt_li); | |
120 | else | |
121 | free_pages(hpt, order - PAGE_SHIFT); | |
8936dda4 | 122 | return -ENOMEM; |
de56a948 PM |
123 | } |
124 | ||
32fad281 PM |
125 | long kvmppc_alloc_reset_hpt(struct kvm *kvm, u32 *htab_orderp) |
126 | { | |
127 | long err = -EBUSY; | |
128 | long order; | |
129 | ||
130 | mutex_lock(&kvm->lock); | |
131 | if (kvm->arch.rma_setup_done) { | |
132 | kvm->arch.rma_setup_done = 0; | |
133 | /* order rma_setup_done vs. vcpus_running */ | |
134 | smp_mb(); | |
135 | if (atomic_read(&kvm->arch.vcpus_running)) { | |
136 | kvm->arch.rma_setup_done = 1; | |
137 | goto out; | |
138 | } | |
139 | } | |
140 | if (kvm->arch.hpt_virt) { | |
141 | order = kvm->arch.hpt_order; | |
142 | /* Set the entire HPT to 0, i.e. invalid HPTEs */ | |
143 | memset((void *)kvm->arch.hpt_virt, 0, 1ul << order); | |
144 | /* | |
145 | * Set the whole last_vcpu array to an invalid vcpu number. | |
146 | * This ensures that each vcpu will flush its TLB on next entry. | |
147 | */ | |
148 | memset(kvm->arch.last_vcpu, 0xff, sizeof(kvm->arch.last_vcpu)); | |
149 | *htab_orderp = order; | |
150 | err = 0; | |
151 | } else { | |
152 | err = kvmppc_alloc_hpt(kvm, htab_orderp); | |
153 | order = *htab_orderp; | |
154 | } | |
155 | out: | |
156 | mutex_unlock(&kvm->lock); | |
157 | return err; | |
158 | } | |
159 | ||
de56a948 PM |
160 | void kvmppc_free_hpt(struct kvm *kvm) |
161 | { | |
043cc4d7 | 162 | kvmppc_free_lpid(kvm->arch.lpid); |
8936dda4 | 163 | vfree(kvm->arch.revmap); |
d2a1b483 AG |
164 | if (kvm->arch.hpt_li) |
165 | kvm_release_hpt(kvm->arch.hpt_li); | |
166 | else | |
32fad281 PM |
167 | free_pages(kvm->arch.hpt_virt, |
168 | kvm->arch.hpt_order - PAGE_SHIFT); | |
de56a948 PM |
169 | } |
170 | ||
da9d1d7f PM |
171 | /* Bits in first HPTE dword for pagesize 4k, 64k or 16M */ |
172 | static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize) | |
173 | { | |
174 | return (pgsize > 0x1000) ? HPTE_V_LARGE : 0; | |
175 | } | |
176 | ||
177 | /* Bits in second HPTE dword for pagesize 4k, 64k or 16M */ | |
178 | static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize) | |
179 | { | |
180 | return (pgsize == 0x10000) ? 0x1000 : 0; | |
181 | } | |
182 | ||
183 | void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot, | |
184 | unsigned long porder) | |
de56a948 PM |
185 | { |
186 | unsigned long i; | |
b2b2f165 | 187 | unsigned long npages; |
c77162de PM |
188 | unsigned long hp_v, hp_r; |
189 | unsigned long addr, hash; | |
da9d1d7f PM |
190 | unsigned long psize; |
191 | unsigned long hp0, hp1; | |
7ed661bf | 192 | unsigned long idx_ret; |
c77162de | 193 | long ret; |
32fad281 | 194 | struct kvm *kvm = vcpu->kvm; |
de56a948 | 195 | |
da9d1d7f PM |
196 | psize = 1ul << porder; |
197 | npages = memslot->npages >> (porder - PAGE_SHIFT); | |
de56a948 PM |
198 | |
199 | /* VRMA can't be > 1TB */ | |
8936dda4 PM |
200 | if (npages > 1ul << (40 - porder)) |
201 | npages = 1ul << (40 - porder); | |
de56a948 | 202 | /* Can't use more than 1 HPTE per HPTEG */ |
32fad281 PM |
203 | if (npages > kvm->arch.hpt_mask + 1) |
204 | npages = kvm->arch.hpt_mask + 1; | |
de56a948 | 205 | |
da9d1d7f PM |
206 | hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) | |
207 | HPTE_V_BOLTED | hpte0_pgsize_encoding(psize); | |
208 | hp1 = hpte1_pgsize_encoding(psize) | | |
209 | HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX; | |
210 | ||
de56a948 | 211 | for (i = 0; i < npages; ++i) { |
c77162de | 212 | addr = i << porder; |
de56a948 | 213 | /* can't use hpt_hash since va > 64 bits */ |
32fad281 | 214 | hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & kvm->arch.hpt_mask; |
de56a948 PM |
215 | /* |
216 | * We assume that the hash table is empty and no | |
217 | * vcpus are using it at this stage. Since we create | |
218 | * at most one HPTE per HPTEG, we just assume entry 7 | |
219 | * is available and use it. | |
220 | */ | |
8936dda4 | 221 | hash = (hash << 3) + 7; |
da9d1d7f PM |
222 | hp_v = hp0 | ((addr >> 16) & ~0x7fUL); |
223 | hp_r = hp1 | addr; | |
7ed661bf PM |
224 | ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, hash, hp_v, hp_r, |
225 | &idx_ret); | |
c77162de PM |
226 | if (ret != H_SUCCESS) { |
227 | pr_err("KVM: map_vrma at %lx failed, ret=%ld\n", | |
228 | addr, ret); | |
229 | break; | |
230 | } | |
de56a948 PM |
231 | } |
232 | } | |
233 | ||
234 | int kvmppc_mmu_hv_init(void) | |
235 | { | |
9e368f29 PM |
236 | unsigned long host_lpid, rsvd_lpid; |
237 | ||
238 | if (!cpu_has_feature(CPU_FTR_HVMODE)) | |
de56a948 | 239 | return -EINVAL; |
9e368f29 | 240 | |
043cc4d7 | 241 | /* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */ |
9e368f29 PM |
242 | if (cpu_has_feature(CPU_FTR_ARCH_206)) { |
243 | host_lpid = mfspr(SPRN_LPID); /* POWER7 */ | |
244 | rsvd_lpid = LPID_RSVD; | |
245 | } else { | |
246 | host_lpid = 0; /* PPC970 */ | |
247 | rsvd_lpid = MAX_LPID_970; | |
248 | } | |
249 | ||
043cc4d7 SW |
250 | kvmppc_init_lpid(rsvd_lpid + 1); |
251 | ||
252 | kvmppc_claim_lpid(host_lpid); | |
9e368f29 | 253 | /* rsvd_lpid is reserved for use in partition switching */ |
043cc4d7 | 254 | kvmppc_claim_lpid(rsvd_lpid); |
de56a948 PM |
255 | |
256 | return 0; | |
257 | } | |
258 | ||
259 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | |
260 | { | |
261 | } | |
262 | ||
263 | static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu) | |
264 | { | |
265 | kvmppc_set_msr(vcpu, MSR_SF | MSR_ME); | |
266 | } | |
267 | ||
c77162de PM |
268 | /* |
269 | * This is called to get a reference to a guest page if there isn't | |
a66b48c3 | 270 | * one already in the memslot->arch.slot_phys[] array. |
c77162de PM |
271 | */ |
272 | static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn, | |
da9d1d7f PM |
273 | struct kvm_memory_slot *memslot, |
274 | unsigned long psize) | |
c77162de PM |
275 | { |
276 | unsigned long start; | |
da9d1d7f PM |
277 | long np, err; |
278 | struct page *page, *hpage, *pages[1]; | |
279 | unsigned long s, pgsize; | |
c77162de | 280 | unsigned long *physp; |
9d0ef5ea PM |
281 | unsigned int is_io, got, pgorder; |
282 | struct vm_area_struct *vma; | |
da9d1d7f | 283 | unsigned long pfn, i, npages; |
c77162de | 284 | |
a66b48c3 | 285 | physp = memslot->arch.slot_phys; |
c77162de PM |
286 | if (!physp) |
287 | return -EINVAL; | |
da9d1d7f | 288 | if (physp[gfn - memslot->base_gfn]) |
c77162de PM |
289 | return 0; |
290 | ||
9d0ef5ea PM |
291 | is_io = 0; |
292 | got = 0; | |
c77162de | 293 | page = NULL; |
da9d1d7f | 294 | pgsize = psize; |
9d0ef5ea | 295 | err = -EINVAL; |
c77162de PM |
296 | start = gfn_to_hva_memslot(memslot, gfn); |
297 | ||
298 | /* Instantiate and get the page we want access to */ | |
299 | np = get_user_pages_fast(start, 1, 1, pages); | |
9d0ef5ea PM |
300 | if (np != 1) { |
301 | /* Look up the vma for the page */ | |
302 | down_read(¤t->mm->mmap_sem); | |
303 | vma = find_vma(current->mm, start); | |
304 | if (!vma || vma->vm_start > start || | |
305 | start + psize > vma->vm_end || | |
306 | !(vma->vm_flags & VM_PFNMAP)) | |
307 | goto up_err; | |
308 | is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot)); | |
309 | pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT); | |
310 | /* check alignment of pfn vs. requested page size */ | |
311 | if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1))) | |
312 | goto up_err; | |
313 | up_read(¤t->mm->mmap_sem); | |
314 | ||
315 | } else { | |
316 | page = pages[0]; | |
317 | got = KVMPPC_GOT_PAGE; | |
318 | ||
319 | /* See if this is a large page */ | |
320 | s = PAGE_SIZE; | |
321 | if (PageHuge(page)) { | |
322 | hpage = compound_head(page); | |
323 | s <<= compound_order(hpage); | |
324 | /* Get the whole large page if slot alignment is ok */ | |
325 | if (s > psize && slot_is_aligned(memslot, s) && | |
326 | !(memslot->userspace_addr & (s - 1))) { | |
327 | start &= ~(s - 1); | |
328 | pgsize = s; | |
de6c0b02 DG |
329 | get_page(hpage); |
330 | put_page(page); | |
9d0ef5ea PM |
331 | page = hpage; |
332 | } | |
da9d1d7f | 333 | } |
9d0ef5ea PM |
334 | if (s < psize) |
335 | goto out; | |
336 | pfn = page_to_pfn(page); | |
c77162de | 337 | } |
c77162de | 338 | |
da9d1d7f PM |
339 | npages = pgsize >> PAGE_SHIFT; |
340 | pgorder = __ilog2(npages); | |
341 | physp += (gfn - memslot->base_gfn) & ~(npages - 1); | |
c77162de | 342 | spin_lock(&kvm->arch.slot_phys_lock); |
da9d1d7f PM |
343 | for (i = 0; i < npages; ++i) { |
344 | if (!physp[i]) { | |
9d0ef5ea PM |
345 | physp[i] = ((pfn + i) << PAGE_SHIFT) + |
346 | got + is_io + pgorder; | |
da9d1d7f PM |
347 | got = 0; |
348 | } | |
349 | } | |
c77162de | 350 | spin_unlock(&kvm->arch.slot_phys_lock); |
da9d1d7f | 351 | err = 0; |
c77162de | 352 | |
da9d1d7f | 353 | out: |
de6c0b02 | 354 | if (got) |
da9d1d7f | 355 | put_page(page); |
da9d1d7f | 356 | return err; |
9d0ef5ea PM |
357 | |
358 | up_err: | |
359 | up_read(¤t->mm->mmap_sem); | |
360 | return err; | |
c77162de PM |
361 | } |
362 | ||
7ed661bf PM |
363 | long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags, |
364 | long pte_index, unsigned long pteh, | |
365 | unsigned long ptel, unsigned long *pte_idx_ret) | |
c77162de | 366 | { |
c77162de PM |
367 | unsigned long psize, gpa, gfn; |
368 | struct kvm_memory_slot *memslot; | |
369 | long ret; | |
370 | ||
342d3db7 PM |
371 | if (kvm->arch.using_mmu_notifiers) |
372 | goto do_insert; | |
373 | ||
c77162de PM |
374 | psize = hpte_page_size(pteh, ptel); |
375 | if (!psize) | |
376 | return H_PARAMETER; | |
377 | ||
697d3899 PM |
378 | pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID); |
379 | ||
c77162de PM |
380 | /* Find the memslot (if any) for this address */ |
381 | gpa = (ptel & HPTE_R_RPN) & ~(psize - 1); | |
382 | gfn = gpa >> PAGE_SHIFT; | |
383 | memslot = gfn_to_memslot(kvm, gfn); | |
697d3899 PM |
384 | if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) { |
385 | if (!slot_is_aligned(memslot, psize)) | |
386 | return H_PARAMETER; | |
387 | if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0) | |
388 | return H_PARAMETER; | |
389 | } | |
c77162de | 390 | |
342d3db7 PM |
391 | do_insert: |
392 | /* Protect linux PTE lookup from page table destruction */ | |
393 | rcu_read_lock_sched(); /* this disables preemption too */ | |
7ed661bf PM |
394 | ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel, |
395 | current->mm->pgd, false, pte_idx_ret); | |
342d3db7 | 396 | rcu_read_unlock_sched(); |
c77162de PM |
397 | if (ret == H_TOO_HARD) { |
398 | /* this can't happen */ | |
399 | pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n"); | |
400 | ret = H_RESOURCE; /* or something */ | |
401 | } | |
402 | return ret; | |
403 | ||
404 | } | |
405 | ||
7ed661bf PM |
406 | /* |
407 | * We come here on a H_ENTER call from the guest when we are not | |
408 | * using mmu notifiers and we don't have the requested page pinned | |
409 | * already. | |
410 | */ | |
411 | long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags, | |
412 | long pte_index, unsigned long pteh, | |
413 | unsigned long ptel) | |
414 | { | |
415 | return kvmppc_virtmode_do_h_enter(vcpu->kvm, flags, pte_index, | |
416 | pteh, ptel, &vcpu->arch.gpr[4]); | |
417 | } | |
418 | ||
697d3899 PM |
419 | static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu, |
420 | gva_t eaddr) | |
421 | { | |
422 | u64 mask; | |
423 | int i; | |
424 | ||
425 | for (i = 0; i < vcpu->arch.slb_nr; i++) { | |
426 | if (!(vcpu->arch.slb[i].orige & SLB_ESID_V)) | |
427 | continue; | |
428 | ||
429 | if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T) | |
430 | mask = ESID_MASK_1T; | |
431 | else | |
432 | mask = ESID_MASK; | |
433 | ||
434 | if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0) | |
435 | return &vcpu->arch.slb[i]; | |
436 | } | |
437 | return NULL; | |
438 | } | |
439 | ||
440 | static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r, | |
441 | unsigned long ea) | |
442 | { | |
443 | unsigned long ra_mask; | |
444 | ||
445 | ra_mask = hpte_page_size(v, r) - 1; | |
446 | return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask); | |
447 | } | |
448 | ||
de56a948 | 449 | static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, |
697d3899 | 450 | struct kvmppc_pte *gpte, bool data) |
de56a948 | 451 | { |
697d3899 PM |
452 | struct kvm *kvm = vcpu->kvm; |
453 | struct kvmppc_slb *slbe; | |
454 | unsigned long slb_v; | |
455 | unsigned long pp, key; | |
456 | unsigned long v, gr; | |
457 | unsigned long *hptep; | |
458 | int index; | |
459 | int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR); | |
460 | ||
461 | /* Get SLB entry */ | |
462 | if (virtmode) { | |
463 | slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr); | |
464 | if (!slbe) | |
465 | return -EINVAL; | |
466 | slb_v = slbe->origv; | |
467 | } else { | |
468 | /* real mode access */ | |
469 | slb_v = vcpu->kvm->arch.vrma_slb_v; | |
470 | } | |
471 | ||
472 | /* Find the HPTE in the hash table */ | |
473 | index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v, | |
474 | HPTE_V_VALID | HPTE_V_ABSENT); | |
475 | if (index < 0) | |
476 | return -ENOENT; | |
477 | hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4)); | |
478 | v = hptep[0] & ~HPTE_V_HVLOCK; | |
479 | gr = kvm->arch.revmap[index].guest_rpte; | |
480 | ||
481 | /* Unlock the HPTE */ | |
482 | asm volatile("lwsync" : : : "memory"); | |
483 | hptep[0] = v; | |
484 | ||
485 | gpte->eaddr = eaddr; | |
486 | gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff); | |
487 | ||
488 | /* Get PP bits and key for permission check */ | |
489 | pp = gr & (HPTE_R_PP0 | HPTE_R_PP); | |
490 | key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; | |
491 | key &= slb_v; | |
492 | ||
493 | /* Calculate permissions */ | |
494 | gpte->may_read = hpte_read_permission(pp, key); | |
495 | gpte->may_write = hpte_write_permission(pp, key); | |
496 | gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G)); | |
497 | ||
498 | /* Storage key permission check for POWER7 */ | |
499 | if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) { | |
500 | int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr); | |
501 | if (amrfield & 1) | |
502 | gpte->may_read = 0; | |
503 | if (amrfield & 2) | |
504 | gpte->may_write = 0; | |
505 | } | |
506 | ||
507 | /* Get the guest physical address */ | |
508 | gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr); | |
509 | return 0; | |
510 | } | |
511 | ||
512 | /* | |
513 | * Quick test for whether an instruction is a load or a store. | |
514 | * If the instruction is a load or a store, then this will indicate | |
515 | * which it is, at least on server processors. (Embedded processors | |
516 | * have some external PID instructions that don't follow the rule | |
517 | * embodied here.) If the instruction isn't a load or store, then | |
518 | * this doesn't return anything useful. | |
519 | */ | |
520 | static int instruction_is_store(unsigned int instr) | |
521 | { | |
522 | unsigned int mask; | |
523 | ||
524 | mask = 0x10000000; | |
525 | if ((instr & 0xfc000000) == 0x7c000000) | |
526 | mask = 0x100; /* major opcode 31 */ | |
527 | return (instr & mask) != 0; | |
528 | } | |
529 | ||
530 | static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
6020c0f6 | 531 | unsigned long gpa, gva_t ea, int is_store) |
697d3899 PM |
532 | { |
533 | int ret; | |
534 | u32 last_inst; | |
535 | unsigned long srr0 = kvmppc_get_pc(vcpu); | |
536 | ||
537 | /* We try to load the last instruction. We don't let | |
538 | * emulate_instruction do it as it doesn't check what | |
539 | * kvmppc_ld returns. | |
540 | * If we fail, we just return to the guest and try executing it again. | |
541 | */ | |
542 | if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) { | |
543 | ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); | |
544 | if (ret != EMULATE_DONE || last_inst == KVM_INST_FETCH_FAILED) | |
545 | return RESUME_GUEST; | |
546 | vcpu->arch.last_inst = last_inst; | |
547 | } | |
548 | ||
549 | /* | |
550 | * WARNING: We do not know for sure whether the instruction we just | |
551 | * read from memory is the same that caused the fault in the first | |
552 | * place. If the instruction we read is neither an load or a store, | |
553 | * then it can't access memory, so we don't need to worry about | |
554 | * enforcing access permissions. So, assuming it is a load or | |
555 | * store, we just check that its direction (load or store) is | |
556 | * consistent with the original fault, since that's what we | |
557 | * checked the access permissions against. If there is a mismatch | |
558 | * we just return and retry the instruction. | |
559 | */ | |
560 | ||
561 | if (instruction_is_store(vcpu->arch.last_inst) != !!is_store) | |
562 | return RESUME_GUEST; | |
563 | ||
564 | /* | |
565 | * Emulated accesses are emulated by looking at the hash for | |
566 | * translation once, then performing the access later. The | |
567 | * translation could be invalidated in the meantime in which | |
568 | * point performing the subsequent memory access on the old | |
569 | * physical address could possibly be a security hole for the | |
570 | * guest (but not the host). | |
571 | * | |
572 | * This is less of an issue for MMIO stores since they aren't | |
573 | * globally visible. It could be an issue for MMIO loads to | |
574 | * a certain extent but we'll ignore it for now. | |
575 | */ | |
576 | ||
577 | vcpu->arch.paddr_accessed = gpa; | |
6020c0f6 | 578 | vcpu->arch.vaddr_accessed = ea; |
697d3899 PM |
579 | return kvmppc_emulate_mmio(run, vcpu); |
580 | } | |
581 | ||
582 | int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu, | |
583 | unsigned long ea, unsigned long dsisr) | |
584 | { | |
585 | struct kvm *kvm = vcpu->kvm; | |
342d3db7 PM |
586 | unsigned long *hptep, hpte[3], r; |
587 | unsigned long mmu_seq, psize, pte_size; | |
70bddfef | 588 | unsigned long gpa, gfn, hva, pfn; |
697d3899 | 589 | struct kvm_memory_slot *memslot; |
342d3db7 | 590 | unsigned long *rmap; |
697d3899 | 591 | struct revmap_entry *rev; |
342d3db7 PM |
592 | struct page *page, *pages[1]; |
593 | long index, ret, npages; | |
594 | unsigned long is_io; | |
4cf302bc | 595 | unsigned int writing, write_ok; |
342d3db7 | 596 | struct vm_area_struct *vma; |
bad3b507 | 597 | unsigned long rcbits; |
697d3899 PM |
598 | |
599 | /* | |
600 | * Real-mode code has already searched the HPT and found the | |
601 | * entry we're interested in. Lock the entry and check that | |
602 | * it hasn't changed. If it has, just return and re-execute the | |
603 | * instruction. | |
604 | */ | |
605 | if (ea != vcpu->arch.pgfault_addr) | |
606 | return RESUME_GUEST; | |
607 | index = vcpu->arch.pgfault_index; | |
608 | hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4)); | |
609 | rev = &kvm->arch.revmap[index]; | |
610 | preempt_disable(); | |
611 | while (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) | |
612 | cpu_relax(); | |
613 | hpte[0] = hptep[0] & ~HPTE_V_HVLOCK; | |
614 | hpte[1] = hptep[1]; | |
342d3db7 | 615 | hpte[2] = r = rev->guest_rpte; |
697d3899 PM |
616 | asm volatile("lwsync" : : : "memory"); |
617 | hptep[0] = hpte[0]; | |
618 | preempt_enable(); | |
619 | ||
620 | if (hpte[0] != vcpu->arch.pgfault_hpte[0] || | |
621 | hpte[1] != vcpu->arch.pgfault_hpte[1]) | |
622 | return RESUME_GUEST; | |
623 | ||
624 | /* Translate the logical address and get the page */ | |
342d3db7 | 625 | psize = hpte_page_size(hpte[0], r); |
70bddfef PM |
626 | gpa = (r & HPTE_R_RPN & ~(psize - 1)) | (ea & (psize - 1)); |
627 | gfn = gpa >> PAGE_SHIFT; | |
697d3899 PM |
628 | memslot = gfn_to_memslot(kvm, gfn); |
629 | ||
630 | /* No memslot means it's an emulated MMIO region */ | |
70bddfef | 631 | if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) |
6020c0f6 | 632 | return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea, |
697d3899 | 633 | dsisr & DSISR_ISSTORE); |
697d3899 | 634 | |
342d3db7 PM |
635 | if (!kvm->arch.using_mmu_notifiers) |
636 | return -EFAULT; /* should never get here */ | |
637 | ||
638 | /* used to check for invalidations in progress */ | |
639 | mmu_seq = kvm->mmu_notifier_seq; | |
640 | smp_rmb(); | |
641 | ||
642 | is_io = 0; | |
643 | pfn = 0; | |
644 | page = NULL; | |
645 | pte_size = PAGE_SIZE; | |
4cf302bc PM |
646 | writing = (dsisr & DSISR_ISSTORE) != 0; |
647 | /* If writing != 0, then the HPTE must allow writing, if we get here */ | |
648 | write_ok = writing; | |
342d3db7 | 649 | hva = gfn_to_hva_memslot(memslot, gfn); |
4cf302bc | 650 | npages = get_user_pages_fast(hva, 1, writing, pages); |
342d3db7 PM |
651 | if (npages < 1) { |
652 | /* Check if it's an I/O mapping */ | |
653 | down_read(¤t->mm->mmap_sem); | |
654 | vma = find_vma(current->mm, hva); | |
655 | if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end && | |
656 | (vma->vm_flags & VM_PFNMAP)) { | |
657 | pfn = vma->vm_pgoff + | |
658 | ((hva - vma->vm_start) >> PAGE_SHIFT); | |
659 | pte_size = psize; | |
660 | is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot)); | |
4cf302bc | 661 | write_ok = vma->vm_flags & VM_WRITE; |
342d3db7 PM |
662 | } |
663 | up_read(¤t->mm->mmap_sem); | |
664 | if (!pfn) | |
665 | return -EFAULT; | |
666 | } else { | |
667 | page = pages[0]; | |
668 | if (PageHuge(page)) { | |
669 | page = compound_head(page); | |
670 | pte_size <<= compound_order(page); | |
671 | } | |
4cf302bc PM |
672 | /* if the guest wants write access, see if that is OK */ |
673 | if (!writing && hpte_is_writable(r)) { | |
674 | pte_t *ptep, pte; | |
675 | ||
676 | /* | |
677 | * We need to protect against page table destruction | |
678 | * while looking up and updating the pte. | |
679 | */ | |
680 | rcu_read_lock_sched(); | |
681 | ptep = find_linux_pte_or_hugepte(current->mm->pgd, | |
682 | hva, NULL); | |
683 | if (ptep && pte_present(*ptep)) { | |
684 | pte = kvmppc_read_update_linux_pte(ptep, 1); | |
685 | if (pte_write(pte)) | |
686 | write_ok = 1; | |
687 | } | |
688 | rcu_read_unlock_sched(); | |
689 | } | |
342d3db7 PM |
690 | pfn = page_to_pfn(page); |
691 | } | |
692 | ||
693 | ret = -EFAULT; | |
694 | if (psize > pte_size) | |
695 | goto out_put; | |
696 | ||
697 | /* Check WIMG vs. the actual page we're accessing */ | |
698 | if (!hpte_cache_flags_ok(r, is_io)) { | |
699 | if (is_io) | |
700 | return -EFAULT; | |
701 | /* | |
702 | * Allow guest to map emulated device memory as | |
703 | * uncacheable, but actually make it cacheable. | |
704 | */ | |
705 | r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M; | |
706 | } | |
707 | ||
708 | /* Set the HPTE to point to pfn */ | |
709 | r = (r & ~(HPTE_R_PP0 - pte_size)) | (pfn << PAGE_SHIFT); | |
4cf302bc PM |
710 | if (hpte_is_writable(r) && !write_ok) |
711 | r = hpte_make_readonly(r); | |
342d3db7 PM |
712 | ret = RESUME_GUEST; |
713 | preempt_disable(); | |
714 | while (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) | |
715 | cpu_relax(); | |
716 | if ((hptep[0] & ~HPTE_V_HVLOCK) != hpte[0] || hptep[1] != hpte[1] || | |
717 | rev->guest_rpte != hpte[2]) | |
718 | /* HPTE has been changed under us; let the guest retry */ | |
719 | goto out_unlock; | |
720 | hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID; | |
721 | ||
d89cc617 | 722 | rmap = &memslot->arch.rmap[gfn - memslot->base_gfn]; |
342d3db7 PM |
723 | lock_rmap(rmap); |
724 | ||
725 | /* Check if we might have been invalidated; let the guest retry if so */ | |
726 | ret = RESUME_GUEST; | |
8ca40a70 | 727 | if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) { |
342d3db7 PM |
728 | unlock_rmap(rmap); |
729 | goto out_unlock; | |
730 | } | |
4cf302bc | 731 | |
bad3b507 PM |
732 | /* Only set R/C in real HPTE if set in both *rmap and guest_rpte */ |
733 | rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT; | |
734 | r &= rcbits | ~(HPTE_R_R | HPTE_R_C); | |
735 | ||
4cf302bc PM |
736 | if (hptep[0] & HPTE_V_VALID) { |
737 | /* HPTE was previously valid, so we need to invalidate it */ | |
738 | unlock_rmap(rmap); | |
739 | hptep[0] |= HPTE_V_ABSENT; | |
740 | kvmppc_invalidate_hpte(kvm, hptep, index); | |
bad3b507 PM |
741 | /* don't lose previous R and C bits */ |
742 | r |= hptep[1] & (HPTE_R_R | HPTE_R_C); | |
4cf302bc PM |
743 | } else { |
744 | kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0); | |
745 | } | |
342d3db7 PM |
746 | |
747 | hptep[1] = r; | |
748 | eieio(); | |
749 | hptep[0] = hpte[0]; | |
750 | asm volatile("ptesync" : : : "memory"); | |
751 | preempt_enable(); | |
4cf302bc | 752 | if (page && hpte_is_writable(r)) |
342d3db7 PM |
753 | SetPageDirty(page); |
754 | ||
755 | out_put: | |
de6c0b02 DG |
756 | if (page) { |
757 | /* | |
758 | * We drop pages[0] here, not page because page might | |
759 | * have been set to the head page of a compound, but | |
760 | * we have to drop the reference on the correct tail | |
761 | * page to match the get inside gup() | |
762 | */ | |
763 | put_page(pages[0]); | |
764 | } | |
342d3db7 PM |
765 | return ret; |
766 | ||
767 | out_unlock: | |
768 | hptep[0] &= ~HPTE_V_HVLOCK; | |
769 | preempt_enable(); | |
770 | goto out_put; | |
771 | } | |
772 | ||
84504ef3 TY |
773 | static int kvm_handle_hva_range(struct kvm *kvm, |
774 | unsigned long start, | |
775 | unsigned long end, | |
776 | int (*handler)(struct kvm *kvm, | |
777 | unsigned long *rmapp, | |
778 | unsigned long gfn)) | |
342d3db7 PM |
779 | { |
780 | int ret; | |
781 | int retval = 0; | |
782 | struct kvm_memslots *slots; | |
783 | struct kvm_memory_slot *memslot; | |
784 | ||
785 | slots = kvm_memslots(kvm); | |
786 | kvm_for_each_memslot(memslot, slots) { | |
84504ef3 TY |
787 | unsigned long hva_start, hva_end; |
788 | gfn_t gfn, gfn_end; | |
789 | ||
790 | hva_start = max(start, memslot->userspace_addr); | |
791 | hva_end = min(end, memslot->userspace_addr + | |
792 | (memslot->npages << PAGE_SHIFT)); | |
793 | if (hva_start >= hva_end) | |
794 | continue; | |
795 | /* | |
796 | * {gfn(page) | page intersects with [hva_start, hva_end)} = | |
797 | * {gfn, gfn+1, ..., gfn_end-1}. | |
798 | */ | |
799 | gfn = hva_to_gfn_memslot(hva_start, memslot); | |
800 | gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot); | |
342d3db7 | 801 | |
84504ef3 | 802 | for (; gfn < gfn_end; ++gfn) { |
d19a748b | 803 | gfn_t gfn_offset = gfn - memslot->base_gfn; |
342d3db7 | 804 | |
d89cc617 | 805 | ret = handler(kvm, &memslot->arch.rmap[gfn_offset], gfn); |
342d3db7 PM |
806 | retval |= ret; |
807 | } | |
808 | } | |
809 | ||
810 | return retval; | |
811 | } | |
812 | ||
84504ef3 TY |
813 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, |
814 | int (*handler)(struct kvm *kvm, unsigned long *rmapp, | |
815 | unsigned long gfn)) | |
816 | { | |
817 | return kvm_handle_hva_range(kvm, hva, hva + 1, handler); | |
818 | } | |
819 | ||
342d3db7 PM |
820 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp, |
821 | unsigned long gfn) | |
822 | { | |
823 | struct revmap_entry *rev = kvm->arch.revmap; | |
824 | unsigned long h, i, j; | |
825 | unsigned long *hptep; | |
bad3b507 | 826 | unsigned long ptel, psize, rcbits; |
342d3db7 PM |
827 | |
828 | for (;;) { | |
bad3b507 | 829 | lock_rmap(rmapp); |
342d3db7 | 830 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { |
bad3b507 | 831 | unlock_rmap(rmapp); |
342d3db7 PM |
832 | break; |
833 | } | |
834 | ||
835 | /* | |
836 | * To avoid an ABBA deadlock with the HPTE lock bit, | |
bad3b507 PM |
837 | * we can't spin on the HPTE lock while holding the |
838 | * rmap chain lock. | |
342d3db7 PM |
839 | */ |
840 | i = *rmapp & KVMPPC_RMAP_INDEX; | |
bad3b507 PM |
841 | hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4)); |
842 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { | |
843 | /* unlock rmap before spinning on the HPTE lock */ | |
844 | unlock_rmap(rmapp); | |
845 | while (hptep[0] & HPTE_V_HVLOCK) | |
846 | cpu_relax(); | |
847 | continue; | |
848 | } | |
342d3db7 PM |
849 | j = rev[i].forw; |
850 | if (j == i) { | |
851 | /* chain is now empty */ | |
bad3b507 | 852 | *rmapp &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX); |
342d3db7 PM |
853 | } else { |
854 | /* remove i from chain */ | |
855 | h = rev[i].back; | |
856 | rev[h].forw = j; | |
857 | rev[j].back = h; | |
858 | rev[i].forw = rev[i].back = i; | |
bad3b507 | 859 | *rmapp = (*rmapp & ~KVMPPC_RMAP_INDEX) | j; |
342d3db7 | 860 | } |
342d3db7 | 861 | |
bad3b507 | 862 | /* Now check and modify the HPTE */ |
342d3db7 PM |
863 | ptel = rev[i].guest_rpte; |
864 | psize = hpte_page_size(hptep[0], ptel); | |
865 | if ((hptep[0] & HPTE_V_VALID) && | |
866 | hpte_rpn(ptel, psize) == gfn) { | |
dfe49dbd PM |
867 | if (kvm->arch.using_mmu_notifiers) |
868 | hptep[0] |= HPTE_V_ABSENT; | |
bad3b507 PM |
869 | kvmppc_invalidate_hpte(kvm, hptep, i); |
870 | /* Harvest R and C */ | |
871 | rcbits = hptep[1] & (HPTE_R_R | HPTE_R_C); | |
872 | *rmapp |= rcbits << KVMPPC_RMAP_RC_SHIFT; | |
873 | rev[i].guest_rpte = ptel | rcbits; | |
342d3db7 | 874 | } |
bad3b507 | 875 | unlock_rmap(rmapp); |
342d3db7 PM |
876 | hptep[0] &= ~HPTE_V_HVLOCK; |
877 | } | |
878 | return 0; | |
879 | } | |
880 | ||
881 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
882 | { | |
883 | if (kvm->arch.using_mmu_notifiers) | |
884 | kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
885 | return 0; | |
886 | } | |
887 | ||
b3ae2096 TY |
888 | int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) |
889 | { | |
890 | if (kvm->arch.using_mmu_notifiers) | |
891 | kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp); | |
892 | return 0; | |
893 | } | |
894 | ||
dfe49dbd PM |
895 | void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) |
896 | { | |
897 | unsigned long *rmapp; | |
898 | unsigned long gfn; | |
899 | unsigned long n; | |
900 | ||
901 | rmapp = memslot->arch.rmap; | |
902 | gfn = memslot->base_gfn; | |
903 | for (n = memslot->npages; n; --n) { | |
904 | /* | |
905 | * Testing the present bit without locking is OK because | |
906 | * the memslot has been marked invalid already, and hence | |
907 | * no new HPTEs referencing this page can be created, | |
908 | * thus the present bit can't go from 0 to 1. | |
909 | */ | |
910 | if (*rmapp & KVMPPC_RMAP_PRESENT) | |
911 | kvm_unmap_rmapp(kvm, rmapp, gfn); | |
912 | ++rmapp; | |
913 | ++gfn; | |
914 | } | |
915 | } | |
916 | ||
342d3db7 PM |
917 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp, |
918 | unsigned long gfn) | |
919 | { | |
55514893 PM |
920 | struct revmap_entry *rev = kvm->arch.revmap; |
921 | unsigned long head, i, j; | |
922 | unsigned long *hptep; | |
923 | int ret = 0; | |
924 | ||
925 | retry: | |
926 | lock_rmap(rmapp); | |
927 | if (*rmapp & KVMPPC_RMAP_REFERENCED) { | |
928 | *rmapp &= ~KVMPPC_RMAP_REFERENCED; | |
929 | ret = 1; | |
930 | } | |
931 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { | |
932 | unlock_rmap(rmapp); | |
933 | return ret; | |
934 | } | |
935 | ||
936 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
937 | do { | |
938 | hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4)); | |
939 | j = rev[i].forw; | |
940 | ||
941 | /* If this HPTE isn't referenced, ignore it */ | |
942 | if (!(hptep[1] & HPTE_R_R)) | |
943 | continue; | |
944 | ||
945 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { | |
946 | /* unlock rmap before spinning on the HPTE lock */ | |
947 | unlock_rmap(rmapp); | |
948 | while (hptep[0] & HPTE_V_HVLOCK) | |
949 | cpu_relax(); | |
950 | goto retry; | |
951 | } | |
952 | ||
953 | /* Now check and modify the HPTE */ | |
954 | if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_R)) { | |
955 | kvmppc_clear_ref_hpte(kvm, hptep, i); | |
956 | rev[i].guest_rpte |= HPTE_R_R; | |
957 | ret = 1; | |
958 | } | |
959 | hptep[0] &= ~HPTE_V_HVLOCK; | |
960 | } while ((i = j) != head); | |
961 | ||
962 | unlock_rmap(rmapp); | |
963 | return ret; | |
342d3db7 PM |
964 | } |
965 | ||
966 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
967 | { | |
968 | if (!kvm->arch.using_mmu_notifiers) | |
969 | return 0; | |
970 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
971 | } | |
972 | ||
973 | static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp, | |
974 | unsigned long gfn) | |
975 | { | |
55514893 PM |
976 | struct revmap_entry *rev = kvm->arch.revmap; |
977 | unsigned long head, i, j; | |
978 | unsigned long *hp; | |
979 | int ret = 1; | |
980 | ||
981 | if (*rmapp & KVMPPC_RMAP_REFERENCED) | |
982 | return 1; | |
983 | ||
984 | lock_rmap(rmapp); | |
985 | if (*rmapp & KVMPPC_RMAP_REFERENCED) | |
986 | goto out; | |
987 | ||
988 | if (*rmapp & KVMPPC_RMAP_PRESENT) { | |
989 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
990 | do { | |
991 | hp = (unsigned long *)(kvm->arch.hpt_virt + (i << 4)); | |
992 | j = rev[i].forw; | |
993 | if (hp[1] & HPTE_R_R) | |
994 | goto out; | |
995 | } while ((i = j) != head); | |
996 | } | |
997 | ret = 0; | |
998 | ||
999 | out: | |
1000 | unlock_rmap(rmapp); | |
1001 | return ret; | |
342d3db7 PM |
1002 | } |
1003 | ||
1004 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) | |
1005 | { | |
1006 | if (!kvm->arch.using_mmu_notifiers) | |
1007 | return 0; | |
1008 | return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp); | |
1009 | } | |
1010 | ||
1011 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) | |
1012 | { | |
1013 | if (!kvm->arch.using_mmu_notifiers) | |
1014 | return; | |
1015 | kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
de56a948 PM |
1016 | } |
1017 | ||
82ed3616 PM |
1018 | static int kvm_test_clear_dirty(struct kvm *kvm, unsigned long *rmapp) |
1019 | { | |
1020 | struct revmap_entry *rev = kvm->arch.revmap; | |
1021 | unsigned long head, i, j; | |
1022 | unsigned long *hptep; | |
1023 | int ret = 0; | |
1024 | ||
1025 | retry: | |
1026 | lock_rmap(rmapp); | |
1027 | if (*rmapp & KVMPPC_RMAP_CHANGED) { | |
1028 | *rmapp &= ~KVMPPC_RMAP_CHANGED; | |
1029 | ret = 1; | |
1030 | } | |
1031 | if (!(*rmapp & KVMPPC_RMAP_PRESENT)) { | |
1032 | unlock_rmap(rmapp); | |
1033 | return ret; | |
1034 | } | |
1035 | ||
1036 | i = head = *rmapp & KVMPPC_RMAP_INDEX; | |
1037 | do { | |
1038 | hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4)); | |
1039 | j = rev[i].forw; | |
1040 | ||
1041 | if (!(hptep[1] & HPTE_R_C)) | |
1042 | continue; | |
1043 | ||
1044 | if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) { | |
1045 | /* unlock rmap before spinning on the HPTE lock */ | |
1046 | unlock_rmap(rmapp); | |
1047 | while (hptep[0] & HPTE_V_HVLOCK) | |
1048 | cpu_relax(); | |
1049 | goto retry; | |
1050 | } | |
1051 | ||
1052 | /* Now check and modify the HPTE */ | |
1053 | if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_C)) { | |
1054 | /* need to make it temporarily absent to clear C */ | |
1055 | hptep[0] |= HPTE_V_ABSENT; | |
1056 | kvmppc_invalidate_hpte(kvm, hptep, i); | |
1057 | hptep[1] &= ~HPTE_R_C; | |
1058 | eieio(); | |
1059 | hptep[0] = (hptep[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID; | |
1060 | rev[i].guest_rpte |= HPTE_R_C; | |
1061 | ret = 1; | |
1062 | } | |
1063 | hptep[0] &= ~HPTE_V_HVLOCK; | |
1064 | } while ((i = j) != head); | |
1065 | ||
1066 | unlock_rmap(rmapp); | |
1067 | return ret; | |
1068 | } | |
1069 | ||
dfe49dbd PM |
1070 | long kvmppc_hv_get_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot, |
1071 | unsigned long *map) | |
82ed3616 PM |
1072 | { |
1073 | unsigned long i; | |
dfe49dbd | 1074 | unsigned long *rmapp; |
82ed3616 PM |
1075 | |
1076 | preempt_disable(); | |
d89cc617 | 1077 | rmapp = memslot->arch.rmap; |
82ed3616 | 1078 | for (i = 0; i < memslot->npages; ++i) { |
dfe49dbd | 1079 | if (kvm_test_clear_dirty(kvm, rmapp) && map) |
82ed3616 PM |
1080 | __set_bit_le(i, map); |
1081 | ++rmapp; | |
1082 | } | |
1083 | preempt_enable(); | |
1084 | return 0; | |
1085 | } | |
1086 | ||
93e60249 PM |
1087 | void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa, |
1088 | unsigned long *nb_ret) | |
1089 | { | |
1090 | struct kvm_memory_slot *memslot; | |
1091 | unsigned long gfn = gpa >> PAGE_SHIFT; | |
342d3db7 PM |
1092 | struct page *page, *pages[1]; |
1093 | int npages; | |
1094 | unsigned long hva, psize, offset; | |
da9d1d7f | 1095 | unsigned long pa; |
93e60249 | 1096 | unsigned long *physp; |
2c9097e4 | 1097 | int srcu_idx; |
93e60249 | 1098 | |
2c9097e4 | 1099 | srcu_idx = srcu_read_lock(&kvm->srcu); |
93e60249 PM |
1100 | memslot = gfn_to_memslot(kvm, gfn); |
1101 | if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) | |
2c9097e4 | 1102 | goto err; |
342d3db7 | 1103 | if (!kvm->arch.using_mmu_notifiers) { |
a66b48c3 | 1104 | physp = memslot->arch.slot_phys; |
342d3db7 | 1105 | if (!physp) |
2c9097e4 | 1106 | goto err; |
342d3db7 | 1107 | physp += gfn - memslot->base_gfn; |
c77162de | 1108 | pa = *physp; |
342d3db7 PM |
1109 | if (!pa) { |
1110 | if (kvmppc_get_guest_page(kvm, gfn, memslot, | |
1111 | PAGE_SIZE) < 0) | |
2c9097e4 | 1112 | goto err; |
342d3db7 PM |
1113 | pa = *physp; |
1114 | } | |
1115 | page = pfn_to_page(pa >> PAGE_SHIFT); | |
de6c0b02 | 1116 | get_page(page); |
342d3db7 PM |
1117 | } else { |
1118 | hva = gfn_to_hva_memslot(memslot, gfn); | |
1119 | npages = get_user_pages_fast(hva, 1, 1, pages); | |
1120 | if (npages < 1) | |
2c9097e4 | 1121 | goto err; |
342d3db7 | 1122 | page = pages[0]; |
c77162de | 1123 | } |
2c9097e4 PM |
1124 | srcu_read_unlock(&kvm->srcu, srcu_idx); |
1125 | ||
da9d1d7f PM |
1126 | psize = PAGE_SIZE; |
1127 | if (PageHuge(page)) { | |
1128 | page = compound_head(page); | |
1129 | psize <<= compound_order(page); | |
1130 | } | |
da9d1d7f | 1131 | offset = gpa & (psize - 1); |
93e60249 | 1132 | if (nb_ret) |
da9d1d7f | 1133 | *nb_ret = psize - offset; |
93e60249 | 1134 | return page_address(page) + offset; |
2c9097e4 PM |
1135 | |
1136 | err: | |
1137 | srcu_read_unlock(&kvm->srcu, srcu_idx); | |
1138 | return NULL; | |
93e60249 PM |
1139 | } |
1140 | ||
1141 | void kvmppc_unpin_guest_page(struct kvm *kvm, void *va) | |
1142 | { | |
1143 | struct page *page = virt_to_page(va); | |
1144 | ||
93e60249 PM |
1145 | put_page(page); |
1146 | } | |
1147 | ||
de56a948 PM |
1148 | void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu) |
1149 | { | |
1150 | struct kvmppc_mmu *mmu = &vcpu->arch.mmu; | |
1151 | ||
9e368f29 PM |
1152 | if (cpu_has_feature(CPU_FTR_ARCH_206)) |
1153 | vcpu->arch.slb_nr = 32; /* POWER7 */ | |
1154 | else | |
1155 | vcpu->arch.slb_nr = 64; | |
de56a948 PM |
1156 | |
1157 | mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate; | |
1158 | mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr; | |
1159 | ||
1160 | vcpu->arch.hflags |= BOOK3S_HFLAG_SLB; | |
1161 | } |