KVM: PPC: Book3S HV: Make HPT reading code notice R/C bit changes
[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu_hv.c
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
16 */
17
18#include <linux/types.h>
19#include <linux/string.h>
20#include <linux/kvm.h>
21#include <linux/kvm_host.h>
22#include <linux/highmem.h>
23#include <linux/gfp.h>
24#include <linux/slab.h>
25#include <linux/hugetlb.h>
8936dda4 26#include <linux/vmalloc.h>
2c9097e4 27#include <linux/srcu.h>
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28#include <linux/anon_inodes.h>
29#include <linux/file.h>
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30
31#include <asm/tlbflush.h>
32#include <asm/kvm_ppc.h>
33#include <asm/kvm_book3s.h>
34#include <asm/mmu-hash64.h>
35#include <asm/hvcall.h>
36#include <asm/synch.h>
37#include <asm/ppc-opcode.h>
38#include <asm/cputable.h>
39
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40/* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
41#define MAX_LPID_970 63
de56a948 42
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43/* Power architecture requires HPT is at least 256kB */
44#define PPC_MIN_HPT_ORDER 18
45
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46static long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
47 long pte_index, unsigned long pteh,
48 unsigned long ptel, unsigned long *pte_idx_ret);
a64fd707 49static void kvmppc_rmap_reset(struct kvm *kvm);
7ed661bf 50
32fad281 51long kvmppc_alloc_hpt(struct kvm *kvm, u32 *htab_orderp)
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52{
53 unsigned long hpt;
8936dda4 54 struct revmap_entry *rev;
d2a1b483 55 struct kvmppc_linear_info *li;
32fad281 56 long order = kvm_hpt_order;
de56a948 57
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58 if (htab_orderp) {
59 order = *htab_orderp;
60 if (order < PPC_MIN_HPT_ORDER)
61 order = PPC_MIN_HPT_ORDER;
62 }
63
64 /*
65 * If the user wants a different size from default,
66 * try first to allocate it from the kernel page allocator.
67 */
68 hpt = 0;
69 if (order != kvm_hpt_order) {
d2a1b483 70 hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|
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71 __GFP_NOWARN, order - PAGE_SHIFT);
72 if (!hpt)
73 --order;
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74 }
75
32fad281 76 /* Next try to allocate from the preallocated pool */
de56a948 77 if (!hpt) {
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78 li = kvm_alloc_hpt();
79 if (li) {
80 hpt = (ulong)li->base_virt;
81 kvm->arch.hpt_li = li;
82 order = kvm_hpt_order;
83 }
de56a948 84 }
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85
86 /* Lastly try successively smaller sizes from the page allocator */
87 while (!hpt && order > PPC_MIN_HPT_ORDER) {
88 hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|
89 __GFP_NOWARN, order - PAGE_SHIFT);
90 if (!hpt)
91 --order;
92 }
93
94 if (!hpt)
95 return -ENOMEM;
96
de56a948 97 kvm->arch.hpt_virt = hpt;
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98 kvm->arch.hpt_order = order;
99 /* HPTEs are 2**4 bytes long */
100 kvm->arch.hpt_npte = 1ul << (order - 4);
101 /* 128 (2**7) bytes in each HPTEG */
102 kvm->arch.hpt_mask = (1ul << (order - 7)) - 1;
de56a948 103
8936dda4 104 /* Allocate reverse map array */
32fad281 105 rev = vmalloc(sizeof(struct revmap_entry) * kvm->arch.hpt_npte);
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106 if (!rev) {
107 pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n");
108 goto out_freehpt;
109 }
110 kvm->arch.revmap = rev;
32fad281 111 kvm->arch.sdr1 = __pa(hpt) | (order - 18);
8936dda4 112
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113 pr_info("KVM guest htab at %lx (order %ld), LPID %x\n",
114 hpt, order, kvm->arch.lpid);
de56a948 115
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116 if (htab_orderp)
117 *htab_orderp = order;
de56a948 118 return 0;
8936dda4 119
8936dda4 120 out_freehpt:
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121 if (kvm->arch.hpt_li)
122 kvm_release_hpt(kvm->arch.hpt_li);
123 else
124 free_pages(hpt, order - PAGE_SHIFT);
8936dda4 125 return -ENOMEM;
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126}
127
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128long kvmppc_alloc_reset_hpt(struct kvm *kvm, u32 *htab_orderp)
129{
130 long err = -EBUSY;
131 long order;
132
133 mutex_lock(&kvm->lock);
134 if (kvm->arch.rma_setup_done) {
135 kvm->arch.rma_setup_done = 0;
136 /* order rma_setup_done vs. vcpus_running */
137 smp_mb();
138 if (atomic_read(&kvm->arch.vcpus_running)) {
139 kvm->arch.rma_setup_done = 1;
140 goto out;
141 }
142 }
143 if (kvm->arch.hpt_virt) {
144 order = kvm->arch.hpt_order;
145 /* Set the entire HPT to 0, i.e. invalid HPTEs */
146 memset((void *)kvm->arch.hpt_virt, 0, 1ul << order);
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147 /*
148 * Reset all the reverse-mapping chains for all memslots
149 */
150 kvmppc_rmap_reset(kvm);
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151 /* Ensure that each vcpu will flush its TLB on next entry. */
152 cpumask_setall(&kvm->arch.need_tlb_flush);
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153 *htab_orderp = order;
154 err = 0;
155 } else {
156 err = kvmppc_alloc_hpt(kvm, htab_orderp);
157 order = *htab_orderp;
158 }
159 out:
160 mutex_unlock(&kvm->lock);
161 return err;
162}
163
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164void kvmppc_free_hpt(struct kvm *kvm)
165{
043cc4d7 166 kvmppc_free_lpid(kvm->arch.lpid);
8936dda4 167 vfree(kvm->arch.revmap);
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168 if (kvm->arch.hpt_li)
169 kvm_release_hpt(kvm->arch.hpt_li);
170 else
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171 free_pages(kvm->arch.hpt_virt,
172 kvm->arch.hpt_order - PAGE_SHIFT);
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173}
174
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175/* Bits in first HPTE dword for pagesize 4k, 64k or 16M */
176static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize)
177{
178 return (pgsize > 0x1000) ? HPTE_V_LARGE : 0;
179}
180
181/* Bits in second HPTE dword for pagesize 4k, 64k or 16M */
182static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize)
183{
184 return (pgsize == 0x10000) ? 0x1000 : 0;
185}
186
187void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,
188 unsigned long porder)
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189{
190 unsigned long i;
b2b2f165 191 unsigned long npages;
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192 unsigned long hp_v, hp_r;
193 unsigned long addr, hash;
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194 unsigned long psize;
195 unsigned long hp0, hp1;
7ed661bf 196 unsigned long idx_ret;
c77162de 197 long ret;
32fad281 198 struct kvm *kvm = vcpu->kvm;
de56a948 199
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200 psize = 1ul << porder;
201 npages = memslot->npages >> (porder - PAGE_SHIFT);
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202
203 /* VRMA can't be > 1TB */
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204 if (npages > 1ul << (40 - porder))
205 npages = 1ul << (40 - porder);
de56a948 206 /* Can't use more than 1 HPTE per HPTEG */
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207 if (npages > kvm->arch.hpt_mask + 1)
208 npages = kvm->arch.hpt_mask + 1;
de56a948 209
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210 hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) |
211 HPTE_V_BOLTED | hpte0_pgsize_encoding(psize);
212 hp1 = hpte1_pgsize_encoding(psize) |
213 HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX;
214
de56a948 215 for (i = 0; i < npages; ++i) {
c77162de 216 addr = i << porder;
de56a948 217 /* can't use hpt_hash since va > 64 bits */
32fad281 218 hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & kvm->arch.hpt_mask;
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219 /*
220 * We assume that the hash table is empty and no
221 * vcpus are using it at this stage. Since we create
222 * at most one HPTE per HPTEG, we just assume entry 7
223 * is available and use it.
224 */
8936dda4 225 hash = (hash << 3) + 7;
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226 hp_v = hp0 | ((addr >> 16) & ~0x7fUL);
227 hp_r = hp1 | addr;
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228 ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, hash, hp_v, hp_r,
229 &idx_ret);
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230 if (ret != H_SUCCESS) {
231 pr_err("KVM: map_vrma at %lx failed, ret=%ld\n",
232 addr, ret);
233 break;
234 }
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235 }
236}
237
238int kvmppc_mmu_hv_init(void)
239{
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240 unsigned long host_lpid, rsvd_lpid;
241
242 if (!cpu_has_feature(CPU_FTR_HVMODE))
de56a948 243 return -EINVAL;
9e368f29 244
043cc4d7 245 /* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */
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246 if (cpu_has_feature(CPU_FTR_ARCH_206)) {
247 host_lpid = mfspr(SPRN_LPID); /* POWER7 */
248 rsvd_lpid = LPID_RSVD;
249 } else {
250 host_lpid = 0; /* PPC970 */
251 rsvd_lpid = MAX_LPID_970;
252 }
253
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254 kvmppc_init_lpid(rsvd_lpid + 1);
255
256 kvmppc_claim_lpid(host_lpid);
9e368f29 257 /* rsvd_lpid is reserved for use in partition switching */
043cc4d7 258 kvmppc_claim_lpid(rsvd_lpid);
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259
260 return 0;
261}
262
263void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
264{
265}
266
267static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
268{
269 kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
270}
271
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272/*
273 * This is called to get a reference to a guest page if there isn't
a66b48c3 274 * one already in the memslot->arch.slot_phys[] array.
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275 */
276static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
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277 struct kvm_memory_slot *memslot,
278 unsigned long psize)
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279{
280 unsigned long start;
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281 long np, err;
282 struct page *page, *hpage, *pages[1];
283 unsigned long s, pgsize;
c77162de 284 unsigned long *physp;
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285 unsigned int is_io, got, pgorder;
286 struct vm_area_struct *vma;
da9d1d7f 287 unsigned long pfn, i, npages;
c77162de 288
a66b48c3 289 physp = memslot->arch.slot_phys;
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290 if (!physp)
291 return -EINVAL;
da9d1d7f 292 if (physp[gfn - memslot->base_gfn])
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293 return 0;
294
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295 is_io = 0;
296 got = 0;
c77162de 297 page = NULL;
da9d1d7f 298 pgsize = psize;
9d0ef5ea 299 err = -EINVAL;
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300 start = gfn_to_hva_memslot(memslot, gfn);
301
302 /* Instantiate and get the page we want access to */
303 np = get_user_pages_fast(start, 1, 1, pages);
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304 if (np != 1) {
305 /* Look up the vma for the page */
306 down_read(&current->mm->mmap_sem);
307 vma = find_vma(current->mm, start);
308 if (!vma || vma->vm_start > start ||
309 start + psize > vma->vm_end ||
310 !(vma->vm_flags & VM_PFNMAP))
311 goto up_err;
312 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
313 pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
314 /* check alignment of pfn vs. requested page size */
315 if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1)))
316 goto up_err;
317 up_read(&current->mm->mmap_sem);
318
319 } else {
320 page = pages[0];
321 got = KVMPPC_GOT_PAGE;
322
323 /* See if this is a large page */
324 s = PAGE_SIZE;
325 if (PageHuge(page)) {
326 hpage = compound_head(page);
327 s <<= compound_order(hpage);
328 /* Get the whole large page if slot alignment is ok */
329 if (s > psize && slot_is_aligned(memslot, s) &&
330 !(memslot->userspace_addr & (s - 1))) {
331 start &= ~(s - 1);
332 pgsize = s;
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333 get_page(hpage);
334 put_page(page);
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335 page = hpage;
336 }
da9d1d7f 337 }
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338 if (s < psize)
339 goto out;
340 pfn = page_to_pfn(page);
c77162de 341 }
c77162de 342
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343 npages = pgsize >> PAGE_SHIFT;
344 pgorder = __ilog2(npages);
345 physp += (gfn - memslot->base_gfn) & ~(npages - 1);
c77162de 346 spin_lock(&kvm->arch.slot_phys_lock);
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347 for (i = 0; i < npages; ++i) {
348 if (!physp[i]) {
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349 physp[i] = ((pfn + i) << PAGE_SHIFT) +
350 got + is_io + pgorder;
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351 got = 0;
352 }
353 }
c77162de 354 spin_unlock(&kvm->arch.slot_phys_lock);
da9d1d7f 355 err = 0;
c77162de 356
da9d1d7f 357 out:
de6c0b02 358 if (got)
da9d1d7f 359 put_page(page);
da9d1d7f 360 return err;
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361
362 up_err:
363 up_read(&current->mm->mmap_sem);
364 return err;
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365}
366
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367long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
368 long pte_index, unsigned long pteh,
369 unsigned long ptel, unsigned long *pte_idx_ret)
c77162de 370{
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371 unsigned long psize, gpa, gfn;
372 struct kvm_memory_slot *memslot;
373 long ret;
374
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375 if (kvm->arch.using_mmu_notifiers)
376 goto do_insert;
377
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378 psize = hpte_page_size(pteh, ptel);
379 if (!psize)
380 return H_PARAMETER;
381
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382 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
383
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384 /* Find the memslot (if any) for this address */
385 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
386 gfn = gpa >> PAGE_SHIFT;
387 memslot = gfn_to_memslot(kvm, gfn);
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388 if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) {
389 if (!slot_is_aligned(memslot, psize))
390 return H_PARAMETER;
391 if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0)
392 return H_PARAMETER;
393 }
c77162de 394
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395 do_insert:
396 /* Protect linux PTE lookup from page table destruction */
397 rcu_read_lock_sched(); /* this disables preemption too */
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398 ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel,
399 current->mm->pgd, false, pte_idx_ret);
342d3db7 400 rcu_read_unlock_sched();
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401 if (ret == H_TOO_HARD) {
402 /* this can't happen */
403 pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n");
404 ret = H_RESOURCE; /* or something */
405 }
406 return ret;
407
408}
409
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410/*
411 * We come here on a H_ENTER call from the guest when we are not
412 * using mmu notifiers and we don't have the requested page pinned
413 * already.
414 */
415long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
416 long pte_index, unsigned long pteh,
417 unsigned long ptel)
418{
419 return kvmppc_virtmode_do_h_enter(vcpu->kvm, flags, pte_index,
420 pteh, ptel, &vcpu->arch.gpr[4]);
421}
422
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423static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu,
424 gva_t eaddr)
425{
426 u64 mask;
427 int i;
428
429 for (i = 0; i < vcpu->arch.slb_nr; i++) {
430 if (!(vcpu->arch.slb[i].orige & SLB_ESID_V))
431 continue;
432
433 if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T)
434 mask = ESID_MASK_1T;
435 else
436 mask = ESID_MASK;
437
438 if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0)
439 return &vcpu->arch.slb[i];
440 }
441 return NULL;
442}
443
444static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r,
445 unsigned long ea)
446{
447 unsigned long ra_mask;
448
449 ra_mask = hpte_page_size(v, r) - 1;
450 return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask);
451}
452
de56a948 453static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
697d3899 454 struct kvmppc_pte *gpte, bool data)
de56a948 455{
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456 struct kvm *kvm = vcpu->kvm;
457 struct kvmppc_slb *slbe;
458 unsigned long slb_v;
459 unsigned long pp, key;
460 unsigned long v, gr;
461 unsigned long *hptep;
462 int index;
463 int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);
464
465 /* Get SLB entry */
466 if (virtmode) {
467 slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr);
468 if (!slbe)
469 return -EINVAL;
470 slb_v = slbe->origv;
471 } else {
472 /* real mode access */
473 slb_v = vcpu->kvm->arch.vrma_slb_v;
474 }
475
476 /* Find the HPTE in the hash table */
477 index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v,
478 HPTE_V_VALID | HPTE_V_ABSENT);
479 if (index < 0)
480 return -ENOENT;
481 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
482 v = hptep[0] & ~HPTE_V_HVLOCK;
483 gr = kvm->arch.revmap[index].guest_rpte;
484
485 /* Unlock the HPTE */
486 asm volatile("lwsync" : : : "memory");
487 hptep[0] = v;
488
489 gpte->eaddr = eaddr;
490 gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff);
491
492 /* Get PP bits and key for permission check */
493 pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
494 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
495 key &= slb_v;
496
497 /* Calculate permissions */
498 gpte->may_read = hpte_read_permission(pp, key);
499 gpte->may_write = hpte_write_permission(pp, key);
500 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G));
501
502 /* Storage key permission check for POWER7 */
503 if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) {
504 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr);
505 if (amrfield & 1)
506 gpte->may_read = 0;
507 if (amrfield & 2)
508 gpte->may_write = 0;
509 }
510
511 /* Get the guest physical address */
512 gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr);
513 return 0;
514}
515
516/*
517 * Quick test for whether an instruction is a load or a store.
518 * If the instruction is a load or a store, then this will indicate
519 * which it is, at least on server processors. (Embedded processors
520 * have some external PID instructions that don't follow the rule
521 * embodied here.) If the instruction isn't a load or store, then
522 * this doesn't return anything useful.
523 */
524static int instruction_is_store(unsigned int instr)
525{
526 unsigned int mask;
527
528 mask = 0x10000000;
529 if ((instr & 0xfc000000) == 0x7c000000)
530 mask = 0x100; /* major opcode 31 */
531 return (instr & mask) != 0;
532}
533
534static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,
6020c0f6 535 unsigned long gpa, gva_t ea, int is_store)
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536{
537 int ret;
538 u32 last_inst;
539 unsigned long srr0 = kvmppc_get_pc(vcpu);
540
541 /* We try to load the last instruction. We don't let
542 * emulate_instruction do it as it doesn't check what
543 * kvmppc_ld returns.
544 * If we fail, we just return to the guest and try executing it again.
545 */
546 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) {
547 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
548 if (ret != EMULATE_DONE || last_inst == KVM_INST_FETCH_FAILED)
549 return RESUME_GUEST;
550 vcpu->arch.last_inst = last_inst;
551 }
552
553 /*
554 * WARNING: We do not know for sure whether the instruction we just
555 * read from memory is the same that caused the fault in the first
556 * place. If the instruction we read is neither an load or a store,
557 * then it can't access memory, so we don't need to worry about
558 * enforcing access permissions. So, assuming it is a load or
559 * store, we just check that its direction (load or store) is
560 * consistent with the original fault, since that's what we
561 * checked the access permissions against. If there is a mismatch
562 * we just return and retry the instruction.
563 */
564
565 if (instruction_is_store(vcpu->arch.last_inst) != !!is_store)
566 return RESUME_GUEST;
567
568 /*
569 * Emulated accesses are emulated by looking at the hash for
570 * translation once, then performing the access later. The
571 * translation could be invalidated in the meantime in which
572 * point performing the subsequent memory access on the old
573 * physical address could possibly be a security hole for the
574 * guest (but not the host).
575 *
576 * This is less of an issue for MMIO stores since they aren't
577 * globally visible. It could be an issue for MMIO loads to
578 * a certain extent but we'll ignore it for now.
579 */
580
581 vcpu->arch.paddr_accessed = gpa;
6020c0f6 582 vcpu->arch.vaddr_accessed = ea;
697d3899
PM
583 return kvmppc_emulate_mmio(run, vcpu);
584}
585
586int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
587 unsigned long ea, unsigned long dsisr)
588{
589 struct kvm *kvm = vcpu->kvm;
342d3db7
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590 unsigned long *hptep, hpte[3], r;
591 unsigned long mmu_seq, psize, pte_size;
70bddfef 592 unsigned long gpa, gfn, hva, pfn;
697d3899 593 struct kvm_memory_slot *memslot;
342d3db7 594 unsigned long *rmap;
697d3899 595 struct revmap_entry *rev;
342d3db7
PM
596 struct page *page, *pages[1];
597 long index, ret, npages;
598 unsigned long is_io;
4cf302bc 599 unsigned int writing, write_ok;
342d3db7 600 struct vm_area_struct *vma;
bad3b507 601 unsigned long rcbits;
697d3899
PM
602
603 /*
604 * Real-mode code has already searched the HPT and found the
605 * entry we're interested in. Lock the entry and check that
606 * it hasn't changed. If it has, just return and re-execute the
607 * instruction.
608 */
609 if (ea != vcpu->arch.pgfault_addr)
610 return RESUME_GUEST;
611 index = vcpu->arch.pgfault_index;
612 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
613 rev = &kvm->arch.revmap[index];
614 preempt_disable();
615 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
616 cpu_relax();
617 hpte[0] = hptep[0] & ~HPTE_V_HVLOCK;
618 hpte[1] = hptep[1];
342d3db7 619 hpte[2] = r = rev->guest_rpte;
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PM
620 asm volatile("lwsync" : : : "memory");
621 hptep[0] = hpte[0];
622 preempt_enable();
623
624 if (hpte[0] != vcpu->arch.pgfault_hpte[0] ||
625 hpte[1] != vcpu->arch.pgfault_hpte[1])
626 return RESUME_GUEST;
627
628 /* Translate the logical address and get the page */
342d3db7 629 psize = hpte_page_size(hpte[0], r);
70bddfef
PM
630 gpa = (r & HPTE_R_RPN & ~(psize - 1)) | (ea & (psize - 1));
631 gfn = gpa >> PAGE_SHIFT;
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PM
632 memslot = gfn_to_memslot(kvm, gfn);
633
634 /* No memslot means it's an emulated MMIO region */
70bddfef 635 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
6020c0f6 636 return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,
697d3899 637 dsisr & DSISR_ISSTORE);
697d3899 638
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PM
639 if (!kvm->arch.using_mmu_notifiers)
640 return -EFAULT; /* should never get here */
641
642 /* used to check for invalidations in progress */
643 mmu_seq = kvm->mmu_notifier_seq;
644 smp_rmb();
645
646 is_io = 0;
647 pfn = 0;
648 page = NULL;
649 pte_size = PAGE_SIZE;
4cf302bc
PM
650 writing = (dsisr & DSISR_ISSTORE) != 0;
651 /* If writing != 0, then the HPTE must allow writing, if we get here */
652 write_ok = writing;
342d3db7 653 hva = gfn_to_hva_memslot(memslot, gfn);
4cf302bc 654 npages = get_user_pages_fast(hva, 1, writing, pages);
342d3db7
PM
655 if (npages < 1) {
656 /* Check if it's an I/O mapping */
657 down_read(&current->mm->mmap_sem);
658 vma = find_vma(current->mm, hva);
659 if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
660 (vma->vm_flags & VM_PFNMAP)) {
661 pfn = vma->vm_pgoff +
662 ((hva - vma->vm_start) >> PAGE_SHIFT);
663 pte_size = psize;
664 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
4cf302bc 665 write_ok = vma->vm_flags & VM_WRITE;
342d3db7
PM
666 }
667 up_read(&current->mm->mmap_sem);
668 if (!pfn)
669 return -EFAULT;
670 } else {
671 page = pages[0];
672 if (PageHuge(page)) {
673 page = compound_head(page);
674 pte_size <<= compound_order(page);
675 }
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PM
676 /* if the guest wants write access, see if that is OK */
677 if (!writing && hpte_is_writable(r)) {
678 pte_t *ptep, pte;
679
680 /*
681 * We need to protect against page table destruction
682 * while looking up and updating the pte.
683 */
684 rcu_read_lock_sched();
685 ptep = find_linux_pte_or_hugepte(current->mm->pgd,
686 hva, NULL);
687 if (ptep && pte_present(*ptep)) {
688 pte = kvmppc_read_update_linux_pte(ptep, 1);
689 if (pte_write(pte))
690 write_ok = 1;
691 }
692 rcu_read_unlock_sched();
693 }
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694 pfn = page_to_pfn(page);
695 }
696
697 ret = -EFAULT;
698 if (psize > pte_size)
699 goto out_put;
700
701 /* Check WIMG vs. the actual page we're accessing */
702 if (!hpte_cache_flags_ok(r, is_io)) {
703 if (is_io)
704 return -EFAULT;
705 /*
706 * Allow guest to map emulated device memory as
707 * uncacheable, but actually make it cacheable.
708 */
709 r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M;
710 }
711
712 /* Set the HPTE to point to pfn */
713 r = (r & ~(HPTE_R_PP0 - pte_size)) | (pfn << PAGE_SHIFT);
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PM
714 if (hpte_is_writable(r) && !write_ok)
715 r = hpte_make_readonly(r);
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716 ret = RESUME_GUEST;
717 preempt_disable();
718 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
719 cpu_relax();
720 if ((hptep[0] & ~HPTE_V_HVLOCK) != hpte[0] || hptep[1] != hpte[1] ||
721 rev->guest_rpte != hpte[2])
722 /* HPTE has been changed under us; let the guest retry */
723 goto out_unlock;
724 hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
725
d89cc617 726 rmap = &memslot->arch.rmap[gfn - memslot->base_gfn];
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727 lock_rmap(rmap);
728
729 /* Check if we might have been invalidated; let the guest retry if so */
730 ret = RESUME_GUEST;
8ca40a70 731 if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) {
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732 unlock_rmap(rmap);
733 goto out_unlock;
734 }
4cf302bc 735
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736 /* Only set R/C in real HPTE if set in both *rmap and guest_rpte */
737 rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT;
738 r &= rcbits | ~(HPTE_R_R | HPTE_R_C);
739
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PM
740 if (hptep[0] & HPTE_V_VALID) {
741 /* HPTE was previously valid, so we need to invalidate it */
742 unlock_rmap(rmap);
743 hptep[0] |= HPTE_V_ABSENT;
744 kvmppc_invalidate_hpte(kvm, hptep, index);
bad3b507
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745 /* don't lose previous R and C bits */
746 r |= hptep[1] & (HPTE_R_R | HPTE_R_C);
4cf302bc
PM
747 } else {
748 kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0);
749 }
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750
751 hptep[1] = r;
752 eieio();
753 hptep[0] = hpte[0];
754 asm volatile("ptesync" : : : "memory");
755 preempt_enable();
4cf302bc 756 if (page && hpte_is_writable(r))
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757 SetPageDirty(page);
758
759 out_put:
de6c0b02
DG
760 if (page) {
761 /*
762 * We drop pages[0] here, not page because page might
763 * have been set to the head page of a compound, but
764 * we have to drop the reference on the correct tail
765 * page to match the get inside gup()
766 */
767 put_page(pages[0]);
768 }
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769 return ret;
770
771 out_unlock:
772 hptep[0] &= ~HPTE_V_HVLOCK;
773 preempt_enable();
774 goto out_put;
775}
776
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777static void kvmppc_rmap_reset(struct kvm *kvm)
778{
779 struct kvm_memslots *slots;
780 struct kvm_memory_slot *memslot;
781 int srcu_idx;
782
783 srcu_idx = srcu_read_lock(&kvm->srcu);
784 slots = kvm->memslots;
785 kvm_for_each_memslot(memslot, slots) {
786 /*
787 * This assumes it is acceptable to lose reference and
788 * change bits across a reset.
789 */
790 memset(memslot->arch.rmap, 0,
791 memslot->npages * sizeof(*memslot->arch.rmap));
792 }
793 srcu_read_unlock(&kvm->srcu, srcu_idx);
794}
795
84504ef3
TY
796static int kvm_handle_hva_range(struct kvm *kvm,
797 unsigned long start,
798 unsigned long end,
799 int (*handler)(struct kvm *kvm,
800 unsigned long *rmapp,
801 unsigned long gfn))
342d3db7
PM
802{
803 int ret;
804 int retval = 0;
805 struct kvm_memslots *slots;
806 struct kvm_memory_slot *memslot;
807
808 slots = kvm_memslots(kvm);
809 kvm_for_each_memslot(memslot, slots) {
84504ef3
TY
810 unsigned long hva_start, hva_end;
811 gfn_t gfn, gfn_end;
812
813 hva_start = max(start, memslot->userspace_addr);
814 hva_end = min(end, memslot->userspace_addr +
815 (memslot->npages << PAGE_SHIFT));
816 if (hva_start >= hva_end)
817 continue;
818 /*
819 * {gfn(page) | page intersects with [hva_start, hva_end)} =
820 * {gfn, gfn+1, ..., gfn_end-1}.
821 */
822 gfn = hva_to_gfn_memslot(hva_start, memslot);
823 gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
342d3db7 824
84504ef3 825 for (; gfn < gfn_end; ++gfn) {
d19a748b 826 gfn_t gfn_offset = gfn - memslot->base_gfn;
342d3db7 827
d89cc617 828 ret = handler(kvm, &memslot->arch.rmap[gfn_offset], gfn);
342d3db7
PM
829 retval |= ret;
830 }
831 }
832
833 return retval;
834}
835
84504ef3
TY
836static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
837 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
838 unsigned long gfn))
839{
840 return kvm_handle_hva_range(kvm, hva, hva + 1, handler);
841}
842
342d3db7
PM
843static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
844 unsigned long gfn)
845{
846 struct revmap_entry *rev = kvm->arch.revmap;
847 unsigned long h, i, j;
848 unsigned long *hptep;
bad3b507 849 unsigned long ptel, psize, rcbits;
342d3db7
PM
850
851 for (;;) {
bad3b507 852 lock_rmap(rmapp);
342d3db7 853 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
bad3b507 854 unlock_rmap(rmapp);
342d3db7
PM
855 break;
856 }
857
858 /*
859 * To avoid an ABBA deadlock with the HPTE lock bit,
bad3b507
PM
860 * we can't spin on the HPTE lock while holding the
861 * rmap chain lock.
342d3db7
PM
862 */
863 i = *rmapp & KVMPPC_RMAP_INDEX;
bad3b507
PM
864 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
865 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
866 /* unlock rmap before spinning on the HPTE lock */
867 unlock_rmap(rmapp);
868 while (hptep[0] & HPTE_V_HVLOCK)
869 cpu_relax();
870 continue;
871 }
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872 j = rev[i].forw;
873 if (j == i) {
874 /* chain is now empty */
bad3b507 875 *rmapp &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
342d3db7
PM
876 } else {
877 /* remove i from chain */
878 h = rev[i].back;
879 rev[h].forw = j;
880 rev[j].back = h;
881 rev[i].forw = rev[i].back = i;
bad3b507 882 *rmapp = (*rmapp & ~KVMPPC_RMAP_INDEX) | j;
342d3db7 883 }
342d3db7 884
bad3b507 885 /* Now check and modify the HPTE */
342d3db7
PM
886 ptel = rev[i].guest_rpte;
887 psize = hpte_page_size(hptep[0], ptel);
888 if ((hptep[0] & HPTE_V_VALID) &&
889 hpte_rpn(ptel, psize) == gfn) {
dfe49dbd
PM
890 if (kvm->arch.using_mmu_notifiers)
891 hptep[0] |= HPTE_V_ABSENT;
bad3b507
PM
892 kvmppc_invalidate_hpte(kvm, hptep, i);
893 /* Harvest R and C */
894 rcbits = hptep[1] & (HPTE_R_R | HPTE_R_C);
895 *rmapp |= rcbits << KVMPPC_RMAP_RC_SHIFT;
a1b4a0f6
PM
896 if (rcbits & ~rev[i].guest_rpte) {
897 rev[i].guest_rpte = ptel | rcbits;
898 note_hpte_modification(kvm, &rev[i]);
899 }
342d3db7 900 }
bad3b507 901 unlock_rmap(rmapp);
342d3db7
PM
902 hptep[0] &= ~HPTE_V_HVLOCK;
903 }
904 return 0;
905}
906
907int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
908{
909 if (kvm->arch.using_mmu_notifiers)
910 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
911 return 0;
912}
913
b3ae2096
TY
914int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
915{
916 if (kvm->arch.using_mmu_notifiers)
917 kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp);
918 return 0;
919}
920
dfe49dbd
PM
921void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
922{
923 unsigned long *rmapp;
924 unsigned long gfn;
925 unsigned long n;
926
927 rmapp = memslot->arch.rmap;
928 gfn = memslot->base_gfn;
929 for (n = memslot->npages; n; --n) {
930 /*
931 * Testing the present bit without locking is OK because
932 * the memslot has been marked invalid already, and hence
933 * no new HPTEs referencing this page can be created,
934 * thus the present bit can't go from 0 to 1.
935 */
936 if (*rmapp & KVMPPC_RMAP_PRESENT)
937 kvm_unmap_rmapp(kvm, rmapp, gfn);
938 ++rmapp;
939 ++gfn;
940 }
941}
942
342d3db7
PM
943static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
944 unsigned long gfn)
945{
55514893
PM
946 struct revmap_entry *rev = kvm->arch.revmap;
947 unsigned long head, i, j;
948 unsigned long *hptep;
949 int ret = 0;
950
951 retry:
952 lock_rmap(rmapp);
953 if (*rmapp & KVMPPC_RMAP_REFERENCED) {
954 *rmapp &= ~KVMPPC_RMAP_REFERENCED;
955 ret = 1;
956 }
957 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
958 unlock_rmap(rmapp);
959 return ret;
960 }
961
962 i = head = *rmapp & KVMPPC_RMAP_INDEX;
963 do {
964 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
965 j = rev[i].forw;
966
967 /* If this HPTE isn't referenced, ignore it */
968 if (!(hptep[1] & HPTE_R_R))
969 continue;
970
971 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
972 /* unlock rmap before spinning on the HPTE lock */
973 unlock_rmap(rmapp);
974 while (hptep[0] & HPTE_V_HVLOCK)
975 cpu_relax();
976 goto retry;
977 }
978
979 /* Now check and modify the HPTE */
980 if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_R)) {
981 kvmppc_clear_ref_hpte(kvm, hptep, i);
a1b4a0f6
PM
982 if (!(rev[i].guest_rpte & HPTE_R_R)) {
983 rev[i].guest_rpte |= HPTE_R_R;
984 note_hpte_modification(kvm, &rev[i]);
985 }
55514893
PM
986 ret = 1;
987 }
988 hptep[0] &= ~HPTE_V_HVLOCK;
989 } while ((i = j) != head);
990
991 unlock_rmap(rmapp);
992 return ret;
342d3db7
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993}
994
995int kvm_age_hva(struct kvm *kvm, unsigned long hva)
996{
997 if (!kvm->arch.using_mmu_notifiers)
998 return 0;
999 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
1000}
1001
1002static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1003 unsigned long gfn)
1004{
55514893
PM
1005 struct revmap_entry *rev = kvm->arch.revmap;
1006 unsigned long head, i, j;
1007 unsigned long *hp;
1008 int ret = 1;
1009
1010 if (*rmapp & KVMPPC_RMAP_REFERENCED)
1011 return 1;
1012
1013 lock_rmap(rmapp);
1014 if (*rmapp & KVMPPC_RMAP_REFERENCED)
1015 goto out;
1016
1017 if (*rmapp & KVMPPC_RMAP_PRESENT) {
1018 i = head = *rmapp & KVMPPC_RMAP_INDEX;
1019 do {
1020 hp = (unsigned long *)(kvm->arch.hpt_virt + (i << 4));
1021 j = rev[i].forw;
1022 if (hp[1] & HPTE_R_R)
1023 goto out;
1024 } while ((i = j) != head);
1025 }
1026 ret = 0;
1027
1028 out:
1029 unlock_rmap(rmapp);
1030 return ret;
342d3db7
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1031}
1032
1033int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1034{
1035 if (!kvm->arch.using_mmu_notifiers)
1036 return 0;
1037 return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp);
1038}
1039
1040void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1041{
1042 if (!kvm->arch.using_mmu_notifiers)
1043 return;
1044 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
de56a948
PM
1045}
1046
82ed3616
PM
1047static int kvm_test_clear_dirty(struct kvm *kvm, unsigned long *rmapp)
1048{
1049 struct revmap_entry *rev = kvm->arch.revmap;
1050 unsigned long head, i, j;
1051 unsigned long *hptep;
1052 int ret = 0;
1053
1054 retry:
1055 lock_rmap(rmapp);
1056 if (*rmapp & KVMPPC_RMAP_CHANGED) {
1057 *rmapp &= ~KVMPPC_RMAP_CHANGED;
1058 ret = 1;
1059 }
1060 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
1061 unlock_rmap(rmapp);
1062 return ret;
1063 }
1064
1065 i = head = *rmapp & KVMPPC_RMAP_INDEX;
1066 do {
1067 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
1068 j = rev[i].forw;
1069
1070 if (!(hptep[1] & HPTE_R_C))
1071 continue;
1072
1073 if (!try_lock_hpte(hptep, HPTE_V_HVLOCK)) {
1074 /* unlock rmap before spinning on the HPTE lock */
1075 unlock_rmap(rmapp);
1076 while (hptep[0] & HPTE_V_HVLOCK)
1077 cpu_relax();
1078 goto retry;
1079 }
1080
1081 /* Now check and modify the HPTE */
1082 if ((hptep[0] & HPTE_V_VALID) && (hptep[1] & HPTE_R_C)) {
1083 /* need to make it temporarily absent to clear C */
1084 hptep[0] |= HPTE_V_ABSENT;
1085 kvmppc_invalidate_hpte(kvm, hptep, i);
1086 hptep[1] &= ~HPTE_R_C;
1087 eieio();
1088 hptep[0] = (hptep[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
a1b4a0f6
PM
1089 if (!(rev[i].guest_rpte & HPTE_R_C)) {
1090 rev[i].guest_rpte |= HPTE_R_C;
1091 note_hpte_modification(kvm, &rev[i]);
1092 }
82ed3616
PM
1093 ret = 1;
1094 }
1095 hptep[0] &= ~HPTE_V_HVLOCK;
1096 } while ((i = j) != head);
1097
1098 unlock_rmap(rmapp);
1099 return ret;
1100}
1101
dfe49dbd
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1102long kvmppc_hv_get_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot,
1103 unsigned long *map)
82ed3616
PM
1104{
1105 unsigned long i;
dfe49dbd 1106 unsigned long *rmapp;
82ed3616
PM
1107
1108 preempt_disable();
d89cc617 1109 rmapp = memslot->arch.rmap;
82ed3616 1110 for (i = 0; i < memslot->npages; ++i) {
dfe49dbd 1111 if (kvm_test_clear_dirty(kvm, rmapp) && map)
82ed3616
PM
1112 __set_bit_le(i, map);
1113 ++rmapp;
1114 }
1115 preempt_enable();
1116 return 0;
1117}
1118
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1119void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
1120 unsigned long *nb_ret)
1121{
1122 struct kvm_memory_slot *memslot;
1123 unsigned long gfn = gpa >> PAGE_SHIFT;
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1124 struct page *page, *pages[1];
1125 int npages;
1126 unsigned long hva, psize, offset;
da9d1d7f 1127 unsigned long pa;
93e60249 1128 unsigned long *physp;
2c9097e4 1129 int srcu_idx;
93e60249 1130
2c9097e4 1131 srcu_idx = srcu_read_lock(&kvm->srcu);
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1132 memslot = gfn_to_memslot(kvm, gfn);
1133 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
2c9097e4 1134 goto err;
342d3db7 1135 if (!kvm->arch.using_mmu_notifiers) {
a66b48c3 1136 physp = memslot->arch.slot_phys;
342d3db7 1137 if (!physp)
2c9097e4 1138 goto err;
342d3db7 1139 physp += gfn - memslot->base_gfn;
c77162de 1140 pa = *physp;
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1141 if (!pa) {
1142 if (kvmppc_get_guest_page(kvm, gfn, memslot,
1143 PAGE_SIZE) < 0)
2c9097e4 1144 goto err;
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1145 pa = *physp;
1146 }
1147 page = pfn_to_page(pa >> PAGE_SHIFT);
de6c0b02 1148 get_page(page);
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1149 } else {
1150 hva = gfn_to_hva_memslot(memslot, gfn);
1151 npages = get_user_pages_fast(hva, 1, 1, pages);
1152 if (npages < 1)
2c9097e4 1153 goto err;
342d3db7 1154 page = pages[0];
c77162de 1155 }
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1156 srcu_read_unlock(&kvm->srcu, srcu_idx);
1157
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1158 psize = PAGE_SIZE;
1159 if (PageHuge(page)) {
1160 page = compound_head(page);
1161 psize <<= compound_order(page);
1162 }
da9d1d7f 1163 offset = gpa & (psize - 1);
93e60249 1164 if (nb_ret)
da9d1d7f 1165 *nb_ret = psize - offset;
93e60249 1166 return page_address(page) + offset;
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1167
1168 err:
1169 srcu_read_unlock(&kvm->srcu, srcu_idx);
1170 return NULL;
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1171}
1172
1173void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)
1174{
1175 struct page *page = virt_to_page(va);
1176
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1177 put_page(page);
1178}
1179
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1180/*
1181 * Functions for reading and writing the hash table via reads and
1182 * writes on a file descriptor.
1183 *
1184 * Reads return the guest view of the hash table, which has to be
1185 * pieced together from the real hash table and the guest_rpte
1186 * values in the revmap array.
1187 *
1188 * On writes, each HPTE written is considered in turn, and if it
1189 * is valid, it is written to the HPT as if an H_ENTER with the
1190 * exact flag set was done. When the invalid count is non-zero
1191 * in the header written to the stream, the kernel will make
1192 * sure that that many HPTEs are invalid, and invalidate them
1193 * if not.
1194 */
1195
1196struct kvm_htab_ctx {
1197 unsigned long index;
1198 unsigned long flags;
1199 struct kvm *kvm;
1200 int first_pass;
1201};
1202
1203#define HPTE_SIZE (2 * sizeof(unsigned long))
1204
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1205/*
1206 * Returns 1 if this HPT entry has been modified or has pending
1207 * R/C bit changes.
1208 */
1209static int hpte_dirty(struct revmap_entry *revp, unsigned long *hptp)
1210{
1211 unsigned long rcbits_unset;
1212
1213 if (revp->guest_rpte & HPTE_GR_MODIFIED)
1214 return 1;
1215
1216 /* Also need to consider changes in reference and changed bits */
1217 rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C);
1218 if ((hptp[0] & HPTE_V_VALID) && (hptp[1] & rcbits_unset))
1219 return 1;
1220
1221 return 0;
1222}
1223
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1224static long record_hpte(unsigned long flags, unsigned long *hptp,
1225 unsigned long *hpte, struct revmap_entry *revp,
1226 int want_valid, int first_pass)
1227{
1228 unsigned long v, r;
a1b4a0f6 1229 unsigned long rcbits_unset;
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1230 int ok = 1;
1231 int valid, dirty;
1232
1233 /* Unmodified entries are uninteresting except on the first pass */
a1b4a0f6 1234 dirty = hpte_dirty(revp, hptp);
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1235 if (!first_pass && !dirty)
1236 return 0;
1237
1238 valid = 0;
1239 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT)) {
1240 valid = 1;
1241 if ((flags & KVM_GET_HTAB_BOLTED_ONLY) &&
1242 !(hptp[0] & HPTE_V_BOLTED))
1243 valid = 0;
1244 }
1245 if (valid != want_valid)
1246 return 0;
1247
1248 v = r = 0;
1249 if (valid || dirty) {
1250 /* lock the HPTE so it's stable and read it */
1251 preempt_disable();
1252 while (!try_lock_hpte(hptp, HPTE_V_HVLOCK))
1253 cpu_relax();
1254 v = hptp[0];
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1255
1256 /* re-evaluate valid and dirty from synchronized HPTE value */
1257 valid = !!(v & HPTE_V_VALID);
1258 dirty = !!(revp->guest_rpte & HPTE_GR_MODIFIED);
1259
1260 /* Harvest R and C into guest view if necessary */
1261 rcbits_unset = ~revp->guest_rpte & (HPTE_R_R | HPTE_R_C);
1262 if (valid && (rcbits_unset & hptp[1])) {
1263 revp->guest_rpte |= (hptp[1] & (HPTE_R_R | HPTE_R_C)) |
1264 HPTE_GR_MODIFIED;
1265 dirty = 1;
1266 }
1267
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1268 if (v & HPTE_V_ABSENT) {
1269 v &= ~HPTE_V_ABSENT;
1270 v |= HPTE_V_VALID;
a1b4a0f6 1271 valid = 1;
a2932923 1272 }
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1273 if ((flags & KVM_GET_HTAB_BOLTED_ONLY) && !(v & HPTE_V_BOLTED))
1274 valid = 0;
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1275
1276 r = revp->guest_rpte;
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1277 /* only clear modified if this is the right sort of entry */
1278 if (valid == want_valid && dirty) {
1279 r &= ~HPTE_GR_MODIFIED;
1280 revp->guest_rpte = r;
1281 }
1282 asm volatile(PPC_RELEASE_BARRIER "" : : : "memory");
1283 hptp[0] &= ~HPTE_V_HVLOCK;
1284 preempt_enable();
1285 if (!(valid == want_valid && (first_pass || dirty)))
1286 ok = 0;
1287 }
1288 hpte[0] = v;
1289 hpte[1] = r;
1290 return ok;
1291}
1292
1293static ssize_t kvm_htab_read(struct file *file, char __user *buf,
1294 size_t count, loff_t *ppos)
1295{
1296 struct kvm_htab_ctx *ctx = file->private_data;
1297 struct kvm *kvm = ctx->kvm;
1298 struct kvm_get_htab_header hdr;
1299 unsigned long *hptp;
1300 struct revmap_entry *revp;
1301 unsigned long i, nb, nw;
1302 unsigned long __user *lbuf;
1303 struct kvm_get_htab_header __user *hptr;
1304 unsigned long flags;
1305 int first_pass;
1306 unsigned long hpte[2];
1307
1308 if (!access_ok(VERIFY_WRITE, buf, count))
1309 return -EFAULT;
1310
1311 first_pass = ctx->first_pass;
1312 flags = ctx->flags;
1313
1314 i = ctx->index;
1315 hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
1316 revp = kvm->arch.revmap + i;
1317 lbuf = (unsigned long __user *)buf;
1318
1319 nb = 0;
1320 while (nb + sizeof(hdr) + HPTE_SIZE < count) {
1321 /* Initialize header */
1322 hptr = (struct kvm_get_htab_header __user *)buf;
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1323 hdr.n_valid = 0;
1324 hdr.n_invalid = 0;
1325 nw = nb;
1326 nb += sizeof(hdr);
1327 lbuf = (unsigned long __user *)(buf + sizeof(hdr));
1328
1329 /* Skip uninteresting entries, i.e. clean on not-first pass */
1330 if (!first_pass) {
1331 while (i < kvm->arch.hpt_npte &&
a1b4a0f6 1332 !hpte_dirty(revp, hptp)) {
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1333 ++i;
1334 hptp += 2;
1335 ++revp;
1336 }
1337 }
05dd85f7 1338 hdr.index = i;
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1339
1340 /* Grab a series of valid entries */
1341 while (i < kvm->arch.hpt_npte &&
1342 hdr.n_valid < 0xffff &&
1343 nb + HPTE_SIZE < count &&
1344 record_hpte(flags, hptp, hpte, revp, 1, first_pass)) {
1345 /* valid entry, write it out */
1346 ++hdr.n_valid;
1347 if (__put_user(hpte[0], lbuf) ||
1348 __put_user(hpte[1], lbuf + 1))
1349 return -EFAULT;
1350 nb += HPTE_SIZE;
1351 lbuf += 2;
1352 ++i;
1353 hptp += 2;
1354 ++revp;
1355 }
1356 /* Now skip invalid entries while we can */
1357 while (i < kvm->arch.hpt_npte &&
1358 hdr.n_invalid < 0xffff &&
1359 record_hpte(flags, hptp, hpte, revp, 0, first_pass)) {
1360 /* found an invalid entry */
1361 ++hdr.n_invalid;
1362 ++i;
1363 hptp += 2;
1364 ++revp;
1365 }
1366
1367 if (hdr.n_valid || hdr.n_invalid) {
1368 /* write back the header */
1369 if (__copy_to_user(hptr, &hdr, sizeof(hdr)))
1370 return -EFAULT;
1371 nw = nb;
1372 buf = (char __user *)lbuf;
1373 } else {
1374 nb = nw;
1375 }
1376
1377 /* Check if we've wrapped around the hash table */
1378 if (i >= kvm->arch.hpt_npte) {
1379 i = 0;
1380 ctx->first_pass = 0;
1381 break;
1382 }
1383 }
1384
1385 ctx->index = i;
1386
1387 return nb;
1388}
1389
1390static ssize_t kvm_htab_write(struct file *file, const char __user *buf,
1391 size_t count, loff_t *ppos)
1392{
1393 struct kvm_htab_ctx *ctx = file->private_data;
1394 struct kvm *kvm = ctx->kvm;
1395 struct kvm_get_htab_header hdr;
1396 unsigned long i, j;
1397 unsigned long v, r;
1398 unsigned long __user *lbuf;
1399 unsigned long *hptp;
1400 unsigned long tmp[2];
1401 ssize_t nb;
1402 long int err, ret;
1403 int rma_setup;
1404
1405 if (!access_ok(VERIFY_READ, buf, count))
1406 return -EFAULT;
1407
1408 /* lock out vcpus from running while we're doing this */
1409 mutex_lock(&kvm->lock);
1410 rma_setup = kvm->arch.rma_setup_done;
1411 if (rma_setup) {
1412 kvm->arch.rma_setup_done = 0; /* temporarily */
1413 /* order rma_setup_done vs. vcpus_running */
1414 smp_mb();
1415 if (atomic_read(&kvm->arch.vcpus_running)) {
1416 kvm->arch.rma_setup_done = 1;
1417 mutex_unlock(&kvm->lock);
1418 return -EBUSY;
1419 }
1420 }
1421
1422 err = 0;
1423 for (nb = 0; nb + sizeof(hdr) <= count; ) {
1424 err = -EFAULT;
1425 if (__copy_from_user(&hdr, buf, sizeof(hdr)))
1426 break;
1427
1428 err = 0;
1429 if (nb + hdr.n_valid * HPTE_SIZE > count)
1430 break;
1431
1432 nb += sizeof(hdr);
1433 buf += sizeof(hdr);
1434
1435 err = -EINVAL;
1436 i = hdr.index;
1437 if (i >= kvm->arch.hpt_npte ||
1438 i + hdr.n_valid + hdr.n_invalid > kvm->arch.hpt_npte)
1439 break;
1440
1441 hptp = (unsigned long *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
1442 lbuf = (unsigned long __user *)buf;
1443 for (j = 0; j < hdr.n_valid; ++j) {
1444 err = -EFAULT;
1445 if (__get_user(v, lbuf) || __get_user(r, lbuf + 1))
1446 goto out;
1447 err = -EINVAL;
1448 if (!(v & HPTE_V_VALID))
1449 goto out;
1450 lbuf += 2;
1451 nb += HPTE_SIZE;
1452
1453 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
1454 kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
1455 err = -EIO;
1456 ret = kvmppc_virtmode_do_h_enter(kvm, H_EXACT, i, v, r,
1457 tmp);
1458 if (ret != H_SUCCESS) {
1459 pr_err("kvm_htab_write ret %ld i=%ld v=%lx "
1460 "r=%lx\n", ret, i, v, r);
1461 goto out;
1462 }
1463 if (!rma_setup && is_vrma_hpte(v)) {
1464 unsigned long psize = hpte_page_size(v, r);
1465 unsigned long senc = slb_pgsize_encoding(psize);
1466 unsigned long lpcr;
1467
1468 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
1469 (VRMA_VSID << SLB_VSID_SHIFT_1T);
1470 lpcr = kvm->arch.lpcr & ~LPCR_VRMASD;
1471 lpcr |= senc << (LPCR_VRMASD_SH - 4);
1472 kvm->arch.lpcr = lpcr;
1473 rma_setup = 1;
1474 }
1475 ++i;
1476 hptp += 2;
1477 }
1478
1479 for (j = 0; j < hdr.n_invalid; ++j) {
1480 if (hptp[0] & (HPTE_V_VALID | HPTE_V_ABSENT))
1481 kvmppc_do_h_remove(kvm, 0, i, 0, tmp);
1482 ++i;
1483 hptp += 2;
1484 }
1485 err = 0;
1486 }
1487
1488 out:
1489 /* Order HPTE updates vs. rma_setup_done */
1490 smp_wmb();
1491 kvm->arch.rma_setup_done = rma_setup;
1492 mutex_unlock(&kvm->lock);
1493
1494 if (err)
1495 return err;
1496 return nb;
1497}
1498
1499static int kvm_htab_release(struct inode *inode, struct file *filp)
1500{
1501 struct kvm_htab_ctx *ctx = filp->private_data;
1502
1503 filp->private_data = NULL;
1504 if (!(ctx->flags & KVM_GET_HTAB_WRITE))
1505 atomic_dec(&ctx->kvm->arch.hpte_mod_interest);
1506 kvm_put_kvm(ctx->kvm);
1507 kfree(ctx);
1508 return 0;
1509}
1510
1511static struct file_operations kvm_htab_fops = {
1512 .read = kvm_htab_read,
1513 .write = kvm_htab_write,
1514 .llseek = default_llseek,
1515 .release = kvm_htab_release,
1516};
1517
1518int kvm_vm_ioctl_get_htab_fd(struct kvm *kvm, struct kvm_get_htab_fd *ghf)
1519{
1520 int ret;
1521 struct kvm_htab_ctx *ctx;
1522 int rwflag;
1523
1524 /* reject flags we don't recognize */
1525 if (ghf->flags & ~(KVM_GET_HTAB_BOLTED_ONLY | KVM_GET_HTAB_WRITE))
1526 return -EINVAL;
1527 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1528 if (!ctx)
1529 return -ENOMEM;
1530 kvm_get_kvm(kvm);
1531 ctx->kvm = kvm;
1532 ctx->index = ghf->start_index;
1533 ctx->flags = ghf->flags;
1534 ctx->first_pass = 1;
1535
1536 rwflag = (ghf->flags & KVM_GET_HTAB_WRITE) ? O_WRONLY : O_RDONLY;
1537 ret = anon_inode_getfd("kvm-htab", &kvm_htab_fops, ctx, rwflag);
1538 if (ret < 0) {
1539 kvm_put_kvm(kvm);
1540 return ret;
1541 }
1542
1543 if (rwflag == O_RDONLY) {
1544 mutex_lock(&kvm->slots_lock);
1545 atomic_inc(&kvm->arch.hpte_mod_interest);
1546 /* make sure kvmppc_do_h_enter etc. see the increment */
1547 synchronize_srcu_expedited(&kvm->srcu);
1548 mutex_unlock(&kvm->slots_lock);
1549 }
1550
1551 return ret;
1552}
1553
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1554void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
1555{
1556 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
1557
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1558 if (cpu_has_feature(CPU_FTR_ARCH_206))
1559 vcpu->arch.slb_nr = 32; /* POWER7 */
1560 else
1561 vcpu->arch.slb_nr = 64;
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1562
1563 mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
1564 mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
1565
1566 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
1567}
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