KVM: Add barriers to allow mmu_notifier_retry to be used locklessly
[deliverable/linux.git] / arch / powerpc / kvm / book3s_64_mmu_hv.c
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
16 */
17
18#include <linux/types.h>
19#include <linux/string.h>
20#include <linux/kvm.h>
21#include <linux/kvm_host.h>
22#include <linux/highmem.h>
23#include <linux/gfp.h>
24#include <linux/slab.h>
25#include <linux/hugetlb.h>
8936dda4 26#include <linux/vmalloc.h>
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27
28#include <asm/tlbflush.h>
29#include <asm/kvm_ppc.h>
30#include <asm/kvm_book3s.h>
31#include <asm/mmu-hash64.h>
32#include <asm/hvcall.h>
33#include <asm/synch.h>
34#include <asm/ppc-opcode.h>
35#include <asm/cputable.h>
36
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37/* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */
38#define MAX_LPID_970 63
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39#define NR_LPIDS (LPID_RSVD + 1)
40unsigned long lpid_inuse[BITS_TO_LONGS(NR_LPIDS)];
41
42long kvmppc_alloc_hpt(struct kvm *kvm)
43{
44 unsigned long hpt;
45 unsigned long lpid;
8936dda4 46 struct revmap_entry *rev;
de56a948 47
8936dda4 48 /* Allocate guest's hashed page table */
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49 hpt = __get_free_pages(GFP_KERNEL|__GFP_ZERO|__GFP_REPEAT|__GFP_NOWARN,
50 HPT_ORDER - PAGE_SHIFT);
51 if (!hpt) {
52 pr_err("kvm_alloc_hpt: Couldn't alloc HPT\n");
53 return -ENOMEM;
54 }
55 kvm->arch.hpt_virt = hpt;
56
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57 /* Allocate reverse map array */
58 rev = vmalloc(sizeof(struct revmap_entry) * HPT_NPTE);
59 if (!rev) {
60 pr_err("kvmppc_alloc_hpt: Couldn't alloc reverse map array\n");
61 goto out_freehpt;
62 }
63 kvm->arch.revmap = rev;
64
65 /* Allocate the guest's logical partition ID */
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66 do {
67 lpid = find_first_zero_bit(lpid_inuse, NR_LPIDS);
68 if (lpid >= NR_LPIDS) {
69 pr_err("kvm_alloc_hpt: No LPIDs free\n");
8936dda4 70 goto out_freeboth;
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71 }
72 } while (test_and_set_bit(lpid, lpid_inuse));
73
74 kvm->arch.sdr1 = __pa(hpt) | (HPT_ORDER - 18);
75 kvm->arch.lpid = lpid;
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76
77 pr_info("KVM guest htab at %lx, LPID %lx\n", hpt, lpid);
78 return 0;
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79
80 out_freeboth:
81 vfree(rev);
82 out_freehpt:
83 free_pages(hpt, HPT_ORDER - PAGE_SHIFT);
84 return -ENOMEM;
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85}
86
87void kvmppc_free_hpt(struct kvm *kvm)
88{
de56a948 89 clear_bit(kvm->arch.lpid, lpid_inuse);
8936dda4 90 vfree(kvm->arch.revmap);
de56a948 91 free_pages(kvm->arch.hpt_virt, HPT_ORDER - PAGE_SHIFT);
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92}
93
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94/* Bits in first HPTE dword for pagesize 4k, 64k or 16M */
95static inline unsigned long hpte0_pgsize_encoding(unsigned long pgsize)
96{
97 return (pgsize > 0x1000) ? HPTE_V_LARGE : 0;
98}
99
100/* Bits in second HPTE dword for pagesize 4k, 64k or 16M */
101static inline unsigned long hpte1_pgsize_encoding(unsigned long pgsize)
102{
103 return (pgsize == 0x10000) ? 0x1000 : 0;
104}
105
106void kvmppc_map_vrma(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,
107 unsigned long porder)
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108{
109 unsigned long i;
b2b2f165 110 unsigned long npages;
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111 unsigned long hp_v, hp_r;
112 unsigned long addr, hash;
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113 unsigned long psize;
114 unsigned long hp0, hp1;
c77162de 115 long ret;
de56a948 116
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117 psize = 1ul << porder;
118 npages = memslot->npages >> (porder - PAGE_SHIFT);
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119
120 /* VRMA can't be > 1TB */
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121 if (npages > 1ul << (40 - porder))
122 npages = 1ul << (40 - porder);
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123 /* Can't use more than 1 HPTE per HPTEG */
124 if (npages > HPT_NPTEG)
125 npages = HPT_NPTEG;
126
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127 hp0 = HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)) |
128 HPTE_V_BOLTED | hpte0_pgsize_encoding(psize);
129 hp1 = hpte1_pgsize_encoding(psize) |
130 HPTE_R_R | HPTE_R_C | HPTE_R_M | PP_RWXX;
131
de56a948 132 for (i = 0; i < npages; ++i) {
c77162de 133 addr = i << porder;
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134 /* can't use hpt_hash since va > 64 bits */
135 hash = (i ^ (VRMA_VSID ^ (VRMA_VSID << 25))) & HPT_HASH_MASK;
136 /*
137 * We assume that the hash table is empty and no
138 * vcpus are using it at this stage. Since we create
139 * at most one HPTE per HPTEG, we just assume entry 7
140 * is available and use it.
141 */
8936dda4 142 hash = (hash << 3) + 7;
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143 hp_v = hp0 | ((addr >> 16) & ~0x7fUL);
144 hp_r = hp1 | addr;
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145 ret = kvmppc_virtmode_h_enter(vcpu, H_EXACT, hash, hp_v, hp_r);
146 if (ret != H_SUCCESS) {
147 pr_err("KVM: map_vrma at %lx failed, ret=%ld\n",
148 addr, ret);
149 break;
150 }
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151 }
152}
153
154int kvmppc_mmu_hv_init(void)
155{
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156 unsigned long host_lpid, rsvd_lpid;
157
158 if (!cpu_has_feature(CPU_FTR_HVMODE))
de56a948 159 return -EINVAL;
9e368f29 160
de56a948 161 memset(lpid_inuse, 0, sizeof(lpid_inuse));
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162
163 if (cpu_has_feature(CPU_FTR_ARCH_206)) {
164 host_lpid = mfspr(SPRN_LPID); /* POWER7 */
165 rsvd_lpid = LPID_RSVD;
166 } else {
167 host_lpid = 0; /* PPC970 */
168 rsvd_lpid = MAX_LPID_970;
169 }
170
171 set_bit(host_lpid, lpid_inuse);
172 /* rsvd_lpid is reserved for use in partition switching */
173 set_bit(rsvd_lpid, lpid_inuse);
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174
175 return 0;
176}
177
178void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
179{
180}
181
182static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
183{
184 kvmppc_set_msr(vcpu, MSR_SF | MSR_ME);
185}
186
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187/*
188 * This is called to get a reference to a guest page if there isn't
189 * one already in the kvm->arch.slot_phys[][] arrays.
190 */
191static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
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192 struct kvm_memory_slot *memslot,
193 unsigned long psize)
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194{
195 unsigned long start;
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196 long np, err;
197 struct page *page, *hpage, *pages[1];
198 unsigned long s, pgsize;
c77162de 199 unsigned long *physp;
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200 unsigned int is_io, got, pgorder;
201 struct vm_area_struct *vma;
da9d1d7f 202 unsigned long pfn, i, npages;
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203
204 physp = kvm->arch.slot_phys[memslot->id];
205 if (!physp)
206 return -EINVAL;
da9d1d7f 207 if (physp[gfn - memslot->base_gfn])
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208 return 0;
209
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210 is_io = 0;
211 got = 0;
c77162de 212 page = NULL;
da9d1d7f 213 pgsize = psize;
9d0ef5ea 214 err = -EINVAL;
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215 start = gfn_to_hva_memslot(memslot, gfn);
216
217 /* Instantiate and get the page we want access to */
218 np = get_user_pages_fast(start, 1, 1, pages);
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219 if (np != 1) {
220 /* Look up the vma for the page */
221 down_read(&current->mm->mmap_sem);
222 vma = find_vma(current->mm, start);
223 if (!vma || vma->vm_start > start ||
224 start + psize > vma->vm_end ||
225 !(vma->vm_flags & VM_PFNMAP))
226 goto up_err;
227 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
228 pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
229 /* check alignment of pfn vs. requested page size */
230 if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1)))
231 goto up_err;
232 up_read(&current->mm->mmap_sem);
233
234 } else {
235 page = pages[0];
236 got = KVMPPC_GOT_PAGE;
237
238 /* See if this is a large page */
239 s = PAGE_SIZE;
240 if (PageHuge(page)) {
241 hpage = compound_head(page);
242 s <<= compound_order(hpage);
243 /* Get the whole large page if slot alignment is ok */
244 if (s > psize && slot_is_aligned(memslot, s) &&
245 !(memslot->userspace_addr & (s - 1))) {
246 start &= ~(s - 1);
247 pgsize = s;
248 page = hpage;
249 }
da9d1d7f 250 }
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251 if (s < psize)
252 goto out;
253 pfn = page_to_pfn(page);
c77162de 254 }
c77162de 255
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256 npages = pgsize >> PAGE_SHIFT;
257 pgorder = __ilog2(npages);
258 physp += (gfn - memslot->base_gfn) & ~(npages - 1);
c77162de 259 spin_lock(&kvm->arch.slot_phys_lock);
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260 for (i = 0; i < npages; ++i) {
261 if (!physp[i]) {
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262 physp[i] = ((pfn + i) << PAGE_SHIFT) +
263 got + is_io + pgorder;
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264 got = 0;
265 }
266 }
c77162de 267 spin_unlock(&kvm->arch.slot_phys_lock);
da9d1d7f 268 err = 0;
c77162de 269
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270 out:
271 if (got) {
272 if (PageHuge(page))
273 page = compound_head(page);
274 put_page(page);
275 }
276 return err;
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277
278 up_err:
279 up_read(&current->mm->mmap_sem);
280 return err;
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281}
282
283/*
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284 * We come here on a H_ENTER call from the guest when we are not
285 * using mmu notifiers and we don't have the requested page pinned
286 * already.
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287 */
288long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
289 long pte_index, unsigned long pteh, unsigned long ptel)
290{
291 struct kvm *kvm = vcpu->kvm;
292 unsigned long psize, gpa, gfn;
293 struct kvm_memory_slot *memslot;
294 long ret;
295
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296 if (kvm->arch.using_mmu_notifiers)
297 goto do_insert;
298
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299 psize = hpte_page_size(pteh, ptel);
300 if (!psize)
301 return H_PARAMETER;
302
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303 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
304
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305 /* Find the memslot (if any) for this address */
306 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
307 gfn = gpa >> PAGE_SHIFT;
308 memslot = gfn_to_memslot(kvm, gfn);
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309 if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) {
310 if (!slot_is_aligned(memslot, psize))
311 return H_PARAMETER;
312 if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0)
313 return H_PARAMETER;
314 }
c77162de 315
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316 do_insert:
317 /* Protect linux PTE lookup from page table destruction */
318 rcu_read_lock_sched(); /* this disables preemption too */
319 vcpu->arch.pgdir = current->mm->pgd;
c77162de 320 ret = kvmppc_h_enter(vcpu, flags, pte_index, pteh, ptel);
342d3db7 321 rcu_read_unlock_sched();
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322 if (ret == H_TOO_HARD) {
323 /* this can't happen */
324 pr_err("KVM: Oops, kvmppc_h_enter returned too hard!\n");
325 ret = H_RESOURCE; /* or something */
326 }
327 return ret;
328
329}
330
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331static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu,
332 gva_t eaddr)
333{
334 u64 mask;
335 int i;
336
337 for (i = 0; i < vcpu->arch.slb_nr; i++) {
338 if (!(vcpu->arch.slb[i].orige & SLB_ESID_V))
339 continue;
340
341 if (vcpu->arch.slb[i].origv & SLB_VSID_B_1T)
342 mask = ESID_MASK_1T;
343 else
344 mask = ESID_MASK;
345
346 if (((vcpu->arch.slb[i].orige ^ eaddr) & mask) == 0)
347 return &vcpu->arch.slb[i];
348 }
349 return NULL;
350}
351
352static unsigned long kvmppc_mmu_get_real_addr(unsigned long v, unsigned long r,
353 unsigned long ea)
354{
355 unsigned long ra_mask;
356
357 ra_mask = hpte_page_size(v, r) - 1;
358 return (r & HPTE_R_RPN & ~ra_mask) | (ea & ra_mask);
359}
360
de56a948 361static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
697d3899 362 struct kvmppc_pte *gpte, bool data)
de56a948 363{
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364 struct kvm *kvm = vcpu->kvm;
365 struct kvmppc_slb *slbe;
366 unsigned long slb_v;
367 unsigned long pp, key;
368 unsigned long v, gr;
369 unsigned long *hptep;
370 int index;
371 int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);
372
373 /* Get SLB entry */
374 if (virtmode) {
375 slbe = kvmppc_mmu_book3s_hv_find_slbe(vcpu, eaddr);
376 if (!slbe)
377 return -EINVAL;
378 slb_v = slbe->origv;
379 } else {
380 /* real mode access */
381 slb_v = vcpu->kvm->arch.vrma_slb_v;
382 }
383
384 /* Find the HPTE in the hash table */
385 index = kvmppc_hv_find_lock_hpte(kvm, eaddr, slb_v,
386 HPTE_V_VALID | HPTE_V_ABSENT);
387 if (index < 0)
388 return -ENOENT;
389 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
390 v = hptep[0] & ~HPTE_V_HVLOCK;
391 gr = kvm->arch.revmap[index].guest_rpte;
392
393 /* Unlock the HPTE */
394 asm volatile("lwsync" : : : "memory");
395 hptep[0] = v;
396
397 gpte->eaddr = eaddr;
398 gpte->vpage = ((v & HPTE_V_AVPN) << 4) | ((eaddr >> 12) & 0xfff);
399
400 /* Get PP bits and key for permission check */
401 pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
402 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
403 key &= slb_v;
404
405 /* Calculate permissions */
406 gpte->may_read = hpte_read_permission(pp, key);
407 gpte->may_write = hpte_write_permission(pp, key);
408 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G));
409
410 /* Storage key permission check for POWER7 */
411 if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) {
412 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr);
413 if (amrfield & 1)
414 gpte->may_read = 0;
415 if (amrfield & 2)
416 gpte->may_write = 0;
417 }
418
419 /* Get the guest physical address */
420 gpte->raddr = kvmppc_mmu_get_real_addr(v, gr, eaddr);
421 return 0;
422}
423
424/*
425 * Quick test for whether an instruction is a load or a store.
426 * If the instruction is a load or a store, then this will indicate
427 * which it is, at least on server processors. (Embedded processors
428 * have some external PID instructions that don't follow the rule
429 * embodied here.) If the instruction isn't a load or store, then
430 * this doesn't return anything useful.
431 */
432static int instruction_is_store(unsigned int instr)
433{
434 unsigned int mask;
435
436 mask = 0x10000000;
437 if ((instr & 0xfc000000) == 0x7c000000)
438 mask = 0x100; /* major opcode 31 */
439 return (instr & mask) != 0;
440}
441
442static int kvmppc_hv_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu,
443 unsigned long gpa, int is_store)
444{
445 int ret;
446 u32 last_inst;
447 unsigned long srr0 = kvmppc_get_pc(vcpu);
448
449 /* We try to load the last instruction. We don't let
450 * emulate_instruction do it as it doesn't check what
451 * kvmppc_ld returns.
452 * If we fail, we just return to the guest and try executing it again.
453 */
454 if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED) {
455 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
456 if (ret != EMULATE_DONE || last_inst == KVM_INST_FETCH_FAILED)
457 return RESUME_GUEST;
458 vcpu->arch.last_inst = last_inst;
459 }
460
461 /*
462 * WARNING: We do not know for sure whether the instruction we just
463 * read from memory is the same that caused the fault in the first
464 * place. If the instruction we read is neither an load or a store,
465 * then it can't access memory, so we don't need to worry about
466 * enforcing access permissions. So, assuming it is a load or
467 * store, we just check that its direction (load or store) is
468 * consistent with the original fault, since that's what we
469 * checked the access permissions against. If there is a mismatch
470 * we just return and retry the instruction.
471 */
472
473 if (instruction_is_store(vcpu->arch.last_inst) != !!is_store)
474 return RESUME_GUEST;
475
476 /*
477 * Emulated accesses are emulated by looking at the hash for
478 * translation once, then performing the access later. The
479 * translation could be invalidated in the meantime in which
480 * point performing the subsequent memory access on the old
481 * physical address could possibly be a security hole for the
482 * guest (but not the host).
483 *
484 * This is less of an issue for MMIO stores since they aren't
485 * globally visible. It could be an issue for MMIO loads to
486 * a certain extent but we'll ignore it for now.
487 */
488
489 vcpu->arch.paddr_accessed = gpa;
490 return kvmppc_emulate_mmio(run, vcpu);
491}
492
493int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
494 unsigned long ea, unsigned long dsisr)
495{
496 struct kvm *kvm = vcpu->kvm;
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497 unsigned long *hptep, hpte[3], r;
498 unsigned long mmu_seq, psize, pte_size;
499 unsigned long gfn, hva, pfn;
697d3899 500 struct kvm_memory_slot *memslot;
342d3db7 501 unsigned long *rmap;
697d3899 502 struct revmap_entry *rev;
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503 struct page *page, *pages[1];
504 long index, ret, npages;
505 unsigned long is_io;
506 struct vm_area_struct *vma;
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507
508 /*
509 * Real-mode code has already searched the HPT and found the
510 * entry we're interested in. Lock the entry and check that
511 * it hasn't changed. If it has, just return and re-execute the
512 * instruction.
513 */
514 if (ea != vcpu->arch.pgfault_addr)
515 return RESUME_GUEST;
516 index = vcpu->arch.pgfault_index;
517 hptep = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
518 rev = &kvm->arch.revmap[index];
519 preempt_disable();
520 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
521 cpu_relax();
522 hpte[0] = hptep[0] & ~HPTE_V_HVLOCK;
523 hpte[1] = hptep[1];
342d3db7 524 hpte[2] = r = rev->guest_rpte;
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525 asm volatile("lwsync" : : : "memory");
526 hptep[0] = hpte[0];
527 preempt_enable();
528
529 if (hpte[0] != vcpu->arch.pgfault_hpte[0] ||
530 hpte[1] != vcpu->arch.pgfault_hpte[1])
531 return RESUME_GUEST;
532
533 /* Translate the logical address and get the page */
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534 psize = hpte_page_size(hpte[0], r);
535 gfn = hpte_rpn(r, psize);
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536 memslot = gfn_to_memslot(kvm, gfn);
537
538 /* No memslot means it's an emulated MMIO region */
539 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) {
540 unsigned long gpa = (gfn << PAGE_SHIFT) | (ea & (psize - 1));
541 return kvmppc_hv_emulate_mmio(run, vcpu, gpa,
542 dsisr & DSISR_ISSTORE);
543 }
544
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545 if (!kvm->arch.using_mmu_notifiers)
546 return -EFAULT; /* should never get here */
547
548 /* used to check for invalidations in progress */
549 mmu_seq = kvm->mmu_notifier_seq;
550 smp_rmb();
551
552 is_io = 0;
553 pfn = 0;
554 page = NULL;
555 pte_size = PAGE_SIZE;
556 hva = gfn_to_hva_memslot(memslot, gfn);
557 npages = get_user_pages_fast(hva, 1, 1, pages);
558 if (npages < 1) {
559 /* Check if it's an I/O mapping */
560 down_read(&current->mm->mmap_sem);
561 vma = find_vma(current->mm, hva);
562 if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
563 (vma->vm_flags & VM_PFNMAP)) {
564 pfn = vma->vm_pgoff +
565 ((hva - vma->vm_start) >> PAGE_SHIFT);
566 pte_size = psize;
567 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
568 }
569 up_read(&current->mm->mmap_sem);
570 if (!pfn)
571 return -EFAULT;
572 } else {
573 page = pages[0];
574 if (PageHuge(page)) {
575 page = compound_head(page);
576 pte_size <<= compound_order(page);
577 }
578 pfn = page_to_pfn(page);
579 }
580
581 ret = -EFAULT;
582 if (psize > pte_size)
583 goto out_put;
584
585 /* Check WIMG vs. the actual page we're accessing */
586 if (!hpte_cache_flags_ok(r, is_io)) {
587 if (is_io)
588 return -EFAULT;
589 /*
590 * Allow guest to map emulated device memory as
591 * uncacheable, but actually make it cacheable.
592 */
593 r = (r & ~(HPTE_R_W|HPTE_R_I|HPTE_R_G)) | HPTE_R_M;
594 }
595
596 /* Set the HPTE to point to pfn */
597 r = (r & ~(HPTE_R_PP0 - pte_size)) | (pfn << PAGE_SHIFT);
598 ret = RESUME_GUEST;
599 preempt_disable();
600 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
601 cpu_relax();
602 if ((hptep[0] & ~HPTE_V_HVLOCK) != hpte[0] || hptep[1] != hpte[1] ||
603 rev->guest_rpte != hpte[2])
604 /* HPTE has been changed under us; let the guest retry */
605 goto out_unlock;
606 hpte[0] = (hpte[0] & ~HPTE_V_ABSENT) | HPTE_V_VALID;
607
608 rmap = &memslot->rmap[gfn - memslot->base_gfn];
609 lock_rmap(rmap);
610
611 /* Check if we might have been invalidated; let the guest retry if so */
612 ret = RESUME_GUEST;
613 if (mmu_notifier_retry(vcpu, mmu_seq)) {
614 unlock_rmap(rmap);
615 goto out_unlock;
616 }
617 kvmppc_add_revmap_chain(kvm, rev, rmap, index, 0);
618
619 hptep[1] = r;
620 eieio();
621 hptep[0] = hpte[0];
622 asm volatile("ptesync" : : : "memory");
623 preempt_enable();
624 if (page)
625 SetPageDirty(page);
626
627 out_put:
628 if (page)
629 put_page(page);
630 return ret;
631
632 out_unlock:
633 hptep[0] &= ~HPTE_V_HVLOCK;
634 preempt_enable();
635 goto out_put;
636}
637
638static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
639 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
640 unsigned long gfn))
641{
642 int ret;
643 int retval = 0;
644 struct kvm_memslots *slots;
645 struct kvm_memory_slot *memslot;
646
647 slots = kvm_memslots(kvm);
648 kvm_for_each_memslot(memslot, slots) {
649 unsigned long start = memslot->userspace_addr;
650 unsigned long end;
651
652 end = start + (memslot->npages << PAGE_SHIFT);
653 if (hva >= start && hva < end) {
654 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
655
656 ret = handler(kvm, &memslot->rmap[gfn_offset],
657 memslot->base_gfn + gfn_offset);
658 retval |= ret;
659 }
660 }
661
662 return retval;
663}
664
665static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
666 unsigned long gfn)
667{
668 struct revmap_entry *rev = kvm->arch.revmap;
669 unsigned long h, i, j;
670 unsigned long *hptep;
671 unsigned long ptel, psize;
672
673 for (;;) {
674 while (test_and_set_bit_lock(KVMPPC_RMAP_LOCK_BIT, rmapp))
675 cpu_relax();
676 if (!(*rmapp & KVMPPC_RMAP_PRESENT)) {
677 __clear_bit_unlock(KVMPPC_RMAP_LOCK_BIT, rmapp);
678 break;
679 }
680
681 /*
682 * To avoid an ABBA deadlock with the HPTE lock bit,
683 * we have to unlock the rmap chain before locking the HPTE.
684 * Thus we remove the first entry, unlock the rmap chain,
685 * lock the HPTE and then check that it is for the
686 * page we're unmapping before changing it to non-present.
687 */
688 i = *rmapp & KVMPPC_RMAP_INDEX;
689 j = rev[i].forw;
690 if (j == i) {
691 /* chain is now empty */
692 j = 0;
693 } else {
694 /* remove i from chain */
695 h = rev[i].back;
696 rev[h].forw = j;
697 rev[j].back = h;
698 rev[i].forw = rev[i].back = i;
699 j |= KVMPPC_RMAP_PRESENT;
700 }
701 smp_wmb();
702 *rmapp = j | (1ul << KVMPPC_RMAP_REF_BIT);
703
704 /* Now lock, check and modify the HPTE */
705 hptep = (unsigned long *) (kvm->arch.hpt_virt + (i << 4));
706 while (!try_lock_hpte(hptep, HPTE_V_HVLOCK))
707 cpu_relax();
708 ptel = rev[i].guest_rpte;
709 psize = hpte_page_size(hptep[0], ptel);
710 if ((hptep[0] & HPTE_V_VALID) &&
711 hpte_rpn(ptel, psize) == gfn) {
712 kvmppc_invalidate_hpte(kvm, hptep, i);
713 hptep[0] |= HPTE_V_ABSENT;
714 }
715 hptep[0] &= ~HPTE_V_HVLOCK;
716 }
717 return 0;
718}
719
720int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
721{
722 if (kvm->arch.using_mmu_notifiers)
723 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724 return 0;
725}
726
727static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
728 unsigned long gfn)
729{
730 if (!kvm->arch.using_mmu_notifiers)
731 return 0;
732 if (!(*rmapp & KVMPPC_RMAP_REFERENCED))
733 return 0;
734 kvm_unmap_rmapp(kvm, rmapp, gfn);
735 while (test_and_set_bit_lock(KVMPPC_RMAP_LOCK_BIT, rmapp))
736 cpu_relax();
737 __clear_bit(KVMPPC_RMAP_REF_BIT, rmapp);
738 __clear_bit_unlock(KVMPPC_RMAP_LOCK_BIT, rmapp);
739 return 1;
740}
741
742int kvm_age_hva(struct kvm *kvm, unsigned long hva)
743{
744 if (!kvm->arch.using_mmu_notifiers)
745 return 0;
746 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
747}
748
749static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
750 unsigned long gfn)
751{
752 return !!(*rmapp & KVMPPC_RMAP_REFERENCED);
753}
754
755int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
756{
757 if (!kvm->arch.using_mmu_notifiers)
758 return 0;
759 return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp);
760}
761
762void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
763{
764 if (!kvm->arch.using_mmu_notifiers)
765 return;
766 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
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767}
768
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769void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
770 unsigned long *nb_ret)
771{
772 struct kvm_memory_slot *memslot;
773 unsigned long gfn = gpa >> PAGE_SHIFT;
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774 struct page *page, *pages[1];
775 int npages;
776 unsigned long hva, psize, offset;
da9d1d7f 777 unsigned long pa;
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778 unsigned long *physp;
779
780 memslot = gfn_to_memslot(kvm, gfn);
781 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
782 return NULL;
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783 if (!kvm->arch.using_mmu_notifiers) {
784 physp = kvm->arch.slot_phys[memslot->id];
785 if (!physp)
c77162de 786 return NULL;
342d3db7 787 physp += gfn - memslot->base_gfn;
c77162de 788 pa = *physp;
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789 if (!pa) {
790 if (kvmppc_get_guest_page(kvm, gfn, memslot,
791 PAGE_SIZE) < 0)
792 return NULL;
793 pa = *physp;
794 }
795 page = pfn_to_page(pa >> PAGE_SHIFT);
796 } else {
797 hva = gfn_to_hva_memslot(memslot, gfn);
798 npages = get_user_pages_fast(hva, 1, 1, pages);
799 if (npages < 1)
800 return NULL;
801 page = pages[0];
c77162de 802 }
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803 psize = PAGE_SIZE;
804 if (PageHuge(page)) {
805 page = compound_head(page);
806 psize <<= compound_order(page);
807 }
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808 if (!kvm->arch.using_mmu_notifiers)
809 get_page(page);
da9d1d7f 810 offset = gpa & (psize - 1);
93e60249 811 if (nb_ret)
da9d1d7f 812 *nb_ret = psize - offset;
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813 return page_address(page) + offset;
814}
815
816void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)
817{
818 struct page *page = virt_to_page(va);
819
820 page = compound_head(page);
821 put_page(page);
822}
823
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824void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
825{
826 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
827
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828 if (cpu_has_feature(CPU_FTR_ARCH_206))
829 vcpu->arch.slb_nr = 32; /* POWER7 */
830 else
831 vcpu->arch.slb_nr = 64;
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832
833 mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
834 mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
835
836 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB;
837}
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