Commit | Line | Data |
---|---|---|
a8606e20 PM |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify | |
3 | * it under the terms of the GNU General Public License, version 2, as | |
4 | * published by the Free Software Foundation. | |
5 | * | |
6 | * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> | |
7 | */ | |
8 | ||
9 | #include <linux/types.h> | |
10 | #include <linux/string.h> | |
11 | #include <linux/kvm.h> | |
12 | #include <linux/kvm_host.h> | |
13 | #include <linux/hugetlb.h> | |
c77162de | 14 | #include <linux/module.h> |
08fe1e7b | 15 | #include <linux/log2.h> |
a8606e20 PM |
16 | |
17 | #include <asm/tlbflush.h> | |
18 | #include <asm/kvm_ppc.h> | |
19 | #include <asm/kvm_book3s.h> | |
f64e8084 | 20 | #include <asm/book3s/64/mmu-hash.h> |
a8606e20 PM |
21 | #include <asm/hvcall.h> |
22 | #include <asm/synch.h> | |
23 | #include <asm/ppc-opcode.h> | |
24 | ||
8936dda4 PM |
25 | /* Translate address of a vmalloc'd thing to a linear map address */ |
26 | static void *real_vmalloc_addr(void *x) | |
27 | { | |
28 | unsigned long addr = (unsigned long) x; | |
29 | pte_t *p; | |
691e95fd AK |
30 | /* |
31 | * assume we don't have huge pages in vmalloc space... | |
32 | * So don't worry about THP collapse/split. Called | |
33 | * Only in realmode, hence won't need irq_save/restore. | |
34 | */ | |
891121e6 | 35 | p = __find_linux_pte_or_hugepte(swapper_pg_dir, addr, NULL, NULL); |
8936dda4 PM |
36 | if (!p || !pte_present(*p)) |
37 | return NULL; | |
8936dda4 PM |
38 | addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK); |
39 | return __va(addr); | |
40 | } | |
a8606e20 | 41 | |
1b400ba0 PM |
42 | /* Return 1 if we need to do a global tlbie, 0 if we can use tlbiel */ |
43 | static int global_invalidates(struct kvm *kvm, unsigned long flags) | |
44 | { | |
45 | int global; | |
46 | ||
47 | /* | |
48 | * If there is only one vcore, and it's currently running, | |
55765483 | 49 | * as indicated by local_paca->kvm_hstate.kvm_vcpu being set, |
1b400ba0 PM |
50 | * we can use tlbiel as long as we mark all other physical |
51 | * cores as potentially having stale TLB entries for this lpid. | |
1b400ba0 PM |
52 | * Otherwise, don't use tlbiel. |
53 | */ | |
55765483 | 54 | if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu) |
1b400ba0 | 55 | global = 0; |
1b400ba0 | 56 | else |
c17b98cf | 57 | global = 1; |
1b400ba0 PM |
58 | |
59 | if (!global) { | |
60 | /* any other core might now have stale TLB entries... */ | |
61 | smp_wmb(); | |
62 | cpumask_setall(&kvm->arch.need_tlb_flush); | |
63 | cpumask_clear_cpu(local_paca->kvm_hstate.kvm_vcore->pcpu, | |
64 | &kvm->arch.need_tlb_flush); | |
65 | } | |
66 | ||
67 | return global; | |
68 | } | |
69 | ||
06ce2c63 PM |
70 | /* |
71 | * Add this HPTE into the chain for the real page. | |
72 | * Must be called with the chain locked; it unlocks the chain. | |
73 | */ | |
342d3db7 | 74 | void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, |
06ce2c63 PM |
75 | unsigned long *rmap, long pte_index, int realmode) |
76 | { | |
77 | struct revmap_entry *head, *tail; | |
78 | unsigned long i; | |
79 | ||
80 | if (*rmap & KVMPPC_RMAP_PRESENT) { | |
81 | i = *rmap & KVMPPC_RMAP_INDEX; | |
82 | head = &kvm->arch.revmap[i]; | |
83 | if (realmode) | |
84 | head = real_vmalloc_addr(head); | |
85 | tail = &kvm->arch.revmap[head->back]; | |
86 | if (realmode) | |
87 | tail = real_vmalloc_addr(tail); | |
88 | rev->forw = i; | |
89 | rev->back = head->back; | |
90 | tail->forw = pte_index; | |
91 | head->back = pte_index; | |
92 | } else { | |
93 | rev->forw = rev->back = pte_index; | |
4879f241 PM |
94 | *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | |
95 | pte_index | KVMPPC_RMAP_PRESENT; | |
06ce2c63 | 96 | } |
4879f241 | 97 | unlock_rmap(rmap); |
06ce2c63 | 98 | } |
342d3db7 | 99 | EXPORT_SYMBOL_GPL(kvmppc_add_revmap_chain); |
06ce2c63 | 100 | |
08fe1e7b PM |
101 | /* Update the changed page order field of an rmap entry */ |
102 | void kvmppc_update_rmap_change(unsigned long *rmap, unsigned long psize) | |
103 | { | |
104 | unsigned long order; | |
105 | ||
106 | if (!psize) | |
107 | return; | |
108 | order = ilog2(psize); | |
109 | order <<= KVMPPC_RMAP_CHG_SHIFT; | |
110 | if (order > (*rmap & KVMPPC_RMAP_CHG_ORDER)) | |
111 | *rmap = (*rmap & ~KVMPPC_RMAP_CHG_ORDER) | order; | |
112 | } | |
113 | EXPORT_SYMBOL_GPL(kvmppc_update_rmap_change); | |
114 | ||
cdeee518 PM |
115 | /* Returns a pointer to the revmap entry for the page mapped by a HPTE */ |
116 | static unsigned long *revmap_for_hpte(struct kvm *kvm, unsigned long hpte_v, | |
117 | unsigned long hpte_gr) | |
118 | { | |
119 | struct kvm_memory_slot *memslot; | |
120 | unsigned long *rmap; | |
121 | unsigned long gfn; | |
122 | ||
123 | gfn = hpte_rpn(hpte_gr, hpte_page_size(hpte_v, hpte_gr)); | |
124 | memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); | |
125 | if (!memslot) | |
126 | return NULL; | |
127 | ||
128 | rmap = real_vmalloc_addr(&memslot->arch.rmap[gfn - memslot->base_gfn]); | |
129 | return rmap; | |
130 | } | |
131 | ||
06ce2c63 PM |
132 | /* Remove this HPTE from the chain for a real page */ |
133 | static void remove_revmap_chain(struct kvm *kvm, long pte_index, | |
bad3b507 PM |
134 | struct revmap_entry *rev, |
135 | unsigned long hpte_v, unsigned long hpte_r) | |
06ce2c63 | 136 | { |
bad3b507 | 137 | struct revmap_entry *next, *prev; |
cdeee518 | 138 | unsigned long ptel, head; |
06ce2c63 | 139 | unsigned long *rmap; |
bad3b507 | 140 | unsigned long rcbits; |
06ce2c63 | 141 | |
bad3b507 PM |
142 | rcbits = hpte_r & (HPTE_R_R | HPTE_R_C); |
143 | ptel = rev->guest_rpte |= rcbits; | |
cdeee518 PM |
144 | rmap = revmap_for_hpte(kvm, hpte_v, ptel); |
145 | if (!rmap) | |
06ce2c63 | 146 | return; |
06ce2c63 PM |
147 | lock_rmap(rmap); |
148 | ||
149 | head = *rmap & KVMPPC_RMAP_INDEX; | |
150 | next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]); | |
151 | prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]); | |
152 | next->back = rev->back; | |
153 | prev->forw = rev->forw; | |
154 | if (head == pte_index) { | |
155 | head = rev->forw; | |
156 | if (head == pte_index) | |
157 | *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX); | |
158 | else | |
159 | *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head; | |
160 | } | |
bad3b507 | 161 | *rmap |= rcbits << KVMPPC_RMAP_RC_SHIFT; |
08fe1e7b PM |
162 | if (rcbits & HPTE_R_C) |
163 | kvmppc_update_rmap_change(rmap, hpte_page_size(hpte_v, hpte_r)); | |
06ce2c63 PM |
164 | unlock_rmap(rmap); |
165 | } | |
166 | ||
7ed661bf PM |
167 | long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags, |
168 | long pte_index, unsigned long pteh, unsigned long ptel, | |
169 | pgd_t *pgdir, bool realmode, unsigned long *pte_idx_ret) | |
a8606e20 | 170 | { |
c77162de | 171 | unsigned long i, pa, gpa, gfn, psize; |
342d3db7 | 172 | unsigned long slot_fn, hva; |
6f22bd32 | 173 | __be64 *hpte; |
8936dda4 | 174 | struct revmap_entry *rev; |
44e5f6be | 175 | unsigned long g_ptel; |
b2b2f165 | 176 | struct kvm_memory_slot *memslot; |
dac56570 | 177 | unsigned hpage_shift; |
30bda41a | 178 | bool is_ci; |
06ce2c63 | 179 | unsigned long *rmap; |
dac56570 | 180 | pte_t *ptep; |
4cf302bc | 181 | unsigned int writing; |
342d3db7 | 182 | unsigned long mmu_seq; |
691e95fd | 183 | unsigned long rcbits, irq_flags = 0; |
c77162de PM |
184 | |
185 | psize = hpte_page_size(pteh, ptel); | |
186 | if (!psize) | |
a8606e20 | 187 | return H_PARAMETER; |
4cf302bc | 188 | writing = hpte_is_writable(ptel); |
697d3899 | 189 | pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID); |
44e5f6be PM |
190 | ptel &= ~HPTE_GR_RESERVED; |
191 | g_ptel = ptel; | |
b2b2f165 | 192 | |
342d3db7 PM |
193 | /* used later to detect if we might have been invalidated */ |
194 | mmu_seq = kvm->mmu_notifier_seq; | |
195 | smp_rmb(); | |
196 | ||
c77162de PM |
197 | /* Find the memslot (if any) for this address */ |
198 | gpa = (ptel & HPTE_R_RPN) & ~(psize - 1); | |
199 | gfn = gpa >> PAGE_SHIFT; | |
797f9c07 | 200 | memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); |
697d3899 | 201 | pa = 0; |
30bda41a | 202 | is_ci = false; |
697d3899 PM |
203 | rmap = NULL; |
204 | if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) { | |
697d3899 PM |
205 | /* Emulated MMIO - mark this with key=31 */ |
206 | pteh |= HPTE_V_ABSENT; | |
207 | ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO; | |
208 | goto do_insert; | |
209 | } | |
da9d1d7f PM |
210 | |
211 | /* Check if the requested page fits entirely in the memslot. */ | |
212 | if (!slot_is_aligned(memslot, psize)) | |
213 | return H_PARAMETER; | |
c77162de | 214 | slot_fn = gfn - memslot->base_gfn; |
d89cc617 | 215 | rmap = &memslot->arch.rmap[slot_fn]; |
c77162de | 216 | |
c17b98cf PM |
217 | /* Translate to host virtual address */ |
218 | hva = __gfn_to_hva_memslot(memslot, gfn); | |
691e95fd AK |
219 | /* |
220 | * If we had a page table table change after lookup, we would | |
221 | * retry via mmu_notifier_retry. | |
222 | */ | |
223 | if (realmode) | |
891121e6 AK |
224 | ptep = __find_linux_pte_or_hugepte(pgdir, hva, NULL, |
225 | &hpage_shift); | |
691e95fd AK |
226 | else { |
227 | local_irq_save(irq_flags); | |
891121e6 AK |
228 | ptep = find_linux_pte_or_hugepte(pgdir, hva, NULL, |
229 | &hpage_shift); | |
342d3db7 | 230 | } |
dac56570 AK |
231 | if (ptep) { |
232 | pte_t pte; | |
233 | unsigned int host_pte_size; | |
7ed661bf | 234 | |
dac56570 AK |
235 | if (hpage_shift) |
236 | host_pte_size = 1ul << hpage_shift; | |
237 | else | |
238 | host_pte_size = PAGE_SIZE; | |
239 | /* | |
240 | * We should always find the guest page size | |
241 | * to <= host page size, if host is using hugepage | |
242 | */ | |
691e95fd AK |
243 | if (host_pte_size < psize) { |
244 | if (!realmode) | |
245 | local_irq_restore(flags); | |
dac56570 | 246 | return H_PARAMETER; |
691e95fd | 247 | } |
7d6e7f7f | 248 | pte = kvmppc_read_update_linux_pte(ptep, writing); |
dac56570 AK |
249 | if (pte_present(pte) && !pte_protnone(pte)) { |
250 | if (writing && !pte_write(pte)) | |
251 | /* make the actual HPTE be read-only */ | |
252 | ptel = hpte_make_readonly(ptel); | |
30bda41a | 253 | is_ci = pte_ci(pte); |
dac56570 AK |
254 | pa = pte_pfn(pte) << PAGE_SHIFT; |
255 | pa |= hva & (host_pte_size - 1); | |
256 | pa |= gpa & ~PAGE_MASK; | |
257 | } | |
258 | } | |
691e95fd AK |
259 | if (!realmode) |
260 | local_irq_restore(irq_flags); | |
c77162de PM |
261 | |
262 | ptel &= ~(HPTE_R_PP0 - psize); | |
263 | ptel |= pa; | |
342d3db7 PM |
264 | |
265 | if (pa) | |
266 | pteh |= HPTE_V_VALID; | |
267 | else | |
268 | pteh |= HPTE_V_ABSENT; | |
c77162de | 269 | |
30bda41a AK |
270 | /*If we had host pte mapping then Check WIMG */ |
271 | if (ptep && !hpte_cache_flags_ok(ptel, is_ci)) { | |
272 | if (is_ci) | |
9d0ef5ea PM |
273 | return H_PARAMETER; |
274 | /* | |
275 | * Allow guest to map emulated device memory as | |
276 | * uncacheable, but actually make it cacheable. | |
277 | */ | |
278 | ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G); | |
279 | ptel |= HPTE_R_M; | |
280 | } | |
075295dd | 281 | |
342d3db7 | 282 | /* Find and lock the HPTEG slot to use */ |
697d3899 | 283 | do_insert: |
32fad281 | 284 | if (pte_index >= kvm->arch.hpt_npte) |
a8606e20 PM |
285 | return H_PARAMETER; |
286 | if (likely((flags & H_EXACT) == 0)) { | |
287 | pte_index &= ~7UL; | |
6f22bd32 | 288 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); |
075295dd | 289 | for (i = 0; i < 8; ++i) { |
6f22bd32 | 290 | if ((be64_to_cpu(*hpte) & HPTE_V_VALID) == 0 && |
697d3899 PM |
291 | try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | |
292 | HPTE_V_ABSENT)) | |
a8606e20 PM |
293 | break; |
294 | hpte += 2; | |
295 | } | |
075295dd PM |
296 | if (i == 8) { |
297 | /* | |
298 | * Since try_lock_hpte doesn't retry (not even stdcx. | |
299 | * failures), it could be that there is a free slot | |
300 | * but we transiently failed to lock it. Try again, | |
301 | * actually locking each slot and checking it. | |
302 | */ | |
303 | hpte -= 16; | |
304 | for (i = 0; i < 8; ++i) { | |
6f22bd32 | 305 | u64 pte; |
075295dd PM |
306 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) |
307 | cpu_relax(); | |
a4bd6eb0 | 308 | pte = be64_to_cpu(hpte[0]); |
6f22bd32 | 309 | if (!(pte & (HPTE_V_VALID | HPTE_V_ABSENT))) |
075295dd | 310 | break; |
a4bd6eb0 | 311 | __unlock_hpte(hpte, pte); |
075295dd PM |
312 | hpte += 2; |
313 | } | |
314 | if (i == 8) | |
315 | return H_PTEG_FULL; | |
316 | } | |
8936dda4 | 317 | pte_index += i; |
a8606e20 | 318 | } else { |
6f22bd32 | 319 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); |
697d3899 PM |
320 | if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | |
321 | HPTE_V_ABSENT)) { | |
075295dd | 322 | /* Lock the slot and check again */ |
6f22bd32 AG |
323 | u64 pte; |
324 | ||
075295dd PM |
325 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) |
326 | cpu_relax(); | |
a4bd6eb0 | 327 | pte = be64_to_cpu(hpte[0]); |
6f22bd32 | 328 | if (pte & (HPTE_V_VALID | HPTE_V_ABSENT)) { |
a4bd6eb0 | 329 | __unlock_hpte(hpte, pte); |
075295dd PM |
330 | return H_PTEG_FULL; |
331 | } | |
332 | } | |
a8606e20 | 333 | } |
8936dda4 PM |
334 | |
335 | /* Save away the guest's idea of the second HPTE dword */ | |
06ce2c63 PM |
336 | rev = &kvm->arch.revmap[pte_index]; |
337 | if (realmode) | |
338 | rev = real_vmalloc_addr(rev); | |
44e5f6be | 339 | if (rev) { |
8936dda4 | 340 | rev->guest_rpte = g_ptel; |
44e5f6be PM |
341 | note_hpte_modification(kvm, rev); |
342 | } | |
06ce2c63 PM |
343 | |
344 | /* Link HPTE into reverse-map chain */ | |
697d3899 PM |
345 | if (pteh & HPTE_V_VALID) { |
346 | if (realmode) | |
347 | rmap = real_vmalloc_addr(rmap); | |
348 | lock_rmap(rmap); | |
342d3db7 | 349 | /* Check for pending invalidations under the rmap chain lock */ |
c17b98cf | 350 | if (mmu_notifier_retry(kvm, mmu_seq)) { |
342d3db7 PM |
351 | /* inval in progress, write a non-present HPTE */ |
352 | pteh |= HPTE_V_ABSENT; | |
353 | pteh &= ~HPTE_V_VALID; | |
354 | unlock_rmap(rmap); | |
355 | } else { | |
356 | kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index, | |
357 | realmode); | |
bad3b507 PM |
358 | /* Only set R/C in real HPTE if already set in *rmap */ |
359 | rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT; | |
360 | ptel &= rcbits | ~(HPTE_R_R | HPTE_R_C); | |
342d3db7 | 361 | } |
697d3899 | 362 | } |
06ce2c63 | 363 | |
6f22bd32 | 364 | hpte[1] = cpu_to_be64(ptel); |
06ce2c63 PM |
365 | |
366 | /* Write the first HPTE dword, unlocking the HPTE and making it valid */ | |
a8606e20 | 367 | eieio(); |
a4bd6eb0 | 368 | __unlock_hpte(hpte, pteh); |
a8606e20 | 369 | asm volatile("ptesync" : : : "memory"); |
06ce2c63 | 370 | |
7ed661bf | 371 | *pte_idx_ret = pte_index; |
a8606e20 PM |
372 | return H_SUCCESS; |
373 | } | |
7ed661bf PM |
374 | EXPORT_SYMBOL_GPL(kvmppc_do_h_enter); |
375 | ||
376 | long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags, | |
377 | long pte_index, unsigned long pteh, unsigned long ptel) | |
378 | { | |
379 | return kvmppc_do_h_enter(vcpu->kvm, flags, pte_index, pteh, ptel, | |
380 | vcpu->arch.pgdir, true, &vcpu->arch.gpr[4]); | |
381 | } | |
a8606e20 | 382 | |
54bb7f4b | 383 | #ifdef __BIG_ENDIAN__ |
a8606e20 | 384 | #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) |
54bb7f4b AB |
385 | #else |
386 | #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index)) | |
387 | #endif | |
a8606e20 PM |
388 | |
389 | static inline int try_lock_tlbie(unsigned int *lock) | |
390 | { | |
391 | unsigned int tmp, old; | |
392 | unsigned int token = LOCK_TOKEN; | |
393 | ||
394 | asm volatile("1:lwarx %1,0,%2\n" | |
395 | " cmpwi cr0,%1,0\n" | |
396 | " bne 2f\n" | |
397 | " stwcx. %3,0,%2\n" | |
398 | " bne- 1b\n" | |
399 | " isync\n" | |
400 | "2:" | |
401 | : "=&r" (tmp), "=&r" (old) | |
402 | : "r" (lock), "r" (token) | |
403 | : "cc", "memory"); | |
404 | return old == 0; | |
405 | } | |
406 | ||
54480501 PM |
407 | static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues, |
408 | long npages, int global, bool need_sync) | |
409 | { | |
410 | long i; | |
411 | ||
54480501 PM |
412 | if (global) { |
413 | while (!try_lock_tlbie(&kvm->arch.tlbie_lock)) | |
414 | cpu_relax(); | |
415 | if (need_sync) | |
416 | asm volatile("ptesync" : : : "memory"); | |
417 | for (i = 0; i < npages; ++i) | |
418 | asm volatile(PPC_TLBIE(%1,%0) : : | |
419 | "r" (rbvalues[i]), "r" (kvm->arch.lpid)); | |
420 | asm volatile("eieio; tlbsync; ptesync" : : : "memory"); | |
421 | kvm->arch.tlbie_lock = 0; | |
422 | } else { | |
423 | if (need_sync) | |
424 | asm volatile("ptesync" : : : "memory"); | |
425 | for (i = 0; i < npages; ++i) | |
426 | asm volatile("tlbiel %0" : : "r" (rbvalues[i])); | |
427 | asm volatile("ptesync" : : : "memory"); | |
428 | } | |
429 | } | |
430 | ||
6b445ad4 PM |
431 | long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, |
432 | unsigned long pte_index, unsigned long avpn, | |
433 | unsigned long *hpret) | |
a8606e20 | 434 | { |
6f22bd32 | 435 | __be64 *hpte; |
a8606e20 | 436 | unsigned long v, r, rb; |
a92bce95 | 437 | struct revmap_entry *rev; |
6f22bd32 | 438 | u64 pte; |
a8606e20 | 439 | |
32fad281 | 440 | if (pte_index >= kvm->arch.hpt_npte) |
a8606e20 | 441 | return H_PARAMETER; |
6f22bd32 | 442 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); |
075295dd | 443 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) |
a8606e20 | 444 | cpu_relax(); |
6f22bd32 AG |
445 | pte = be64_to_cpu(hpte[0]); |
446 | if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || | |
447 | ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) || | |
448 | ((flags & H_ANDCOND) && (pte & avpn) != 0)) { | |
a4bd6eb0 | 449 | __unlock_hpte(hpte, pte); |
a8606e20 PM |
450 | return H_NOT_FOUND; |
451 | } | |
a92bce95 PM |
452 | |
453 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); | |
6f22bd32 | 454 | v = pte & ~HPTE_V_HVLOCK; |
a92bce95 | 455 | if (v & HPTE_V_VALID) { |
6f22bd32 | 456 | hpte[0] &= ~cpu_to_be64(HPTE_V_VALID); |
1e5bf454 | 457 | rb = compute_tlbie_rb(v, be64_to_cpu(hpte[1]), pte_index); |
54480501 | 458 | do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), true); |
1e5bf454 PM |
459 | /* |
460 | * The reference (R) and change (C) bits in a HPT | |
461 | * entry can be set by hardware at any time up until | |
462 | * the HPTE is invalidated and the TLB invalidation | |
463 | * sequence has completed. This means that when | |
464 | * removing a HPTE, we need to re-read the HPTE after | |
465 | * the invalidation sequence has completed in order to | |
466 | * obtain reliable values of R and C. | |
467 | */ | |
468 | remove_revmap_chain(kvm, pte_index, rev, v, | |
469 | be64_to_cpu(hpte[1])); | |
a8606e20 | 470 | } |
44e5f6be PM |
471 | r = rev->guest_rpte & ~HPTE_GR_RESERVED; |
472 | note_hpte_modification(kvm, rev); | |
a92bce95 PM |
473 | unlock_hpte(hpte, 0); |
474 | ||
c64dfe2a PM |
475 | if (v & HPTE_V_ABSENT) |
476 | v = (v & ~HPTE_V_ABSENT) | HPTE_V_VALID; | |
6b445ad4 PM |
477 | hpret[0] = v; |
478 | hpret[1] = r; | |
a8606e20 PM |
479 | return H_SUCCESS; |
480 | } | |
6b445ad4 PM |
481 | EXPORT_SYMBOL_GPL(kvmppc_do_h_remove); |
482 | ||
483 | long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags, | |
484 | unsigned long pte_index, unsigned long avpn) | |
485 | { | |
486 | return kvmppc_do_h_remove(vcpu->kvm, flags, pte_index, avpn, | |
487 | &vcpu->arch.gpr[4]); | |
488 | } | |
a8606e20 PM |
489 | |
490 | long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu) | |
491 | { | |
492 | struct kvm *kvm = vcpu->kvm; | |
493 | unsigned long *args = &vcpu->arch.gpr[4]; | |
6f22bd32 AG |
494 | __be64 *hp, *hptes[4]; |
495 | unsigned long tlbrb[4]; | |
a92bce95 PM |
496 | long int i, j, k, n, found, indexes[4]; |
497 | unsigned long flags, req, pte_index, rcbits; | |
54480501 | 498 | int global; |
a8606e20 | 499 | long int ret = H_SUCCESS; |
a92bce95 | 500 | struct revmap_entry *rev, *revs[4]; |
6f22bd32 | 501 | u64 hp0; |
a8606e20 | 502 | |
54480501 | 503 | global = global_invalidates(kvm, 0); |
a92bce95 PM |
504 | for (i = 0; i < 4 && ret == H_SUCCESS; ) { |
505 | n = 0; | |
506 | for (; i < 4; ++i) { | |
507 | j = i * 2; | |
508 | pte_index = args[j]; | |
509 | flags = pte_index >> 56; | |
510 | pte_index &= ((1ul << 56) - 1); | |
511 | req = flags >> 6; | |
512 | flags &= 3; | |
513 | if (req == 3) { /* no more requests */ | |
514 | i = 4; | |
a8606e20 | 515 | break; |
a92bce95 | 516 | } |
32fad281 PM |
517 | if (req != 1 || flags == 3 || |
518 | pte_index >= kvm->arch.hpt_npte) { | |
a92bce95 PM |
519 | /* parameter error */ |
520 | args[j] = ((0xa0 | flags) << 56) + pte_index; | |
521 | ret = H_PARAMETER; | |
a8606e20 | 522 | break; |
a92bce95 | 523 | } |
6f22bd32 | 524 | hp = (__be64 *) (kvm->arch.hpt_virt + (pte_index << 4)); |
a92bce95 PM |
525 | /* to avoid deadlock, don't spin except for first */ |
526 | if (!try_lock_hpte(hp, HPTE_V_HVLOCK)) { | |
527 | if (n) | |
528 | break; | |
529 | while (!try_lock_hpte(hp, HPTE_V_HVLOCK)) | |
530 | cpu_relax(); | |
531 | } | |
532 | found = 0; | |
6f22bd32 AG |
533 | hp0 = be64_to_cpu(hp[0]); |
534 | if (hp0 & (HPTE_V_ABSENT | HPTE_V_VALID)) { | |
a92bce95 PM |
535 | switch (flags & 3) { |
536 | case 0: /* absolute */ | |
a8606e20 | 537 | found = 1; |
a92bce95 PM |
538 | break; |
539 | case 1: /* andcond */ | |
6f22bd32 | 540 | if (!(hp0 & args[j + 1])) |
a92bce95 PM |
541 | found = 1; |
542 | break; | |
543 | case 2: /* AVPN */ | |
6f22bd32 | 544 | if ((hp0 & ~0x7fUL) == args[j + 1]) |
a92bce95 PM |
545 | found = 1; |
546 | break; | |
547 | } | |
548 | } | |
549 | if (!found) { | |
6f22bd32 | 550 | hp[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); |
a92bce95 PM |
551 | args[j] = ((0x90 | flags) << 56) + pte_index; |
552 | continue; | |
a8606e20 | 553 | } |
a92bce95 PM |
554 | |
555 | args[j] = ((0x80 | flags) << 56) + pte_index; | |
556 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); | |
44e5f6be | 557 | note_hpte_modification(kvm, rev); |
a92bce95 | 558 | |
6f22bd32 | 559 | if (!(hp0 & HPTE_V_VALID)) { |
bad3b507 PM |
560 | /* insert R and C bits from PTE */ |
561 | rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); | |
562 | args[j] |= rcbits << (56 - 5); | |
51bfd299 | 563 | hp[0] = 0; |
a92bce95 | 564 | continue; |
bad3b507 | 565 | } |
a92bce95 | 566 | |
6f22bd32 AG |
567 | /* leave it locked */ |
568 | hp[0] &= ~cpu_to_be64(HPTE_V_VALID); | |
569 | tlbrb[n] = compute_tlbie_rb(be64_to_cpu(hp[0]), | |
570 | be64_to_cpu(hp[1]), pte_index); | |
a92bce95 PM |
571 | indexes[n] = j; |
572 | hptes[n] = hp; | |
573 | revs[n] = rev; | |
574 | ++n; | |
a8606e20 | 575 | } |
a92bce95 PM |
576 | |
577 | if (!n) | |
578 | break; | |
579 | ||
580 | /* Now that we've collected a batch, do the tlbies */ | |
54480501 | 581 | do_tlbies(kvm, tlbrb, n, global, true); |
a92bce95 | 582 | |
bad3b507 | 583 | /* Read PTE low words after tlbie to get final R/C values */ |
a92bce95 PM |
584 | for (k = 0; k < n; ++k) { |
585 | j = indexes[k]; | |
586 | pte_index = args[j] & ((1ul << 56) - 1); | |
587 | hp = hptes[k]; | |
588 | rev = revs[k]; | |
6f22bd32 AG |
589 | remove_revmap_chain(kvm, pte_index, rev, |
590 | be64_to_cpu(hp[0]), be64_to_cpu(hp[1])); | |
bad3b507 PM |
591 | rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); |
592 | args[j] |= rcbits << (56 - 5); | |
a4bd6eb0 | 593 | __unlock_hpte(hp, 0); |
697d3899 | 594 | } |
a8606e20 | 595 | } |
a92bce95 | 596 | |
a8606e20 PM |
597 | return ret; |
598 | } | |
599 | ||
600 | long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags, | |
601 | unsigned long pte_index, unsigned long avpn, | |
602 | unsigned long va) | |
603 | { | |
604 | struct kvm *kvm = vcpu->kvm; | |
6f22bd32 | 605 | __be64 *hpte; |
8936dda4 PM |
606 | struct revmap_entry *rev; |
607 | unsigned long v, r, rb, mask, bits; | |
6f22bd32 | 608 | u64 pte; |
a8606e20 | 609 | |
32fad281 | 610 | if (pte_index >= kvm->arch.hpt_npte) |
a8606e20 | 611 | return H_PARAMETER; |
697d3899 | 612 | |
6f22bd32 | 613 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); |
075295dd | 614 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) |
a8606e20 | 615 | cpu_relax(); |
6f22bd32 AG |
616 | pte = be64_to_cpu(hpte[0]); |
617 | if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || | |
618 | ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn)) { | |
a4bd6eb0 | 619 | __unlock_hpte(hpte, pte); |
a8606e20 PM |
620 | return H_NOT_FOUND; |
621 | } | |
697d3899 | 622 | |
6f22bd32 | 623 | v = pte; |
8936dda4 PM |
624 | bits = (flags << 55) & HPTE_R_PP0; |
625 | bits |= (flags << 48) & HPTE_R_KEY_HI; | |
626 | bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO); | |
627 | ||
628 | /* Update guest view of 2nd HPTE dword */ | |
629 | mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N | | |
630 | HPTE_R_KEY_HI | HPTE_R_KEY_LO; | |
631 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); | |
632 | if (rev) { | |
633 | r = (rev->guest_rpte & ~mask) | bits; | |
634 | rev->guest_rpte = r; | |
44e5f6be | 635 | note_hpte_modification(kvm, rev); |
8936dda4 | 636 | } |
8936dda4 PM |
637 | |
638 | /* Update HPTE */ | |
697d3899 | 639 | if (v & HPTE_V_VALID) { |
1cc8ed0b | 640 | /* |
b4a83900 PM |
641 | * If the page is valid, don't let it transition from |
642 | * readonly to writable. If it should be writable, we'll | |
643 | * take a trap and let the page fault code sort it out. | |
1cc8ed0b | 644 | */ |
b4a83900 PM |
645 | pte = be64_to_cpu(hpte[1]); |
646 | r = (pte & ~mask) | bits; | |
c17b98cf | 647 | if (hpte_is_writable(r) && !hpte_is_writable(pte)) |
b4a83900 PM |
648 | r = hpte_make_readonly(r); |
649 | /* If the PTE is changing, invalidate it first */ | |
650 | if (r != pte) { | |
651 | rb = compute_tlbie_rb(v, r, pte_index); | |
652 | hpte[0] = cpu_to_be64((v & ~HPTE_V_VALID) | | |
653 | HPTE_V_ABSENT); | |
654 | do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), | |
655 | true); | |
656 | hpte[1] = cpu_to_be64(r); | |
1cc8ed0b | 657 | } |
a8606e20 | 658 | } |
b4a83900 | 659 | unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); |
a8606e20 PM |
660 | asm volatile("ptesync" : : : "memory"); |
661 | return H_SUCCESS; | |
662 | } | |
663 | ||
a8606e20 PM |
664 | long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags, |
665 | unsigned long pte_index) | |
666 | { | |
667 | struct kvm *kvm = vcpu->kvm; | |
6f22bd32 AG |
668 | __be64 *hpte; |
669 | unsigned long v, r; | |
a8606e20 | 670 | int i, n = 1; |
8936dda4 | 671 | struct revmap_entry *rev = NULL; |
a8606e20 | 672 | |
32fad281 | 673 | if (pte_index >= kvm->arch.hpt_npte) |
a8606e20 PM |
674 | return H_PARAMETER; |
675 | if (flags & H_READ_4) { | |
676 | pte_index &= ~3; | |
677 | n = 4; | |
678 | } | |
bad3b507 | 679 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); |
a8606e20 | 680 | for (i = 0; i < n; ++i, ++pte_index) { |
6f22bd32 AG |
681 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); |
682 | v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; | |
683 | r = be64_to_cpu(hpte[1]); | |
697d3899 PM |
684 | if (v & HPTE_V_ABSENT) { |
685 | v &= ~HPTE_V_ABSENT; | |
686 | v |= HPTE_V_VALID; | |
687 | } | |
44e5f6be | 688 | if (v & HPTE_V_VALID) { |
bad3b507 | 689 | r = rev[i].guest_rpte | (r & (HPTE_R_R | HPTE_R_C)); |
44e5f6be PM |
690 | r &= ~HPTE_GR_RESERVED; |
691 | } | |
697d3899 | 692 | vcpu->arch.gpr[4 + i * 2] = v; |
a8606e20 PM |
693 | vcpu->arch.gpr[5 + i * 2] = r; |
694 | } | |
695 | return H_SUCCESS; | |
696 | } | |
697d3899 | 697 | |
cdeee518 PM |
698 | long kvmppc_h_clear_ref(struct kvm_vcpu *vcpu, unsigned long flags, |
699 | unsigned long pte_index) | |
700 | { | |
701 | struct kvm *kvm = vcpu->kvm; | |
702 | __be64 *hpte; | |
703 | unsigned long v, r, gr; | |
704 | struct revmap_entry *rev; | |
705 | unsigned long *rmap; | |
706 | long ret = H_NOT_FOUND; | |
707 | ||
708 | if (pte_index >= kvm->arch.hpt_npte) | |
709 | return H_PARAMETER; | |
710 | ||
711 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); | |
712 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); | |
713 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) | |
714 | cpu_relax(); | |
715 | v = be64_to_cpu(hpte[0]); | |
716 | r = be64_to_cpu(hpte[1]); | |
717 | if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) | |
718 | goto out; | |
719 | ||
720 | gr = rev->guest_rpte; | |
721 | if (rev->guest_rpte & HPTE_R_R) { | |
722 | rev->guest_rpte &= ~HPTE_R_R; | |
723 | note_hpte_modification(kvm, rev); | |
724 | } | |
725 | if (v & HPTE_V_VALID) { | |
726 | gr |= r & (HPTE_R_R | HPTE_R_C); | |
727 | if (r & HPTE_R_R) { | |
728 | kvmppc_clear_ref_hpte(kvm, hpte, pte_index); | |
729 | rmap = revmap_for_hpte(kvm, v, gr); | |
730 | if (rmap) { | |
731 | lock_rmap(rmap); | |
732 | *rmap |= KVMPPC_RMAP_REFERENCED; | |
733 | unlock_rmap(rmap); | |
734 | } | |
735 | } | |
736 | } | |
737 | vcpu->arch.gpr[4] = gr; | |
738 | ret = H_SUCCESS; | |
739 | out: | |
740 | unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); | |
741 | return ret; | |
742 | } | |
743 | ||
744 | long kvmppc_h_clear_mod(struct kvm_vcpu *vcpu, unsigned long flags, | |
745 | unsigned long pte_index) | |
746 | { | |
747 | struct kvm *kvm = vcpu->kvm; | |
748 | __be64 *hpte; | |
749 | unsigned long v, r, gr; | |
750 | struct revmap_entry *rev; | |
751 | unsigned long *rmap; | |
752 | long ret = H_NOT_FOUND; | |
753 | ||
754 | if (pte_index >= kvm->arch.hpt_npte) | |
755 | return H_PARAMETER; | |
756 | ||
757 | rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]); | |
758 | hpte = (__be64 *)(kvm->arch.hpt_virt + (pte_index << 4)); | |
759 | while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) | |
760 | cpu_relax(); | |
761 | v = be64_to_cpu(hpte[0]); | |
762 | r = be64_to_cpu(hpte[1]); | |
763 | if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) | |
764 | goto out; | |
765 | ||
766 | gr = rev->guest_rpte; | |
767 | if (gr & HPTE_R_C) { | |
768 | rev->guest_rpte &= ~HPTE_R_C; | |
769 | note_hpte_modification(kvm, rev); | |
770 | } | |
771 | if (v & HPTE_V_VALID) { | |
772 | /* need to make it temporarily absent so C is stable */ | |
773 | hpte[0] |= cpu_to_be64(HPTE_V_ABSENT); | |
774 | kvmppc_invalidate_hpte(kvm, hpte, pte_index); | |
775 | r = be64_to_cpu(hpte[1]); | |
776 | gr |= r & (HPTE_R_R | HPTE_R_C); | |
777 | if (r & HPTE_R_C) { | |
778 | unsigned long psize = hpte_page_size(v, r); | |
779 | hpte[1] = cpu_to_be64(r & ~HPTE_R_C); | |
780 | eieio(); | |
781 | rmap = revmap_for_hpte(kvm, v, gr); | |
782 | if (rmap) { | |
783 | lock_rmap(rmap); | |
784 | *rmap |= KVMPPC_RMAP_CHANGED; | |
785 | kvmppc_update_rmap_change(rmap, psize); | |
786 | unlock_rmap(rmap); | |
787 | } | |
788 | } | |
789 | } | |
790 | vcpu->arch.gpr[4] = gr; | |
791 | ret = H_SUCCESS; | |
792 | out: | |
793 | unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); | |
794 | return ret; | |
795 | } | |
796 | ||
6f22bd32 | 797 | void kvmppc_invalidate_hpte(struct kvm *kvm, __be64 *hptep, |
342d3db7 PM |
798 | unsigned long pte_index) |
799 | { | |
800 | unsigned long rb; | |
801 | ||
6f22bd32 AG |
802 | hptep[0] &= ~cpu_to_be64(HPTE_V_VALID); |
803 | rb = compute_tlbie_rb(be64_to_cpu(hptep[0]), be64_to_cpu(hptep[1]), | |
804 | pte_index); | |
54480501 | 805 | do_tlbies(kvm, &rb, 1, 1, true); |
342d3db7 PM |
806 | } |
807 | EXPORT_SYMBOL_GPL(kvmppc_invalidate_hpte); | |
808 | ||
6f22bd32 | 809 | void kvmppc_clear_ref_hpte(struct kvm *kvm, __be64 *hptep, |
55514893 PM |
810 | unsigned long pte_index) |
811 | { | |
812 | unsigned long rb; | |
813 | unsigned char rbyte; | |
814 | ||
6f22bd32 AG |
815 | rb = compute_tlbie_rb(be64_to_cpu(hptep[0]), be64_to_cpu(hptep[1]), |
816 | pte_index); | |
817 | rbyte = (be64_to_cpu(hptep[1]) & ~HPTE_R_R) >> 8; | |
55514893 PM |
818 | /* modify only the second-last byte, which contains the ref bit */ |
819 | *((char *)hptep + 14) = rbyte; | |
54480501 | 820 | do_tlbies(kvm, &rb, 1, 1, false); |
55514893 PM |
821 | } |
822 | EXPORT_SYMBOL_GPL(kvmppc_clear_ref_hpte); | |
823 | ||
697d3899 PM |
824 | static int slb_base_page_shift[4] = { |
825 | 24, /* 16M */ | |
826 | 16, /* 64k */ | |
827 | 34, /* 16G */ | |
828 | 20, /* 1M, unsupported */ | |
829 | }; | |
830 | ||
91648ec0 | 831 | /* When called from virtmode, this func should be protected by |
832 | * preempt_disable(), otherwise, the holding of HPTE_V_HVLOCK | |
833 | * can trigger deadlock issue. | |
834 | */ | |
697d3899 PM |
835 | long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v, |
836 | unsigned long valid) | |
837 | { | |
838 | unsigned int i; | |
839 | unsigned int pshift; | |
840 | unsigned long somask; | |
841 | unsigned long vsid, hash; | |
842 | unsigned long avpn; | |
6f22bd32 | 843 | __be64 *hpte; |
697d3899 PM |
844 | unsigned long mask, val; |
845 | unsigned long v, r; | |
846 | ||
847 | /* Get page shift, work out hash and AVPN etc. */ | |
848 | mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_SECONDARY; | |
849 | val = 0; | |
850 | pshift = 12; | |
851 | if (slb_v & SLB_VSID_L) { | |
852 | mask |= HPTE_V_LARGE; | |
853 | val |= HPTE_V_LARGE; | |
854 | pshift = slb_base_page_shift[(slb_v & SLB_VSID_LP) >> 4]; | |
855 | } | |
856 | if (slb_v & SLB_VSID_B_1T) { | |
857 | somask = (1UL << 40) - 1; | |
858 | vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T; | |
859 | vsid ^= vsid << 25; | |
860 | } else { | |
861 | somask = (1UL << 28) - 1; | |
862 | vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT; | |
863 | } | |
32fad281 | 864 | hash = (vsid ^ ((eaddr & somask) >> pshift)) & kvm->arch.hpt_mask; |
697d3899 PM |
865 | avpn = slb_v & ~(somask >> 16); /* also includes B */ |
866 | avpn |= (eaddr & somask) >> 16; | |
867 | ||
868 | if (pshift >= 24) | |
869 | avpn &= ~((1UL << (pshift - 16)) - 1); | |
870 | else | |
871 | avpn &= ~0x7fUL; | |
872 | val |= avpn; | |
873 | ||
874 | for (;;) { | |
6f22bd32 | 875 | hpte = (__be64 *)(kvm->arch.hpt_virt + (hash << 7)); |
697d3899 PM |
876 | |
877 | for (i = 0; i < 16; i += 2) { | |
878 | /* Read the PTE racily */ | |
6f22bd32 | 879 | v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; |
697d3899 PM |
880 | |
881 | /* Check valid/absent, hash, segment size and AVPN */ | |
882 | if (!(v & valid) || (v & mask) != val) | |
883 | continue; | |
884 | ||
885 | /* Lock the PTE and read it under the lock */ | |
886 | while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK)) | |
887 | cpu_relax(); | |
6f22bd32 AG |
888 | v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; |
889 | r = be64_to_cpu(hpte[i+1]); | |
697d3899 PM |
890 | |
891 | /* | |
341acbb3 | 892 | * Check the HPTE again, including base page size |
697d3899 PM |
893 | */ |
894 | if ((v & valid) && (v & mask) == val && | |
341acbb3 | 895 | hpte_base_page_size(v, r) == (1ul << pshift)) |
697d3899 PM |
896 | /* Return with the HPTE still locked */ |
897 | return (hash << 3) + (i >> 1); | |
898 | ||
a4bd6eb0 | 899 | __unlock_hpte(&hpte[i], v); |
697d3899 PM |
900 | } |
901 | ||
902 | if (val & HPTE_V_SECONDARY) | |
903 | break; | |
904 | val |= HPTE_V_SECONDARY; | |
32fad281 | 905 | hash = hash ^ kvm->arch.hpt_mask; |
697d3899 PM |
906 | } |
907 | return -1; | |
908 | } | |
909 | EXPORT_SYMBOL(kvmppc_hv_find_lock_hpte); | |
910 | ||
911 | /* | |
912 | * Called in real mode to check whether an HPTE not found fault | |
4cf302bc PM |
913 | * is due to accessing a paged-out page or an emulated MMIO page, |
914 | * or if a protection fault is due to accessing a page that the | |
915 | * guest wanted read/write access to but which we made read-only. | |
697d3899 PM |
916 | * Returns a possibly modified status (DSISR) value if not |
917 | * (i.e. pass the interrupt to the guest), | |
918 | * -1 to pass the fault up to host kernel mode code, -2 to do that | |
342d3db7 | 919 | * and also load the instruction word (for MMIO emulation), |
697d3899 PM |
920 | * or 0 if we should make the guest retry the access. |
921 | */ | |
922 | long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, unsigned long addr, | |
342d3db7 | 923 | unsigned long slb_v, unsigned int status, bool data) |
697d3899 PM |
924 | { |
925 | struct kvm *kvm = vcpu->kvm; | |
926 | long int index; | |
927 | unsigned long v, r, gr; | |
6f22bd32 | 928 | __be64 *hpte; |
697d3899 PM |
929 | unsigned long valid; |
930 | struct revmap_entry *rev; | |
931 | unsigned long pp, key; | |
932 | ||
4cf302bc PM |
933 | /* For protection fault, expect to find a valid HPTE */ |
934 | valid = HPTE_V_VALID; | |
935 | if (status & DSISR_NOHPTE) | |
936 | valid |= HPTE_V_ABSENT; | |
342d3db7 | 937 | |
697d3899 | 938 | index = kvmppc_hv_find_lock_hpte(kvm, addr, slb_v, valid); |
4cf302bc PM |
939 | if (index < 0) { |
940 | if (status & DSISR_NOHPTE) | |
941 | return status; /* there really was no HPTE */ | |
942 | return 0; /* for prot fault, HPTE disappeared */ | |
943 | } | |
6f22bd32 AG |
944 | hpte = (__be64 *)(kvm->arch.hpt_virt + (index << 4)); |
945 | v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; | |
946 | r = be64_to_cpu(hpte[1]); | |
697d3899 PM |
947 | rev = real_vmalloc_addr(&kvm->arch.revmap[index]); |
948 | gr = rev->guest_rpte; | |
949 | ||
a92bce95 | 950 | unlock_hpte(hpte, v); |
697d3899 | 951 | |
4cf302bc PM |
952 | /* For not found, if the HPTE is valid by now, retry the instruction */ |
953 | if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID)) | |
697d3899 PM |
954 | return 0; |
955 | ||
956 | /* Check access permissions to the page */ | |
957 | pp = gr & (HPTE_R_PP0 | HPTE_R_PP); | |
958 | key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; | |
342d3db7 PM |
959 | status &= ~DSISR_NOHPTE; /* DSISR_NOHPTE == SRR1_ISI_NOPT */ |
960 | if (!data) { | |
961 | if (gr & (HPTE_R_N | HPTE_R_G)) | |
962 | return status | SRR1_ISI_N_OR_G; | |
963 | if (!hpte_read_permission(pp, slb_v & key)) | |
964 | return status | SRR1_ISI_PROT; | |
965 | } else if (status & DSISR_ISSTORE) { | |
697d3899 PM |
966 | /* check write permission */ |
967 | if (!hpte_write_permission(pp, slb_v & key)) | |
342d3db7 | 968 | return status | DSISR_PROTFAULT; |
697d3899 PM |
969 | } else { |
970 | if (!hpte_read_permission(pp, slb_v & key)) | |
342d3db7 | 971 | return status | DSISR_PROTFAULT; |
697d3899 PM |
972 | } |
973 | ||
974 | /* Check storage key, if applicable */ | |
342d3db7 | 975 | if (data && (vcpu->arch.shregs.msr & MSR_DR)) { |
697d3899 PM |
976 | unsigned int perm = hpte_get_skey_perm(gr, vcpu->arch.amr); |
977 | if (status & DSISR_ISSTORE) | |
978 | perm >>= 1; | |
979 | if (perm & 1) | |
342d3db7 | 980 | return status | DSISR_KEYFAULT; |
697d3899 PM |
981 | } |
982 | ||
983 | /* Save HPTE info for virtual-mode handler */ | |
984 | vcpu->arch.pgfault_addr = addr; | |
985 | vcpu->arch.pgfault_index = index; | |
986 | vcpu->arch.pgfault_hpte[0] = v; | |
987 | vcpu->arch.pgfault_hpte[1] = r; | |
988 | ||
342d3db7 PM |
989 | /* Check the storage key to see if it is possibly emulated MMIO */ |
990 | if (data && (vcpu->arch.shregs.msr & MSR_IR) && | |
991 | (r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) == | |
992 | (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) | |
697d3899 PM |
993 | return -2; /* MMIO emulation - load instr word */ |
994 | ||
995 | return -1; /* send fault up to host kernel mode */ | |
697d3899 | 996 | } |