[deliverable/linux.git] / arch / powerpc / kvm / book3s_interrupts.S

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <asm/ppc_asm.h>
#include <asm/kvm_asm.h>
#include <asm/reg.h>
#include <asm/page.h>
#include <asm/asm-offsets.h>
#include <asm/exception-64s.h>

#if defined(CONFIG_PPC_BOOK3S_64)
#if defined(_CALL_ELF) && _CALL_ELF == 2
#define FUNC(name) 		name
#else
#define FUNC(name) 		GLUE(.,name)
#endif
#define GET_SHADOW_VCPU(reg)    addi	reg, r13, PACA_SVCPU

#elif defined(CONFIG_PPC_BOOK3S_32)
#define FUNC(name)		name
#define GET_SHADOW_VCPU(reg)	lwz     reg, (THREAD + THREAD_KVM_SVCPU)(r2)

#endif /* CONFIG_PPC_BOOK3S_XX */

#define VCPU_LOAD_NVGPRS(vcpu) \
	PPC_LL	r14, VCPU_GPR(R14)(vcpu); \
	PPC_LL	r15, VCPU_GPR(R15)(vcpu); \
	PPC_LL	r16, VCPU_GPR(R16)(vcpu); \
	PPC_LL	r17, VCPU_GPR(R17)(vcpu); \
	PPC_LL	r18, VCPU_GPR(R18)(vcpu); \
	PPC_LL	r19, VCPU_GPR(R19)(vcpu); \
	PPC_LL	r20, VCPU_GPR(R20)(vcpu); \
	PPC_LL	r21, VCPU_GPR(R21)(vcpu); \
	PPC_LL	r22, VCPU_GPR(R22)(vcpu); \
	PPC_LL	r23, VCPU_GPR(R23)(vcpu); \
	PPC_LL	r24, VCPU_GPR(R24)(vcpu); \
	PPC_LL	r25, VCPU_GPR(R25)(vcpu); \
	PPC_LL	r26, VCPU_GPR(R26)(vcpu); \
	PPC_LL	r27, VCPU_GPR(R27)(vcpu); \
	PPC_LL	r28, VCPU_GPR(R28)(vcpu); \
	PPC_LL	r29, VCPU_GPR(R29)(vcpu); \
	PPC_LL	r30, VCPU_GPR(R30)(vcpu); \
	PPC_LL	r31, VCPU_GPR(R31)(vcpu); \

/*****************************************************************************
 *                                                                           *
 *     Guest entry / exit code that is in kernel module memory (highmem)     *
 *                                                                           *
 ****************************************************************************/

/* Registers:
 *  r3: kvm_run pointer
 *  r4: vcpu pointer
 */
_GLOBAL(__kvmppc_vcpu_run)

kvm_start_entry:
	/* Write correct stack frame */
	mflr	r0
	PPC_STL	r0,PPC_LR_STKOFF(r1)

	/* Save host state to the stack */
	PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)

	/* Save r3 (kvm_run) and r4 (vcpu) */
	SAVE_2GPRS(3, r1)

	/* Save non-volatile registers (r14 - r31) */
	SAVE_NVGPRS(r1)

	/* Save CR */
	mfcr	r14
	stw	r14, _CCR(r1)

	/* Save LR */
	PPC_STL	r0, _LINK(r1)

	/* Load non-volatile guest state from the vcpu */
	VCPU_LOAD_NVGPRS(r4)

kvm_start_lightweight:
	/* Copy registers into shadow vcpu so we can access them in real mode */
	GET_SHADOW_VCPU(r3)
	bl	FUNC(kvmppc_copy_to_svcpu)
	nop
	REST_GPR(4, r1)

#ifdef CONFIG_PPC_BOOK3S_64
	/* Get the dcbz32 flag */
	PPC_LL	r3, VCPU_HFLAGS(r4)
	rldicl	r3, r3, 0, 63		/* r3 &= 1 */
	stb	r3, HSTATE_RESTORE_HID5(r13)

	/* Load up guest SPRG3 value, since it's user readable */
	lwz	r3, VCPU_SHAREDBE(r4)
	cmpwi	r3, 0
	ld	r5, VCPU_SHARED(r4)
	beq	sprg3_little_endian
sprg3_big_endian:
#ifdef __BIG_ENDIAN__
	ld	r3, VCPU_SHARED_SPRG3(r5)
#else
	addi	r5, r5, VCPU_SHARED_SPRG3
	ldbrx	r3, 0, r5
#endif
	b	after_sprg3_load
sprg3_little_endian:
#ifdef __LITTLE_ENDIAN__
	ld	r3, VCPU_SHARED_SPRG3(r5)
#else
	addi	r5, r5, VCPU_SHARED_SPRG3
	ldbrx	r3, 0, r5
#endif

after_sprg3_load:
	mtspr	SPRN_SPRG3, r3
#endif /* CONFIG_PPC_BOOK3S_64 */

	PPC_LL	r4, VCPU_SHADOW_MSR(r4)	/* get shadow_msr */

	/* Jump to segment patching handler and into our guest */
	bl	FUNC(kvmppc_entry_trampoline)
	nop

/*
 * This is the handler in module memory. It gets jumped at from the
 * lowmem trampoline code, so it's basically the guest exit code.
 *
 */

	/*
	 * Register usage at this point:
	 *
	 * R1       = host R1
	 * R2       = host R2
	 * R12      = exit handler id
	 * R13      = PACA
	 * SVCPU.*  = guest *
	 * MSR.EE   = 1
	 *
	 */

	PPC_LL	r3, GPR4(r1)		/* vcpu pointer */

	/*
	 * kvmppc_copy_from_svcpu can clobber volatile registers, save
	 * the exit handler id to the vcpu and restore it from there later.
	 */
	stw	r12, VCPU_TRAP(r3)

	/* Transfer reg values from shadow vcpu back to vcpu struct */
	/* On 64-bit, interrupts are still off at this point */

	GET_SHADOW_VCPU(r4)
	bl	FUNC(kvmppc_copy_from_svcpu)
	nop

#ifdef CONFIG_PPC_BOOK3S_64
	/*
	 * Reload kernel SPRG3 value.
	 * No need to save guest value as usermode can't modify SPRG3.
	 */
	ld	r3, PACA_SPRG_VDSO(r13)
	mtspr	SPRN_SPRG_VDSO_WRITE, r3
#endif /* CONFIG_PPC_BOOK3S_64 */

	/* R7 = vcpu */
	PPC_LL	r7, GPR4(r1)

	PPC_STL	r14, VCPU_GPR(R14)(r7)
	PPC_STL	r15, VCPU_GPR(R15)(r7)
	PPC_STL	r16, VCPU_GPR(R16)(r7)
	PPC_STL	r17, VCPU_GPR(R17)(r7)
	PPC_STL	r18, VCPU_GPR(R18)(r7)
	PPC_STL	r19, VCPU_GPR(R19)(r7)
	PPC_STL	r20, VCPU_GPR(R20)(r7)
	PPC_STL	r21, VCPU_GPR(R21)(r7)
	PPC_STL	r22, VCPU_GPR(R22)(r7)
	PPC_STL	r23, VCPU_GPR(R23)(r7)
	PPC_STL	r24, VCPU_GPR(R24)(r7)
	PPC_STL	r25, VCPU_GPR(R25)(r7)
	PPC_STL	r26, VCPU_GPR(R26)(r7)
	PPC_STL	r27, VCPU_GPR(R27)(r7)
	PPC_STL	r28, VCPU_GPR(R28)(r7)
	PPC_STL	r29, VCPU_GPR(R29)(r7)
	PPC_STL	r30, VCPU_GPR(R30)(r7)
	PPC_STL	r31, VCPU_GPR(R31)(r7)

	/* Pass the exit number as 3rd argument to kvmppc_handle_exit */
	lwz	r5, VCPU_TRAP(r7)

	/* Restore r3 (kvm_run) and r4 (vcpu) */
	REST_2GPRS(3, r1)
	bl	FUNC(kvmppc_handle_exit_pr)

	/* If RESUME_GUEST, get back in the loop */
	cmpwi	r3, RESUME_GUEST
	beq	kvm_loop_lightweight

	cmpwi	r3, RESUME_GUEST_NV
	beq	kvm_loop_heavyweight

kvm_exit_loop:

	PPC_LL	r4, _LINK(r1)
	mtlr	r4

	lwz	r14, _CCR(r1)
	mtcr	r14

	/* Restore non-volatile host registers (r14 - r31) */
	REST_NVGPRS(r1)

	addi    r1, r1, SWITCH_FRAME_SIZE
	blr

kvm_loop_heavyweight:

	PPC_LL	r4, _LINK(r1)
	PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)

	/* Load vcpu and cpu_run */
	REST_2GPRS(3, r1)

	/* Load non-volatile guest state from the vcpu */
	VCPU_LOAD_NVGPRS(r4)

	/* Jump back into the beginning of this function */
	b	kvm_start_lightweight

kvm_loop_lightweight:

	/* We'll need the vcpu pointer */
	REST_GPR(4, r1)

	/* Jump back into the beginning of this function */
	b	kvm_start_lightweight
Commit	Line	Data
29eb61bc AG	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright SUSE Linux Products GmbH 2009
	16	*
	17	* Authors: Alexander Graf <agraf@suse.de>
	18	*/
	19
	20	#include <asm/ppc_asm.h>
	21	#include <asm/kvm_asm.h>
	22	#include <asm/reg.h>
	23	#include <asm/page.h>
	24	#include <asm/asm-offsets.h>
	25	#include <asm/exception-64s.h>
	26
b79fcdf6	27	#if defined(CONFIG_PPC_BOOK3S_64)
55ab169b AG	28	#if defined(_CALL_ELF) && _CALL_ELF == 2
	29	#define FUNC(name) name
	30	#else
b79fcdf6	31	#define FUNC(name) GLUE(.,name)
55ab169b	32	#endif
a2d56020 PM	33	#define GET_SHADOW_VCPU(reg) addi reg, r13, PACA_SVCPU
a2d56020 PM	34
b79fcdf6	35	#elif defined(CONFIG_PPC_BOOK3S_32)
b79fcdf6	36	#define FUNC(name) name
a2d56020 PM	37	#define GET_SHADOW_VCPU(reg) lwz reg, (THREAD + THREAD_KVM_SVCPU)(r2)
a2d56020 PM	38
b79fcdf6 AG	39	#endif /* CONFIG_PPC_BOOK3S_XX */
b79fcdf6 AG	40
97c4cfbe	41	#define VCPU_LOAD_NVGPRS(vcpu) \
c75df6f9 MN	42	PPC_LL r14, VCPU_GPR(R14)(vcpu); \
	43	PPC_LL r15, VCPU_GPR(R15)(vcpu); \
	44	PPC_LL r16, VCPU_GPR(R16)(vcpu); \
	45	PPC_LL r17, VCPU_GPR(R17)(vcpu); \
	46	PPC_LL r18, VCPU_GPR(R18)(vcpu); \
	47	PPC_LL r19, VCPU_GPR(R19)(vcpu); \
	48	PPC_LL r20, VCPU_GPR(R20)(vcpu); \
	49	PPC_LL r21, VCPU_GPR(R21)(vcpu); \
	50	PPC_LL r22, VCPU_GPR(R22)(vcpu); \
	51	PPC_LL r23, VCPU_GPR(R23)(vcpu); \
	52	PPC_LL r24, VCPU_GPR(R24)(vcpu); \
	53	PPC_LL r25, VCPU_GPR(R25)(vcpu); \
	54	PPC_LL r26, VCPU_GPR(R26)(vcpu); \
	55	PPC_LL r27, VCPU_GPR(R27)(vcpu); \
	56	PPC_LL r28, VCPU_GPR(R28)(vcpu); \
	57	PPC_LL r29, VCPU_GPR(R29)(vcpu); \
	58	PPC_LL r30, VCPU_GPR(R30)(vcpu); \
	59	PPC_LL r31, VCPU_GPR(R31)(vcpu); \
97c4cfbe	60
29eb61bc AG	61	/*****************************************************************************
	62	* *
	63	* Guest entry / exit code that is in kernel module memory (highmem) *
	64	* *
	65	****************************************************************************/
	66
	67	/* Registers:
	68	* r3: kvm_run pointer
	69	* r4: vcpu pointer
	70	*/
df6909e5	71	_GLOBAL(__kvmppc_vcpu_run)
29eb61bc AG	72
	73	kvm_start_entry:
	74	/* Write correct stack frame */
b79fcdf6 AG	75	mflr r0
b79fcdf6 AG	76	PPC_STL r0,PPC_LR_STKOFF(r1)
29eb61bc AG	77
29eb61bc AG	78	/* Save host state to the stack */
b79fcdf6	79	PPC_STLU r1, -SWITCH_FRAME_SIZE(r1)
29eb61bc AG	80
	81	/* Save r3 (kvm_run) and r4 (vcpu) */
	82	SAVE_2GPRS(3, r1)
	83
	84	/* Save non-volatile registers (r14 - r31) */
	85	SAVE_NVGPRS(r1)
	86
e1f8acf8 AG	87	/* Save CR */
	88	mfcr r14
	89	stw r14, _CCR(r1)
	90
29eb61bc	91	/* Save LR */
b79fcdf6	92	PPC_STL r0, _LINK(r1)
97c4cfbe AG	93
	94	/* Load non-volatile guest state from the vcpu */
	95	VCPU_LOAD_NVGPRS(r4)
29eb61bc	96
3c42bf8a	97	kvm_start_lightweight:
a2d56020 PM	98	/* Copy registers into shadow vcpu so we can access them in real mode */
	99	GET_SHADOW_VCPU(r3)
	100	bl FUNC(kvmppc_copy_to_svcpu)
	101	nop
	102	REST_GPR(4, r1)
7e57cba0	103
b79fcdf6	104	#ifdef CONFIG_PPC_BOOK3S_64
a2d56020	105	/* Get the dcbz32 flag */
b79fcdf6	106	PPC_LL r3, VCPU_HFLAGS(r4)
02143947 PM	107	rldicl r3, r3, 0, 63 /* r3 &= 1 */
02143947 PM	108	stb r3, HSTATE_RESTORE_HID5(r13)
c8ae0ace PM	109
c8ae0ace PM	110	/* Load up guest SPRG3 value, since it's user readable */
5deb8e7a AG	111	lwz r3, VCPU_SHAREDBE(r4)
	112	cmpwi r3, 0
	113	ld r5, VCPU_SHARED(r4)
	114	beq sprg3_little_endian
	115	sprg3_big_endian:
	116	#ifdef __BIG_ENDIAN__
	117	ld r3, VCPU_SHARED_SPRG3(r5)
	118	#else
	119	addi r5, r5, VCPU_SHARED_SPRG3
	120	ldbrx r3, 0, r5
	121	#endif
	122	b after_sprg3_load
	123	sprg3_little_endian:
	124	#ifdef __LITTLE_ENDIAN__
	125	ld r3, VCPU_SHARED_SPRG3(r5)
	126	#else
	127	addi r5, r5, VCPU_SHARED_SPRG3
	128	ldbrx r3, 0, r5
	129	#endif
	130
	131	after_sprg3_load:
c8ae0ace	132	mtspr SPRN_SPRG3, r3
b79fcdf6 AG	133	#endif /* CONFIG_PPC_BOOK3S_64 */
b79fcdf6 AG	134
02143947	135	PPC_LL r4, VCPU_SHADOW_MSR(r4) /* get shadow_msr */
7e57cba0	136
b79fcdf6	137	/* Jump to segment patching handler and into our guest */
02143947 PM	138	bl FUNC(kvmppc_entry_trampoline)
02143947 PM	139	nop
29eb61bc AG	140
	141	/*
	142	* This is the handler in module memory. It gets jumped at from the
	143	* lowmem trampoline code, so it's basically the guest exit code.
	144	*
	145	*/
	146
29eb61bc AG	147	/*
	148	* Register usage at this point:
	149	*
b79fcdf6 AG	150	* R1 = host R1
	151	* R2 = host R2
	152	* R12 = exit handler id
	153	* R13 = PACA
	154	* SVCPU.* = guest *
3d3319b4	155	* MSR.EE = 1
29eb61bc AG	156	*
	157	*/
	158
d825a043 AG	159	PPC_LL r3, GPR4(r1) /* vcpu pointer */
	160
	161	/*
	162	* kvmppc_copy_from_svcpu can clobber volatile registers, save
	163	* the exit handler id to the vcpu and restore it from there later.
	164	*/
	165	stw r12, VCPU_TRAP(r3)
	166
a2d56020 PM	167	/* Transfer reg values from shadow vcpu back to vcpu struct */
a2d56020 PM	168	/* On 64-bit, interrupts are still off at this point */
d825a043	169
a2d56020 PM	170	GET_SHADOW_VCPU(r4)
	171	bl FUNC(kvmppc_copy_from_svcpu)
	172	nop
29eb61bc	173
c8ae0ace PM	174	#ifdef CONFIG_PPC_BOOK3S_64
	175	/*
	176	* Reload kernel SPRG3 value.
	177	* No need to save guest value as usermode can't modify SPRG3.
	178	*/
9d378dfa SW	179	ld r3, PACA_SPRG_VDSO(r13)
9d378dfa SW	180	mtspr SPRN_SPRG_VDSO_WRITE, r3
c8ae0ace PM	181	#endif /* CONFIG_PPC_BOOK3S_64 */
c8ae0ace PM	182
a2d56020 PM	183	/* R7 = vcpu */
	184	PPC_LL r7, GPR4(r1)
	185
c75df6f9 MN	186	PPC_STL r14, VCPU_GPR(R14)(r7)
	187	PPC_STL r15, VCPU_GPR(R15)(r7)
	188	PPC_STL r16, VCPU_GPR(R16)(r7)
	189	PPC_STL r17, VCPU_GPR(R17)(r7)
	190	PPC_STL r18, VCPU_GPR(R18)(r7)
	191	PPC_STL r19, VCPU_GPR(R19)(r7)
	192	PPC_STL r20, VCPU_GPR(R20)(r7)
	193	PPC_STL r21, VCPU_GPR(R21)(r7)
	194	PPC_STL r22, VCPU_GPR(R22)(r7)
	195	PPC_STL r23, VCPU_GPR(R23)(r7)
	196	PPC_STL r24, VCPU_GPR(R24)(r7)
	197	PPC_STL r25, VCPU_GPR(R25)(r7)
	198	PPC_STL r26, VCPU_GPR(R26)(r7)
	199	PPC_STL r27, VCPU_GPR(R27)(r7)
	200	PPC_STL r28, VCPU_GPR(R28)(r7)
	201	PPC_STL r29, VCPU_GPR(R29)(r7)
	202	PPC_STL r30, VCPU_GPR(R30)(r7)
	203	PPC_STL r31, VCPU_GPR(R31)(r7)
29eb61bc	204
97c4cfbe	205	/* Pass the exit number as 3rd argument to kvmppc_handle_exit */
d825a043	206	lwz r5, VCPU_TRAP(r7)
97c4cfbe	207
29eb61bc AG	208	/* Restore r3 (kvm_run) and r4 (vcpu) */
29eb61bc AG	209	REST_2GPRS(3, r1)
3a167bea	210	bl FUNC(kvmppc_handle_exit_pr)
29eb61bc	211
97c4cfbe	212	/* If RESUME_GUEST, get back in the loop */
29eb61bc	213	cmpwi r3, RESUME_GUEST
97c4cfbe	214	beq kvm_loop_lightweight
29eb61bc	215
97c4cfbe AG	216	cmpwi r3, RESUME_GUEST_NV
97c4cfbe AG	217	beq kvm_loop_heavyweight
29eb61bc	218
97c4cfbe	219	kvm_exit_loop:
29eb61bc	220
b79fcdf6	221	PPC_LL r4, _LINK(r1)
29eb61bc AG	222	mtlr r4
29eb61bc AG	223
e1f8acf8 AG	224	lwz r14, _CCR(r1)
	225	mtcr r14
	226
97c4cfbe AG	227	/* Restore non-volatile host registers (r14 - r31) */
	228	REST_NVGPRS(r1)
	229
	230	addi r1, r1, SWITCH_FRAME_SIZE
	231	blr
	232
	233	kvm_loop_heavyweight:
29eb61bc	234
b79fcdf6 AG	235	PPC_LL r4, _LINK(r1)
b79fcdf6 AG	236	PPC_STL r4, (PPC_LR_STKOFF + SWITCH_FRAME_SIZE)(r1)
97c4cfbe AG	237
97c4cfbe AG	238	/* Load vcpu and cpu_run */
29eb61bc AG	239	REST_2GPRS(3, r1)
29eb61bc AG	240
97c4cfbe AG	241	/* Load non-volatile guest state from the vcpu */
97c4cfbe AG	242	VCPU_LOAD_NVGPRS(r4)
29eb61bc	243
97c4cfbe AG	244	/* Jump back into the beginning of this function */
97c4cfbe AG	245	b kvm_start_lightweight
29eb61bc	246
97c4cfbe	247	kvm_loop_lightweight:
29eb61bc	248
97c4cfbe AG	249	/* We'll need the vcpu pointer */
	250	REST_GPR(4, r1)
	251
	252	/* Jump back into the beginning of this function */
	253	b kvm_start_lightweight