projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
KVM: PPC: Book3S: PR: Indicate we're out of guest mode
[deliverable/linux.git] / arch / powerpc / kvm / book3s_pr.c
CommitLineData
f05ed4d5
PM		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kvm_host.h>
93087948 23#include <linux/export.h>
f05ed4d5
PM		 24#include <linux/err.h>
25#include <linux/slab.h>
26
27#include <asm/reg.h>
28#include <asm/cputable.h>
29#include <asm/cacheflush.h>
30#include <asm/tlbflush.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
95327d08 36#include <asm/switch_to.h>
f05ed4d5
PM		 37#include <linux/gfp.h>
38#include <linux/sched.h>
39#include <linux/vmalloc.h>
40#include <linux/highmem.h>
41
42#include "trace.h"
43
44/* #define EXIT_DEBUG */
45/* #define DEBUG_EXT */
46
47static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
48 ulong msr);
49
50/* Some compatibility defines */
51#ifdef CONFIG_PPC_BOOK3S_32
52#define MSR_USER32 MSR_USER
53#define MSR_USER64 MSR_USER
54#define HW_PAGE_SIZE PAGE_SIZE
e371f713
AG		 55#define __hard_irq_disable local_irq_disable
56#define __hard_irq_enable local_irq_enable
f05ed4d5
PM		 57#endif
58
59void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
60{
61#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 62 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
63 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
f05ed4d5
PM		 64 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu,
65 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 66 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
67 svcpu_put(svcpu);
f05ed4d5
PM		 68#endif
69
70#ifdef CONFIG_PPC_BOOK3S_32
71 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu;
72#endif
73}
74
75void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
76{
77#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 78 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
79 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
f05ed4d5
PM		 80 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
81 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 82 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
83 svcpu_put(svcpu);
f05ed4d5
PM		 84#endif
85
86 kvmppc_giveup_ext(vcpu, MSR_FP);
87 kvmppc_giveup_ext(vcpu, MSR_VEC);
88 kvmppc_giveup_ext(vcpu, MSR_VSX);
89}
90
03d25c5b
AG		 91void kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
92{
9b0cb3c8
AG		 93 /* We misuse TLB_FLUSH to indicate that we want to clear
94 all shadow cache entries */
95 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
96 kvmppc_mmu_pte_flush(vcpu, 0, 0);
03d25c5b
AG		 97}
98
9b0cb3c8
AG		 99/************* MMU Notifiers *************/
100
101int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
102{
103 trace_kvm_unmap_hva(hva);
104
105 /*
106 * Flush all shadow tlb entries everywhere. This is slow, but
107 * we are 100% sure that we catch the to be unmapped page
108 */
109 kvm_flush_remote_tlbs(kvm);
110
111 return 0;
112}
113
114int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
115{
116 /* kvm_unmap_hva flushes everything anyways */
117 kvm_unmap_hva(kvm, start);
118
119 return 0;
120}
121
122int kvm_age_hva(struct kvm *kvm, unsigned long hva)
123{
124 /* XXX could be more clever ;) */
125 return 0;
126}
127
128int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
129{
130 /* XXX could be more clever ;) */
131 return 0;
132}
133
134void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
135{
136 /* The page will get remapped properly on its next fault */
137 kvm_unmap_hva(kvm, hva);
138}
139
140/*****************************************/
141
f05ed4d5
PM		 142static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
143{
144 ulong smsr = vcpu->arch.shared->msr;
145
146 /* Guest MSR values */
147 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE;
148 /* Process MSR values */
149 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
150 /* External providers the guest reserved */
151 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
152 /* 64-bit Process MSR values */
153#ifdef CONFIG_PPC_BOOK3S_64
154 smsr |= MSR_ISF | MSR_HV;
155#endif
156 vcpu->arch.shadow_msr = smsr;
157}
158
159void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
160{
161 ulong old_msr = vcpu->arch.shared->msr;
162
163#ifdef EXIT_DEBUG
164 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
165#endif
166
167 msr &= to_book3s(vcpu)->msr_mask;
168 vcpu->arch.shared->msr = msr;
169 kvmppc_recalc_shadow_msr(vcpu);
170
171 if (msr & MSR_POW) {
172 if (!vcpu->arch.pending_exceptions) {
173 kvm_vcpu_block(vcpu);
966cd0f3 174 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
f05ed4d5
PM		 175 vcpu->stat.halt_wakeup++;
176
177 /* Unset POW bit after we woke up */
178 msr &= ~MSR_POW;
179 vcpu->arch.shared->msr = msr;
180 }
181 }
182
183 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
184 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
185 kvmppc_mmu_flush_segments(vcpu);
186 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
187
188 /* Preload magic page segment when in kernel mode */
189 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
190 struct kvm_vcpu_arch *a = &vcpu->arch;
191
192 if (msr & MSR_DR)
193 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
194 else
195 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
196 }
197 }
198
bbcc9c06
BH		 199 /*
200 * When switching from 32 to 64-bit, we may have a stale 32-bit
201 * magic page around, we need to flush it. Typically 32-bit magic
202 * page will be instanciated when calling into RTAS. Note: We
203 * assume that such transition only happens while in kernel mode,
204 * ie, we never transition from user 32-bit to kernel 64-bit with
205 * a 32-bit magic page around.
206 */
207 if (vcpu->arch.magic_page_pa &&
208 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
209 /* going from RTAS to normal kernel code */
210 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
211 ~0xFFFUL);
212 }
213
f05ed4d5
PM		 214 /* Preload FPU if it's enabled */
215 if (vcpu->arch.shared->msr & MSR_FP)
216 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
217}
218
219void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
220{
221 u32 host_pvr;
222
223 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
224 vcpu->arch.pvr = pvr;
225#ifdef CONFIG_PPC_BOOK3S_64
226 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
227 kvmppc_mmu_book3s_64_init(vcpu);
1022fc3d
AG		 228 if (!to_book3s(vcpu)->hior_explicit)
229 to_book3s(vcpu)->hior = 0xfff00000;
f05ed4d5 230 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
af8f38b3 231 vcpu->arch.cpu_type = KVM_CPU_3S_64;
f05ed4d5
PM		 232 } else
233#endif
234 {
235 kvmppc_mmu_book3s_32_init(vcpu);
1022fc3d
AG		 236 if (!to_book3s(vcpu)->hior_explicit)
237 to_book3s(vcpu)->hior = 0;
f05ed4d5 238 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
af8f38b3 239 vcpu->arch.cpu_type = KVM_CPU_3S_32;
f05ed4d5
PM		 240 }
241
af8f38b3
AG		 242 kvmppc_sanity_check(vcpu);
243
f05ed4d5
PM		 244 /* If we are in hypervisor level on 970, we can tell the CPU to
245 * treat DCBZ as 32 bytes store */
246 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
247 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
248 !strcmp(cur_cpu_spec->platform, "ppc970"))
249 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
250
251 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
252 really needs them in a VM on Cell and force disable them. */
253 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
254 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
255
256#ifdef CONFIG_PPC_BOOK3S_32
257 /* 32 bit Book3S always has 32 byte dcbz */
258 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
259#endif
260
261 /* On some CPUs we can execute paired single operations natively */
262 asm ( "mfpvr %0" : "=r"(host_pvr));
263 switch (host_pvr) {
264 case 0x00080200: /* lonestar 2.0 */
265 case 0x00088202: /* lonestar 2.2 */
266 case 0x70000100: /* gekko 1.0 */
267 case 0x00080100: /* gekko 2.0 */
268 case 0x00083203: /* gekko 2.3a */
269 case 0x00083213: /* gekko 2.3b */
270 case 0x00083204: /* gekko 2.4 */
271 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
272 case 0x00087200: /* broadway */
273 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
274 /* Enable HID2.PSE - in case we need it later */
275 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
276 }
277}
278
279/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
280 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
281 * emulate 32 bytes dcbz length.
282 *
283 * The Book3s_64 inventors also realized this case and implemented a special bit
284 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
285 *
286 * My approach here is to patch the dcbz instruction on executing pages.
287 */
288static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
289{
290 struct page *hpage;
291 u64 hpage_offset;
292 u32 *page;
293 int i;
294
295 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
32cad84f 296 if (is_error_page(hpage))
f05ed4d5 297 return;
f05ed4d5
PM		 298
299 hpage_offset = pte->raddr & ~PAGE_MASK;
300 hpage_offset &= ~0xFFFULL;
301 hpage_offset /= 4;
302
303 get_page(hpage);
2480b208 304 page = kmap_atomic(hpage);
f05ed4d5
PM		 305
306 /* patch dcbz into reserved instruction, so we trap */
307 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
308 if ((page[i] & 0xff0007ff) == INS_DCBZ)
309 page[i] &= 0xfffffff7;
310
2480b208 311 kunmap_atomic(page);
f05ed4d5
PM		 312 put_page(hpage);
313}
314
315static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
316{
317 ulong mp_pa = vcpu->arch.magic_page_pa;
318
bbcc9c06
BH		 319 if (!(vcpu->arch.shared->msr & MSR_SF))
320 mp_pa = (uint32_t)mp_pa;
321
f05ed4d5
PM		 322 if (unlikely(mp_pa) &&
323 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
324 return 1;
325 }
326
327 return kvm_is_visible_gfn(vcpu->kvm, gfn);
328}
329
330int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
331 ulong eaddr, int vec)
332{
333 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
334 int r = RESUME_GUEST;
335 int relocated;
336 int page_found = 0;
337 struct kvmppc_pte pte;
338 bool is_mmio = false;
339 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
340 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
341 u64 vsid;
342
343 relocated = data ? dr : ir;
344
345 /* Resolve real address if translation turned on */
346 if (relocated) {
347 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data);
348 } else {
349 pte.may_execute = true;
350 pte.may_read = true;
351 pte.may_write = true;
352 pte.raddr = eaddr & KVM_PAM;
353 pte.eaddr = eaddr;
354 pte.vpage = eaddr >> 12;
355 }
356
357 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
358 case 0:
359 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
360 break;
361 case MSR_DR:
362 case MSR_IR:
363 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
364
365 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
366 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
367 else
368 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
369 pte.vpage |= vsid;
370
371 if (vsid == -1)
372 page_found = -EINVAL;
373 break;
374 }
375
376 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
377 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
378 /*
379 * If we do the dcbz hack, we have to NX on every execution,
380 * so we can patch the executing code. This renders our guest
381 * NX-less.
382 */
383 pte.may_execute = !data;
384 }
385
386 if (page_found == -ENOENT) {
387 /* Page not found in guest PTE entries */
468a12c2 388 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 389 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 390 vcpu->arch.shared->dsisr = svcpu->fault_dsisr;
f05ed4d5 391 vcpu->arch.shared->msr |=
468a12c2
AG		 392 (svcpu->shadow_srr1 & 0x00000000f8000000ULL);
393 svcpu_put(svcpu);
f05ed4d5
PM		 394 kvmppc_book3s_queue_irqprio(vcpu, vec);
395 } else if (page_found == -EPERM) {
396 /* Storage protection */
468a12c2 397 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 398 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 399 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE;
f05ed4d5
PM		 400 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
401 vcpu->arch.shared->msr |=
468a12c2
AG		 402 svcpu->shadow_srr1 & 0x00000000f8000000ULL;
403 svcpu_put(svcpu);
f05ed4d5
PM		 404 kvmppc_book3s_queue_irqprio(vcpu, vec);
405 } else if (page_found == -EINVAL) {
406 /* Page not found in guest SLB */
407 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
408 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
409 } else if (!is_mmio &&
410 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
411 /* The guest's PTE is not mapped yet. Map on the host */
412 kvmppc_mmu_map_page(vcpu, &pte);
413 if (data)
414 vcpu->stat.sp_storage++;
415 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
416 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
417 kvmppc_patch_dcbz(vcpu, &pte);
418 } else {
419 /* MMIO */
420 vcpu->stat.mmio_exits++;
421 vcpu->arch.paddr_accessed = pte.raddr;
6020c0f6 422 vcpu->arch.vaddr_accessed = pte.eaddr;
f05ed4d5
PM		 423 r = kvmppc_emulate_mmio(run, vcpu);
424 if ( r == RESUME_HOST_NV )
425 r = RESUME_HOST;
426 }
427
428 return r;
429}
430
431static inline int get_fpr_index(int i)
432{
433#ifdef CONFIG_VSX
434 i *= 2;
435#endif
436 return i;
437}
438
439/* Give up external provider (FPU, Altivec, VSX) */
440void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
441{
442 struct thread_struct *t = &current->thread;
443 u64 *vcpu_fpr = vcpu->arch.fpr;
444#ifdef CONFIG_VSX
445 u64 *vcpu_vsx = vcpu->arch.vsr;
446#endif
447 u64 *thread_fpr = (u64*)t->fpr;
448 int i;
449
450 if (!(vcpu->arch.guest_owned_ext & msr))
451 return;
452
453#ifdef DEBUG_EXT
454 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
455#endif
456
457 switch (msr) {
458 case MSR_FP:
459 giveup_fpu(current);
460 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
461 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
462
463 vcpu->arch.fpscr = t->fpscr.val;
464 break;
465 case MSR_VEC:
466#ifdef CONFIG_ALTIVEC
467 giveup_altivec(current);
468 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
469 vcpu->arch.vscr = t->vscr;
470#endif
471 break;
472 case MSR_VSX:
473#ifdef CONFIG_VSX
474 __giveup_vsx(current);
475 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
476 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
477#endif
478 break;
479 default:
480 BUG();
481 }
482
483 vcpu->arch.guest_owned_ext &= ~msr;
484 current->thread.regs->msr &= ~msr;
485 kvmppc_recalc_shadow_msr(vcpu);
486}
487
488static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
489{
490 ulong srr0 = kvmppc_get_pc(vcpu);
491 u32 last_inst = kvmppc_get_last_inst(vcpu);
492 int ret;
493
494 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
495 if (ret == -ENOENT) {
496 ulong msr = vcpu->arch.shared->msr;
497
498 msr = kvmppc_set_field(msr, 33, 33, 1);
499 msr = kvmppc_set_field(msr, 34, 36, 0);
500 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
501 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
502 return EMULATE_AGAIN;
503 }
504
505 return EMULATE_DONE;
506}
507
508static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr)
509{
510
511 /* Need to do paired single emulation? */
512 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
513 return EMULATE_DONE;
514
515 /* Read out the instruction */
516 if (kvmppc_read_inst(vcpu) == EMULATE_DONE)
517 /* Need to emulate */
518 return EMULATE_FAIL;
519
520 return EMULATE_AGAIN;
521}
522
523/* Handle external providers (FPU, Altivec, VSX) */
524static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
525 ulong msr)
526{
527 struct thread_struct *t = &current->thread;
528 u64 *vcpu_fpr = vcpu->arch.fpr;
529#ifdef CONFIG_VSX
530 u64 *vcpu_vsx = vcpu->arch.vsr;
531#endif
532 u64 *thread_fpr = (u64*)t->fpr;
533 int i;
534
535 /* When we have paired singles, we emulate in software */
536 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
537 return RESUME_GUEST;
538
539 if (!(vcpu->arch.shared->msr & msr)) {
540 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
541 return RESUME_GUEST;
542 }
543
544 /* We already own the ext */
545 if (vcpu->arch.guest_owned_ext & msr) {
546 return RESUME_GUEST;
547 }
548
549#ifdef DEBUG_EXT
550 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
551#endif
552
553 current->thread.regs->msr |= msr;
554
555 switch (msr) {
556 case MSR_FP:
557 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
558 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
559
560 t->fpscr.val = vcpu->arch.fpscr;
561 t->fpexc_mode = 0;
562 kvmppc_load_up_fpu();
563 break;
564 case MSR_VEC:
565#ifdef CONFIG_ALTIVEC
566 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
567 t->vscr = vcpu->arch.vscr;
568 t->vrsave = -1;
569 kvmppc_load_up_altivec();
570#endif
571 break;
572 case MSR_VSX:
573#ifdef CONFIG_VSX
574 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
575 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
576 kvmppc_load_up_vsx();
577#endif
578 break;
579 default:
580 BUG();
581 }
582
583 vcpu->arch.guest_owned_ext |= msr;
584
585 kvmppc_recalc_shadow_msr(vcpu);
586
587 return RESUME_GUEST;
588}
589
590int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
591 unsigned int exit_nr)
592{
593 int r = RESUME_HOST;
594
595 vcpu->stat.sum_exits++;
596
597 run->exit_reason = KVM_EXIT_UNKNOWN;
598 run->ready_for_interrupt_injection = 1;
599
3b1d9d7d
AG		 600 /* We get here with MSR.EE=0, so enable it to be a nice citizen */
601 __hard_irq_enable();
602
97c95059 603 trace_kvm_exit(exit_nr, vcpu);
706fb730 604 kvm_guest_exit();
7d82714d 605 preempt_enable();
c63ddcb4 606
f05ed4d5
PM		 607 switch (exit_nr) {
608 case BOOK3S_INTERRUPT_INST_STORAGE:
468a12c2
AG		 609 {
610 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
611 ulong shadow_srr1 = svcpu->shadow_srr1;
f05ed4d5
PM		 612 vcpu->stat.pf_instruc++;
613
614#ifdef CONFIG_PPC_BOOK3S_32
615 /* We set segments as unused segments when invalidating them. So
616 * treat the respective fault as segment fault. */
468a12c2 617 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) {
f05ed4d5
PM		 618 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
619 r = RESUME_GUEST;
468a12c2 620 svcpu_put(svcpu);
f05ed4d5
PM		 621 break;
622 }
623#endif
468a12c2 624 svcpu_put(svcpu);
f05ed4d5
PM		 625
626 /* only care about PTEG not found errors, but leave NX alone */
468a12c2 627 if (shadow_srr1 & 0x40000000) {
f05ed4d5
PM		 628 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
629 vcpu->stat.sp_instruc++;
630 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
631 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
632 /*
633 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
634 * so we can't use the NX bit inside the guest. Let's cross our fingers,
635 * that no guest that needs the dcbz hack does NX.
636 */
637 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
638 r = RESUME_GUEST;
639 } else {
468a12c2 640 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000;
f05ed4d5
PM		 641 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
642 r = RESUME_GUEST;
643 }
644 break;
468a12c2 645 }
f05ed4d5
PM		 646 case BOOK3S_INTERRUPT_DATA_STORAGE:
647 {
648 ulong dar = kvmppc_get_fault_dar(vcpu);
468a12c2
AG		 649 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
650 u32 fault_dsisr = svcpu->fault_dsisr;
f05ed4d5
PM		 651 vcpu->stat.pf_storage++;
652
653#ifdef CONFIG_PPC_BOOK3S_32
654 /* We set segments as unused segments when invalidating them. So
655 * treat the respective fault as segment fault. */
468a12c2 656 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) {
f05ed4d5
PM		 657 kvmppc_mmu_map_segment(vcpu, dar);
658 r = RESUME_GUEST;
468a12c2 659 svcpu_put(svcpu);
f05ed4d5
PM		 660 break;
661 }
662#endif
468a12c2 663 svcpu_put(svcpu);
f05ed4d5
PM		 664
665 /* The only case we need to handle is missing shadow PTEs */
468a12c2 666 if (fault_dsisr & DSISR_NOHPTE) {
f05ed4d5
PM		 667 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
668 } else {
669 vcpu->arch.shared->dar = dar;
468a12c2 670 vcpu->arch.shared->dsisr = fault_dsisr;
f05ed4d5
PM		 671 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
672 r = RESUME_GUEST;
673 }
674 break;
675 }
676 case BOOK3S_INTERRUPT_DATA_SEGMENT:
677 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
678 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
679 kvmppc_book3s_queue_irqprio(vcpu,
680 BOOK3S_INTERRUPT_DATA_SEGMENT);
681 }
682 r = RESUME_GUEST;
683 break;
684 case BOOK3S_INTERRUPT_INST_SEGMENT:
685 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
686 kvmppc_book3s_queue_irqprio(vcpu,
687 BOOK3S_INTERRUPT_INST_SEGMENT);
688 }
689 r = RESUME_GUEST;
690 break;
691 /* We're good on these - the host merely wanted to get our attention */
692 case BOOK3S_INTERRUPT_DECREMENTER:
4f225ae0 693 case BOOK3S_INTERRUPT_HV_DECREMENTER:
f05ed4d5
PM		 694 vcpu->stat.dec_exits++;
695 r = RESUME_GUEST;
696 break;
697 case BOOK3S_INTERRUPT_EXTERNAL:
4f225ae0
AG		 698 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
699 case BOOK3S_INTERRUPT_EXTERNAL_HV:
f05ed4d5
PM		 700 vcpu->stat.ext_intr_exits++;
701 r = RESUME_GUEST;
702 break;
703 case BOOK3S_INTERRUPT_PERFMON:
704 r = RESUME_GUEST;
705 break;
706 case BOOK3S_INTERRUPT_PROGRAM:
4f225ae0 707 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
f05ed4d5
PM		 708 {
709 enum emulation_result er;
468a12c2 710 struct kvmppc_book3s_shadow_vcpu *svcpu;
f05ed4d5
PM		 711 ulong flags;
712
713program_interrupt:
468a12c2
AG		 714 svcpu = svcpu_get(vcpu);
715 flags = svcpu->shadow_srr1 & 0x1f0000ull;
716 svcpu_put(svcpu);
f05ed4d5
PM		 717
718 if (vcpu->arch.shared->msr & MSR_PR) {
719#ifdef EXIT_DEBUG
720 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
721#endif
722 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) !=
723 (INS_DCBZ & 0xfffffff7)) {
724 kvmppc_core_queue_program(vcpu, flags);
725 r = RESUME_GUEST;
726 break;
727 }
728 }
729
730 vcpu->stat.emulated_inst_exits++;
731 er = kvmppc_emulate_instruction(run, vcpu);
732 switch (er) {
733 case EMULATE_DONE:
734 r = RESUME_GUEST_NV;
735 break;
736 case EMULATE_AGAIN:
737 r = RESUME_GUEST;
738 break;
739 case EMULATE_FAIL:
740 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
741 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
742 kvmppc_core_queue_program(vcpu, flags);
743 r = RESUME_GUEST;
744 break;
745 case EMULATE_DO_MMIO:
746 run->exit_reason = KVM_EXIT_MMIO;
747 r = RESUME_HOST_NV;
748 break;
749 default:
750 BUG();
751 }
752 break;
753 }
754 case BOOK3S_INTERRUPT_SYSCALL:
a668f2bd
AG		 755 if (vcpu->arch.papr_enabled &&
756 (kvmppc_get_last_inst(vcpu) == 0x44000022) &&
757 !(vcpu->arch.shared->msr & MSR_PR)) {
758 /* SC 1 papr hypercalls */
759 ulong cmd = kvmppc_get_gpr(vcpu, 3);
760 int i;
761
96f38d72 762#ifdef CONFIG_KVM_BOOK3S_64_PR
a668f2bd
AG		 763 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
764 r = RESUME_GUEST;
765 break;
766 }
96f38d72 767#endif
a668f2bd
AG		 768
769 run->papr_hcall.nr = cmd;
770 for (i = 0; i < 9; ++i) {
771 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
772 run->papr_hcall.args[i] = gpr;
773 }
774 run->exit_reason = KVM_EXIT_PAPR_HCALL;
775 vcpu->arch.hcall_needed = 1;
776 r = RESUME_HOST;
777 } else if (vcpu->arch.osi_enabled &&
f05ed4d5
PM		 778 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
779 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
780 /* MOL hypercalls */
781 u64 *gprs = run->osi.gprs;
782 int i;
783
784 run->exit_reason = KVM_EXIT_OSI;
785 for (i = 0; i < 32; i++)
786 gprs[i] = kvmppc_get_gpr(vcpu, i);
787 vcpu->arch.osi_needed = 1;
788 r = RESUME_HOST_NV;
789 } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
790 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
791 /* KVM PV hypercalls */
792 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
793 r = RESUME_GUEST;
794 } else {
795 /* Guest syscalls */
796 vcpu->stat.syscall_exits++;
797 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
798 r = RESUME_GUEST;
799 }
800 break;
801 case BOOK3S_INTERRUPT_FP_UNAVAIL:
802 case BOOK3S_INTERRUPT_ALTIVEC:
803 case BOOK3S_INTERRUPT_VSX:
804 {
805 int ext_msr = 0;
806
807 switch (exit_nr) {
808 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break;
809 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break;
810 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break;
811 }
812
813 switch (kvmppc_check_ext(vcpu, exit_nr)) {
814 case EMULATE_DONE:
815 /* everything ok - let's enable the ext */
816 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
817 break;
818 case EMULATE_FAIL:
819 /* we need to emulate this instruction */
820 goto program_interrupt;
821 break;
822 default:
823 /* nothing to worry about - go again */
824 break;
825 }
826 break;
827 }
828 case BOOK3S_INTERRUPT_ALIGNMENT:
829 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
830 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
831 kvmppc_get_last_inst(vcpu));
832 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
833 kvmppc_get_last_inst(vcpu));
834 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
835 }
836 r = RESUME_GUEST;
837 break;
838 case BOOK3S_INTERRUPT_MACHINE_CHECK:
839 case BOOK3S_INTERRUPT_TRACE:
840 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
841 r = RESUME_GUEST;
842 break;
843 default:
468a12c2
AG		 844 {
845 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
846 ulong shadow_srr1 = svcpu->shadow_srr1;
847 svcpu_put(svcpu);
f05ed4d5
PM		 848 /* Ugh - bork here! What did we get? */
849 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
468a12c2 850 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
f05ed4d5
PM		 851 r = RESUME_HOST;
852 BUG();
853 break;
854 }
468a12c2 855 }
f05ed4d5 856
592f5d87 857 preempt_disable();
f05ed4d5
PM		 858 if (!(r & RESUME_HOST)) {
859 /* To avoid clobbering exit_reason, only check for signals if
860 * we aren't already exiting to userspace for some other
861 * reason. */
e371f713
AG		 862
863 /*
864 * Interrupts could be timers for the guest which we have to
865 * inject again, so let's postpone them until we're in the guest
866 * and if we really did time things so badly, then we just exit
867 * again due to a host external interrupt.
868 */
869 __hard_irq_disable();
03d25c5b 870 if (kvmppc_prepare_to_enter(vcpu)) {
f05ed4d5
PM		 871 run->exit_reason = KVM_EXIT_INTR;
872 r = -EINTR;
f05ed4d5
PM		 873 }
874 }
875
706fb730 876 kvm_guest_enter();
f05ed4d5
PM		 877 trace_kvm_book3s_reenter(r, vcpu);
878
879 return r;
880}
881
882int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
883 struct kvm_sregs *sregs)
884{
885 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
886 int i;
887
888 sregs->pvr = vcpu->arch.pvr;
889
890 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
891 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
892 for (i = 0; i < 64; i++) {
893 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
894 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
895 }
896 } else {
897 for (i = 0; i < 16; i++)
898 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
899
900 for (i = 0; i < 8; i++) {
901 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
902 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
903 }
904 }
905
906 return 0;
907}
908
909int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
910 struct kvm_sregs *sregs)
911{
912 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
913 int i;
914
915 kvmppc_set_pvr(vcpu, sregs->pvr);
916
917 vcpu3s->sdr1 = sregs->u.s.sdr1;
918 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
919 for (i = 0; i < 64; i++) {
920 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
921 sregs->u.s.ppc64.slb[i].slbe);
922 }
923 } else {
924 for (i = 0; i < 16; i++) {
925 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
926 }
927 for (i = 0; i < 8; i++) {
928 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
929 (u32)sregs->u.s.ppc32.ibat[i]);
930 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
931 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
932 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
933 (u32)sregs->u.s.ppc32.dbat[i]);
934 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
935 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
936 }
937 }
938
939 /* Flush the MMU after messing with the segments */
940 kvmppc_mmu_pte_flush(vcpu, 0, 0);
941
942 return 0;
943}
944
31f3438e
PM		 945int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
946{
947 int r = -EINVAL;
948
949 switch (reg->id) {
950 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 951 r = copy_to_user((u64 __user *)(long)reg->addr,
952 &to_book3s(vcpu)->hior, sizeof(u64));
31f3438e
PM		 953 break;
954 default:
955 break;
956 }
957
958 return r;
959}
960
961int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
962{
963 int r = -EINVAL;
964
965 switch (reg->id) {
966 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 967 r = copy_from_user(&to_book3s(vcpu)->hior,
968 (u64 __user *)(long)reg->addr, sizeof(u64));
31f3438e
PM		 969 if (!r)
970 to_book3s(vcpu)->hior_explicit = true;
971 break;
972 default:
973 break;
974 }
975
976 return r;
977}
978
f05ed4d5
PM		 979int kvmppc_core_check_processor_compat(void)
980{
981 return 0;
982}
983
984struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
985{
986 struct kvmppc_vcpu_book3s *vcpu_book3s;
987 struct kvm_vcpu *vcpu;
988 int err = -ENOMEM;
989 unsigned long p;
990
991 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
992 if (!vcpu_book3s)
993 goto out;
994
995 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
996 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
997 if (!vcpu_book3s->shadow_vcpu)
998 goto free_vcpu;
999
1000 vcpu = &vcpu_book3s->vcpu;
1001 err = kvm_vcpu_init(vcpu, kvm, id);
1002 if (err)
1003 goto free_shadow_vcpu;
1004
1005 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1006 /* the real shared page fills the last 4k of our page */
1007 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096);
1008 if (!p)
1009 goto uninit_vcpu;
1010
f05ed4d5
PM		 1011#ifdef CONFIG_PPC_BOOK3S_64
1012 /* default to book3s_64 (970fx) */
1013 vcpu->arch.pvr = 0x3C0301;
1014#else
1015 /* default to book3s_32 (750) */
1016 vcpu->arch.pvr = 0x84202;
1017#endif
1018 kvmppc_set_pvr(vcpu, vcpu->arch.pvr);
1019 vcpu->arch.slb_nr = 64;
1020
f05ed4d5
PM		 1021 vcpu->arch.shadow_msr = MSR_USER64;
1022
1023 err = kvmppc_mmu_init(vcpu);
1024 if (err < 0)
1025 goto uninit_vcpu;
1026
1027 return vcpu;
1028
1029uninit_vcpu:
1030 kvm_vcpu_uninit(vcpu);
1031free_shadow_vcpu:
1032 kfree(vcpu_book3s->shadow_vcpu);
1033free_vcpu:
1034 vfree(vcpu_book3s);
1035out:
1036 return ERR_PTR(err);
1037}
1038
1039void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1040{
1041 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1042
1043 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1044 kvm_vcpu_uninit(vcpu);
1045 kfree(vcpu_book3s->shadow_vcpu);
1046 vfree(vcpu_book3s);
1047}
1048
df6909e5 1049int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
f05ed4d5
PM		 1050{
1051 int ret;
1052 double fpr[32][TS_FPRWIDTH];
1053 unsigned int fpscr;
1054 int fpexc_mode;
1055#ifdef CONFIG_ALTIVEC
1056 vector128 vr[32];
1057 vector128 vscr;
1058 unsigned long uninitialized_var(vrsave);
1059 int used_vr;
1060#endif
1061#ifdef CONFIG_VSX
1062 int used_vsr;
1063#endif
1064 ulong ext_msr;
1065
7d82714d
AG		 1066 preempt_disable();
1067
af8f38b3
AG		 1068 /* Check if we can run the vcpu at all */
1069 if (!vcpu->arch.sane) {
1070 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7d82714d
AG		 1071 ret = -EINVAL;
1072 goto out;
af8f38b3
AG		 1073 }
1074
e371f713
AG		 1075 /*
1076 * Interrupts could be timers for the guest which we have to inject
1077 * again, so let's postpone them until we're in the guest and if we
1078 * really did time things so badly, then we just exit again due to
1079 * a host external interrupt.
1080 */
1081 __hard_irq_disable();
03d25c5b 1082 if (kvmppc_prepare_to_enter(vcpu)) {
e371f713 1083 __hard_irq_enable();
f05ed4d5 1084 kvm_run->exit_reason = KVM_EXIT_INTR;
7d82714d
AG		 1085 ret = -EINTR;
1086 goto out;
f05ed4d5
PM		 1087 }
1088
1089 /* Save FPU state in stack */
1090 if (current->thread.regs->msr & MSR_FP)
1091 giveup_fpu(current);
1092 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
1093 fpscr = current->thread.fpscr.val;
1094 fpexc_mode = current->thread.fpexc_mode;
1095
1096#ifdef CONFIG_ALTIVEC
1097 /* Save Altivec state in stack */
1098 used_vr = current->thread.used_vr;
1099 if (used_vr) {
1100 if (current->thread.regs->msr & MSR_VEC)
1101 giveup_altivec(current);
1102 memcpy(vr, current->thread.vr, sizeof(current->thread.vr));
1103 vscr = current->thread.vscr;
1104 vrsave = current->thread.vrsave;
1105 }
1106#endif
1107
1108#ifdef CONFIG_VSX
1109 /* Save VSX state in stack */
1110 used_vsr = current->thread.used_vsr;
1111 if (used_vsr && (current->thread.regs->msr & MSR_VSX))
1112 __giveup_vsx(current);
1113#endif
1114
1115 /* Remember the MSR with disabled extensions */
1116 ext_msr = current->thread.regs->msr;
1117
f05ed4d5
PM		 1118 /* Preload FPU if it's enabled */
1119 if (vcpu->arch.shared->msr & MSR_FP)
1120 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1121
df6909e5
PM		 1122 kvm_guest_enter();
1123
1124 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1125
1126 kvm_guest_exit();
f05ed4d5 1127
f05ed4d5
PM		 1128 current->thread.regs->msr = ext_msr;
1129
1130 /* Make sure we save the guest FPU/Altivec/VSX state */
1131 kvmppc_giveup_ext(vcpu, MSR_FP);
1132 kvmppc_giveup_ext(vcpu, MSR_VEC);
1133 kvmppc_giveup_ext(vcpu, MSR_VSX);
1134
1135 /* Restore FPU state from stack */
1136 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
1137 current->thread.fpscr.val = fpscr;
1138 current->thread.fpexc_mode = fpexc_mode;
1139
1140#ifdef CONFIG_ALTIVEC
1141 /* Restore Altivec state from stack */
1142 if (used_vr && current->thread.used_vr) {
1143 memcpy(current->thread.vr, vr, sizeof(current->thread.vr));
1144 current->thread.vscr = vscr;
1145 current->thread.vrsave = vrsave;
1146 }
1147 current->thread.used_vr = used_vr;
1148#endif
1149
1150#ifdef CONFIG_VSX
1151 current->thread.used_vsr = used_vsr;
1152#endif
1153
7d82714d 1154out:
0652eaae 1155 vcpu->mode = OUTSIDE_GUEST_MODE;
7d82714d 1156 preempt_enable();
f05ed4d5
PM		 1157 return ret;
1158}
1159
82ed3616
PM		 1160/*
1161 * Get (and clear) the dirty memory log for a memory slot.
1162 */
1163int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1164 struct kvm_dirty_log *log)
1165{
1166 struct kvm_memory_slot *memslot;
1167 struct kvm_vcpu *vcpu;
1168 ulong ga, ga_end;
1169 int is_dirty = 0;
1170 int r;
1171 unsigned long n;
1172
1173 mutex_lock(&kvm->slots_lock);
1174
1175 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1176 if (r)
1177 goto out;
1178
1179 /* If nothing is dirty, don't bother messing with page tables. */
1180 if (is_dirty) {
1181 memslot = id_to_memslot(kvm->memslots, log->slot);
1182
1183 ga = memslot->base_gfn << PAGE_SHIFT;
1184 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1185
1186 kvm_for_each_vcpu(n, vcpu, kvm)
1187 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1188
1189 n = kvm_dirty_bitmap_bytes(memslot);
1190 memset(memslot->dirty_bitmap, 0, n);
1191 }
1192
1193 r = 0;
1194out:
1195 mutex_unlock(&kvm->slots_lock);
1196 return r;
1197}
1198
5b74716e
BH		 1199#ifdef CONFIG_PPC64
1200int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)
1201{
1202 /* No flags */
1203 info->flags = 0;
1204
1205 /* SLB is always 64 entries */
1206 info->slb_size = 64;
1207
1208 /* Standard 4k base page size segment */
1209 info->sps[0].page_shift = 12;
1210 info->sps[0].slb_enc = 0;
1211 info->sps[0].enc[0].page_shift = 12;
1212 info->sps[0].enc[0].pte_enc = 0;
1213
1214 /* Standard 16M large page size segment */
1215 info->sps[1].page_shift = 24;
1216 info->sps[1].slb_enc = SLB_VSID_L;
1217 info->sps[1].enc[0].page_shift = 24;
1218 info->sps[1].enc[0].pte_enc = 0;
1219
1220 return 0;
1221}
1222#endif /* CONFIG_PPC64 */
1223
f9e0554d
PM		 1224int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1225 struct kvm_userspace_memory_region *mem)
1226{
1227 return 0;
1228}
1229
1230void kvmppc_core_commit_memory_region(struct kvm *kvm,
1231 struct kvm_userspace_memory_region *mem)
1232{
1233}
1234
1235int kvmppc_core_init_vm(struct kvm *kvm)
1236{
f31e65e1
BH		 1237#ifdef CONFIG_PPC64
1238 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1239#endif
1240
f9e0554d
PM		 1241 return 0;
1242}
1243
1244void kvmppc_core_destroy_vm(struct kvm *kvm)
1245{
f31e65e1
BH		 1246#ifdef CONFIG_PPC64
1247 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1248#endif
f9e0554d
PM		 1249}
1250
f05ed4d5
PM		 1251static int kvmppc_book3s_init(void)
1252{
1253 int r;
1254
1255 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0,
1256 THIS_MODULE);
1257
1258 if (r)
1259 return r;
1260
1261 r = kvmppc_mmu_hpte_sysinit();
1262
1263 return r;
1264}
1265
1266static void kvmppc_book3s_exit(void)
1267{
1268 kvmppc_mmu_hpte_sysexit();
1269 kvm_exit();
1270}
1271
1272module_init(kvmppc_book3s_init);
1273module_exit(kvmppc_book3s_exit);
Linux kernel - Deliverables
This page took 0.147234 seconds and 5 git commands to generate.