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KVM: PPC: PR: Use generic tracepoint for guest exit
[deliverable/linux.git] / arch / powerpc / kvm / book3s_pr.c
CommitLineData
f05ed4d5
PM		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kvm_host.h>
93087948 23#include <linux/export.h>
f05ed4d5
PM		 24#include <linux/err.h>
25#include <linux/slab.h>
26
27#include <asm/reg.h>
28#include <asm/cputable.h>
29#include <asm/cacheflush.h>
30#include <asm/tlbflush.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
95327d08 36#include <asm/switch_to.h>
f05ed4d5
PM		 37#include <linux/gfp.h>
38#include <linux/sched.h>
39#include <linux/vmalloc.h>
40#include <linux/highmem.h>
41
42#include "trace.h"
43
44/* #define EXIT_DEBUG */
45/* #define DEBUG_EXT */
46
47static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
48 ulong msr);
49
50/* Some compatibility defines */
51#ifdef CONFIG_PPC_BOOK3S_32
52#define MSR_USER32 MSR_USER
53#define MSR_USER64 MSR_USER
54#define HW_PAGE_SIZE PAGE_SIZE
e371f713
AG		 55#define __hard_irq_disable local_irq_disable
56#define __hard_irq_enable local_irq_enable
f05ed4d5
PM		 57#endif
58
59void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
60{
61#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 62 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
63 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
f05ed4d5
PM		 64 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu,
65 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 66 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
67 svcpu_put(svcpu);
f05ed4d5
PM		 68#endif
69
70#ifdef CONFIG_PPC_BOOK3S_32
71 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu;
72#endif
73}
74
75void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
76{
77#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 78 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
79 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
f05ed4d5
PM		 80 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
81 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 82 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
83 svcpu_put(svcpu);
f05ed4d5
PM		 84#endif
85
86 kvmppc_giveup_ext(vcpu, MSR_FP);
87 kvmppc_giveup_ext(vcpu, MSR_VEC);
88 kvmppc_giveup_ext(vcpu, MSR_VSX);
89}
90
91static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
92{
93 ulong smsr = vcpu->arch.shared->msr;
94
95 /* Guest MSR values */
96 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE;
97 /* Process MSR values */
98 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
99 /* External providers the guest reserved */
100 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
101 /* 64-bit Process MSR values */
102#ifdef CONFIG_PPC_BOOK3S_64
103 smsr |= MSR_ISF | MSR_HV;
104#endif
105 vcpu->arch.shadow_msr = smsr;
106}
107
108void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
109{
110 ulong old_msr = vcpu->arch.shared->msr;
111
112#ifdef EXIT_DEBUG
113 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
114#endif
115
116 msr &= to_book3s(vcpu)->msr_mask;
117 vcpu->arch.shared->msr = msr;
118 kvmppc_recalc_shadow_msr(vcpu);
119
120 if (msr & MSR_POW) {
121 if (!vcpu->arch.pending_exceptions) {
122 kvm_vcpu_block(vcpu);
966cd0f3 123 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
f05ed4d5
PM		 124 vcpu->stat.halt_wakeup++;
125
126 /* Unset POW bit after we woke up */
127 msr &= ~MSR_POW;
128 vcpu->arch.shared->msr = msr;
129 }
130 }
131
132 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
133 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
134 kvmppc_mmu_flush_segments(vcpu);
135 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
136
137 /* Preload magic page segment when in kernel mode */
138 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
139 struct kvm_vcpu_arch *a = &vcpu->arch;
140
141 if (msr & MSR_DR)
142 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
143 else
144 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
145 }
146 }
147
bbcc9c06
BH		 148 /*
149 * When switching from 32 to 64-bit, we may have a stale 32-bit
150 * magic page around, we need to flush it. Typically 32-bit magic
151 * page will be instanciated when calling into RTAS. Note: We
152 * assume that such transition only happens while in kernel mode,
153 * ie, we never transition from user 32-bit to kernel 64-bit with
154 * a 32-bit magic page around.
155 */
156 if (vcpu->arch.magic_page_pa &&
157 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
158 /* going from RTAS to normal kernel code */
159 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
160 ~0xFFFUL);
161 }
162
f05ed4d5
PM		 163 /* Preload FPU if it's enabled */
164 if (vcpu->arch.shared->msr & MSR_FP)
165 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
166}
167
168void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
169{
170 u32 host_pvr;
171
172 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
173 vcpu->arch.pvr = pvr;
174#ifdef CONFIG_PPC_BOOK3S_64
175 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
176 kvmppc_mmu_book3s_64_init(vcpu);
1022fc3d
AG		 177 if (!to_book3s(vcpu)->hior_explicit)
178 to_book3s(vcpu)->hior = 0xfff00000;
f05ed4d5 179 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
af8f38b3 180 vcpu->arch.cpu_type = KVM_CPU_3S_64;
f05ed4d5
PM		 181 } else
182#endif
183 {
184 kvmppc_mmu_book3s_32_init(vcpu);
1022fc3d
AG		 185 if (!to_book3s(vcpu)->hior_explicit)
186 to_book3s(vcpu)->hior = 0;
f05ed4d5 187 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
af8f38b3 188 vcpu->arch.cpu_type = KVM_CPU_3S_32;
f05ed4d5
PM		 189 }
190
af8f38b3
AG		 191 kvmppc_sanity_check(vcpu);
192
f05ed4d5
PM		 193 /* If we are in hypervisor level on 970, we can tell the CPU to
194 * treat DCBZ as 32 bytes store */
195 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
196 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
197 !strcmp(cur_cpu_spec->platform, "ppc970"))
198 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
199
200 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
201 really needs them in a VM on Cell and force disable them. */
202 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
203 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
204
205#ifdef CONFIG_PPC_BOOK3S_32
206 /* 32 bit Book3S always has 32 byte dcbz */
207 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
208#endif
209
210 /* On some CPUs we can execute paired single operations natively */
211 asm ( "mfpvr %0" : "=r"(host_pvr));
212 switch (host_pvr) {
213 case 0x00080200: /* lonestar 2.0 */
214 case 0x00088202: /* lonestar 2.2 */
215 case 0x70000100: /* gekko 1.0 */
216 case 0x00080100: /* gekko 2.0 */
217 case 0x00083203: /* gekko 2.3a */
218 case 0x00083213: /* gekko 2.3b */
219 case 0x00083204: /* gekko 2.4 */
220 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
221 case 0x00087200: /* broadway */
222 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
223 /* Enable HID2.PSE - in case we need it later */
224 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
225 }
226}
227
228/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
229 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
230 * emulate 32 bytes dcbz length.
231 *
232 * The Book3s_64 inventors also realized this case and implemented a special bit
233 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
234 *
235 * My approach here is to patch the dcbz instruction on executing pages.
236 */
237static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
238{
239 struct page *hpage;
240 u64 hpage_offset;
241 u32 *page;
242 int i;
243
244 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
32cad84f 245 if (is_error_page(hpage))
f05ed4d5 246 return;
f05ed4d5
PM		 247
248 hpage_offset = pte->raddr & ~PAGE_MASK;
249 hpage_offset &= ~0xFFFULL;
250 hpage_offset /= 4;
251
252 get_page(hpage);
2480b208 253 page = kmap_atomic(hpage);
f05ed4d5
PM		 254
255 /* patch dcbz into reserved instruction, so we trap */
256 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
257 if ((page[i] & 0xff0007ff) == INS_DCBZ)
258 page[i] &= 0xfffffff7;
259
2480b208 260 kunmap_atomic(page);
f05ed4d5
PM		 261 put_page(hpage);
262}
263
264static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
265{
266 ulong mp_pa = vcpu->arch.magic_page_pa;
267
bbcc9c06
BH		 268 if (!(vcpu->arch.shared->msr & MSR_SF))
269 mp_pa = (uint32_t)mp_pa;
270
f05ed4d5
PM		 271 if (unlikely(mp_pa) &&
272 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
273 return 1;
274 }
275
276 return kvm_is_visible_gfn(vcpu->kvm, gfn);
277}
278
279int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
280 ulong eaddr, int vec)
281{
282 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
283 int r = RESUME_GUEST;
284 int relocated;
285 int page_found = 0;
286 struct kvmppc_pte pte;
287 bool is_mmio = false;
288 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
289 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
290 u64 vsid;
291
292 relocated = data ? dr : ir;
293
294 /* Resolve real address if translation turned on */
295 if (relocated) {
296 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data);
297 } else {
298 pte.may_execute = true;
299 pte.may_read = true;
300 pte.may_write = true;
301 pte.raddr = eaddr & KVM_PAM;
302 pte.eaddr = eaddr;
303 pte.vpage = eaddr >> 12;
304 }
305
306 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
307 case 0:
308 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
309 break;
310 case MSR_DR:
311 case MSR_IR:
312 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
313
314 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
315 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
316 else
317 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
318 pte.vpage |= vsid;
319
320 if (vsid == -1)
321 page_found = -EINVAL;
322 break;
323 }
324
325 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
326 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
327 /*
328 * If we do the dcbz hack, we have to NX on every execution,
329 * so we can patch the executing code. This renders our guest
330 * NX-less.
331 */
332 pte.may_execute = !data;
333 }
334
335 if (page_found == -ENOENT) {
336 /* Page not found in guest PTE entries */
468a12c2 337 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 338 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 339 vcpu->arch.shared->dsisr = svcpu->fault_dsisr;
f05ed4d5 340 vcpu->arch.shared->msr |=
468a12c2
AG		 341 (svcpu->shadow_srr1 & 0x00000000f8000000ULL);
342 svcpu_put(svcpu);
f05ed4d5
PM		 343 kvmppc_book3s_queue_irqprio(vcpu, vec);
344 } else if (page_found == -EPERM) {
345 /* Storage protection */
468a12c2 346 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 347 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 348 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE;
f05ed4d5
PM		 349 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
350 vcpu->arch.shared->msr |=
468a12c2
AG		 351 svcpu->shadow_srr1 & 0x00000000f8000000ULL;
352 svcpu_put(svcpu);
f05ed4d5
PM		 353 kvmppc_book3s_queue_irqprio(vcpu, vec);
354 } else if (page_found == -EINVAL) {
355 /* Page not found in guest SLB */
356 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
357 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
358 } else if (!is_mmio &&
359 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
360 /* The guest's PTE is not mapped yet. Map on the host */
361 kvmppc_mmu_map_page(vcpu, &pte);
362 if (data)
363 vcpu->stat.sp_storage++;
364 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
365 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
366 kvmppc_patch_dcbz(vcpu, &pte);
367 } else {
368 /* MMIO */
369 vcpu->stat.mmio_exits++;
370 vcpu->arch.paddr_accessed = pte.raddr;
6020c0f6 371 vcpu->arch.vaddr_accessed = pte.eaddr;
f05ed4d5
PM		 372 r = kvmppc_emulate_mmio(run, vcpu);
373 if ( r == RESUME_HOST_NV )
374 r = RESUME_HOST;
375 }
376
377 return r;
378}
379
380static inline int get_fpr_index(int i)
381{
382#ifdef CONFIG_VSX
383 i *= 2;
384#endif
385 return i;
386}
387
388/* Give up external provider (FPU, Altivec, VSX) */
389void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
390{
391 struct thread_struct *t = &current->thread;
392 u64 *vcpu_fpr = vcpu->arch.fpr;
393#ifdef CONFIG_VSX
394 u64 *vcpu_vsx = vcpu->arch.vsr;
395#endif
396 u64 *thread_fpr = (u64*)t->fpr;
397 int i;
398
399 if (!(vcpu->arch.guest_owned_ext & msr))
400 return;
401
402#ifdef DEBUG_EXT
403 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
404#endif
405
406 switch (msr) {
407 case MSR_FP:
408 giveup_fpu(current);
409 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
410 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
411
412 vcpu->arch.fpscr = t->fpscr.val;
413 break;
414 case MSR_VEC:
415#ifdef CONFIG_ALTIVEC
416 giveup_altivec(current);
417 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
418 vcpu->arch.vscr = t->vscr;
419#endif
420 break;
421 case MSR_VSX:
422#ifdef CONFIG_VSX
423 __giveup_vsx(current);
424 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
425 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
426#endif
427 break;
428 default:
429 BUG();
430 }
431
432 vcpu->arch.guest_owned_ext &= ~msr;
433 current->thread.regs->msr &= ~msr;
434 kvmppc_recalc_shadow_msr(vcpu);
435}
436
437static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
438{
439 ulong srr0 = kvmppc_get_pc(vcpu);
440 u32 last_inst = kvmppc_get_last_inst(vcpu);
441 int ret;
442
443 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
444 if (ret == -ENOENT) {
445 ulong msr = vcpu->arch.shared->msr;
446
447 msr = kvmppc_set_field(msr, 33, 33, 1);
448 msr = kvmppc_set_field(msr, 34, 36, 0);
449 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
450 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
451 return EMULATE_AGAIN;
452 }
453
454 return EMULATE_DONE;
455}
456
457static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr)
458{
459
460 /* Need to do paired single emulation? */
461 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
462 return EMULATE_DONE;
463
464 /* Read out the instruction */
465 if (kvmppc_read_inst(vcpu) == EMULATE_DONE)
466 /* Need to emulate */
467 return EMULATE_FAIL;
468
469 return EMULATE_AGAIN;
470}
471
472/* Handle external providers (FPU, Altivec, VSX) */
473static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
474 ulong msr)
475{
476 struct thread_struct *t = &current->thread;
477 u64 *vcpu_fpr = vcpu->arch.fpr;
478#ifdef CONFIG_VSX
479 u64 *vcpu_vsx = vcpu->arch.vsr;
480#endif
481 u64 *thread_fpr = (u64*)t->fpr;
482 int i;
483
484 /* When we have paired singles, we emulate in software */
485 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
486 return RESUME_GUEST;
487
488 if (!(vcpu->arch.shared->msr & msr)) {
489 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
490 return RESUME_GUEST;
491 }
492
493 /* We already own the ext */
494 if (vcpu->arch.guest_owned_ext & msr) {
495 return RESUME_GUEST;
496 }
497
498#ifdef DEBUG_EXT
499 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
500#endif
501
502 current->thread.regs->msr |= msr;
503
504 switch (msr) {
505 case MSR_FP:
506 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
507 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
508
509 t->fpscr.val = vcpu->arch.fpscr;
510 t->fpexc_mode = 0;
511 kvmppc_load_up_fpu();
512 break;
513 case MSR_VEC:
514#ifdef CONFIG_ALTIVEC
515 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
516 t->vscr = vcpu->arch.vscr;
517 t->vrsave = -1;
518 kvmppc_load_up_altivec();
519#endif
520 break;
521 case MSR_VSX:
522#ifdef CONFIG_VSX
523 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
524 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
525 kvmppc_load_up_vsx();
526#endif
527 break;
528 default:
529 BUG();
530 }
531
532 vcpu->arch.guest_owned_ext |= msr;
533
534 kvmppc_recalc_shadow_msr(vcpu);
535
536 return RESUME_GUEST;
537}
538
539int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
540 unsigned int exit_nr)
541{
542 int r = RESUME_HOST;
543
544 vcpu->stat.sum_exits++;
545
546 run->exit_reason = KVM_EXIT_UNKNOWN;
547 run->ready_for_interrupt_injection = 1;
548
3b1d9d7d
AG		 549 /* We get here with MSR.EE=0, so enable it to be a nice citizen */
550 __hard_irq_enable();
551
97c95059 552 trace_kvm_exit(exit_nr, vcpu);
7d82714d 553 preempt_enable();
f05ed4d5
PM		 554 kvm_resched(vcpu);
555 switch (exit_nr) {
556 case BOOK3S_INTERRUPT_INST_STORAGE:
468a12c2
AG		 557 {
558 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
559 ulong shadow_srr1 = svcpu->shadow_srr1;
f05ed4d5
PM		 560 vcpu->stat.pf_instruc++;
561
562#ifdef CONFIG_PPC_BOOK3S_32
563 /* We set segments as unused segments when invalidating them. So
564 * treat the respective fault as segment fault. */
468a12c2 565 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) {
f05ed4d5
PM		 566 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
567 r = RESUME_GUEST;
468a12c2 568 svcpu_put(svcpu);
f05ed4d5
PM		 569 break;
570 }
571#endif
468a12c2 572 svcpu_put(svcpu);
f05ed4d5
PM		 573
574 /* only care about PTEG not found errors, but leave NX alone */
468a12c2 575 if (shadow_srr1 & 0x40000000) {
f05ed4d5
PM		 576 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
577 vcpu->stat.sp_instruc++;
578 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
579 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
580 /*
581 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
582 * so we can't use the NX bit inside the guest. Let's cross our fingers,
583 * that no guest that needs the dcbz hack does NX.
584 */
585 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
586 r = RESUME_GUEST;
587 } else {
468a12c2 588 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000;
f05ed4d5
PM		 589 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
590 r = RESUME_GUEST;
591 }
592 break;
468a12c2 593 }
f05ed4d5
PM		 594 case BOOK3S_INTERRUPT_DATA_STORAGE:
595 {
596 ulong dar = kvmppc_get_fault_dar(vcpu);
468a12c2
AG		 597 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
598 u32 fault_dsisr = svcpu->fault_dsisr;
f05ed4d5
PM		 599 vcpu->stat.pf_storage++;
600
601#ifdef CONFIG_PPC_BOOK3S_32
602 /* We set segments as unused segments when invalidating them. So
603 * treat the respective fault as segment fault. */
468a12c2 604 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) {
f05ed4d5
PM		 605 kvmppc_mmu_map_segment(vcpu, dar);
606 r = RESUME_GUEST;
468a12c2 607 svcpu_put(svcpu);
f05ed4d5
PM		 608 break;
609 }
610#endif
468a12c2 611 svcpu_put(svcpu);
f05ed4d5
PM		 612
613 /* The only case we need to handle is missing shadow PTEs */
468a12c2 614 if (fault_dsisr & DSISR_NOHPTE) {
f05ed4d5
PM		 615 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
616 } else {
617 vcpu->arch.shared->dar = dar;
468a12c2 618 vcpu->arch.shared->dsisr = fault_dsisr;
f05ed4d5
PM		 619 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
620 r = RESUME_GUEST;
621 }
622 break;
623 }
624 case BOOK3S_INTERRUPT_DATA_SEGMENT:
625 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
626 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
627 kvmppc_book3s_queue_irqprio(vcpu,
628 BOOK3S_INTERRUPT_DATA_SEGMENT);
629 }
630 r = RESUME_GUEST;
631 break;
632 case BOOK3S_INTERRUPT_INST_SEGMENT:
633 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
634 kvmppc_book3s_queue_irqprio(vcpu,
635 BOOK3S_INTERRUPT_INST_SEGMENT);
636 }
637 r = RESUME_GUEST;
638 break;
639 /* We're good on these - the host merely wanted to get our attention */
640 case BOOK3S_INTERRUPT_DECREMENTER:
4f225ae0 641 case BOOK3S_INTERRUPT_HV_DECREMENTER:
f05ed4d5
PM		 642 vcpu->stat.dec_exits++;
643 r = RESUME_GUEST;
644 break;
645 case BOOK3S_INTERRUPT_EXTERNAL:
4f225ae0
AG		 646 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
647 case BOOK3S_INTERRUPT_EXTERNAL_HV:
f05ed4d5
PM		 648 vcpu->stat.ext_intr_exits++;
649 r = RESUME_GUEST;
650 break;
651 case BOOK3S_INTERRUPT_PERFMON:
652 r = RESUME_GUEST;
653 break;
654 case BOOK3S_INTERRUPT_PROGRAM:
4f225ae0 655 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
f05ed4d5
PM		 656 {
657 enum emulation_result er;
468a12c2 658 struct kvmppc_book3s_shadow_vcpu *svcpu;
f05ed4d5
PM		 659 ulong flags;
660
661program_interrupt:
468a12c2
AG		 662 svcpu = svcpu_get(vcpu);
663 flags = svcpu->shadow_srr1 & 0x1f0000ull;
664 svcpu_put(svcpu);
f05ed4d5
PM		 665
666 if (vcpu->arch.shared->msr & MSR_PR) {
667#ifdef EXIT_DEBUG
668 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
669#endif
670 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) !=
671 (INS_DCBZ & 0xfffffff7)) {
672 kvmppc_core_queue_program(vcpu, flags);
673 r = RESUME_GUEST;
674 break;
675 }
676 }
677
678 vcpu->stat.emulated_inst_exits++;
679 er = kvmppc_emulate_instruction(run, vcpu);
680 switch (er) {
681 case EMULATE_DONE:
682 r = RESUME_GUEST_NV;
683 break;
684 case EMULATE_AGAIN:
685 r = RESUME_GUEST;
686 break;
687 case EMULATE_FAIL:
688 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
689 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
690 kvmppc_core_queue_program(vcpu, flags);
691 r = RESUME_GUEST;
692 break;
693 case EMULATE_DO_MMIO:
694 run->exit_reason = KVM_EXIT_MMIO;
695 r = RESUME_HOST_NV;
696 break;
697 default:
698 BUG();
699 }
700 break;
701 }
702 case BOOK3S_INTERRUPT_SYSCALL:
a668f2bd
AG		 703 if (vcpu->arch.papr_enabled &&
704 (kvmppc_get_last_inst(vcpu) == 0x44000022) &&
705 !(vcpu->arch.shared->msr & MSR_PR)) {
706 /* SC 1 papr hypercalls */
707 ulong cmd = kvmppc_get_gpr(vcpu, 3);
708 int i;
709
96f38d72 710#ifdef CONFIG_KVM_BOOK3S_64_PR
a668f2bd
AG		 711 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
712 r = RESUME_GUEST;
713 break;
714 }
96f38d72 715#endif
a668f2bd
AG		 716
717 run->papr_hcall.nr = cmd;
718 for (i = 0; i < 9; ++i) {
719 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
720 run->papr_hcall.args[i] = gpr;
721 }
722 run->exit_reason = KVM_EXIT_PAPR_HCALL;
723 vcpu->arch.hcall_needed = 1;
724 r = RESUME_HOST;
725 } else if (vcpu->arch.osi_enabled &&
f05ed4d5
PM		 726 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
727 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
728 /* MOL hypercalls */
729 u64 *gprs = run->osi.gprs;
730 int i;
731
732 run->exit_reason = KVM_EXIT_OSI;
733 for (i = 0; i < 32; i++)
734 gprs[i] = kvmppc_get_gpr(vcpu, i);
735 vcpu->arch.osi_needed = 1;
736 r = RESUME_HOST_NV;
737 } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
738 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
739 /* KVM PV hypercalls */
740 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
741 r = RESUME_GUEST;
742 } else {
743 /* Guest syscalls */
744 vcpu->stat.syscall_exits++;
745 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
746 r = RESUME_GUEST;
747 }
748 break;
749 case BOOK3S_INTERRUPT_FP_UNAVAIL:
750 case BOOK3S_INTERRUPT_ALTIVEC:
751 case BOOK3S_INTERRUPT_VSX:
752 {
753 int ext_msr = 0;
754
755 switch (exit_nr) {
756 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break;
757 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break;
758 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break;
759 }
760
761 switch (kvmppc_check_ext(vcpu, exit_nr)) {
762 case EMULATE_DONE:
763 /* everything ok - let's enable the ext */
764 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
765 break;
766 case EMULATE_FAIL:
767 /* we need to emulate this instruction */
768 goto program_interrupt;
769 break;
770 default:
771 /* nothing to worry about - go again */
772 break;
773 }
774 break;
775 }
776 case BOOK3S_INTERRUPT_ALIGNMENT:
777 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
778 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
779 kvmppc_get_last_inst(vcpu));
780 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
781 kvmppc_get_last_inst(vcpu));
782 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
783 }
784 r = RESUME_GUEST;
785 break;
786 case BOOK3S_INTERRUPT_MACHINE_CHECK:
787 case BOOK3S_INTERRUPT_TRACE:
788 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
789 r = RESUME_GUEST;
790 break;
791 default:
468a12c2
AG		 792 {
793 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
794 ulong shadow_srr1 = svcpu->shadow_srr1;
795 svcpu_put(svcpu);
f05ed4d5
PM		 796 /* Ugh - bork here! What did we get? */
797 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
468a12c2 798 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
f05ed4d5
PM		 799 r = RESUME_HOST;
800 BUG();
801 break;
802 }
468a12c2 803 }
f05ed4d5 804
592f5d87 805 preempt_disable();
f05ed4d5
PM		 806 if (!(r & RESUME_HOST)) {
807 /* To avoid clobbering exit_reason, only check for signals if
808 * we aren't already exiting to userspace for some other
809 * reason. */
e371f713
AG		 810
811 /*
812 * Interrupts could be timers for the guest which we have to
813 * inject again, so let's postpone them until we're in the guest
814 * and if we really did time things so badly, then we just exit
815 * again due to a host external interrupt.
816 */
817 __hard_irq_disable();
f05ed4d5 818 if (signal_pending(current)) {
e371f713 819 __hard_irq_enable();
f05ed4d5
PM		 820#ifdef EXIT_DEBUG
821 printk(KERN_EMERG "KVM: Going back to host\n");
822#endif
823 vcpu->stat.signal_exits++;
824 run->exit_reason = KVM_EXIT_INTR;
825 r = -EINTR;
826 } else {
827 /* In case an interrupt came in that was triggered
828 * from userspace (like DEC), we need to check what
829 * to inject now! */
7e28e60e 830 kvmppc_core_prepare_to_enter(vcpu);
f05ed4d5
PM		 831 }
832 }
833
834 trace_kvm_book3s_reenter(r, vcpu);
835
836 return r;
837}
838
839int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
840 struct kvm_sregs *sregs)
841{
842 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
843 int i;
844
845 sregs->pvr = vcpu->arch.pvr;
846
847 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
848 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
849 for (i = 0; i < 64; i++) {
850 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
851 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
852 }
853 } else {
854 for (i = 0; i < 16; i++)
855 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
856
857 for (i = 0; i < 8; i++) {
858 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
859 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
860 }
861 }
862
863 return 0;
864}
865
866int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
867 struct kvm_sregs *sregs)
868{
869 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
870 int i;
871
872 kvmppc_set_pvr(vcpu, sregs->pvr);
873
874 vcpu3s->sdr1 = sregs->u.s.sdr1;
875 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
876 for (i = 0; i < 64; i++) {
877 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
878 sregs->u.s.ppc64.slb[i].slbe);
879 }
880 } else {
881 for (i = 0; i < 16; i++) {
882 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
883 }
884 for (i = 0; i < 8; i++) {
885 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
886 (u32)sregs->u.s.ppc32.ibat[i]);
887 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
888 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
889 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
890 (u32)sregs->u.s.ppc32.dbat[i]);
891 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
892 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
893 }
894 }
895
896 /* Flush the MMU after messing with the segments */
897 kvmppc_mmu_pte_flush(vcpu, 0, 0);
898
899 return 0;
900}
901
31f3438e
PM		 902int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
903{
904 int r = -EINVAL;
905
906 switch (reg->id) {
907 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 908 r = copy_to_user((u64 __user *)(long)reg->addr,
909 &to_book3s(vcpu)->hior, sizeof(u64));
31f3438e
PM		 910 break;
911 default:
912 break;
913 }
914
915 return r;
916}
917
918int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
919{
920 int r = -EINVAL;
921
922 switch (reg->id) {
923 case KVM_REG_PPC_HIOR:
b8e6f8ae
AG		 924 r = copy_from_user(&to_book3s(vcpu)->hior,
925 (u64 __user *)(long)reg->addr, sizeof(u64));
31f3438e
PM		 926 if (!r)
927 to_book3s(vcpu)->hior_explicit = true;
928 break;
929 default:
930 break;
931 }
932
933 return r;
934}
935
f05ed4d5
PM		 936int kvmppc_core_check_processor_compat(void)
937{
938 return 0;
939}
940
941struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
942{
943 struct kvmppc_vcpu_book3s *vcpu_book3s;
944 struct kvm_vcpu *vcpu;
945 int err = -ENOMEM;
946 unsigned long p;
947
948 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
949 if (!vcpu_book3s)
950 goto out;
951
952 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
953 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
954 if (!vcpu_book3s->shadow_vcpu)
955 goto free_vcpu;
956
957 vcpu = &vcpu_book3s->vcpu;
958 err = kvm_vcpu_init(vcpu, kvm, id);
959 if (err)
960 goto free_shadow_vcpu;
961
962 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
963 /* the real shared page fills the last 4k of our page */
964 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096);
965 if (!p)
966 goto uninit_vcpu;
967
f05ed4d5
PM		 968#ifdef CONFIG_PPC_BOOK3S_64
969 /* default to book3s_64 (970fx) */
970 vcpu->arch.pvr = 0x3C0301;
971#else
972 /* default to book3s_32 (750) */
973 vcpu->arch.pvr = 0x84202;
974#endif
975 kvmppc_set_pvr(vcpu, vcpu->arch.pvr);
976 vcpu->arch.slb_nr = 64;
977
f05ed4d5
PM		 978 vcpu->arch.shadow_msr = MSR_USER64;
979
980 err = kvmppc_mmu_init(vcpu);
981 if (err < 0)
982 goto uninit_vcpu;
983
984 return vcpu;
985
986uninit_vcpu:
987 kvm_vcpu_uninit(vcpu);
988free_shadow_vcpu:
989 kfree(vcpu_book3s->shadow_vcpu);
990free_vcpu:
991 vfree(vcpu_book3s);
992out:
993 return ERR_PTR(err);
994}
995
996void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
997{
998 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
999
1000 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1001 kvm_vcpu_uninit(vcpu);
1002 kfree(vcpu_book3s->shadow_vcpu);
1003 vfree(vcpu_book3s);
1004}
1005
df6909e5 1006int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
f05ed4d5
PM		 1007{
1008 int ret;
1009 double fpr[32][TS_FPRWIDTH];
1010 unsigned int fpscr;
1011 int fpexc_mode;
1012#ifdef CONFIG_ALTIVEC
1013 vector128 vr[32];
1014 vector128 vscr;
1015 unsigned long uninitialized_var(vrsave);
1016 int used_vr;
1017#endif
1018#ifdef CONFIG_VSX
1019 int used_vsr;
1020#endif
1021 ulong ext_msr;
1022
7d82714d
AG		 1023 preempt_disable();
1024
af8f38b3
AG		 1025 /* Check if we can run the vcpu at all */
1026 if (!vcpu->arch.sane) {
1027 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7d82714d
AG		 1028 ret = -EINVAL;
1029 goto out;
af8f38b3
AG		 1030 }
1031
25051b5a
SW		 1032 kvmppc_core_prepare_to_enter(vcpu);
1033
e371f713
AG		 1034 /*
1035 * Interrupts could be timers for the guest which we have to inject
1036 * again, so let's postpone them until we're in the guest and if we
1037 * really did time things so badly, then we just exit again due to
1038 * a host external interrupt.
1039 */
1040 __hard_irq_disable();
1041
f05ed4d5
PM		 1042 /* No need to go into the guest when all we do is going out */
1043 if (signal_pending(current)) {
e371f713 1044 __hard_irq_enable();
f05ed4d5 1045 kvm_run->exit_reason = KVM_EXIT_INTR;
7d82714d
AG		 1046 ret = -EINTR;
1047 goto out;
f05ed4d5
PM		 1048 }
1049
1050 /* Save FPU state in stack */
1051 if (current->thread.regs->msr & MSR_FP)
1052 giveup_fpu(current);
1053 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
1054 fpscr = current->thread.fpscr.val;
1055 fpexc_mode = current->thread.fpexc_mode;
1056
1057#ifdef CONFIG_ALTIVEC
1058 /* Save Altivec state in stack */
1059 used_vr = current->thread.used_vr;
1060 if (used_vr) {
1061 if (current->thread.regs->msr & MSR_VEC)
1062 giveup_altivec(current);
1063 memcpy(vr, current->thread.vr, sizeof(current->thread.vr));
1064 vscr = current->thread.vscr;
1065 vrsave = current->thread.vrsave;
1066 }
1067#endif
1068
1069#ifdef CONFIG_VSX
1070 /* Save VSX state in stack */
1071 used_vsr = current->thread.used_vsr;
1072 if (used_vsr && (current->thread.regs->msr & MSR_VSX))
1073 __giveup_vsx(current);
1074#endif
1075
1076 /* Remember the MSR with disabled extensions */
1077 ext_msr = current->thread.regs->msr;
1078
f05ed4d5
PM		 1079 /* Preload FPU if it's enabled */
1080 if (vcpu->arch.shared->msr & MSR_FP)
1081 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1082
df6909e5
PM		 1083 kvm_guest_enter();
1084
1085 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1086
1087 kvm_guest_exit();
f05ed4d5 1088
f05ed4d5
PM		 1089 current->thread.regs->msr = ext_msr;
1090
1091 /* Make sure we save the guest FPU/Altivec/VSX state */
1092 kvmppc_giveup_ext(vcpu, MSR_FP);
1093 kvmppc_giveup_ext(vcpu, MSR_VEC);
1094 kvmppc_giveup_ext(vcpu, MSR_VSX);
1095
1096 /* Restore FPU state from stack */
1097 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
1098 current->thread.fpscr.val = fpscr;
1099 current->thread.fpexc_mode = fpexc_mode;
1100
1101#ifdef CONFIG_ALTIVEC
1102 /* Restore Altivec state from stack */
1103 if (used_vr && current->thread.used_vr) {
1104 memcpy(current->thread.vr, vr, sizeof(current->thread.vr));
1105 current->thread.vscr = vscr;
1106 current->thread.vrsave = vrsave;
1107 }
1108 current->thread.used_vr = used_vr;
1109#endif
1110
1111#ifdef CONFIG_VSX
1112 current->thread.used_vsr = used_vsr;
1113#endif
1114
7d82714d
AG		 1115out:
1116 preempt_enable();
f05ed4d5
PM		 1117 return ret;
1118}
1119
82ed3616
PM		 1120/*
1121 * Get (and clear) the dirty memory log for a memory slot.
1122 */
1123int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1124 struct kvm_dirty_log *log)
1125{
1126 struct kvm_memory_slot *memslot;
1127 struct kvm_vcpu *vcpu;
1128 ulong ga, ga_end;
1129 int is_dirty = 0;
1130 int r;
1131 unsigned long n;
1132
1133 mutex_lock(&kvm->slots_lock);
1134
1135 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1136 if (r)
1137 goto out;
1138
1139 /* If nothing is dirty, don't bother messing with page tables. */
1140 if (is_dirty) {
1141 memslot = id_to_memslot(kvm->memslots, log->slot);
1142
1143 ga = memslot->base_gfn << PAGE_SHIFT;
1144 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1145
1146 kvm_for_each_vcpu(n, vcpu, kvm)
1147 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1148
1149 n = kvm_dirty_bitmap_bytes(memslot);
1150 memset(memslot->dirty_bitmap, 0, n);
1151 }
1152
1153 r = 0;
1154out:
1155 mutex_unlock(&kvm->slots_lock);
1156 return r;
1157}
1158
5b74716e
BH		 1159#ifdef CONFIG_PPC64
1160int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)
1161{
1162 /* No flags */
1163 info->flags = 0;
1164
1165 /* SLB is always 64 entries */
1166 info->slb_size = 64;
1167
1168 /* Standard 4k base page size segment */
1169 info->sps[0].page_shift = 12;
1170 info->sps[0].slb_enc = 0;
1171 info->sps[0].enc[0].page_shift = 12;
1172 info->sps[0].enc[0].pte_enc = 0;
1173
1174 /* Standard 16M large page size segment */
1175 info->sps[1].page_shift = 24;
1176 info->sps[1].slb_enc = SLB_VSID_L;
1177 info->sps[1].enc[0].page_shift = 24;
1178 info->sps[1].enc[0].pte_enc = 0;
1179
1180 return 0;
1181}
1182#endif /* CONFIG_PPC64 */
1183
f9e0554d
PM		 1184int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1185 struct kvm_userspace_memory_region *mem)
1186{
1187 return 0;
1188}
1189
1190void kvmppc_core_commit_memory_region(struct kvm *kvm,
1191 struct kvm_userspace_memory_region *mem)
1192{
1193}
1194
1195int kvmppc_core_init_vm(struct kvm *kvm)
1196{
f31e65e1
BH		 1197#ifdef CONFIG_PPC64
1198 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1199#endif
1200
f9e0554d
PM		 1201 return 0;
1202}
1203
1204void kvmppc_core_destroy_vm(struct kvm *kvm)
1205{
f31e65e1
BH		 1206#ifdef CONFIG_PPC64
1207 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1208#endif
f9e0554d
PM		 1209}
1210
f05ed4d5
PM		 1211static int kvmppc_book3s_init(void)
1212{
1213 int r;
1214
1215 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0,
1216 THIS_MODULE);
1217
1218 if (r)
1219 return r;
1220
1221 r = kvmppc_mmu_hpte_sysinit();
1222
1223 return r;
1224}
1225
1226static void kvmppc_book3s_exit(void)
1227{
1228 kvmppc_mmu_hpte_sysexit();
1229 kvm_exit();
1230}
1231
1232module_init(kvmppc_book3s_init);
1233module_exit(kvmppc_book3s_exit);
Linux kernel - Deliverables
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