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KVM: PPC: Book3S: Get/set guest SPRs using the GET/SET_ONE_REG interface
[deliverable/linux.git] / arch / powerpc / kvm / book3s_pr.c
CommitLineData
f05ed4d5
PM		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 * Paul Mackerras <paulus@samba.org>
8 *
9 * Description:
10 * Functions relating to running KVM on Book 3S processors where
11 * we don't have access to hypervisor mode, and we run the guest
12 * in problem state (user mode).
13 *
14 * This file is derived from arch/powerpc/kvm/44x.c,
15 * by Hollis Blanchard <hollisb@us.ibm.com>.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License, version 2, as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kvm_host.h>
93087948 23#include <linux/export.h>
f05ed4d5
PM		 24#include <linux/err.h>
25#include <linux/slab.h>
26
27#include <asm/reg.h>
28#include <asm/cputable.h>
29#include <asm/cacheflush.h>
30#include <asm/tlbflush.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
95327d08 36#include <asm/switch_to.h>
f05ed4d5
PM		 37#include <linux/gfp.h>
38#include <linux/sched.h>
39#include <linux/vmalloc.h>
40#include <linux/highmem.h>
41
42#include "trace.h"
43
44/* #define EXIT_DEBUG */
45/* #define DEBUG_EXT */
46
47static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
48 ulong msr);
49
50/* Some compatibility defines */
51#ifdef CONFIG_PPC_BOOK3S_32
52#define MSR_USER32 MSR_USER
53#define MSR_USER64 MSR_USER
54#define HW_PAGE_SIZE PAGE_SIZE
55#endif
56
57void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
58{
59#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 60 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
61 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb));
f05ed4d5
PM		 62 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu,
63 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 64 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max;
65 svcpu_put(svcpu);
f05ed4d5 66#endif
a47d72f3 67 vcpu->cpu = smp_processor_id();
f05ed4d5
PM		 68#ifdef CONFIG_PPC_BOOK3S_32
69 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu;
70#endif
71}
72
73void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
74{
75#ifdef CONFIG_PPC_BOOK3S_64
468a12c2
AG		 76 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
77 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb));
f05ed4d5
PM		 78 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu,
79 sizeof(get_paca()->shadow_vcpu));
468a12c2
AG		 80 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max;
81 svcpu_put(svcpu);
f05ed4d5
PM		 82#endif
83
84 kvmppc_giveup_ext(vcpu, MSR_FP);
85 kvmppc_giveup_ext(vcpu, MSR_VEC);
86 kvmppc_giveup_ext(vcpu, MSR_VSX);
a47d72f3 87 vcpu->cpu = -1;
f05ed4d5
PM		 88}
89
7c973a2e 90int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
03d25c5b 91{
7c973a2e
AG		 92 int r = 1; /* Indicate we want to get back into the guest */
93
9b0cb3c8
AG		 94 /* We misuse TLB_FLUSH to indicate that we want to clear
95 all shadow cache entries */
96 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
97 kvmppc_mmu_pte_flush(vcpu, 0, 0);
7c973a2e
AG		 98
99 return r;
03d25c5b
AG		 100}
101
9b0cb3c8
AG		 102/************* MMU Notifiers *************/
103
104int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
105{
106 trace_kvm_unmap_hva(hva);
107
108 /*
109 * Flush all shadow tlb entries everywhere. This is slow, but
110 * we are 100% sure that we catch the to be unmapped page
111 */
112 kvm_flush_remote_tlbs(kvm);
113
114 return 0;
115}
116
117int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
118{
119 /* kvm_unmap_hva flushes everything anyways */
120 kvm_unmap_hva(kvm, start);
121
122 return 0;
123}
124
125int kvm_age_hva(struct kvm *kvm, unsigned long hva)
126{
127 /* XXX could be more clever ;) */
128 return 0;
129}
130
131int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
132{
133 /* XXX could be more clever ;) */
134 return 0;
135}
136
137void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
138{
139 /* The page will get remapped properly on its next fault */
140 kvm_unmap_hva(kvm, hva);
141}
142
143/*****************************************/
144
f05ed4d5
PM		 145static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
146{
147 ulong smsr = vcpu->arch.shared->msr;
148
149 /* Guest MSR values */
150 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE;
151 /* Process MSR values */
152 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
153 /* External providers the guest reserved */
154 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
155 /* 64-bit Process MSR values */
156#ifdef CONFIG_PPC_BOOK3S_64
157 smsr |= MSR_ISF | MSR_HV;
158#endif
159 vcpu->arch.shadow_msr = smsr;
160}
161
162void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
163{
164 ulong old_msr = vcpu->arch.shared->msr;
165
166#ifdef EXIT_DEBUG
167 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
168#endif
169
170 msr &= to_book3s(vcpu)->msr_mask;
171 vcpu->arch.shared->msr = msr;
172 kvmppc_recalc_shadow_msr(vcpu);
173
174 if (msr & MSR_POW) {
175 if (!vcpu->arch.pending_exceptions) {
176 kvm_vcpu_block(vcpu);
966cd0f3 177 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
f05ed4d5
PM		 178 vcpu->stat.halt_wakeup++;
179
180 /* Unset POW bit after we woke up */
181 msr &= ~MSR_POW;
182 vcpu->arch.shared->msr = msr;
183 }
184 }
185
186 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
187 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
188 kvmppc_mmu_flush_segments(vcpu);
189 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
190
191 /* Preload magic page segment when in kernel mode */
192 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
193 struct kvm_vcpu_arch *a = &vcpu->arch;
194
195 if (msr & MSR_DR)
196 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
197 else
198 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
199 }
200 }
201
bbcc9c06
BH		 202 /*
203 * When switching from 32 to 64-bit, we may have a stale 32-bit
204 * magic page around, we need to flush it. Typically 32-bit magic
205 * page will be instanciated when calling into RTAS. Note: We
206 * assume that such transition only happens while in kernel mode,
207 * ie, we never transition from user 32-bit to kernel 64-bit with
208 * a 32-bit magic page around.
209 */
210 if (vcpu->arch.magic_page_pa &&
211 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) {
212 /* going from RTAS to normal kernel code */
213 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa,
214 ~0xFFFUL);
215 }
216
f05ed4d5
PM		 217 /* Preload FPU if it's enabled */
218 if (vcpu->arch.shared->msr & MSR_FP)
219 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
220}
221
222void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
223{
224 u32 host_pvr;
225
226 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB;
227 vcpu->arch.pvr = pvr;
228#ifdef CONFIG_PPC_BOOK3S_64
229 if ((pvr >= 0x330000) && (pvr < 0x70330000)) {
230 kvmppc_mmu_book3s_64_init(vcpu);
1022fc3d
AG		 231 if (!to_book3s(vcpu)->hior_explicit)
232 to_book3s(vcpu)->hior = 0xfff00000;
f05ed4d5 233 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL;
af8f38b3 234 vcpu->arch.cpu_type = KVM_CPU_3S_64;
f05ed4d5
PM		 235 } else
236#endif
237 {
238 kvmppc_mmu_book3s_32_init(vcpu);
1022fc3d
AG		 239 if (!to_book3s(vcpu)->hior_explicit)
240 to_book3s(vcpu)->hior = 0;
f05ed4d5 241 to_book3s(vcpu)->msr_mask = 0xffffffffULL;
af8f38b3 242 vcpu->arch.cpu_type = KVM_CPU_3S_32;
f05ed4d5
PM		 243 }
244
af8f38b3
AG		 245 kvmppc_sanity_check(vcpu);
246
f05ed4d5
PM		 247 /* If we are in hypervisor level on 970, we can tell the CPU to
248 * treat DCBZ as 32 bytes store */
249 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32;
250 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) &&
251 !strcmp(cur_cpu_spec->platform, "ppc970"))
252 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
253
254 /* Cell performs badly if MSR_FEx are set. So let's hope nobody
255 really needs them in a VM on Cell and force disable them. */
256 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be"))
257 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);
258
259#ifdef CONFIG_PPC_BOOK3S_32
260 /* 32 bit Book3S always has 32 byte dcbz */
261 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
262#endif
263
264 /* On some CPUs we can execute paired single operations natively */
265 asm ( "mfpvr %0" : "=r"(host_pvr));
266 switch (host_pvr) {
267 case 0x00080200: /* lonestar 2.0 */
268 case 0x00088202: /* lonestar 2.2 */
269 case 0x70000100: /* gekko 1.0 */
270 case 0x00080100: /* gekko 2.0 */
271 case 0x00083203: /* gekko 2.3a */
272 case 0x00083213: /* gekko 2.3b */
273 case 0x00083204: /* gekko 2.4 */
274 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
275 case 0x00087200: /* broadway */
276 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS;
277 /* Enable HID2.PSE - in case we need it later */
278 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29));
279 }
280}
281
282/* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
283 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
284 * emulate 32 bytes dcbz length.
285 *
286 * The Book3s_64 inventors also realized this case and implemented a special bit
287 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it.
288 *
289 * My approach here is to patch the dcbz instruction on executing pages.
290 */
291static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
292{
293 struct page *hpage;
294 u64 hpage_offset;
295 u32 *page;
296 int i;
297
298 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
32cad84f 299 if (is_error_page(hpage))
f05ed4d5 300 return;
f05ed4d5
PM		 301
302 hpage_offset = pte->raddr & ~PAGE_MASK;
303 hpage_offset &= ~0xFFFULL;
304 hpage_offset /= 4;
305
306 get_page(hpage);
2480b208 307 page = kmap_atomic(hpage);
f05ed4d5
PM		 308
309 /* patch dcbz into reserved instruction, so we trap */
310 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++)
311 if ((page[i] & 0xff0007ff) == INS_DCBZ)
312 page[i] &= 0xfffffff7;
313
2480b208 314 kunmap_atomic(page);
f05ed4d5
PM		 315 put_page(hpage);
316}
317
318static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
319{
320 ulong mp_pa = vcpu->arch.magic_page_pa;
321
bbcc9c06
BH		 322 if (!(vcpu->arch.shared->msr & MSR_SF))
323 mp_pa = (uint32_t)mp_pa;
324
f05ed4d5
PM		 325 if (unlikely(mp_pa) &&
326 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
327 return 1;
328 }
329
330 return kvm_is_visible_gfn(vcpu->kvm, gfn);
331}
332
333int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
334 ulong eaddr, int vec)
335{
336 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE);
337 int r = RESUME_GUEST;
338 int relocated;
339 int page_found = 0;
340 struct kvmppc_pte pte;
341 bool is_mmio = false;
342 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
343 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
344 u64 vsid;
345
346 relocated = data ? dr : ir;
347
348 /* Resolve real address if translation turned on */
349 if (relocated) {
350 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data);
351 } else {
352 pte.may_execute = true;
353 pte.may_read = true;
354 pte.may_write = true;
355 pte.raddr = eaddr & KVM_PAM;
356 pte.eaddr = eaddr;
357 pte.vpage = eaddr >> 12;
358 }
359
360 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
361 case 0:
362 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
363 break;
364 case MSR_DR:
365 case MSR_IR:
366 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
367
368 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
369 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
370 else
371 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
372 pte.vpage |= vsid;
373
374 if (vsid == -1)
375 page_found = -EINVAL;
376 break;
377 }
378
379 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
380 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
381 /*
382 * If we do the dcbz hack, we have to NX on every execution,
383 * so we can patch the executing code. This renders our guest
384 * NX-less.
385 */
386 pte.may_execute = !data;
387 }
388
389 if (page_found == -ENOENT) {
390 /* Page not found in guest PTE entries */
468a12c2 391 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 392 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 393 vcpu->arch.shared->dsisr = svcpu->fault_dsisr;
f05ed4d5 394 vcpu->arch.shared->msr |=
468a12c2
AG		 395 (svcpu->shadow_srr1 & 0x00000000f8000000ULL);
396 svcpu_put(svcpu);
f05ed4d5
PM		 397 kvmppc_book3s_queue_irqprio(vcpu, vec);
398 } else if (page_found == -EPERM) {
399 /* Storage protection */
468a12c2 400 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
f05ed4d5 401 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
468a12c2 402 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE;
f05ed4d5
PM		 403 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
404 vcpu->arch.shared->msr |=
468a12c2
AG		 405 svcpu->shadow_srr1 & 0x00000000f8000000ULL;
406 svcpu_put(svcpu);
f05ed4d5
PM		 407 kvmppc_book3s_queue_irqprio(vcpu, vec);
408 } else if (page_found == -EINVAL) {
409 /* Page not found in guest SLB */
410 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
411 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
412 } else if (!is_mmio &&
413 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
414 /* The guest's PTE is not mapped yet. Map on the host */
415 kvmppc_mmu_map_page(vcpu, &pte);
416 if (data)
417 vcpu->stat.sp_storage++;
418 else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
419 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32)))
420 kvmppc_patch_dcbz(vcpu, &pte);
421 } else {
422 /* MMIO */
423 vcpu->stat.mmio_exits++;
424 vcpu->arch.paddr_accessed = pte.raddr;
6020c0f6 425 vcpu->arch.vaddr_accessed = pte.eaddr;
f05ed4d5
PM		 426 r = kvmppc_emulate_mmio(run, vcpu);
427 if ( r == RESUME_HOST_NV )
428 r = RESUME_HOST;
429 }
430
431 return r;
432}
433
434static inline int get_fpr_index(int i)
435{
436#ifdef CONFIG_VSX
437 i *= 2;
438#endif
439 return i;
440}
441
442/* Give up external provider (FPU, Altivec, VSX) */
443void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
444{
445 struct thread_struct *t = &current->thread;
446 u64 *vcpu_fpr = vcpu->arch.fpr;
447#ifdef CONFIG_VSX
448 u64 *vcpu_vsx = vcpu->arch.vsr;
449#endif
450 u64 *thread_fpr = (u64*)t->fpr;
451 int i;
452
453 if (!(vcpu->arch.guest_owned_ext & msr))
454 return;
455
456#ifdef DEBUG_EXT
457 printk(KERN_INFO "Giving up ext 0x%lx\n", msr);
458#endif
459
460 switch (msr) {
461 case MSR_FP:
462 giveup_fpu(current);
463 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
464 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)];
465
466 vcpu->arch.fpscr = t->fpscr.val;
467 break;
468 case MSR_VEC:
469#ifdef CONFIG_ALTIVEC
470 giveup_altivec(current);
471 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr));
472 vcpu->arch.vscr = t->vscr;
473#endif
474 break;
475 case MSR_VSX:
476#ifdef CONFIG_VSX
477 __giveup_vsx(current);
478 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
479 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1];
480#endif
481 break;
482 default:
483 BUG();
484 }
485
486 vcpu->arch.guest_owned_ext &= ~msr;
487 current->thread.regs->msr &= ~msr;
488 kvmppc_recalc_shadow_msr(vcpu);
489}
490
491static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
492{
493 ulong srr0 = kvmppc_get_pc(vcpu);
494 u32 last_inst = kvmppc_get_last_inst(vcpu);
495 int ret;
496
497 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
498 if (ret == -ENOENT) {
499 ulong msr = vcpu->arch.shared->msr;
500
501 msr = kvmppc_set_field(msr, 33, 33, 1);
502 msr = kvmppc_set_field(msr, 34, 36, 0);
503 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
504 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
505 return EMULATE_AGAIN;
506 }
507
508 return EMULATE_DONE;
509}
510
511static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr)
512{
513
514 /* Need to do paired single emulation? */
515 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
516 return EMULATE_DONE;
517
518 /* Read out the instruction */
519 if (kvmppc_read_inst(vcpu) == EMULATE_DONE)
520 /* Need to emulate */
521 return EMULATE_FAIL;
522
523 return EMULATE_AGAIN;
524}
525
526/* Handle external providers (FPU, Altivec, VSX) */
527static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
528 ulong msr)
529{
530 struct thread_struct *t = &current->thread;
531 u64 *vcpu_fpr = vcpu->arch.fpr;
532#ifdef CONFIG_VSX
533 u64 *vcpu_vsx = vcpu->arch.vsr;
534#endif
535 u64 *thread_fpr = (u64*)t->fpr;
536 int i;
537
538 /* When we have paired singles, we emulate in software */
539 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
540 return RESUME_GUEST;
541
542 if (!(vcpu->arch.shared->msr & msr)) {
543 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
544 return RESUME_GUEST;
545 }
546
547 /* We already own the ext */
548 if (vcpu->arch.guest_owned_ext & msr) {
549 return RESUME_GUEST;
550 }
551
552#ifdef DEBUG_EXT
553 printk(KERN_INFO "Loading up ext 0x%lx\n", msr);
554#endif
555
556 current->thread.regs->msr |= msr;
557
558 switch (msr) {
559 case MSR_FP:
560 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++)
561 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i];
562
563 t->fpscr.val = vcpu->arch.fpscr;
564 t->fpexc_mode = 0;
565 kvmppc_load_up_fpu();
566 break;
567 case MSR_VEC:
568#ifdef CONFIG_ALTIVEC
569 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr));
570 t->vscr = vcpu->arch.vscr;
571 t->vrsave = -1;
572 kvmppc_load_up_altivec();
573#endif
574 break;
575 case MSR_VSX:
576#ifdef CONFIG_VSX
577 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr); i++)
578 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i];
579 kvmppc_load_up_vsx();
580#endif
581 break;
582 default:
583 BUG();
584 }
585
586 vcpu->arch.guest_owned_ext |= msr;
587
588 kvmppc_recalc_shadow_msr(vcpu);
589
590 return RESUME_GUEST;
591}
592
593int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
594 unsigned int exit_nr)
595{
596 int r = RESUME_HOST;
7ee78855 597 int s;
f05ed4d5
PM		 598
599 vcpu->stat.sum_exits++;
600
601 run->exit_reason = KVM_EXIT_UNKNOWN;
602 run->ready_for_interrupt_injection = 1;
603
bd2be683 604 /* We get here with MSR.EE=1 */
3b1d9d7d 605
97c95059 606 trace_kvm_exit(exit_nr, vcpu);
706fb730 607 kvm_guest_exit();
c63ddcb4 608
f05ed4d5
PM		 609 switch (exit_nr) {
610 case BOOK3S_INTERRUPT_INST_STORAGE:
468a12c2
AG		 611 {
612 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
613 ulong shadow_srr1 = svcpu->shadow_srr1;
f05ed4d5
PM		 614 vcpu->stat.pf_instruc++;
615
616#ifdef CONFIG_PPC_BOOK3S_32
617 /* We set segments as unused segments when invalidating them. So
618 * treat the respective fault as segment fault. */
468a12c2 619 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) {
f05ed4d5
PM		 620 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
621 r = RESUME_GUEST;
468a12c2 622 svcpu_put(svcpu);
f05ed4d5
PM		 623 break;
624 }
625#endif
468a12c2 626 svcpu_put(svcpu);
f05ed4d5
PM		 627
628 /* only care about PTEG not found errors, but leave NX alone */
468a12c2 629 if (shadow_srr1 & 0x40000000) {
f05ed4d5
PM		 630 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr);
631 vcpu->stat.sp_instruc++;
632 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
633 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) {
634 /*
635 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page,
636 * so we can't use the NX bit inside the guest. Let's cross our fingers,
637 * that no guest that needs the dcbz hack does NX.
638 */
639 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
640 r = RESUME_GUEST;
641 } else {
468a12c2 642 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000;
f05ed4d5
PM		 643 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
644 r = RESUME_GUEST;
645 }
646 break;
468a12c2 647 }
f05ed4d5
PM		 648 case BOOK3S_INTERRUPT_DATA_STORAGE:
649 {
650 ulong dar = kvmppc_get_fault_dar(vcpu);
468a12c2
AG		 651 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
652 u32 fault_dsisr = svcpu->fault_dsisr;
f05ed4d5
PM		 653 vcpu->stat.pf_storage++;
654
655#ifdef CONFIG_PPC_BOOK3S_32
656 /* We set segments as unused segments when invalidating them. So
657 * treat the respective fault as segment fault. */
468a12c2 658 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) {
f05ed4d5
PM		 659 kvmppc_mmu_map_segment(vcpu, dar);
660 r = RESUME_GUEST;
468a12c2 661 svcpu_put(svcpu);
f05ed4d5
PM		 662 break;
663 }
664#endif
468a12c2 665 svcpu_put(svcpu);
f05ed4d5
PM		 666
667 /* The only case we need to handle is missing shadow PTEs */
468a12c2 668 if (fault_dsisr & DSISR_NOHPTE) {
f05ed4d5
PM		 669 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
670 } else {
671 vcpu->arch.shared->dar = dar;
468a12c2 672 vcpu->arch.shared->dsisr = fault_dsisr;
f05ed4d5
PM		 673 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
674 r = RESUME_GUEST;
675 }
676 break;
677 }
678 case BOOK3S_INTERRUPT_DATA_SEGMENT:
679 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
680 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
681 kvmppc_book3s_queue_irqprio(vcpu,
682 BOOK3S_INTERRUPT_DATA_SEGMENT);
683 }
684 r = RESUME_GUEST;
685 break;
686 case BOOK3S_INTERRUPT_INST_SEGMENT:
687 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) {
688 kvmppc_book3s_queue_irqprio(vcpu,
689 BOOK3S_INTERRUPT_INST_SEGMENT);
690 }
691 r = RESUME_GUEST;
692 break;
693 /* We're good on these - the host merely wanted to get our attention */
694 case BOOK3S_INTERRUPT_DECREMENTER:
4f225ae0 695 case BOOK3S_INTERRUPT_HV_DECREMENTER:
f05ed4d5
PM		 696 vcpu->stat.dec_exits++;
697 r = RESUME_GUEST;
698 break;
699 case BOOK3S_INTERRUPT_EXTERNAL:
4f225ae0
AG		 700 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL:
701 case BOOK3S_INTERRUPT_EXTERNAL_HV:
f05ed4d5
PM		 702 vcpu->stat.ext_intr_exits++;
703 r = RESUME_GUEST;
704 break;
705 case BOOK3S_INTERRUPT_PERFMON:
706 r = RESUME_GUEST;
707 break;
708 case BOOK3S_INTERRUPT_PROGRAM:
4f225ae0 709 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
f05ed4d5
PM		 710 {
711 enum emulation_result er;
468a12c2 712 struct kvmppc_book3s_shadow_vcpu *svcpu;
f05ed4d5
PM		 713 ulong flags;
714
715program_interrupt:
468a12c2
AG		 716 svcpu = svcpu_get(vcpu);
717 flags = svcpu->shadow_srr1 & 0x1f0000ull;
718 svcpu_put(svcpu);
f05ed4d5
PM		 719
720 if (vcpu->arch.shared->msr & MSR_PR) {
721#ifdef EXIT_DEBUG
722 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
723#endif
724 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) !=
725 (INS_DCBZ & 0xfffffff7)) {
726 kvmppc_core_queue_program(vcpu, flags);
727 r = RESUME_GUEST;
728 break;
729 }
730 }
731
732 vcpu->stat.emulated_inst_exits++;
733 er = kvmppc_emulate_instruction(run, vcpu);
734 switch (er) {
735 case EMULATE_DONE:
736 r = RESUME_GUEST_NV;
737 break;
738 case EMULATE_AGAIN:
739 r = RESUME_GUEST;
740 break;
741 case EMULATE_FAIL:
742 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
743 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
744 kvmppc_core_queue_program(vcpu, flags);
745 r = RESUME_GUEST;
746 break;
747 case EMULATE_DO_MMIO:
748 run->exit_reason = KVM_EXIT_MMIO;
749 r = RESUME_HOST_NV;
750 break;
751 default:
752 BUG();
753 }
754 break;
755 }
756 case BOOK3S_INTERRUPT_SYSCALL:
a668f2bd
AG		 757 if (vcpu->arch.papr_enabled &&
758 (kvmppc_get_last_inst(vcpu) == 0x44000022) &&
759 !(vcpu->arch.shared->msr & MSR_PR)) {
760 /* SC 1 papr hypercalls */
761 ulong cmd = kvmppc_get_gpr(vcpu, 3);
762 int i;
763
96f38d72 764#ifdef CONFIG_KVM_BOOK3S_64_PR
a668f2bd
AG		 765 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
766 r = RESUME_GUEST;
767 break;
768 }
96f38d72 769#endif
a668f2bd
AG		 770
771 run->papr_hcall.nr = cmd;
772 for (i = 0; i < 9; ++i) {
773 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
774 run->papr_hcall.args[i] = gpr;
775 }
776 run->exit_reason = KVM_EXIT_PAPR_HCALL;
777 vcpu->arch.hcall_needed = 1;
778 r = RESUME_HOST;
779 } else if (vcpu->arch.osi_enabled &&
f05ed4d5
PM		 780 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
781 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
782 /* MOL hypercalls */
783 u64 *gprs = run->osi.gprs;
784 int i;
785
786 run->exit_reason = KVM_EXIT_OSI;
787 for (i = 0; i < 32; i++)
788 gprs[i] = kvmppc_get_gpr(vcpu, i);
789 vcpu->arch.osi_needed = 1;
790 r = RESUME_HOST_NV;
791 } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
792 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
793 /* KVM PV hypercalls */
794 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
795 r = RESUME_GUEST;
796 } else {
797 /* Guest syscalls */
798 vcpu->stat.syscall_exits++;
799 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
800 r = RESUME_GUEST;
801 }
802 break;
803 case BOOK3S_INTERRUPT_FP_UNAVAIL:
804 case BOOK3S_INTERRUPT_ALTIVEC:
805 case BOOK3S_INTERRUPT_VSX:
806 {
807 int ext_msr = 0;
808
809 switch (exit_nr) {
810 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break;
811 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break;
812 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break;
813 }
814
815 switch (kvmppc_check_ext(vcpu, exit_nr)) {
816 case EMULATE_DONE:
817 /* everything ok - let's enable the ext */
818 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr);
819 break;
820 case EMULATE_FAIL:
821 /* we need to emulate this instruction */
822 goto program_interrupt;
823 break;
824 default:
825 /* nothing to worry about - go again */
826 break;
827 }
828 break;
829 }
830 case BOOK3S_INTERRUPT_ALIGNMENT:
831 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
832 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
833 kvmppc_get_last_inst(vcpu));
834 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
835 kvmppc_get_last_inst(vcpu));
836 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
837 }
838 r = RESUME_GUEST;
839 break;
840 case BOOK3S_INTERRUPT_MACHINE_CHECK:
841 case BOOK3S_INTERRUPT_TRACE:
842 kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
843 r = RESUME_GUEST;
844 break;
845 default:
468a12c2
AG		 846 {
847 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu);
848 ulong shadow_srr1 = svcpu->shadow_srr1;
849 svcpu_put(svcpu);
f05ed4d5
PM		 850 /* Ugh - bork here! What did we get? */
851 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n",
468a12c2 852 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1);
f05ed4d5
PM		 853 r = RESUME_HOST;
854 BUG();
855 break;
856 }
468a12c2 857 }
f05ed4d5
PM		 858
859 if (!(r & RESUME_HOST)) {
860 /* To avoid clobbering exit_reason, only check for signals if
861 * we aren't already exiting to userspace for some other
862 * reason. */
e371f713
AG		 863
864 /*
865 * Interrupts could be timers for the guest which we have to
866 * inject again, so let's postpone them until we're in the guest
867 * and if we really did time things so badly, then we just exit
868 * again due to a host external interrupt.
869 */
bd2be683 870 local_irq_disable();
7ee78855
AG		 871 s = kvmppc_prepare_to_enter(vcpu);
872 if (s <= 0) {
bd2be683 873 local_irq_enable();
7ee78855 874 r = s;
24afa37b 875 } else {
bd2be683 876 kvmppc_lazy_ee_enable();
f05ed4d5
PM		 877 }
878 }
879
880 trace_kvm_book3s_reenter(r, vcpu);
881
882 return r;
883}
884
885int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
886 struct kvm_sregs *sregs)
887{
888 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
889 int i;
890
891 sregs->pvr = vcpu->arch.pvr;
892
893 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1;
894 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
895 for (i = 0; i < 64; i++) {
896 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i;
897 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
898 }
899 } else {
900 for (i = 0; i < 16; i++)
901 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
902
903 for (i = 0; i < 8; i++) {
904 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
905 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
906 }
907 }
908
909 return 0;
910}
911
912int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
913 struct kvm_sregs *sregs)
914{
915 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
916 int i;
917
918 kvmppc_set_pvr(vcpu, sregs->pvr);
919
920 vcpu3s->sdr1 = sregs->u.s.sdr1;
921 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) {
922 for (i = 0; i < 64; i++) {
923 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv,
924 sregs->u.s.ppc64.slb[i].slbe);
925 }
926 } else {
927 for (i = 0; i < 16; i++) {
928 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]);
929 }
930 for (i = 0; i < 8; i++) {
931 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false,
932 (u32)sregs->u.s.ppc32.ibat[i]);
933 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true,
934 (u32)(sregs->u.s.ppc32.ibat[i] >> 32));
935 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false,
936 (u32)sregs->u.s.ppc32.dbat[i]);
937 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true,
938 (u32)(sregs->u.s.ppc32.dbat[i] >> 32));
939 }
940 }
941
942 /* Flush the MMU after messing with the segments */
943 kvmppc_mmu_pte_flush(vcpu, 0, 0);
944
945 return 0;
946}
947
a136a8bd 948int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val)
31f3438e 949{
a136a8bd 950 int r = 0;
31f3438e 951
a136a8bd 952 switch (id) {
31f3438e 953 case KVM_REG_PPC_HIOR:
a136a8bd 954 *val = get_reg_val(id, to_book3s(vcpu)->hior);
31f3438e
PM		 955 break;
956 default:
a136a8bd 957 r = -EINVAL;
31f3438e
PM		 958 break;
959 }
960
961 return r;
962}
963
a136a8bd 964int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val)
31f3438e 965{
a136a8bd 966 int r = 0;
31f3438e 967
a136a8bd 968 switch (id) {
31f3438e 969 case KVM_REG_PPC_HIOR:
a136a8bd
PM		 970 to_book3s(vcpu)->hior = set_reg_val(id, *val);
971 to_book3s(vcpu)->hior_explicit = true;
31f3438e
PM		 972 break;
973 default:
a136a8bd 974 r = -EINVAL;
31f3438e
PM		 975 break;
976 }
977
978 return r;
979}
980
f05ed4d5
PM		 981int kvmppc_core_check_processor_compat(void)
982{
983 return 0;
984}
985
986struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
987{
988 struct kvmppc_vcpu_book3s *vcpu_book3s;
989 struct kvm_vcpu *vcpu;
990 int err = -ENOMEM;
991 unsigned long p;
992
993 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
994 if (!vcpu_book3s)
995 goto out;
996
997 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
998 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
999 if (!vcpu_book3s->shadow_vcpu)
1000 goto free_vcpu;
1001
1002 vcpu = &vcpu_book3s->vcpu;
1003 err = kvm_vcpu_init(vcpu, kvm, id);
1004 if (err)
1005 goto free_shadow_vcpu;
1006
1007 p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
1008 /* the real shared page fills the last 4k of our page */
1009 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096);
1010 if (!p)
1011 goto uninit_vcpu;
1012
f05ed4d5
PM		 1013#ifdef CONFIG_PPC_BOOK3S_64
1014 /* default to book3s_64 (970fx) */
1015 vcpu->arch.pvr = 0x3C0301;
1016#else
1017 /* default to book3s_32 (750) */
1018 vcpu->arch.pvr = 0x84202;
1019#endif
1020 kvmppc_set_pvr(vcpu, vcpu->arch.pvr);
1021 vcpu->arch.slb_nr = 64;
1022
f05ed4d5
PM		 1023 vcpu->arch.shadow_msr = MSR_USER64;
1024
1025 err = kvmppc_mmu_init(vcpu);
1026 if (err < 0)
1027 goto uninit_vcpu;
1028
1029 return vcpu;
1030
1031uninit_vcpu:
1032 kvm_vcpu_uninit(vcpu);
1033free_shadow_vcpu:
1034 kfree(vcpu_book3s->shadow_vcpu);
1035free_vcpu:
1036 vfree(vcpu_book3s);
1037out:
1038 return ERR_PTR(err);
1039}
1040
1041void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
1042{
1043 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
1044
1045 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
1046 kvm_vcpu_uninit(vcpu);
1047 kfree(vcpu_book3s->shadow_vcpu);
1048 vfree(vcpu_book3s);
1049}
1050
df6909e5 1051int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
f05ed4d5
PM		 1052{
1053 int ret;
1054 double fpr[32][TS_FPRWIDTH];
1055 unsigned int fpscr;
1056 int fpexc_mode;
1057#ifdef CONFIG_ALTIVEC
1058 vector128 vr[32];
1059 vector128 vscr;
1060 unsigned long uninitialized_var(vrsave);
1061 int used_vr;
1062#endif
1063#ifdef CONFIG_VSX
1064 int used_vsr;
1065#endif
1066 ulong ext_msr;
1067
af8f38b3
AG		 1068 /* Check if we can run the vcpu at all */
1069 if (!vcpu->arch.sane) {
1070 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7d82714d
AG		 1071 ret = -EINVAL;
1072 goto out;
af8f38b3
AG		 1073 }
1074
e371f713
AG		 1075 /*
1076 * Interrupts could be timers for the guest which we have to inject
1077 * again, so let's postpone them until we're in the guest and if we
1078 * really did time things so badly, then we just exit again due to
1079 * a host external interrupt.
1080 */
bd2be683 1081 local_irq_disable();
7ee78855
AG		 1082 ret = kvmppc_prepare_to_enter(vcpu);
1083 if (ret <= 0) {
bd2be683 1084 local_irq_enable();
7d82714d 1085 goto out;
f05ed4d5
PM		 1086 }
1087
1088 /* Save FPU state in stack */
1089 if (current->thread.regs->msr & MSR_FP)
1090 giveup_fpu(current);
1091 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
1092 fpscr = current->thread.fpscr.val;
1093 fpexc_mode = current->thread.fpexc_mode;
1094
1095#ifdef CONFIG_ALTIVEC
1096 /* Save Altivec state in stack */
1097 used_vr = current->thread.used_vr;
1098 if (used_vr) {
1099 if (current->thread.regs->msr & MSR_VEC)
1100 giveup_altivec(current);
1101 memcpy(vr, current->thread.vr, sizeof(current->thread.vr));
1102 vscr = current->thread.vscr;
1103 vrsave = current->thread.vrsave;
1104 }
1105#endif
1106
1107#ifdef CONFIG_VSX
1108 /* Save VSX state in stack */
1109 used_vsr = current->thread.used_vsr;
1110 if (used_vsr && (current->thread.regs->msr & MSR_VSX))
1111 __giveup_vsx(current);
1112#endif
1113
1114 /* Remember the MSR with disabled extensions */
1115 ext_msr = current->thread.regs->msr;
1116
f05ed4d5
PM		 1117 /* Preload FPU if it's enabled */
1118 if (vcpu->arch.shared->msr & MSR_FP)
1119 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
1120
bd2be683 1121 kvmppc_lazy_ee_enable();
df6909e5
PM		 1122
1123 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
1124
24afa37b
AG		 1125 /* No need for kvm_guest_exit. It's done in handle_exit.
1126 We also get here with interrupts enabled. */
f05ed4d5 1127
f05ed4d5
PM		 1128 current->thread.regs->msr = ext_msr;
1129
1130 /* Make sure we save the guest FPU/Altivec/VSX state */
1131 kvmppc_giveup_ext(vcpu, MSR_FP);
1132 kvmppc_giveup_ext(vcpu, MSR_VEC);
1133 kvmppc_giveup_ext(vcpu, MSR_VSX);
1134
1135 /* Restore FPU state from stack */
1136 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
1137 current->thread.fpscr.val = fpscr;
1138 current->thread.fpexc_mode = fpexc_mode;
1139
1140#ifdef CONFIG_ALTIVEC
1141 /* Restore Altivec state from stack */
1142 if (used_vr && current->thread.used_vr) {
1143 memcpy(current->thread.vr, vr, sizeof(current->thread.vr));
1144 current->thread.vscr = vscr;
1145 current->thread.vrsave = vrsave;
1146 }
1147 current->thread.used_vr = used_vr;
1148#endif
1149
1150#ifdef CONFIG_VSX
1151 current->thread.used_vsr = used_vsr;
1152#endif
1153
7d82714d 1154out:
0652eaae 1155 vcpu->mode = OUTSIDE_GUEST_MODE;
f05ed4d5
PM		 1156 return ret;
1157}
1158
82ed3616
PM		 1159/*
1160 * Get (and clear) the dirty memory log for a memory slot.
1161 */
1162int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1163 struct kvm_dirty_log *log)
1164{
1165 struct kvm_memory_slot *memslot;
1166 struct kvm_vcpu *vcpu;
1167 ulong ga, ga_end;
1168 int is_dirty = 0;
1169 int r;
1170 unsigned long n;
1171
1172 mutex_lock(&kvm->slots_lock);
1173
1174 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1175 if (r)
1176 goto out;
1177
1178 /* If nothing is dirty, don't bother messing with page tables. */
1179 if (is_dirty) {
1180 memslot = id_to_memslot(kvm->memslots, log->slot);
1181
1182 ga = memslot->base_gfn << PAGE_SHIFT;
1183 ga_end = ga + (memslot->npages << PAGE_SHIFT);
1184
1185 kvm_for_each_vcpu(n, vcpu, kvm)
1186 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end);
1187
1188 n = kvm_dirty_bitmap_bytes(memslot);
1189 memset(memslot->dirty_bitmap, 0, n);
1190 }
1191
1192 r = 0;
1193out:
1194 mutex_unlock(&kvm->slots_lock);
1195 return r;
1196}
1197
5b74716e
BH		 1198#ifdef CONFIG_PPC64
1199int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info)
1200{
1201 /* No flags */
1202 info->flags = 0;
1203
1204 /* SLB is always 64 entries */
1205 info->slb_size = 64;
1206
1207 /* Standard 4k base page size segment */
1208 info->sps[0].page_shift = 12;
1209 info->sps[0].slb_enc = 0;
1210 info->sps[0].enc[0].page_shift = 12;
1211 info->sps[0].enc[0].pte_enc = 0;
1212
1213 /* Standard 16M large page size segment */
1214 info->sps[1].page_shift = 24;
1215 info->sps[1].slb_enc = SLB_VSID_L;
1216 info->sps[1].enc[0].page_shift = 24;
1217 info->sps[1].enc[0].pte_enc = 0;
1218
1219 return 0;
1220}
1221#endif /* CONFIG_PPC64 */
1222
a66b48c3
PM		 1223void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1224 struct kvm_memory_slot *dont)
1225{
1226}
1227
1228int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1229 unsigned long npages)
1230{
1231 return 0;
1232}
1233
f9e0554d 1234int kvmppc_core_prepare_memory_region(struct kvm *kvm,
a66b48c3 1235 struct kvm_memory_slot *memslot,
f9e0554d
PM		 1236 struct kvm_userspace_memory_region *mem)
1237{
1238 return 0;
1239}
1240
1241void kvmppc_core_commit_memory_region(struct kvm *kvm,
dfe49dbd
PM		 1242 struct kvm_userspace_memory_region *mem,
1243 struct kvm_memory_slot old)
1244{
1245}
1246
1247void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
f9e0554d
PM		 1248{
1249}
1250
1251int kvmppc_core_init_vm(struct kvm *kvm)
1252{
f31e65e1
BH		 1253#ifdef CONFIG_PPC64
1254 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables);
1255#endif
1256
f9e0554d
PM		 1257 return 0;
1258}
1259
1260void kvmppc_core_destroy_vm(struct kvm *kvm)
1261{
f31e65e1
BH		 1262#ifdef CONFIG_PPC64
1263 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
1264#endif
f9e0554d
PM		 1265}
1266
f05ed4d5
PM		 1267static int kvmppc_book3s_init(void)
1268{
1269 int r;
1270
1271 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0,
1272 THIS_MODULE);
1273
1274 if (r)
1275 return r;
1276
1277 r = kvmppc_mmu_hpte_sysinit();
1278
1279 return r;
1280}
1281
1282static void kvmppc_book3s_exit(void)
1283{
1284 kvmppc_mmu_hpte_sysexit();
1285 kvm_exit();
1286}
1287
1288module_init(kvmppc_book3s_init);
1289module_exit(kvmppc_book3s_exit);
Linux kernel - Deliverables
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