KVM: PPC: Consistentify vcpu exit path
[deliverable/linux.git] / arch / powerpc / kvm / booke.c
CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
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36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
97c95059 42#include "trace.h"
bbf45ba5 43
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44unsigned long kvmppc_booke_handlers;
45
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46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
48
49struct kvm_stats_debugfs_item debugfs_entries[] = {
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50 { "mmio", VCPU_STAT(mmio_exits) },
51 { "dcr", VCPU_STAT(dcr_exits) },
52 { "sig", VCPU_STAT(signal_exits) },
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53 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
54 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
55 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
56 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
57 { "sysc", VCPU_STAT(syscall_exits) },
58 { "isi", VCPU_STAT(isi_exits) },
59 { "dsi", VCPU_STAT(dsi_exits) },
60 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
61 { "dec", VCPU_STAT(dec_exits) },
62 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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64 { "doorbell", VCPU_STAT(dbell_exits) },
65 { "guest doorbell", VCPU_STAT(gdbell_exits) },
cf1c5ca4 66 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
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67 { NULL }
68};
69
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70/* TODO: use vcpu_printf() */
71void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
72{
73 int i;
74
666e7252 75 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 76 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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77 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
78 vcpu->arch.shared->srr1);
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79
80 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
81
82 for (i = 0; i < 32; i += 4) {
5cf8ca22 83 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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AG
84 kvmppc_get_gpr(vcpu, i),
85 kvmppc_get_gpr(vcpu, i+1),
86 kvmppc_get_gpr(vcpu, i+2),
87 kvmppc_get_gpr(vcpu, i+3));
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88 }
89}
90
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91#ifdef CONFIG_SPE
92void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
93{
94 preempt_disable();
95 enable_kernel_spe();
96 kvmppc_save_guest_spe(vcpu);
97 vcpu->arch.shadow_msr &= ~MSR_SPE;
98 preempt_enable();
99}
100
101static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
102{
103 preempt_disable();
104 enable_kernel_spe();
105 kvmppc_load_guest_spe(vcpu);
106 vcpu->arch.shadow_msr |= MSR_SPE;
107 preempt_enable();
108}
109
110static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
111{
112 if (vcpu->arch.shared->msr & MSR_SPE) {
113 if (!(vcpu->arch.shadow_msr & MSR_SPE))
114 kvmppc_vcpu_enable_spe(vcpu);
115 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
116 kvmppc_vcpu_disable_spe(vcpu);
117 }
118}
119#else
120static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
121{
122}
123#endif
124
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125/*
126 * Helper function for "full" MSR writes. No need to call this if only
127 * EE/CE/ME/DE/RI are changing.
128 */
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129void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
130{
dd9ebf1f 131 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 132
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133#ifdef CONFIG_KVM_BOOKE_HV
134 new_msr |= MSR_GS;
135#endif
136
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137 vcpu->arch.shared->msr = new_msr;
138
dd9ebf1f 139 kvmppc_mmu_msr_notify(vcpu, old_msr);
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140 kvmppc_vcpu_sync_spe(vcpu);
141}
142
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143static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
144 unsigned int priority)
9dd921cf 145{
6346046c 146 trace_kvm_booke_queue_irqprio(vcpu, priority);
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147 set_bit(priority, &vcpu->arch.pending_exceptions);
148}
149
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150static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
151 ulong dear_flags, ulong esr_flags)
9dd921cf 152{
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153 vcpu->arch.queued_dear = dear_flags;
154 vcpu->arch.queued_esr = esr_flags;
155 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
156}
157
158static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
159 ulong dear_flags, ulong esr_flags)
160{
161 vcpu->arch.queued_dear = dear_flags;
162 vcpu->arch.queued_esr = esr_flags;
163 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
164}
165
166static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
167 ulong esr_flags)
168{
169 vcpu->arch.queued_esr = esr_flags;
170 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
171}
172
173void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
174{
175 vcpu->arch.queued_esr = esr_flags;
d4cf3892 176 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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177}
178
179void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
180{
d4cf3892 181 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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182}
183
184int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
185{
d4cf3892 186 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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187}
188
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189void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
190{
191 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
192}
193
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194void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
195 struct kvm_interrupt *irq)
196{
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197 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
198
199 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
200 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
201
202 kvmppc_booke_queue_irqprio(vcpu, prio);
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203}
204
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205void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
206 struct kvm_interrupt *irq)
207{
208 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 209 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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210}
211
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212static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
213{
214#ifdef CONFIG_KVM_BOOKE_HV
215 mtspr(SPRN_GSRR0, srr0);
216 mtspr(SPRN_GSRR1, srr1);
217#else
218 vcpu->arch.shared->srr0 = srr0;
219 vcpu->arch.shared->srr1 = srr1;
220#endif
221}
222
223static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
224{
225 vcpu->arch.csrr0 = srr0;
226 vcpu->arch.csrr1 = srr1;
227}
228
229static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
230{
231 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
232 vcpu->arch.dsrr0 = srr0;
233 vcpu->arch.dsrr1 = srr1;
234 } else {
235 set_guest_csrr(vcpu, srr0, srr1);
236 }
237}
238
239static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
240{
241 vcpu->arch.mcsrr0 = srr0;
242 vcpu->arch.mcsrr1 = srr1;
243}
244
245static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
246{
247#ifdef CONFIG_KVM_BOOKE_HV
248 return mfspr(SPRN_GDEAR);
249#else
250 return vcpu->arch.shared->dar;
251#endif
252}
253
254static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
255{
256#ifdef CONFIG_KVM_BOOKE_HV
257 mtspr(SPRN_GDEAR, dear);
258#else
259 vcpu->arch.shared->dar = dear;
260#endif
261}
262
263static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
264{
265#ifdef CONFIG_KVM_BOOKE_HV
266 return mfspr(SPRN_GESR);
267#else
268 return vcpu->arch.shared->esr;
269#endif
270}
271
272static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
273{
274#ifdef CONFIG_KVM_BOOKE_HV
275 mtspr(SPRN_GESR, esr);
276#else
277 vcpu->arch.shared->esr = esr;
278#endif
279}
280
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281/* Deliver the interrupt of the corresponding priority, if possible. */
282static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
283 unsigned int priority)
bbf45ba5 284{
d4cf3892 285 int allowed = 0;
79300f8c 286 ulong msr_mask = 0;
daf5e271 287 bool update_esr = false, update_dear = false;
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288 ulong crit_raw = vcpu->arch.shared->critical;
289 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
290 bool crit;
c5335f17 291 bool keep_irq = false;
d30f6e48 292 enum int_class int_class;
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AG
293
294 /* Truncate crit indicators in 32 bit mode */
295 if (!(vcpu->arch.shared->msr & MSR_SF)) {
296 crit_raw &= 0xffffffff;
297 crit_r1 &= 0xffffffff;
298 }
299
300 /* Critical section when crit == r1 */
301 crit = (crit_raw == crit_r1);
302 /* ... and we're in supervisor mode */
303 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 304
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AG
305 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
306 priority = BOOKE_IRQPRIO_EXTERNAL;
307 keep_irq = true;
308 }
309
d4cf3892 310 switch (priority) {
d4cf3892 311 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 312 case BOOKE_IRQPRIO_DATA_STORAGE:
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313 update_dear = true;
314 /* fall through */
d4cf3892 315 case BOOKE_IRQPRIO_INST_STORAGE:
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316 case BOOKE_IRQPRIO_PROGRAM:
317 update_esr = true;
318 /* fall through */
319 case BOOKE_IRQPRIO_ITLB_MISS:
320 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 321 case BOOKE_IRQPRIO_FP_UNAVAIL:
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322 case BOOKE_IRQPRIO_SPE_UNAVAIL:
323 case BOOKE_IRQPRIO_SPE_FP_DATA:
324 case BOOKE_IRQPRIO_SPE_FP_ROUND:
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325 case BOOKE_IRQPRIO_AP_UNAVAIL:
326 case BOOKE_IRQPRIO_ALIGNMENT:
327 allowed = 1;
79300f8c 328 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 329 int_class = INT_CLASS_NONCRIT;
bbf45ba5 330 break;
d4cf3892 331 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 332 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 333 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 334 allowed = allowed && !crit;
79300f8c 335 msr_mask = MSR_ME;
d30f6e48 336 int_class = INT_CLASS_CRIT;
bbf45ba5 337 break;
d4cf3892 338 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 339 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 340 allowed = allowed && !crit;
d30f6e48 341 int_class = INT_CLASS_MC;
bbf45ba5 342 break;
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343 case BOOKE_IRQPRIO_DECREMENTER:
344 case BOOKE_IRQPRIO_FIT:
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SW
345 keep_irq = true;
346 /* fall through */
347 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 348 case BOOKE_IRQPRIO_DBELL:
666e7252 349 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 350 allowed = allowed && !crit;
79300f8c 351 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 352 int_class = INT_CLASS_NONCRIT;
bbf45ba5 353 break;
d4cf3892 354 case BOOKE_IRQPRIO_DEBUG:
666e7252 355 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 356 allowed = allowed && !crit;
79300f8c 357 msr_mask = MSR_ME;
d30f6e48 358 int_class = INT_CLASS_CRIT;
bbf45ba5 359 break;
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360 }
361
d4cf3892 362 if (allowed) {
d30f6e48
SW
363 switch (int_class) {
364 case INT_CLASS_NONCRIT:
365 set_guest_srr(vcpu, vcpu->arch.pc,
366 vcpu->arch.shared->msr);
367 break;
368 case INT_CLASS_CRIT:
369 set_guest_csrr(vcpu, vcpu->arch.pc,
370 vcpu->arch.shared->msr);
371 break;
372 case INT_CLASS_DBG:
373 set_guest_dsrr(vcpu, vcpu->arch.pc,
374 vcpu->arch.shared->msr);
375 break;
376 case INT_CLASS_MC:
377 set_guest_mcsrr(vcpu, vcpu->arch.pc,
378 vcpu->arch.shared->msr);
379 break;
380 }
381
d4cf3892 382 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 383 if (update_esr == true)
d30f6e48 384 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 385 if (update_dear == true)
d30f6e48 386 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 387 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 388
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AG
389 if (!keep_irq)
390 clear_bit(priority, &vcpu->arch.pending_exceptions);
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391 }
392
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SW
393#ifdef CONFIG_KVM_BOOKE_HV
394 /*
395 * If an interrupt is pending but masked, raise a guest doorbell
396 * so that we are notified when the guest enables the relevant
397 * MSR bit.
398 */
399 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
400 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
401 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
402 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
403 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
404 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
405#endif
406
d4cf3892 407 return allowed;
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408}
409
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410static void update_timer_ints(struct kvm_vcpu *vcpu)
411{
412 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
413 kvmppc_core_queue_dec(vcpu);
414 else
415 kvmppc_core_dequeue_dec(vcpu);
416}
417
c59a6a3e 418static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
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419{
420 unsigned long *pending = &vcpu->arch.pending_exceptions;
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421 unsigned int priority;
422
9ab80843 423 priority = __ffs(*pending);
8b3a00fc 424 while (priority < BOOKE_IRQPRIO_MAX) {
d4cf3892 425 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 426 break;
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427
428 priority = find_next_bit(pending,
429 BITS_PER_BYTE * sizeof(*pending),
430 priority + 1);
431 }
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AG
432
433 /* Tell the guest about our interrupt status */
29ac26ef 434 vcpu->arch.shared->int_pending = !!*pending;
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435}
436
c59a6a3e 437/* Check pending exceptions and deliver one, if possible. */
a8e4ef84 438int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
c59a6a3e 439{
a8e4ef84 440 int r = 0;
c59a6a3e
SW
441 WARN_ON_ONCE(!irqs_disabled());
442
443 kvmppc_core_check_exceptions(vcpu);
444
445 if (vcpu->arch.shared->msr & MSR_WE) {
446 local_irq_enable();
447 kvm_vcpu_block(vcpu);
966cd0f3 448 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
c59a6a3e
SW
449 local_irq_disable();
450
451 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
a8e4ef84 452 r = 1;
c59a6a3e 453 };
a8e4ef84
AG
454
455 return r;
456}
457
03d25c5b 458void kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
4ffc6356 459{
2d8185d4
AG
460 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
461 update_timer_ints(vcpu);
862d31f7 462#if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
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AG
463 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
464 kvmppc_core_flush_tlb(vcpu);
862d31f7 465#endif
4ffc6356
AG
466}
467
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PM
468int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
469{
470 int ret;
8fae845f
SW
471#ifdef CONFIG_PPC_FPU
472 unsigned int fpscr;
473 int fpexc_mode;
474 u64 fpr[32];
475#endif
df6909e5 476
af8f38b3
AG
477 if (!vcpu->arch.sane) {
478 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
479 return -EINVAL;
480 }
481
df6909e5 482 local_irq_disable();
03660ba2 483 if (kvmppc_prepare_to_enter(vcpu)) {
24afa37b 484 local_irq_enable();
1d1ef222
SW
485 kvm_run->exit_reason = KVM_EXIT_INTR;
486 ret = -EINTR;
487 goto out;
488 }
489
df6909e5 490 kvm_guest_enter();
8fae845f
SW
491
492#ifdef CONFIG_PPC_FPU
493 /* Save userspace FPU state in stack */
494 enable_kernel_fp();
495 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
496 fpscr = current->thread.fpscr.val;
497 fpexc_mode = current->thread.fpexc_mode;
498
499 /* Restore guest FPU state to thread */
500 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
501 current->thread.fpscr.val = vcpu->arch.fpscr;
502
503 /*
504 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
505 * as always using the FPU. Kernel usage of FP (via
506 * enable_kernel_fp()) in this thread must not occur while
507 * vcpu->fpu_active is set.
508 */
509 vcpu->fpu_active = 1;
510
511 kvmppc_load_guest_fp(vcpu);
512#endif
513
df6909e5 514 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f 515
24afa37b
AG
516 /* No need for kvm_guest_exit. It's done in handle_exit.
517 We also get here with interrupts enabled. */
518
8fae845f
SW
519#ifdef CONFIG_PPC_FPU
520 kvmppc_save_guest_fp(vcpu);
521
522 vcpu->fpu_active = 0;
523
524 /* Save guest FPU state from thread */
525 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
526 vcpu->arch.fpscr = current->thread.fpscr.val;
527
528 /* Restore userspace FPU state from stack */
529 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
530 current->thread.fpscr.val = fpscr;
531 current->thread.fpexc_mode = fpexc_mode;
532#endif
533
1d1ef222 534out:
d69c6436
AG
535 vcpu->mode = OUTSIDE_GUEST_MODE;
536 smp_wmb();
df6909e5
PM
537 return ret;
538}
539
d30f6e48
SW
540static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
541{
542 enum emulation_result er;
543
544 er = kvmppc_emulate_instruction(run, vcpu);
545 switch (er) {
546 case EMULATE_DONE:
547 /* don't overwrite subtypes, just account kvm_stats */
548 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
549 /* Future optimization: only reload non-volatiles if
550 * they were actually modified by emulation. */
551 return RESUME_GUEST_NV;
552
553 case EMULATE_DO_DCR:
554 run->exit_reason = KVM_EXIT_DCR;
555 return RESUME_HOST;
556
557 case EMULATE_FAIL:
d30f6e48
SW
558 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
559 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
560 /* For debugging, encode the failing instruction and
561 * report it to userspace. */
562 run->hw.hardware_exit_reason = ~0ULL << 32;
563 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 564 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW
565 return RESUME_HOST;
566
567 default:
568 BUG();
569 }
570}
571
4e642ccb 572static void kvmppc_fill_pt_regs(struct pt_regs *regs)
bbf45ba5 573{
4e642ccb 574 ulong r1, ip, msr, lr;
bbf45ba5 575
4e642ccb
AG
576 asm("mr %0, 1" : "=r"(r1));
577 asm("mflr %0" : "=r"(lr));
578 asm("mfmsr %0" : "=r"(msr));
579 asm("bl 1f; 1: mflr %0" : "=r"(ip));
580
581 memset(regs, 0, sizeof(*regs));
582 regs->gpr[1] = r1;
583 regs->nip = ip;
584 regs->msr = msr;
585 regs->link = lr;
586}
587
6328e593
BB
588/*
589 * For interrupts needed to be handled by host interrupt handlers,
590 * corresponding host handler are called from here in similar way
591 * (but not exact) as they are called from low level handler
592 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
593 */
4e642ccb
AG
594static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
595 unsigned int exit_nr)
596{
597 struct pt_regs regs;
73e75b41 598
d30f6e48
SW
599 switch (exit_nr) {
600 case BOOKE_INTERRUPT_EXTERNAL:
4e642ccb
AG
601 kvmppc_fill_pt_regs(&regs);
602 do_IRQ(&regs);
d30f6e48 603 break;
d30f6e48 604 case BOOKE_INTERRUPT_DECREMENTER:
4e642ccb
AG
605 kvmppc_fill_pt_regs(&regs);
606 timer_interrupt(&regs);
d30f6e48 607 break;
d30f6e48
SW
608#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
609 case BOOKE_INTERRUPT_DOORBELL:
4e642ccb
AG
610 kvmppc_fill_pt_regs(&regs);
611 doorbell_exception(&regs);
d30f6e48
SW
612 break;
613#endif
614 case BOOKE_INTERRUPT_MACHINE_CHECK:
615 /* FIXME */
616 break;
7cc1e8ee
AG
617 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
618 kvmppc_fill_pt_regs(&regs);
619 performance_monitor_exception(&regs);
620 break;
6328e593
BB
621 case BOOKE_INTERRUPT_WATCHDOG:
622 kvmppc_fill_pt_regs(&regs);
623#ifdef CONFIG_BOOKE_WDT
624 WatchdogException(&regs);
625#else
626 unknown_exception(&regs);
627#endif
628 break;
629 case BOOKE_INTERRUPT_CRITICAL:
630 unknown_exception(&regs);
631 break;
d30f6e48 632 }
4e642ccb
AG
633}
634
635/**
636 * kvmppc_handle_exit
637 *
638 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
639 */
640int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
641 unsigned int exit_nr)
642{
643 int r = RESUME_HOST;
644
645 /* update before a new last_exit_type is rewritten */
646 kvmppc_update_timing_stats(vcpu);
647
648 /* restart interrupts if they were meant for the host */
649 kvmppc_restart_interrupt(vcpu, exit_nr);
d30f6e48 650
bbf45ba5
HB
651 local_irq_enable();
652
97c95059 653 trace_kvm_exit(exit_nr, vcpu);
706fb730 654 kvm_guest_exit();
97c95059 655
bbf45ba5
HB
656 run->exit_reason = KVM_EXIT_UNKNOWN;
657 run->ready_for_interrupt_injection = 1;
658
659 switch (exit_nr) {
660 case BOOKE_INTERRUPT_MACHINE_CHECK:
c35c9d84
AG
661 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
662 kvmppc_dump_vcpu(vcpu);
663 /* For debugging, send invalid exit reason to user space */
664 run->hw.hardware_exit_reason = ~1ULL << 32;
665 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
666 r = RESUME_HOST;
bbf45ba5
HB
667 break;
668
669 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 670 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB
671 r = RESUME_GUEST;
672 break;
673
bbf45ba5 674 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 675 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB
676 r = RESUME_GUEST;
677 break;
678
6328e593
BB
679 case BOOKE_INTERRUPT_WATCHDOG:
680 r = RESUME_GUEST;
681 break;
682
d30f6e48
SW
683 case BOOKE_INTERRUPT_DOORBELL:
684 kvmppc_account_exit(vcpu, DBELL_EXITS);
d30f6e48
SW
685 r = RESUME_GUEST;
686 break;
687
688 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
689 kvmppc_account_exit(vcpu, GDBELL_EXITS);
690
691 /*
692 * We are here because there is a pending guest interrupt
693 * which could not be delivered as MSR_CE or MSR_ME was not
694 * set. Once we break from here we will retry delivery.
695 */
696 r = RESUME_GUEST;
697 break;
698
699 case BOOKE_INTERRUPT_GUEST_DBELL:
700 kvmppc_account_exit(vcpu, GDBELL_EXITS);
701
702 /*
703 * We are here because there is a pending guest interrupt
704 * which could not be delivered as MSR_EE was not set. Once
705 * we break from here we will retry delivery.
706 */
707 r = RESUME_GUEST;
708 break;
709
95f2e921
AG
710 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
711 r = RESUME_GUEST;
712 break;
713
d30f6e48
SW
714 case BOOKE_INTERRUPT_HV_PRIV:
715 r = emulation_exit(run, vcpu);
716 break;
717
bbf45ba5 718 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 719 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
0268597c
AG
720 /*
721 * Program traps generated by user-level software must
722 * be handled by the guest kernel.
723 *
724 * In GS mode, hypervisor privileged instructions trap
725 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
726 * actual program interrupts, handled by the guest.
727 */
daf5e271 728 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 729 r = RESUME_GUEST;
7b701591 730 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
731 break;
732 }
733
d30f6e48 734 r = emulation_exit(run, vcpu);
bbf45ba5
HB
735 break;
736
de368dce 737 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 738 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 739 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
740 r = RESUME_GUEST;
741 break;
742
4cd35f67
SW
743#ifdef CONFIG_SPE
744 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
745 if (vcpu->arch.shared->msr & MSR_SPE)
746 kvmppc_vcpu_enable_spe(vcpu);
747 else
748 kvmppc_booke_queue_irqprio(vcpu,
749 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
750 r = RESUME_GUEST;
751 break;
4cd35f67 752 }
bb3a8a17
HB
753
754 case BOOKE_INTERRUPT_SPE_FP_DATA:
755 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
756 r = RESUME_GUEST;
757 break;
758
759 case BOOKE_INTERRUPT_SPE_FP_ROUND:
760 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
761 r = RESUME_GUEST;
762 break;
4cd35f67
SW
763#else
764 case BOOKE_INTERRUPT_SPE_UNAVAIL:
765 /*
766 * Guest wants SPE, but host kernel doesn't support it. Send
767 * an "unimplemented operation" program check to the guest.
768 */
769 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
770 r = RESUME_GUEST;
771 break;
772
773 /*
774 * These really should never happen without CONFIG_SPE,
775 * as we should never enable the real MSR[SPE] in the guest.
776 */
777 case BOOKE_INTERRUPT_SPE_FP_DATA:
778 case BOOKE_INTERRUPT_SPE_FP_ROUND:
779 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
780 __func__, exit_nr, vcpu->arch.pc);
781 run->hw.hardware_exit_reason = exit_nr;
782 r = RESUME_HOST;
783 break;
784#endif
bb3a8a17 785
bbf45ba5 786 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
787 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
788 vcpu->arch.fault_esr);
7b701591 789 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
790 r = RESUME_GUEST;
791 break;
792
793 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 794 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 795 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
796 r = RESUME_GUEST;
797 break;
798
d30f6e48
SW
799#ifdef CONFIG_KVM_BOOKE_HV
800 case BOOKE_INTERRUPT_HV_SYSCALL:
801 if (!(vcpu->arch.shared->msr & MSR_PR)) {
802 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
803 } else {
804 /*
805 * hcall from guest userspace -- send privileged
806 * instruction program check.
807 */
808 kvmppc_core_queue_program(vcpu, ESR_PPR);
809 }
810
811 r = RESUME_GUEST;
812 break;
813#else
bbf45ba5 814 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
815 if (!(vcpu->arch.shared->msr & MSR_PR) &&
816 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
817 /* KVM PV hypercalls */
818 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
819 r = RESUME_GUEST;
820 } else {
821 /* Guest syscalls */
822 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
823 }
7b701591 824 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
825 r = RESUME_GUEST;
826 break;
d30f6e48 827#endif
bbf45ba5
HB
828
829 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 830 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 831 int gtlb_index;
475e7cdd 832 gpa_t gpaddr;
bbf45ba5
HB
833 gfn_t gfn;
834
bf7ca4bd 835#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
836 if (!(vcpu->arch.shared->msr & MSR_PR) &&
837 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
838 kvmppc_map_magic(vcpu);
839 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
840 r = RESUME_GUEST;
841
842 break;
843 }
844#endif
845
bbf45ba5 846 /* Check the guest TLB. */
fa86b8dd 847 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 848 if (gtlb_index < 0) {
bbf45ba5 849 /* The guest didn't have a mapping for it. */
daf5e271
LY
850 kvmppc_core_queue_dtlb_miss(vcpu,
851 vcpu->arch.fault_dear,
852 vcpu->arch.fault_esr);
b52a638c 853 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 854 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
855 r = RESUME_GUEST;
856 break;
857 }
858
be8d1cae 859 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 860 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
861
862 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
863 /* The guest TLB had a mapping, but the shadow TLB
864 * didn't, and it is RAM. This could be because:
865 * a) the entry is mapping the host kernel, or
866 * b) the guest used a large mapping which we're faking
867 * Either way, we need to satisfy the fault without
868 * invoking the guest. */
58a96214 869 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 870 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
871 r = RESUME_GUEST;
872 } else {
873 /* Guest has mapped and accessed a page which is not
874 * actually RAM. */
475e7cdd 875 vcpu->arch.paddr_accessed = gpaddr;
6020c0f6 876 vcpu->arch.vaddr_accessed = eaddr;
bbf45ba5 877 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 878 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
879 }
880
881 break;
882 }
883
884 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 885 unsigned long eaddr = vcpu->arch.pc;
89168618 886 gpa_t gpaddr;
bbf45ba5 887 gfn_t gfn;
7924bd41 888 int gtlb_index;
bbf45ba5
HB
889
890 r = RESUME_GUEST;
891
892 /* Check the guest TLB. */
fa86b8dd 893 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 894 if (gtlb_index < 0) {
bbf45ba5 895 /* The guest didn't have a mapping for it. */
d4cf3892 896 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 897 kvmppc_mmu_itlb_miss(vcpu);
7b701591 898 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
899 break;
900 }
901
7b701591 902 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 903
be8d1cae 904 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 905 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
906
907 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
908 /* The guest TLB had a mapping, but the shadow TLB
909 * didn't. This could be because:
910 * a) the entry is mapping the host kernel, or
911 * b) the guest used a large mapping which we're faking
912 * Either way, we need to satisfy the fault without
913 * invoking the guest. */
58a96214 914 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
915 } else {
916 /* Guest mapped and leaped at non-RAM! */
d4cf3892 917 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
918 }
919
920 break;
921 }
922
6a0ab738
HB
923 case BOOKE_INTERRUPT_DEBUG: {
924 u32 dbsr;
925
926 vcpu->arch.pc = mfspr(SPRN_CSRR0);
927
928 /* clear IAC events in DBSR register */
929 dbsr = mfspr(SPRN_DBSR);
930 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
931 mtspr(SPRN_DBSR, dbsr);
932
933 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 934 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
935 r = RESUME_HOST;
936 break;
937 }
938
bbf45ba5
HB
939 default:
940 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
941 BUG();
942 }
943
a8e4ef84
AG
944 /*
945 * To avoid clobbering exit_reason, only check for signals if we
946 * aren't already exiting to userspace for some other reason.
947 */
03660ba2
AG
948 if (!(r & RESUME_HOST)) {
949 local_irq_disable();
950 if (kvmppc_prepare_to_enter(vcpu)) {
24afa37b 951 local_irq_enable();
03660ba2
AG
952 run->exit_reason = KVM_EXIT_INTR;
953 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
954 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
24afa37b
AG
955 } else {
956 /* Going back to guest */
957 kvm_guest_enter();
03660ba2 958 }
bbf45ba5
HB
959 }
960
961 return r;
962}
963
964/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
965int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
966{
082decf2 967 int i;
af8f38b3 968 int r;
082decf2 969
bbf45ba5 970 vcpu->arch.pc = 0;
b5904972 971 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 972 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 973 kvmppc_set_msr(vcpu, 0);
bbf45ba5 974
d30f6e48
SW
975#ifndef CONFIG_KVM_BOOKE_HV
976 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 977 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
978 vcpu->arch.shared->msr = 0;
979#endif
49dd2c49 980
082decf2
HB
981 /* Eye-catching numbers so we know if the guest takes an interrupt
982 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 983 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
984 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
985 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 986
73e75b41
HB
987 kvmppc_init_timing_stats(vcpu);
988
af8f38b3
AG
989 r = kvmppc_core_vcpu_setup(vcpu);
990 kvmppc_sanity_check(vcpu);
991 return r;
bbf45ba5
HB
992}
993
994int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
995{
996 int i;
997
998 regs->pc = vcpu->arch.pc;
992b5b29 999 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
1000 regs->ctr = vcpu->arch.ctr;
1001 regs->lr = vcpu->arch.lr;
992b5b29 1002 regs->xer = kvmppc_get_xer(vcpu);
666e7252 1003 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
1004 regs->srr0 = vcpu->arch.shared->srr0;
1005 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 1006 regs->pid = vcpu->arch.pid;
a73a9599
AG
1007 regs->sprg0 = vcpu->arch.shared->sprg0;
1008 regs->sprg1 = vcpu->arch.shared->sprg1;
1009 regs->sprg2 = vcpu->arch.shared->sprg2;
1010 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
1011 regs->sprg4 = vcpu->arch.shared->sprg4;
1012 regs->sprg5 = vcpu->arch.shared->sprg5;
1013 regs->sprg6 = vcpu->arch.shared->sprg6;
1014 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
1015
1016 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 1017 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
1018
1019 return 0;
1020}
1021
1022int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1023{
1024 int i;
1025
1026 vcpu->arch.pc = regs->pc;
992b5b29 1027 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
1028 vcpu->arch.ctr = regs->ctr;
1029 vcpu->arch.lr = regs->lr;
992b5b29 1030 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 1031 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
1032 vcpu->arch.shared->srr0 = regs->srr0;
1033 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 1034 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
1035 vcpu->arch.shared->sprg0 = regs->sprg0;
1036 vcpu->arch.shared->sprg1 = regs->sprg1;
1037 vcpu->arch.shared->sprg2 = regs->sprg2;
1038 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
1039 vcpu->arch.shared->sprg4 = regs->sprg4;
1040 vcpu->arch.shared->sprg5 = regs->sprg5;
1041 vcpu->arch.shared->sprg6 = regs->sprg6;
1042 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 1043
8e5b26b5
AG
1044 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1045 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
1046
1047 return 0;
1048}
1049
5ce941ee
SW
1050static void get_sregs_base(struct kvm_vcpu *vcpu,
1051 struct kvm_sregs *sregs)
1052{
1053 u64 tb = get_tb();
1054
1055 sregs->u.e.features |= KVM_SREGS_E_BASE;
1056
1057 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1058 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1059 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
1060 sregs->u.e.esr = get_guest_esr(vcpu);
1061 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
1062 sregs->u.e.tsr = vcpu->arch.tsr;
1063 sregs->u.e.tcr = vcpu->arch.tcr;
1064 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1065 sregs->u.e.tb = tb;
1066 sregs->u.e.vrsave = vcpu->arch.vrsave;
1067}
1068
1069static int set_sregs_base(struct kvm_vcpu *vcpu,
1070 struct kvm_sregs *sregs)
1071{
1072 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1073 return 0;
1074
1075 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1076 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1077 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1078 set_guest_esr(vcpu, sregs->u.e.esr);
1079 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1080 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1081 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1082
dfd4d47e 1083 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1084 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1085 kvmppc_emulate_dec(vcpu);
1086 }
5ce941ee
SW
1087
1088 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW
1089 vcpu->arch.tsr = sregs->u.e.tsr;
1090 update_timer_ints(vcpu);
5ce941ee
SW
1091 }
1092
1093 return 0;
1094}
1095
1096static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1097 struct kvm_sregs *sregs)
1098{
1099 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1100
841741f2 1101 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1102 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1103 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1104 sregs->u.e.decar = vcpu->arch.decar;
1105 sregs->u.e.ivpr = vcpu->arch.ivpr;
1106}
1107
1108static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1109 struct kvm_sregs *sregs)
1110{
1111 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1112 return 0;
1113
841741f2 1114 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1115 return -EINVAL;
1116
1117 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1118 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1119 vcpu->arch.decar = sregs->u.e.decar;
1120 vcpu->arch.ivpr = sregs->u.e.ivpr;
1121
1122 return 0;
1123}
1124
1125void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1126{
1127 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1128
1129 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1130 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1131 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1132 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1133 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1134 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1135 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1136 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1137 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1138 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1139 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1140 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1141 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1142 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1143 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1144 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1145}
1146
1147int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1148{
1149 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1150 return 0;
1151
1152 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1153 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1154 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1155 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1156 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1157 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1158 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1159 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1160 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1161 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1162 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1163 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1164 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1165 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1166 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1167 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1168
1169 return 0;
1170}
1171
bbf45ba5
HB
1172int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1173 struct kvm_sregs *sregs)
1174{
5ce941ee
SW
1175 sregs->pvr = vcpu->arch.pvr;
1176
1177 get_sregs_base(vcpu, sregs);
1178 get_sregs_arch206(vcpu, sregs);
1179 kvmppc_core_get_sregs(vcpu, sregs);
1180 return 0;
bbf45ba5
HB
1181}
1182
1183int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1184 struct kvm_sregs *sregs)
1185{
5ce941ee
SW
1186 int ret;
1187
1188 if (vcpu->arch.pvr != sregs->pvr)
1189 return -EINVAL;
1190
1191 ret = set_sregs_base(vcpu, sregs);
1192 if (ret < 0)
1193 return ret;
1194
1195 ret = set_sregs_arch206(vcpu, sregs);
1196 if (ret < 0)
1197 return ret;
1198
1199 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1200}
1201
31f3438e
PM
1202int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1203{
1204 return -EINVAL;
1205}
1206
1207int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1208{
1209 return -EINVAL;
1210}
1211
bbf45ba5
HB
1212int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1213{
1214 return -ENOTSUPP;
1215}
1216
1217int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1218{
1219 return -ENOTSUPP;
1220}
1221
bbf45ba5
HB
1222int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1223 struct kvm_translation *tr)
1224{
98001d8d
AK
1225 int r;
1226
98001d8d 1227 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1228 return r;
bbf45ba5 1229}
d9fbd03d 1230
4e755758
AG
1231int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1232{
1233 return -ENOTSUPP;
1234}
1235
f9e0554d
PM
1236int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1237 struct kvm_userspace_memory_region *mem)
1238{
1239 return 0;
1240}
1241
1242void kvmppc_core_commit_memory_region(struct kvm *kvm,
1243 struct kvm_userspace_memory_region *mem)
1244{
1245}
1246
dfd4d47e
SW
1247void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1248{
1249 vcpu->arch.tcr = new_tcr;
1250 update_timer_ints(vcpu);
1251}
1252
1253void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1254{
1255 set_bits(tsr_bits, &vcpu->arch.tsr);
1256 smp_wmb();
1257 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1258 kvm_vcpu_kick(vcpu);
1259}
1260
1261void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1262{
1263 clear_bits(tsr_bits, &vcpu->arch.tsr);
1264 update_timer_ints(vcpu);
1265}
1266
1267void kvmppc_decrementer_func(unsigned long data)
1268{
1269 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1270
21bd000a
BB
1271 if (vcpu->arch.tcr & TCR_ARE) {
1272 vcpu->arch.dec = vcpu->arch.decar;
1273 kvmppc_emulate_dec(vcpu);
1274 }
1275
dfd4d47e
SW
1276 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1277}
1278
94fa9d99
SW
1279void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1280{
d30f6e48 1281 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1282}
1283
1284void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1285{
d30f6e48 1286 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1287}
1288
2986b8c7 1289int __init kvmppc_booke_init(void)
d9fbd03d 1290{
d30f6e48 1291#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1292 unsigned long ivor[16];
1293 unsigned long max_ivor = 0;
1294 int i;
1295
1296 /* We install our own exception handlers by hijacking IVPR. IVPR must
1297 * be 16-bit aligned, so we need a 64KB allocation. */
1298 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1299 VCPU_SIZE_ORDER);
1300 if (!kvmppc_booke_handlers)
1301 return -ENOMEM;
1302
1303 /* XXX make sure our handlers are smaller than Linux's */
1304
1305 /* Copy our interrupt handlers to match host IVORs. That way we don't
1306 * have to swap the IVORs on every guest/host transition. */
1307 ivor[0] = mfspr(SPRN_IVOR0);
1308 ivor[1] = mfspr(SPRN_IVOR1);
1309 ivor[2] = mfspr(SPRN_IVOR2);
1310 ivor[3] = mfspr(SPRN_IVOR3);
1311 ivor[4] = mfspr(SPRN_IVOR4);
1312 ivor[5] = mfspr(SPRN_IVOR5);
1313 ivor[6] = mfspr(SPRN_IVOR6);
1314 ivor[7] = mfspr(SPRN_IVOR7);
1315 ivor[8] = mfspr(SPRN_IVOR8);
1316 ivor[9] = mfspr(SPRN_IVOR9);
1317 ivor[10] = mfspr(SPRN_IVOR10);
1318 ivor[11] = mfspr(SPRN_IVOR11);
1319 ivor[12] = mfspr(SPRN_IVOR12);
1320 ivor[13] = mfspr(SPRN_IVOR13);
1321 ivor[14] = mfspr(SPRN_IVOR14);
1322 ivor[15] = mfspr(SPRN_IVOR15);
1323
1324 for (i = 0; i < 16; i++) {
1325 if (ivor[i] > max_ivor)
1326 max_ivor = ivor[i];
1327
1328 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1329 kvmppc_handlers_start + i * kvmppc_handler_len,
1330 kvmppc_handler_len);
1331 }
1332 flush_icache_range(kvmppc_booke_handlers,
1333 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1334#endif /* !BOOKE_HV */
db93f574 1335 return 0;
d9fbd03d
HB
1336}
1337
db93f574 1338void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1339{
1340 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1341 kvm_exit();
1342}
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