KVM: PPC: booke: expose good state on irq reinject
[deliverable/linux.git] / arch / powerpc / kvm / booke.c
CommitLineData
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
4cd35f67 16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
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17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
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22 */
23
24#include <linux/errno.h>
25#include <linux/err.h>
26#include <linux/kvm_host.h>
5a0e3ad6 27#include <linux/gfp.h>
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28#include <linux/module.h>
29#include <linux/vmalloc.h>
30#include <linux/fs.h>
7924bd41 31
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32#include <asm/cputable.h>
33#include <asm/uaccess.h>
34#include <asm/kvm_ppc.h>
d9fbd03d 35#include <asm/cacheflush.h>
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36#include <asm/dbell.h>
37#include <asm/hw_irq.h>
38#include <asm/irq.h>
bbf45ba5 39
d30f6e48 40#include "timing.h"
75f74f0d 41#include "booke.h"
bbf45ba5 42
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43unsigned long kvmppc_booke_handlers;
44
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45#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
46#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
47
48struct kvm_stats_debugfs_item debugfs_entries[] = {
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49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "dcr", VCPU_STAT(dcr_exits) },
51 { "sig", VCPU_STAT(signal_exits) },
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52 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
53 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
54 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
55 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
56 { "sysc", VCPU_STAT(syscall_exits) },
57 { "isi", VCPU_STAT(isi_exits) },
58 { "dsi", VCPU_STAT(dsi_exits) },
59 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
60 { "dec", VCPU_STAT(dec_exits) },
61 { "ext_intr", VCPU_STAT(ext_intr_exits) },
45c5eb67 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
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63 { "doorbell", VCPU_STAT(dbell_exits) },
64 { "guest doorbell", VCPU_STAT(gdbell_exits) },
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65 { NULL }
66};
67
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68/* TODO: use vcpu_printf() */
69void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
70{
71 int i;
72
666e7252 73 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
5cf8ca22 74 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
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75 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
76 vcpu->arch.shared->srr1);
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77
78 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
79
80 for (i = 0; i < 32; i += 4) {
5cf8ca22 81 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
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82 kvmppc_get_gpr(vcpu, i),
83 kvmppc_get_gpr(vcpu, i+1),
84 kvmppc_get_gpr(vcpu, i+2),
85 kvmppc_get_gpr(vcpu, i+3));
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86 }
87}
88
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89#ifdef CONFIG_SPE
90void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
91{
92 preempt_disable();
93 enable_kernel_spe();
94 kvmppc_save_guest_spe(vcpu);
95 vcpu->arch.shadow_msr &= ~MSR_SPE;
96 preempt_enable();
97}
98
99static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
100{
101 preempt_disable();
102 enable_kernel_spe();
103 kvmppc_load_guest_spe(vcpu);
104 vcpu->arch.shadow_msr |= MSR_SPE;
105 preempt_enable();
106}
107
108static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
109{
110 if (vcpu->arch.shared->msr & MSR_SPE) {
111 if (!(vcpu->arch.shadow_msr & MSR_SPE))
112 kvmppc_vcpu_enable_spe(vcpu);
113 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
114 kvmppc_vcpu_disable_spe(vcpu);
115 }
116}
117#else
118static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
119{
120}
121#endif
122
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123/*
124 * Helper function for "full" MSR writes. No need to call this if only
125 * EE/CE/ME/DE/RI are changing.
126 */
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127void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
128{
dd9ebf1f 129 u32 old_msr = vcpu->arch.shared->msr;
4cd35f67 130
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131#ifdef CONFIG_KVM_BOOKE_HV
132 new_msr |= MSR_GS;
133#endif
134
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135 vcpu->arch.shared->msr = new_msr;
136
dd9ebf1f 137 kvmppc_mmu_msr_notify(vcpu, old_msr);
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138 kvmppc_vcpu_sync_spe(vcpu);
139}
140
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141static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
142 unsigned int priority)
9dd921cf 143{
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144 set_bit(priority, &vcpu->arch.pending_exceptions);
145}
146
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147static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
148 ulong dear_flags, ulong esr_flags)
9dd921cf 149{
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150 vcpu->arch.queued_dear = dear_flags;
151 vcpu->arch.queued_esr = esr_flags;
152 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
153}
154
155static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
156 ulong dear_flags, ulong esr_flags)
157{
158 vcpu->arch.queued_dear = dear_flags;
159 vcpu->arch.queued_esr = esr_flags;
160 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
161}
162
163static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
164 ulong esr_flags)
165{
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
168}
169
170void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
171{
172 vcpu->arch.queued_esr = esr_flags;
d4cf3892 173 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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174}
175
176void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
177{
d4cf3892 178 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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179}
180
181int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
182{
d4cf3892 183 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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184}
185
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186void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
187{
188 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
189}
190
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191void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
192 struct kvm_interrupt *irq)
193{
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194 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
195
196 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
197 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
198
199 kvmppc_booke_queue_irqprio(vcpu, prio);
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200}
201
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202void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
203 struct kvm_interrupt *irq)
204{
205 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
c5335f17 206 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
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207}
208
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209static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
210{
211#ifdef CONFIG_KVM_BOOKE_HV
212 mtspr(SPRN_GSRR0, srr0);
213 mtspr(SPRN_GSRR1, srr1);
214#else
215 vcpu->arch.shared->srr0 = srr0;
216 vcpu->arch.shared->srr1 = srr1;
217#endif
218}
219
220static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
221{
222 vcpu->arch.csrr0 = srr0;
223 vcpu->arch.csrr1 = srr1;
224}
225
226static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
227{
228 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
229 vcpu->arch.dsrr0 = srr0;
230 vcpu->arch.dsrr1 = srr1;
231 } else {
232 set_guest_csrr(vcpu, srr0, srr1);
233 }
234}
235
236static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
237{
238 vcpu->arch.mcsrr0 = srr0;
239 vcpu->arch.mcsrr1 = srr1;
240}
241
242static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
243{
244#ifdef CONFIG_KVM_BOOKE_HV
245 return mfspr(SPRN_GDEAR);
246#else
247 return vcpu->arch.shared->dar;
248#endif
249}
250
251static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
252{
253#ifdef CONFIG_KVM_BOOKE_HV
254 mtspr(SPRN_GDEAR, dear);
255#else
256 vcpu->arch.shared->dar = dear;
257#endif
258}
259
260static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
261{
262#ifdef CONFIG_KVM_BOOKE_HV
263 return mfspr(SPRN_GESR);
264#else
265 return vcpu->arch.shared->esr;
266#endif
267}
268
269static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
270{
271#ifdef CONFIG_KVM_BOOKE_HV
272 mtspr(SPRN_GESR, esr);
273#else
274 vcpu->arch.shared->esr = esr;
275#endif
276}
277
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278/* Deliver the interrupt of the corresponding priority, if possible. */
279static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
280 unsigned int priority)
bbf45ba5 281{
d4cf3892 282 int allowed = 0;
79300f8c 283 ulong msr_mask = 0;
daf5e271 284 bool update_esr = false, update_dear = false;
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285 ulong crit_raw = vcpu->arch.shared->critical;
286 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
287 bool crit;
c5335f17 288 bool keep_irq = false;
d30f6e48 289 enum int_class int_class;
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290
291 /* Truncate crit indicators in 32 bit mode */
292 if (!(vcpu->arch.shared->msr & MSR_SF)) {
293 crit_raw &= 0xffffffff;
294 crit_r1 &= 0xffffffff;
295 }
296
297 /* Critical section when crit == r1 */
298 crit = (crit_raw == crit_r1);
299 /* ... and we're in supervisor mode */
300 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
d4cf3892 301
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302 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
303 priority = BOOKE_IRQPRIO_EXTERNAL;
304 keep_irq = true;
305 }
306
d4cf3892 307 switch (priority) {
d4cf3892 308 case BOOKE_IRQPRIO_DTLB_MISS:
d4cf3892 309 case BOOKE_IRQPRIO_DATA_STORAGE:
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310 update_dear = true;
311 /* fall through */
d4cf3892 312 case BOOKE_IRQPRIO_INST_STORAGE:
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313 case BOOKE_IRQPRIO_PROGRAM:
314 update_esr = true;
315 /* fall through */
316 case BOOKE_IRQPRIO_ITLB_MISS:
317 case BOOKE_IRQPRIO_SYSCALL:
d4cf3892 318 case BOOKE_IRQPRIO_FP_UNAVAIL:
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319 case BOOKE_IRQPRIO_SPE_UNAVAIL:
320 case BOOKE_IRQPRIO_SPE_FP_DATA:
321 case BOOKE_IRQPRIO_SPE_FP_ROUND:
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322 case BOOKE_IRQPRIO_AP_UNAVAIL:
323 case BOOKE_IRQPRIO_ALIGNMENT:
324 allowed = 1;
79300f8c 325 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 326 int_class = INT_CLASS_NONCRIT;
bbf45ba5 327 break;
d4cf3892 328 case BOOKE_IRQPRIO_CRITICAL:
4ab96919 329 case BOOKE_IRQPRIO_DBELL_CRIT:
666e7252 330 allowed = vcpu->arch.shared->msr & MSR_CE;
d30f6e48 331 allowed = allowed && !crit;
79300f8c 332 msr_mask = MSR_ME;
d30f6e48 333 int_class = INT_CLASS_CRIT;
bbf45ba5 334 break;
d4cf3892 335 case BOOKE_IRQPRIO_MACHINE_CHECK:
666e7252 336 allowed = vcpu->arch.shared->msr & MSR_ME;
d30f6e48 337 allowed = allowed && !crit;
d30f6e48 338 int_class = INT_CLASS_MC;
bbf45ba5 339 break;
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340 case BOOKE_IRQPRIO_DECREMENTER:
341 case BOOKE_IRQPRIO_FIT:
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SW
342 keep_irq = true;
343 /* fall through */
344 case BOOKE_IRQPRIO_EXTERNAL:
4ab96919 345 case BOOKE_IRQPRIO_DBELL:
666e7252 346 allowed = vcpu->arch.shared->msr & MSR_EE;
5c6cedf4 347 allowed = allowed && !crit;
79300f8c 348 msr_mask = MSR_CE | MSR_ME | MSR_DE;
d30f6e48 349 int_class = INT_CLASS_NONCRIT;
bbf45ba5 350 break;
d4cf3892 351 case BOOKE_IRQPRIO_DEBUG:
666e7252 352 allowed = vcpu->arch.shared->msr & MSR_DE;
d30f6e48 353 allowed = allowed && !crit;
79300f8c 354 msr_mask = MSR_ME;
d30f6e48 355 int_class = INT_CLASS_CRIT;
bbf45ba5 356 break;
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357 }
358
d4cf3892 359 if (allowed) {
d30f6e48
SW
360 switch (int_class) {
361 case INT_CLASS_NONCRIT:
362 set_guest_srr(vcpu, vcpu->arch.pc,
363 vcpu->arch.shared->msr);
364 break;
365 case INT_CLASS_CRIT:
366 set_guest_csrr(vcpu, vcpu->arch.pc,
367 vcpu->arch.shared->msr);
368 break;
369 case INT_CLASS_DBG:
370 set_guest_dsrr(vcpu, vcpu->arch.pc,
371 vcpu->arch.shared->msr);
372 break;
373 case INT_CLASS_MC:
374 set_guest_mcsrr(vcpu, vcpu->arch.pc,
375 vcpu->arch.shared->msr);
376 break;
377 }
378
d4cf3892 379 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
daf5e271 380 if (update_esr == true)
d30f6e48 381 set_guest_esr(vcpu, vcpu->arch.queued_esr);
daf5e271 382 if (update_dear == true)
d30f6e48 383 set_guest_dear(vcpu, vcpu->arch.queued_dear);
666e7252 384 kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
bbf45ba5 385
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AG
386 if (!keep_irq)
387 clear_bit(priority, &vcpu->arch.pending_exceptions);
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388 }
389
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390#ifdef CONFIG_KVM_BOOKE_HV
391 /*
392 * If an interrupt is pending but masked, raise a guest doorbell
393 * so that we are notified when the guest enables the relevant
394 * MSR bit.
395 */
396 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
397 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
398 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
399 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
400 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
401 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
402#endif
403
d4cf3892 404 return allowed;
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405}
406
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407static void update_timer_ints(struct kvm_vcpu *vcpu)
408{
409 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
410 kvmppc_core_queue_dec(vcpu);
411 else
412 kvmppc_core_dequeue_dec(vcpu);
413}
414
c59a6a3e 415static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
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416{
417 unsigned long *pending = &vcpu->arch.pending_exceptions;
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418 unsigned int priority;
419
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SW
420 if (vcpu->requests) {
421 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) {
422 smp_mb();
423 update_timer_ints(vcpu);
424 }
425 }
426
9ab80843 427 priority = __ffs(*pending);
8b3a00fc 428 while (priority < BOOKE_IRQPRIO_MAX) {
d4cf3892 429 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
bbf45ba5 430 break;
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431
432 priority = find_next_bit(pending,
433 BITS_PER_BYTE * sizeof(*pending),
434 priority + 1);
435 }
90bba358
AG
436
437 /* Tell the guest about our interrupt status */
29ac26ef 438 vcpu->arch.shared->int_pending = !!*pending;
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439}
440
c59a6a3e 441/* Check pending exceptions and deliver one, if possible. */
a8e4ef84 442int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
c59a6a3e 443{
a8e4ef84 444 int r = 0;
c59a6a3e
SW
445 WARN_ON_ONCE(!irqs_disabled());
446
447 kvmppc_core_check_exceptions(vcpu);
448
449 if (vcpu->arch.shared->msr & MSR_WE) {
450 local_irq_enable();
451 kvm_vcpu_block(vcpu);
452 local_irq_disable();
453
454 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
a8e4ef84 455 r = 1;
c59a6a3e 456 };
a8e4ef84
AG
457
458 return r;
459}
460
461/*
462 * Common checks before entering the guest world. Call with interrupts
463 * disabled.
464 *
465 * returns !0 if a signal is pending and check_signal is true
466 */
467static int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu, bool check_signal)
468{
469 int r = 0;
470
471 WARN_ON_ONCE(!irqs_disabled());
472 while (true) {
473 if (need_resched()) {
474 local_irq_enable();
475 cond_resched();
476 local_irq_disable();
477 continue;
478 }
479
480 if (check_signal && signal_pending(current)) {
481 r = 1;
482 break;
483 }
484
485 if (kvmppc_core_prepare_to_enter(vcpu)) {
486 /* interrupts got enabled in between, so we
487 are back at square 1 */
488 continue;
489 }
490
491 break;
492 }
493
494 return r;
c59a6a3e
SW
495}
496
df6909e5
PM
497int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
498{
499 int ret;
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SW
500#ifdef CONFIG_PPC_FPU
501 unsigned int fpscr;
502 int fpexc_mode;
503 u64 fpr[32];
504#endif
df6909e5 505
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AG
506 if (!vcpu->arch.sane) {
507 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
508 return -EINVAL;
509 }
510
df6909e5 511 local_irq_disable();
a8e4ef84 512 if (kvmppc_prepare_to_enter(vcpu, true)) {
1d1ef222
SW
513 kvm_run->exit_reason = KVM_EXIT_INTR;
514 ret = -EINTR;
515 goto out;
516 }
517
df6909e5 518 kvm_guest_enter();
8fae845f
SW
519
520#ifdef CONFIG_PPC_FPU
521 /* Save userspace FPU state in stack */
522 enable_kernel_fp();
523 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
524 fpscr = current->thread.fpscr.val;
525 fpexc_mode = current->thread.fpexc_mode;
526
527 /* Restore guest FPU state to thread */
528 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
529 current->thread.fpscr.val = vcpu->arch.fpscr;
530
531 /*
532 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
533 * as always using the FPU. Kernel usage of FP (via
534 * enable_kernel_fp()) in this thread must not occur while
535 * vcpu->fpu_active is set.
536 */
537 vcpu->fpu_active = 1;
538
539 kvmppc_load_guest_fp(vcpu);
540#endif
541
df6909e5 542 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
8fae845f
SW
543
544#ifdef CONFIG_PPC_FPU
545 kvmppc_save_guest_fp(vcpu);
546
547 vcpu->fpu_active = 0;
548
549 /* Save guest FPU state from thread */
550 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
551 vcpu->arch.fpscr = current->thread.fpscr.val;
552
553 /* Restore userspace FPU state from stack */
554 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
555 current->thread.fpscr.val = fpscr;
556 current->thread.fpexc_mode = fpexc_mode;
557#endif
558
df6909e5 559 kvm_guest_exit();
df6909e5 560
1d1ef222
SW
561out:
562 local_irq_enable();
df6909e5
PM
563 return ret;
564}
565
d30f6e48
SW
566static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
567{
568 enum emulation_result er;
569
570 er = kvmppc_emulate_instruction(run, vcpu);
571 switch (er) {
572 case EMULATE_DONE:
573 /* don't overwrite subtypes, just account kvm_stats */
574 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
575 /* Future optimization: only reload non-volatiles if
576 * they were actually modified by emulation. */
577 return RESUME_GUEST_NV;
578
579 case EMULATE_DO_DCR:
580 run->exit_reason = KVM_EXIT_DCR;
581 return RESUME_HOST;
582
583 case EMULATE_FAIL:
d30f6e48
SW
584 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
585 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
586 /* For debugging, encode the failing instruction and
587 * report it to userspace. */
588 run->hw.hardware_exit_reason = ~0ULL << 32;
589 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
d1ff5499 590 kvmppc_core_queue_program(vcpu, ESR_PIL);
d30f6e48
SW
591 return RESUME_HOST;
592
593 default:
594 BUG();
595 }
596}
597
4e642ccb 598static void kvmppc_fill_pt_regs(struct pt_regs *regs)
bbf45ba5 599{
4e642ccb 600 ulong r1, ip, msr, lr;
bbf45ba5 601
4e642ccb
AG
602 asm("mr %0, 1" : "=r"(r1));
603 asm("mflr %0" : "=r"(lr));
604 asm("mfmsr %0" : "=r"(msr));
605 asm("bl 1f; 1: mflr %0" : "=r"(ip));
606
607 memset(regs, 0, sizeof(*regs));
608 regs->gpr[1] = r1;
609 regs->nip = ip;
610 regs->msr = msr;
611 regs->link = lr;
612}
613
614static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
615 unsigned int exit_nr)
616{
617 struct pt_regs regs;
73e75b41 618
d30f6e48
SW
619 switch (exit_nr) {
620 case BOOKE_INTERRUPT_EXTERNAL:
4e642ccb
AG
621 kvmppc_fill_pt_regs(&regs);
622 do_IRQ(&regs);
d30f6e48 623 break;
d30f6e48 624 case BOOKE_INTERRUPT_DECREMENTER:
4e642ccb
AG
625 kvmppc_fill_pt_regs(&regs);
626 timer_interrupt(&regs);
d30f6e48 627 break;
d30f6e48
SW
628#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
629 case BOOKE_INTERRUPT_DOORBELL:
4e642ccb
AG
630 kvmppc_fill_pt_regs(&regs);
631 doorbell_exception(&regs);
d30f6e48
SW
632 break;
633#endif
634 case BOOKE_INTERRUPT_MACHINE_CHECK:
635 /* FIXME */
636 break;
637 }
4e642ccb
AG
638}
639
640/**
641 * kvmppc_handle_exit
642 *
643 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
644 */
645int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
646 unsigned int exit_nr)
647{
648 int r = RESUME_HOST;
649
650 /* update before a new last_exit_type is rewritten */
651 kvmppc_update_timing_stats(vcpu);
652
653 /* restart interrupts if they were meant for the host */
654 kvmppc_restart_interrupt(vcpu, exit_nr);
d30f6e48 655
bbf45ba5
HB
656 local_irq_enable();
657
658 run->exit_reason = KVM_EXIT_UNKNOWN;
659 run->ready_for_interrupt_injection = 1;
660
661 switch (exit_nr) {
662 case BOOKE_INTERRUPT_MACHINE_CHECK:
c35c9d84
AG
663 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
664 kvmppc_dump_vcpu(vcpu);
665 /* For debugging, send invalid exit reason to user space */
666 run->hw.hardware_exit_reason = ~1ULL << 32;
667 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
668 r = RESUME_HOST;
bbf45ba5
HB
669 break;
670
671 case BOOKE_INTERRUPT_EXTERNAL:
7b701591 672 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1b6766c7
HB
673 r = RESUME_GUEST;
674 break;
675
bbf45ba5 676 case BOOKE_INTERRUPT_DECREMENTER:
7b701591 677 kvmppc_account_exit(vcpu, DEC_EXITS);
bbf45ba5
HB
678 r = RESUME_GUEST;
679 break;
680
d30f6e48
SW
681 case BOOKE_INTERRUPT_DOORBELL:
682 kvmppc_account_exit(vcpu, DBELL_EXITS);
d30f6e48
SW
683 r = RESUME_GUEST;
684 break;
685
686 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
687 kvmppc_account_exit(vcpu, GDBELL_EXITS);
688
689 /*
690 * We are here because there is a pending guest interrupt
691 * which could not be delivered as MSR_CE or MSR_ME was not
692 * set. Once we break from here we will retry delivery.
693 */
694 r = RESUME_GUEST;
695 break;
696
697 case BOOKE_INTERRUPT_GUEST_DBELL:
698 kvmppc_account_exit(vcpu, GDBELL_EXITS);
699
700 /*
701 * We are here because there is a pending guest interrupt
702 * which could not be delivered as MSR_EE was not set. Once
703 * we break from here we will retry delivery.
704 */
705 r = RESUME_GUEST;
706 break;
707
95f2e921
AG
708 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
709 r = RESUME_GUEST;
710 break;
711
d30f6e48
SW
712 case BOOKE_INTERRUPT_HV_PRIV:
713 r = emulation_exit(run, vcpu);
714 break;
715
bbf45ba5 716 case BOOKE_INTERRUPT_PROGRAM:
d30f6e48 717 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
0268597c
AG
718 /*
719 * Program traps generated by user-level software must
720 * be handled by the guest kernel.
721 *
722 * In GS mode, hypervisor privileged instructions trap
723 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
724 * actual program interrupts, handled by the guest.
725 */
daf5e271 726 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
bbf45ba5 727 r = RESUME_GUEST;
7b701591 728 kvmppc_account_exit(vcpu, USR_PR_INST);
bbf45ba5
HB
729 break;
730 }
731
d30f6e48 732 r = emulation_exit(run, vcpu);
bbf45ba5
HB
733 break;
734
de368dce 735 case BOOKE_INTERRUPT_FP_UNAVAIL:
d4cf3892 736 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
7b701591 737 kvmppc_account_exit(vcpu, FP_UNAVAIL);
de368dce
CE
738 r = RESUME_GUEST;
739 break;
740
4cd35f67
SW
741#ifdef CONFIG_SPE
742 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
743 if (vcpu->arch.shared->msr & MSR_SPE)
744 kvmppc_vcpu_enable_spe(vcpu);
745 else
746 kvmppc_booke_queue_irqprio(vcpu,
747 BOOKE_IRQPRIO_SPE_UNAVAIL);
bb3a8a17
HB
748 r = RESUME_GUEST;
749 break;
4cd35f67 750 }
bb3a8a17
HB
751
752 case BOOKE_INTERRUPT_SPE_FP_DATA:
753 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
754 r = RESUME_GUEST;
755 break;
756
757 case BOOKE_INTERRUPT_SPE_FP_ROUND:
758 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
759 r = RESUME_GUEST;
760 break;
4cd35f67
SW
761#else
762 case BOOKE_INTERRUPT_SPE_UNAVAIL:
763 /*
764 * Guest wants SPE, but host kernel doesn't support it. Send
765 * an "unimplemented operation" program check to the guest.
766 */
767 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
768 r = RESUME_GUEST;
769 break;
770
771 /*
772 * These really should never happen without CONFIG_SPE,
773 * as we should never enable the real MSR[SPE] in the guest.
774 */
775 case BOOKE_INTERRUPT_SPE_FP_DATA:
776 case BOOKE_INTERRUPT_SPE_FP_ROUND:
777 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
778 __func__, exit_nr, vcpu->arch.pc);
779 run->hw.hardware_exit_reason = exit_nr;
780 r = RESUME_HOST;
781 break;
782#endif
bb3a8a17 783
bbf45ba5 784 case BOOKE_INTERRUPT_DATA_STORAGE:
daf5e271
LY
785 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
786 vcpu->arch.fault_esr);
7b701591 787 kvmppc_account_exit(vcpu, DSI_EXITS);
bbf45ba5
HB
788 r = RESUME_GUEST;
789 break;
790
791 case BOOKE_INTERRUPT_INST_STORAGE:
daf5e271 792 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
7b701591 793 kvmppc_account_exit(vcpu, ISI_EXITS);
bbf45ba5
HB
794 r = RESUME_GUEST;
795 break;
796
d30f6e48
SW
797#ifdef CONFIG_KVM_BOOKE_HV
798 case BOOKE_INTERRUPT_HV_SYSCALL:
799 if (!(vcpu->arch.shared->msr & MSR_PR)) {
800 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
801 } else {
802 /*
803 * hcall from guest userspace -- send privileged
804 * instruction program check.
805 */
806 kvmppc_core_queue_program(vcpu, ESR_PPR);
807 }
808
809 r = RESUME_GUEST;
810 break;
811#else
bbf45ba5 812 case BOOKE_INTERRUPT_SYSCALL:
2a342ed5
AG
813 if (!(vcpu->arch.shared->msr & MSR_PR) &&
814 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
815 /* KVM PV hypercalls */
816 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
817 r = RESUME_GUEST;
818 } else {
819 /* Guest syscalls */
820 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
821 }
7b701591 822 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
bbf45ba5
HB
823 r = RESUME_GUEST;
824 break;
d30f6e48 825#endif
bbf45ba5
HB
826
827 case BOOKE_INTERRUPT_DTLB_MISS: {
bbf45ba5 828 unsigned long eaddr = vcpu->arch.fault_dear;
7924bd41 829 int gtlb_index;
475e7cdd 830 gpa_t gpaddr;
bbf45ba5
HB
831 gfn_t gfn;
832
bf7ca4bd 833#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
834 if (!(vcpu->arch.shared->msr & MSR_PR) &&
835 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
836 kvmppc_map_magic(vcpu);
837 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
838 r = RESUME_GUEST;
839
840 break;
841 }
842#endif
843
bbf45ba5 844 /* Check the guest TLB. */
fa86b8dd 845 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
7924bd41 846 if (gtlb_index < 0) {
bbf45ba5 847 /* The guest didn't have a mapping for it. */
daf5e271
LY
848 kvmppc_core_queue_dtlb_miss(vcpu,
849 vcpu->arch.fault_dear,
850 vcpu->arch.fault_esr);
b52a638c 851 kvmppc_mmu_dtlb_miss(vcpu);
7b701591 852 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
bbf45ba5
HB
853 r = RESUME_GUEST;
854 break;
855 }
856
be8d1cae 857 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
475e7cdd 858 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
859
860 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
861 /* The guest TLB had a mapping, but the shadow TLB
862 * didn't, and it is RAM. This could be because:
863 * a) the entry is mapping the host kernel, or
864 * b) the guest used a large mapping which we're faking
865 * Either way, we need to satisfy the fault without
866 * invoking the guest. */
58a96214 867 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
7b701591 868 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
bbf45ba5
HB
869 r = RESUME_GUEST;
870 } else {
871 /* Guest has mapped and accessed a page which is not
872 * actually RAM. */
475e7cdd 873 vcpu->arch.paddr_accessed = gpaddr;
bbf45ba5 874 r = kvmppc_emulate_mmio(run, vcpu);
7b701591 875 kvmppc_account_exit(vcpu, MMIO_EXITS);
bbf45ba5
HB
876 }
877
878 break;
879 }
880
881 case BOOKE_INTERRUPT_ITLB_MISS: {
bbf45ba5 882 unsigned long eaddr = vcpu->arch.pc;
89168618 883 gpa_t gpaddr;
bbf45ba5 884 gfn_t gfn;
7924bd41 885 int gtlb_index;
bbf45ba5
HB
886
887 r = RESUME_GUEST;
888
889 /* Check the guest TLB. */
fa86b8dd 890 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
7924bd41 891 if (gtlb_index < 0) {
bbf45ba5 892 /* The guest didn't have a mapping for it. */
d4cf3892 893 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
b52a638c 894 kvmppc_mmu_itlb_miss(vcpu);
7b701591 895 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
bbf45ba5
HB
896 break;
897 }
898
7b701591 899 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
bbf45ba5 900
be8d1cae 901 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
89168618 902 gfn = gpaddr >> PAGE_SHIFT;
bbf45ba5
HB
903
904 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
905 /* The guest TLB had a mapping, but the shadow TLB
906 * didn't. This could be because:
907 * a) the entry is mapping the host kernel, or
908 * b) the guest used a large mapping which we're faking
909 * Either way, we need to satisfy the fault without
910 * invoking the guest. */
58a96214 911 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
bbf45ba5
HB
912 } else {
913 /* Guest mapped and leaped at non-RAM! */
d4cf3892 914 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
bbf45ba5
HB
915 }
916
917 break;
918 }
919
6a0ab738
HB
920 case BOOKE_INTERRUPT_DEBUG: {
921 u32 dbsr;
922
923 vcpu->arch.pc = mfspr(SPRN_CSRR0);
924
925 /* clear IAC events in DBSR register */
926 dbsr = mfspr(SPRN_DBSR);
927 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
928 mtspr(SPRN_DBSR, dbsr);
929
930 run->exit_reason = KVM_EXIT_DEBUG;
7b701591 931 kvmppc_account_exit(vcpu, DEBUG_EXITS);
6a0ab738
HB
932 r = RESUME_HOST;
933 break;
934 }
935
bbf45ba5
HB
936 default:
937 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
938 BUG();
939 }
940
a8e4ef84
AG
941 /*
942 * To avoid clobbering exit_reason, only check for signals if we
943 * aren't already exiting to userspace for some other reason.
944 */
bbf45ba5 945 local_irq_disable();
a8e4ef84
AG
946 if (kvmppc_prepare_to_enter(vcpu, !(r & RESUME_HOST))) {
947 run->exit_reason = KVM_EXIT_INTR;
948 r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
949 kvmppc_account_exit(vcpu, SIGNAL_EXITS);
bbf45ba5
HB
950 }
951
952 return r;
953}
954
955/* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
956int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
957{
082decf2 958 int i;
af8f38b3 959 int r;
082decf2 960
bbf45ba5 961 vcpu->arch.pc = 0;
b5904972 962 vcpu->arch.shared->pir = vcpu->vcpu_id;
8e5b26b5 963 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
d30f6e48 964 kvmppc_set_msr(vcpu, 0);
bbf45ba5 965
d30f6e48
SW
966#ifndef CONFIG_KVM_BOOKE_HV
967 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
49dd2c49 968 vcpu->arch.shadow_pid = 1;
d30f6e48
SW
969 vcpu->arch.shared->msr = 0;
970#endif
49dd2c49 971
082decf2
HB
972 /* Eye-catching numbers so we know if the guest takes an interrupt
973 * before it's programmed its own IVPR/IVORs. */
bbf45ba5 974 vcpu->arch.ivpr = 0x55550000;
082decf2
HB
975 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
976 vcpu->arch.ivor[i] = 0x7700 | i * 4;
bbf45ba5 977
73e75b41
HB
978 kvmppc_init_timing_stats(vcpu);
979
af8f38b3
AG
980 r = kvmppc_core_vcpu_setup(vcpu);
981 kvmppc_sanity_check(vcpu);
982 return r;
bbf45ba5
HB
983}
984
985int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
986{
987 int i;
988
989 regs->pc = vcpu->arch.pc;
992b5b29 990 regs->cr = kvmppc_get_cr(vcpu);
bbf45ba5
HB
991 regs->ctr = vcpu->arch.ctr;
992 regs->lr = vcpu->arch.lr;
992b5b29 993 regs->xer = kvmppc_get_xer(vcpu);
666e7252 994 regs->msr = vcpu->arch.shared->msr;
de7906c3
AG
995 regs->srr0 = vcpu->arch.shared->srr0;
996 regs->srr1 = vcpu->arch.shared->srr1;
bbf45ba5 997 regs->pid = vcpu->arch.pid;
a73a9599
AG
998 regs->sprg0 = vcpu->arch.shared->sprg0;
999 regs->sprg1 = vcpu->arch.shared->sprg1;
1000 regs->sprg2 = vcpu->arch.shared->sprg2;
1001 regs->sprg3 = vcpu->arch.shared->sprg3;
b5904972
SW
1002 regs->sprg4 = vcpu->arch.shared->sprg4;
1003 regs->sprg5 = vcpu->arch.shared->sprg5;
1004 regs->sprg6 = vcpu->arch.shared->sprg6;
1005 regs->sprg7 = vcpu->arch.shared->sprg7;
bbf45ba5
HB
1006
1007 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 1008 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
bbf45ba5
HB
1009
1010 return 0;
1011}
1012
1013int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1014{
1015 int i;
1016
1017 vcpu->arch.pc = regs->pc;
992b5b29 1018 kvmppc_set_cr(vcpu, regs->cr);
bbf45ba5
HB
1019 vcpu->arch.ctr = regs->ctr;
1020 vcpu->arch.lr = regs->lr;
992b5b29 1021 kvmppc_set_xer(vcpu, regs->xer);
b8fd68ac 1022 kvmppc_set_msr(vcpu, regs->msr);
de7906c3
AG
1023 vcpu->arch.shared->srr0 = regs->srr0;
1024 vcpu->arch.shared->srr1 = regs->srr1;
5ce941ee 1025 kvmppc_set_pid(vcpu, regs->pid);
a73a9599
AG
1026 vcpu->arch.shared->sprg0 = regs->sprg0;
1027 vcpu->arch.shared->sprg1 = regs->sprg1;
1028 vcpu->arch.shared->sprg2 = regs->sprg2;
1029 vcpu->arch.shared->sprg3 = regs->sprg3;
b5904972
SW
1030 vcpu->arch.shared->sprg4 = regs->sprg4;
1031 vcpu->arch.shared->sprg5 = regs->sprg5;
1032 vcpu->arch.shared->sprg6 = regs->sprg6;
1033 vcpu->arch.shared->sprg7 = regs->sprg7;
bbf45ba5 1034
8e5b26b5
AG
1035 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1036 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
bbf45ba5
HB
1037
1038 return 0;
1039}
1040
5ce941ee
SW
1041static void get_sregs_base(struct kvm_vcpu *vcpu,
1042 struct kvm_sregs *sregs)
1043{
1044 u64 tb = get_tb();
1045
1046 sregs->u.e.features |= KVM_SREGS_E_BASE;
1047
1048 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1049 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1050 sregs->u.e.mcsr = vcpu->arch.mcsr;
d30f6e48
SW
1051 sregs->u.e.esr = get_guest_esr(vcpu);
1052 sregs->u.e.dear = get_guest_dear(vcpu);
5ce941ee
SW
1053 sregs->u.e.tsr = vcpu->arch.tsr;
1054 sregs->u.e.tcr = vcpu->arch.tcr;
1055 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1056 sregs->u.e.tb = tb;
1057 sregs->u.e.vrsave = vcpu->arch.vrsave;
1058}
1059
1060static int set_sregs_base(struct kvm_vcpu *vcpu,
1061 struct kvm_sregs *sregs)
1062{
1063 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1064 return 0;
1065
1066 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1067 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1068 vcpu->arch.mcsr = sregs->u.e.mcsr;
d30f6e48
SW
1069 set_guest_esr(vcpu, sregs->u.e.esr);
1070 set_guest_dear(vcpu, sregs->u.e.dear);
5ce941ee 1071 vcpu->arch.vrsave = sregs->u.e.vrsave;
dfd4d47e 1072 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
5ce941ee 1073
dfd4d47e 1074 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
5ce941ee 1075 vcpu->arch.dec = sregs->u.e.dec;
dfd4d47e
SW
1076 kvmppc_emulate_dec(vcpu);
1077 }
5ce941ee
SW
1078
1079 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
dfd4d47e
SW
1080 vcpu->arch.tsr = sregs->u.e.tsr;
1081 update_timer_ints(vcpu);
5ce941ee
SW
1082 }
1083
1084 return 0;
1085}
1086
1087static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1088 struct kvm_sregs *sregs)
1089{
1090 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1091
841741f2 1092 sregs->u.e.pir = vcpu->vcpu_id;
5ce941ee
SW
1093 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1094 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1095 sregs->u.e.decar = vcpu->arch.decar;
1096 sregs->u.e.ivpr = vcpu->arch.ivpr;
1097}
1098
1099static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1100 struct kvm_sregs *sregs)
1101{
1102 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1103 return 0;
1104
841741f2 1105 if (sregs->u.e.pir != vcpu->vcpu_id)
5ce941ee
SW
1106 return -EINVAL;
1107
1108 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1109 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1110 vcpu->arch.decar = sregs->u.e.decar;
1111 vcpu->arch.ivpr = sregs->u.e.ivpr;
1112
1113 return 0;
1114}
1115
1116void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1117{
1118 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1119
1120 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1121 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1122 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1123 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1124 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1125 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1126 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1127 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1128 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1129 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1130 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1131 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1132 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1133 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1134 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1135 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1136}
1137
1138int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1139{
1140 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1141 return 0;
1142
1143 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1144 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1145 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1146 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1147 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1148 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1149 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1150 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1151 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1152 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1153 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1154 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1155 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1156 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1157 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1158 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1159
1160 return 0;
1161}
1162
bbf45ba5
HB
1163int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1164 struct kvm_sregs *sregs)
1165{
5ce941ee
SW
1166 sregs->pvr = vcpu->arch.pvr;
1167
1168 get_sregs_base(vcpu, sregs);
1169 get_sregs_arch206(vcpu, sregs);
1170 kvmppc_core_get_sregs(vcpu, sregs);
1171 return 0;
bbf45ba5
HB
1172}
1173
1174int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1175 struct kvm_sregs *sregs)
1176{
5ce941ee
SW
1177 int ret;
1178
1179 if (vcpu->arch.pvr != sregs->pvr)
1180 return -EINVAL;
1181
1182 ret = set_sregs_base(vcpu, sregs);
1183 if (ret < 0)
1184 return ret;
1185
1186 ret = set_sregs_arch206(vcpu, sregs);
1187 if (ret < 0)
1188 return ret;
1189
1190 return kvmppc_core_set_sregs(vcpu, sregs);
bbf45ba5
HB
1191}
1192
31f3438e
PM
1193int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1194{
1195 return -EINVAL;
1196}
1197
1198int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1199{
1200 return -EINVAL;
1201}
1202
bbf45ba5
HB
1203int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1204{
1205 return -ENOTSUPP;
1206}
1207
1208int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1209{
1210 return -ENOTSUPP;
1211}
1212
bbf45ba5
HB
1213int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1214 struct kvm_translation *tr)
1215{
98001d8d
AK
1216 int r;
1217
98001d8d 1218 r = kvmppc_core_vcpu_translate(vcpu, tr);
98001d8d 1219 return r;
bbf45ba5 1220}
d9fbd03d 1221
4e755758
AG
1222int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1223{
1224 return -ENOTSUPP;
1225}
1226
f9e0554d
PM
1227int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1228 struct kvm_userspace_memory_region *mem)
1229{
1230 return 0;
1231}
1232
1233void kvmppc_core_commit_memory_region(struct kvm *kvm,
1234 struct kvm_userspace_memory_region *mem)
1235{
1236}
1237
dfd4d47e
SW
1238void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1239{
1240 vcpu->arch.tcr = new_tcr;
1241 update_timer_ints(vcpu);
1242}
1243
1244void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1245{
1246 set_bits(tsr_bits, &vcpu->arch.tsr);
1247 smp_wmb();
1248 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1249 kvm_vcpu_kick(vcpu);
1250}
1251
1252void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1253{
1254 clear_bits(tsr_bits, &vcpu->arch.tsr);
1255 update_timer_ints(vcpu);
1256}
1257
1258void kvmppc_decrementer_func(unsigned long data)
1259{
1260 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1261
1262 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1263}
1264
94fa9d99
SW
1265void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1266{
d30f6e48 1267 current->thread.kvm_vcpu = vcpu;
94fa9d99
SW
1268}
1269
1270void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1271{
d30f6e48 1272 current->thread.kvm_vcpu = NULL;
94fa9d99
SW
1273}
1274
2986b8c7 1275int __init kvmppc_booke_init(void)
d9fbd03d 1276{
d30f6e48 1277#ifndef CONFIG_KVM_BOOKE_HV
d9fbd03d
HB
1278 unsigned long ivor[16];
1279 unsigned long max_ivor = 0;
1280 int i;
1281
1282 /* We install our own exception handlers by hijacking IVPR. IVPR must
1283 * be 16-bit aligned, so we need a 64KB allocation. */
1284 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1285 VCPU_SIZE_ORDER);
1286 if (!kvmppc_booke_handlers)
1287 return -ENOMEM;
1288
1289 /* XXX make sure our handlers are smaller than Linux's */
1290
1291 /* Copy our interrupt handlers to match host IVORs. That way we don't
1292 * have to swap the IVORs on every guest/host transition. */
1293 ivor[0] = mfspr(SPRN_IVOR0);
1294 ivor[1] = mfspr(SPRN_IVOR1);
1295 ivor[2] = mfspr(SPRN_IVOR2);
1296 ivor[3] = mfspr(SPRN_IVOR3);
1297 ivor[4] = mfspr(SPRN_IVOR4);
1298 ivor[5] = mfspr(SPRN_IVOR5);
1299 ivor[6] = mfspr(SPRN_IVOR6);
1300 ivor[7] = mfspr(SPRN_IVOR7);
1301 ivor[8] = mfspr(SPRN_IVOR8);
1302 ivor[9] = mfspr(SPRN_IVOR9);
1303 ivor[10] = mfspr(SPRN_IVOR10);
1304 ivor[11] = mfspr(SPRN_IVOR11);
1305 ivor[12] = mfspr(SPRN_IVOR12);
1306 ivor[13] = mfspr(SPRN_IVOR13);
1307 ivor[14] = mfspr(SPRN_IVOR14);
1308 ivor[15] = mfspr(SPRN_IVOR15);
1309
1310 for (i = 0; i < 16; i++) {
1311 if (ivor[i] > max_ivor)
1312 max_ivor = ivor[i];
1313
1314 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1315 kvmppc_handlers_start + i * kvmppc_handler_len,
1316 kvmppc_handler_len);
1317 }
1318 flush_icache_range(kvmppc_booke_handlers,
1319 kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
d30f6e48 1320#endif /* !BOOKE_HV */
db93f574 1321 return 0;
d9fbd03d
HB
1322}
1323
db93f574 1324void __exit kvmppc_booke_exit(void)
d9fbd03d
HB
1325{
1326 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1327 kvm_exit();
1328}
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