Merge remote-tracking branch 'regulator/topic/lp3972' into regulator-next
[deliverable/linux.git] / arch / powerpc / kvm / e500_emulate.c
CommitLineData
bc8080cb 1/*
5ce941ee 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
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3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
4ab96919 17#include <asm/dbell.h>
bc8080cb
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18
19#include "booke.h"
29a5a6f9 20#include "e500.h"
bc8080cb 21
4ab96919
AG
22#define XOP_MSGSND 206
23#define XOP_MSGCLR 238
bc8080cb
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24#define XOP_TLBIVAX 786
25#define XOP_TLBSX 914
26#define XOP_TLBRE 946
27#define XOP_TLBWE 978
ab9fc405 28#define XOP_TLBILX 18
bc8080cb 29
4ab96919
AG
30#ifdef CONFIG_KVM_E500MC
31static int dbell2prio(ulong param)
32{
33 int msg = param & PPC_DBELL_TYPE_MASK;
34 int prio = -1;
35
36 switch (msg) {
37 case PPC_DBELL_TYPE(PPC_DBELL):
38 prio = BOOKE_IRQPRIO_DBELL;
39 break;
40 case PPC_DBELL_TYPE(PPC_DBELL_CRIT):
41 prio = BOOKE_IRQPRIO_DBELL_CRIT;
42 break;
43 default:
44 break;
45 }
46
47 return prio;
48}
49
50static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb)
51{
52 ulong param = vcpu->arch.gpr[rb];
53 int prio = dbell2prio(param);
54
55 if (prio < 0)
56 return EMULATE_FAIL;
57
58 clear_bit(prio, &vcpu->arch.pending_exceptions);
59 return EMULATE_DONE;
60}
61
62static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb)
63{
64 ulong param = vcpu->arch.gpr[rb];
65 int prio = dbell2prio(rb);
66 int pir = param & PPC_DBELL_PIR_MASK;
67 int i;
68 struct kvm_vcpu *cvcpu;
69
70 if (prio < 0)
71 return EMULATE_FAIL;
72
73 kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) {
74 int cpir = cvcpu->arch.shared->pir;
75 if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) {
76 set_bit(prio, &cvcpu->arch.pending_exceptions);
77 kvm_vcpu_kick(cvcpu);
78 }
79 }
80
81 return EMULATE_DONE;
82}
83#endif
84
bc8080cb
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85int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
86 unsigned int inst, int *advance)
87{
88 int emulated = EMULATE_DONE;
c46dc9a8
AG
89 int ra = get_ra(inst);
90 int rb = get_rb(inst);
91 int rt = get_rt(inst);
7cdd7a95 92 gva_t ea;
bc8080cb
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93
94 switch (get_op(inst)) {
95 case 31:
96 switch (get_xop(inst)) {
97
4ab96919
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98#ifdef CONFIG_KVM_E500MC
99 case XOP_MSGSND:
c46dc9a8 100 emulated = kvmppc_e500_emul_msgsnd(vcpu, rb);
4ab96919
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101 break;
102
103 case XOP_MSGCLR:
c46dc9a8 104 emulated = kvmppc_e500_emul_msgclr(vcpu, rb);
4ab96919
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105 break;
106#endif
107
bc8080cb
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108 case XOP_TLBRE:
109 emulated = kvmppc_e500_emul_tlbre(vcpu);
110 break;
111
112 case XOP_TLBWE:
113 emulated = kvmppc_e500_emul_tlbwe(vcpu);
114 break;
115
116 case XOP_TLBSX:
7cdd7a95
MC
117 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
118 emulated = kvmppc_e500_emul_tlbsx(vcpu, ea);
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119 break;
120
7cdd7a95
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121 case XOP_TLBILX: {
122 int type = rt & 0x3;
123 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
124 emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea);
ab9fc405 125 break;
7cdd7a95 126 }
ab9fc405 127
bc8080cb 128 case XOP_TLBIVAX:
7cdd7a95
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129 ea = kvmppc_get_ea_indexed(vcpu, ra, rb);
130 emulated = kvmppc_e500_emul_tlbivax(vcpu, ea);
bc8080cb
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131 break;
132
133 default:
134 emulated = EMULATE_FAIL;
135 }
136
137 break;
138
139 default:
140 emulated = EMULATE_FAIL;
141 }
142
143 if (emulated == EMULATE_FAIL)
144 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
145
146 return emulated;
147}
148
54771e62 149int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
bc8080cb
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150{
151 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
152 int emulated = EMULATE_DONE;
153
154 switch (sprn) {
73196cd3 155#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 156 case SPRN_PID:
5ce941ee 157 kvmppc_set_pid(vcpu, spr_val);
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158 break;
159 case SPRN_PID1:
dd9ebf1f
LY
160 if (spr_val != 0)
161 return EMULATE_FAIL;
54771e62
AG
162 vcpu_e500->pid[1] = spr_val;
163 break;
bc8080cb 164 case SPRN_PID2:
dd9ebf1f
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165 if (spr_val != 0)
166 return EMULATE_FAIL;
54771e62
AG
167 vcpu_e500->pid[2] = spr_val;
168 break;
bc8080cb 169 case SPRN_MAS0:
54771e62
AG
170 vcpu->arch.shared->mas0 = spr_val;
171 break;
bc8080cb 172 case SPRN_MAS1:
54771e62
AG
173 vcpu->arch.shared->mas1 = spr_val;
174 break;
bc8080cb 175 case SPRN_MAS2:
54771e62
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176 vcpu->arch.shared->mas2 = spr_val;
177 break;
bc8080cb 178 case SPRN_MAS3:
b5904972
SW
179 vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff;
180 vcpu->arch.shared->mas7_3 |= spr_val;
dc83b8bc 181 break;
bc8080cb 182 case SPRN_MAS4:
54771e62
AG
183 vcpu->arch.shared->mas4 = spr_val;
184 break;
bc8080cb 185 case SPRN_MAS6:
54771e62
AG
186 vcpu->arch.shared->mas6 = spr_val;
187 break;
bc8080cb 188 case SPRN_MAS7:
b5904972
SW
189 vcpu->arch.shared->mas7_3 &= (u64)0xffffffff;
190 vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32;
dc83b8bc 191 break;
73196cd3 192#endif
d86be077
LY
193 case SPRN_L1CSR0:
194 vcpu_e500->l1csr0 = spr_val;
195 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
196 break;
bc8080cb 197 case SPRN_L1CSR1:
54771e62
AG
198 vcpu_e500->l1csr1 = spr_val;
199 break;
bc8080cb 200 case SPRN_HID0:
54771e62
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201 vcpu_e500->hid0 = spr_val;
202 break;
bc8080cb 203 case SPRN_HID1:
54771e62
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204 vcpu_e500->hid1 = spr_val;
205 break;
bc8080cb 206
b0a1835d
LY
207 case SPRN_MMUCSR0:
208 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5 209 spr_val);
b0a1835d
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210 break;
211
bb3a8a17
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212 /* extra exceptions */
213 case SPRN_IVOR32:
8e5b26b5 214 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17
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215 break;
216 case SPRN_IVOR33:
8e5b26b5 217 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17
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218 break;
219 case SPRN_IVOR34:
8e5b26b5 220 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17
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221 break;
222 case SPRN_IVOR35:
8e5b26b5 223 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17 224 break;
73196cd3
SW
225#ifdef CONFIG_KVM_BOOKE_HV
226 case SPRN_IVOR36:
227 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val;
228 break;
229 case SPRN_IVOR37:
230 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val;
231 break;
232#endif
bc8080cb 233 default:
54771e62 234 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
bc8080cb
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235 }
236
237 return emulated;
238}
239
54771e62 240int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
bc8080cb
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241{
242 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
243 int emulated = EMULATE_DONE;
244
245 switch (sprn) {
73196cd3 246#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb 247 case SPRN_PID:
54771e62
AG
248 *spr_val = vcpu_e500->pid[0];
249 break;
bc8080cb 250 case SPRN_PID1:
54771e62
AG
251 *spr_val = vcpu_e500->pid[1];
252 break;
bc8080cb 253 case SPRN_PID2:
54771e62
AG
254 *spr_val = vcpu_e500->pid[2];
255 break;
bc8080cb 256 case SPRN_MAS0:
54771e62
AG
257 *spr_val = vcpu->arch.shared->mas0;
258 break;
bc8080cb 259 case SPRN_MAS1:
54771e62
AG
260 *spr_val = vcpu->arch.shared->mas1;
261 break;
bc8080cb 262 case SPRN_MAS2:
54771e62
AG
263 *spr_val = vcpu->arch.shared->mas2;
264 break;
bc8080cb 265 case SPRN_MAS3:
54771e62 266 *spr_val = (u32)vcpu->arch.shared->mas7_3;
b5904972 267 break;
bc8080cb 268 case SPRN_MAS4:
54771e62
AG
269 *spr_val = vcpu->arch.shared->mas4;
270 break;
bc8080cb 271 case SPRN_MAS6:
54771e62
AG
272 *spr_val = vcpu->arch.shared->mas6;
273 break;
bc8080cb 274 case SPRN_MAS7:
54771e62 275 *spr_val = vcpu->arch.shared->mas7_3 >> 32;
b5904972 276 break;
73196cd3 277#endif
21bd000a
BB
278 case SPRN_DECAR:
279 *spr_val = vcpu->arch.decar;
280 break;
bc8080cb 281 case SPRN_TLB0CFG:
54771e62
AG
282 *spr_val = vcpu->arch.tlbcfg[0];
283 break;
bc8080cb 284 case SPRN_TLB1CFG:
54771e62
AG
285 *spr_val = vcpu->arch.tlbcfg[1];
286 break;
d86be077 287 case SPRN_L1CSR0:
54771e62
AG
288 *spr_val = vcpu_e500->l1csr0;
289 break;
bc8080cb 290 case SPRN_L1CSR1:
54771e62
AG
291 *spr_val = vcpu_e500->l1csr1;
292 break;
bc8080cb 293 case SPRN_HID0:
54771e62
AG
294 *spr_val = vcpu_e500->hid0;
295 break;
bc8080cb 296 case SPRN_HID1:
54771e62
AG
297 *spr_val = vcpu_e500->hid1;
298 break;
90d34b0e 299 case SPRN_SVR:
54771e62
AG
300 *spr_val = vcpu_e500->svr;
301 break;
bc8080cb 302
b0a1835d 303 case SPRN_MMUCSR0:
54771e62
AG
304 *spr_val = 0;
305 break;
b0a1835d 306
06579dd9 307 case SPRN_MMUCFG:
54771e62
AG
308 *spr_val = vcpu->arch.mmucfg;
309 break;
06579dd9 310
bb3a8a17
HB
311 /* extra exceptions */
312 case SPRN_IVOR32:
54771e62 313 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
bb3a8a17
HB
314 break;
315 case SPRN_IVOR33:
54771e62 316 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
bb3a8a17
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317 break;
318 case SPRN_IVOR34:
54771e62 319 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
bb3a8a17
HB
320 break;
321 case SPRN_IVOR35:
54771e62 322 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
bb3a8a17 323 break;
73196cd3
SW
324#ifdef CONFIG_KVM_BOOKE_HV
325 case SPRN_IVOR36:
54771e62 326 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
73196cd3
SW
327 break;
328 case SPRN_IVOR37:
54771e62 329 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
73196cd3
SW
330 break;
331#endif
bc8080cb 332 default:
54771e62 333 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
bc8080cb
HB
334 }
335
336 return emulated;
337}
338
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