projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
KVM: Report IRQ injection status for MSI delivered interrupts
[deliverable/linux.git] / arch / powerpc / kvm / e500_emulate.c
CommitLineData
bc8080cb
HB		 1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
17#include <asm/kvm_e500.h>
18
19#include "booke.h"
20#include "e500_tlb.h"
21
22#define XOP_TLBIVAX 786
23#define XOP_TLBSX 914
24#define XOP_TLBRE 946
25#define XOP_TLBWE 978
26
27int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
28 unsigned int inst, int *advance)
29{
30 int emulated = EMULATE_DONE;
31 int ra;
32 int rb;
bc8080cb
HB		 33
34 switch (get_op(inst)) {
35 case 31:
36 switch (get_xop(inst)) {
37
38 case XOP_TLBRE:
39 emulated = kvmppc_e500_emul_tlbre(vcpu);
40 break;
41
42 case XOP_TLBWE:
43 emulated = kvmppc_e500_emul_tlbwe(vcpu);
44 break;
45
46 case XOP_TLBSX:
47 rb = get_rb(inst);
48 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
49 break;
50
51 case XOP_TLBIVAX:
52 ra = get_ra(inst);
53 rb = get_rb(inst);
54 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
55 break;
56
57 default:
58 emulated = EMULATE_FAIL;
59 }
60
61 break;
62
63 default:
64 emulated = EMULATE_FAIL;
65 }
66
67 if (emulated == EMULATE_FAIL)
68 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
69
70 return emulated;
71}
72
73int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
74{
75 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
76 int emulated = EMULATE_DONE;
77
78 switch (sprn) {
79 case SPRN_PID:
80 vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
81 vcpu->arch.pid = vcpu->arch.gpr[rs];
82 break;
83 case SPRN_PID1:
84 vcpu_e500->pid[1] = vcpu->arch.gpr[rs]; break;
85 case SPRN_PID2:
86 vcpu_e500->pid[2] = vcpu->arch.gpr[rs]; break;
87 case SPRN_MAS0:
88 vcpu_e500->mas0 = vcpu->arch.gpr[rs]; break;
89 case SPRN_MAS1:
90 vcpu_e500->mas1 = vcpu->arch.gpr[rs]; break;
91 case SPRN_MAS2:
92 vcpu_e500->mas2 = vcpu->arch.gpr[rs]; break;
93 case SPRN_MAS3:
94 vcpu_e500->mas3 = vcpu->arch.gpr[rs]; break;
95 case SPRN_MAS4:
96 vcpu_e500->mas4 = vcpu->arch.gpr[rs]; break;
97 case SPRN_MAS6:
98 vcpu_e500->mas6 = vcpu->arch.gpr[rs]; break;
99 case SPRN_MAS7:
100 vcpu_e500->mas7 = vcpu->arch.gpr[rs]; break;
101 case SPRN_L1CSR1:
102 vcpu_e500->l1csr1 = vcpu->arch.gpr[rs]; break;
103 case SPRN_HID0:
104 vcpu_e500->hid0 = vcpu->arch.gpr[rs]; break;
105 case SPRN_HID1:
106 vcpu_e500->hid1 = vcpu->arch.gpr[rs]; break;
107
bb3a8a17
HB		 108 /* extra exceptions */
109 case SPRN_IVOR32:
110 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = vcpu->arch.gpr[rs];
111 break;
112 case SPRN_IVOR33:
113 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = vcpu->arch.gpr[rs];
114 break;
115 case SPRN_IVOR34:
116 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = vcpu->arch.gpr[rs];
117 break;
118 case SPRN_IVOR35:
119 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = vcpu->arch.gpr[rs];
120 break;
121
bc8080cb
HB		 122 default:
123 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
124 }
125
126 return emulated;
127}
128
129int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
130{
131 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
132 int emulated = EMULATE_DONE;
133
134 switch (sprn) {
135 case SPRN_PID:
136 vcpu->arch.gpr[rt] = vcpu_e500->pid[0]; break;
137 case SPRN_PID1:
138 vcpu->arch.gpr[rt] = vcpu_e500->pid[1]; break;
139 case SPRN_PID2:
140 vcpu->arch.gpr[rt] = vcpu_e500->pid[2]; break;
141 case SPRN_MAS0:
142 vcpu->arch.gpr[rt] = vcpu_e500->mas0; break;
143 case SPRN_MAS1:
144 vcpu->arch.gpr[rt] = vcpu_e500->mas1; break;
145 case SPRN_MAS2:
146 vcpu->arch.gpr[rt] = vcpu_e500->mas2; break;
147 case SPRN_MAS3:
148 vcpu->arch.gpr[rt] = vcpu_e500->mas3; break;
149 case SPRN_MAS4:
150 vcpu->arch.gpr[rt] = vcpu_e500->mas4; break;
151 case SPRN_MAS6:
152 vcpu->arch.gpr[rt] = vcpu_e500->mas6; break;
153 case SPRN_MAS7:
154 vcpu->arch.gpr[rt] = vcpu_e500->mas7; break;
155
156 case SPRN_TLB0CFG:
157 vcpu->arch.gpr[rt] = mfspr(SPRN_TLB0CFG);
158 vcpu->arch.gpr[rt] &= ~0xfffUL;
159 vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[0];
160 break;
161
162 case SPRN_TLB1CFG:
163 vcpu->arch.gpr[rt] = mfspr(SPRN_TLB1CFG);
164 vcpu->arch.gpr[rt] &= ~0xfffUL;
165 vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[1];
166 break;
167
168 case SPRN_L1CSR1:
169 vcpu->arch.gpr[rt] = vcpu_e500->l1csr1; break;
170 case SPRN_HID0:
171 vcpu->arch.gpr[rt] = vcpu_e500->hid0; break;
172 case SPRN_HID1:
173 vcpu->arch.gpr[rt] = vcpu_e500->hid1; break;
174
bb3a8a17
HB		 175 /* extra exceptions */
176 case SPRN_IVOR32:
177 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
178 break;
179 case SPRN_IVOR33:
180 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
181 break;
182 case SPRN_IVOR34:
183 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
184 break;
185 case SPRN_IVOR35:
186 vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
187 break;
bc8080cb
HB		 188 default:
189 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
190 }
191
192 return emulated;
193}
194
Linux kernel - Deliverables
This page took 0.03339 seconds and 5 git commands to generate.