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KVM: PPC: booke: save/restore VRSAVE (a.k.a. USPRG0)
[deliverable/linux.git] / arch / powerpc / kvm / e500_emulate.c
CommitLineData
bc8080cb
HB		 1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
17#include <asm/kvm_e500.h>
18
19#include "booke.h"
20#include "e500_tlb.h"
21
22#define XOP_TLBIVAX 786
23#define XOP_TLBSX 914
24#define XOP_TLBRE 946
25#define XOP_TLBWE 978
26
27int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
28 unsigned int inst, int *advance)
29{
30 int emulated = EMULATE_DONE;
31 int ra;
32 int rb;
bc8080cb
HB		 33
34 switch (get_op(inst)) {
35 case 31:
36 switch (get_xop(inst)) {
37
38 case XOP_TLBRE:
39 emulated = kvmppc_e500_emul_tlbre(vcpu);
40 break;
41
42 case XOP_TLBWE:
43 emulated = kvmppc_e500_emul_tlbwe(vcpu);
44 break;
45
46 case XOP_TLBSX:
47 rb = get_rb(inst);
48 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
49 break;
50
51 case XOP_TLBIVAX:
52 ra = get_ra(inst);
53 rb = get_rb(inst);
54 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
55 break;
56
57 default:
58 emulated = EMULATE_FAIL;
59 }
60
61 break;
62
63 default:
64 emulated = EMULATE_FAIL;
65 }
66
67 if (emulated == EMULATE_FAIL)
68 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
69
70 return emulated;
71}
72
73int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
74{
75 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
76 int emulated = EMULATE_DONE;
8e5b26b5 77 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
bc8080cb
HB		 78
79 switch (sprn) {
80 case SPRN_PID:
81 vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
8e5b26b5 82 vcpu->arch.pid = spr_val;
bc8080cb
HB		 83 break;
84 case SPRN_PID1:
8e5b26b5 85 vcpu_e500->pid[1] = spr_val; break;
bc8080cb 86 case SPRN_PID2:
8e5b26b5 87 vcpu_e500->pid[2] = spr_val; break;
bc8080cb 88 case SPRN_MAS0:
8e5b26b5 89 vcpu_e500->mas0 = spr_val; break;
bc8080cb 90 case SPRN_MAS1:
8e5b26b5 91 vcpu_e500->mas1 = spr_val; break;
bc8080cb 92 case SPRN_MAS2:
8e5b26b5 93 vcpu_e500->mas2 = spr_val; break;
bc8080cb 94 case SPRN_MAS3:
8e5b26b5 95 vcpu_e500->mas3 = spr_val; break;
bc8080cb 96 case SPRN_MAS4:
8e5b26b5 97 vcpu_e500->mas4 = spr_val; break;
bc8080cb 98 case SPRN_MAS6:
8e5b26b5 99 vcpu_e500->mas6 = spr_val; break;
bc8080cb 100 case SPRN_MAS7:
8e5b26b5 101 vcpu_e500->mas7 = spr_val; break;
d86be077
LY		 102 case SPRN_L1CSR0:
103 vcpu_e500->l1csr0 = spr_val;
104 vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC);
105 break;
bc8080cb 106 case SPRN_L1CSR1:
8e5b26b5 107 vcpu_e500->l1csr1 = spr_val; break;
bc8080cb 108 case SPRN_HID0:
8e5b26b5 109 vcpu_e500->hid0 = spr_val; break;
bc8080cb 110 case SPRN_HID1:
8e5b26b5 111 vcpu_e500->hid1 = spr_val; break;
bc8080cb 112
b0a1835d
LY		 113 case SPRN_MMUCSR0:
114 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
8e5b26b5 115 spr_val);
b0a1835d
LY		 116 break;
117
bb3a8a17
HB		 118 /* extra exceptions */
119 case SPRN_IVOR32:
8e5b26b5 120 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
bb3a8a17
HB		 121 break;
122 case SPRN_IVOR33:
8e5b26b5 123 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
bb3a8a17
HB		 124 break;
125 case SPRN_IVOR34:
8e5b26b5 126 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
bb3a8a17
HB		 127 break;
128 case SPRN_IVOR35:
8e5b26b5 129 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
bb3a8a17
HB		 130 break;
131
bc8080cb
HB		 132 default:
133 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
134 }
135
136 return emulated;
137}
138
139int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
140{
141 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
142 int emulated = EMULATE_DONE;
143
144 switch (sprn) {
145 case SPRN_PID:
8e5b26b5 146 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
bc8080cb 147 case SPRN_PID1:
8e5b26b5 148 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
bc8080cb 149 case SPRN_PID2:
8e5b26b5 150 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
bc8080cb 151 case SPRN_MAS0:
8e5b26b5 152 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
bc8080cb 153 case SPRN_MAS1:
8e5b26b5 154 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
bc8080cb 155 case SPRN_MAS2:
8e5b26b5 156 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
bc8080cb 157 case SPRN_MAS3:
8e5b26b5 158 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
bc8080cb 159 case SPRN_MAS4:
8e5b26b5 160 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
bc8080cb 161 case SPRN_MAS6:
8e5b26b5 162 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
bc8080cb 163 case SPRN_MAS7:
8e5b26b5 164 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;
bc8080cb
HB		 165
166 case SPRN_TLB0CFG:
da15bf43 167 kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb0cfg); break;
bc8080cb 168 case SPRN_TLB1CFG:
da15bf43 169 kvmppc_set_gpr(vcpu, rt, vcpu_e500->tlb1cfg); break;
d86be077
LY		 170 case SPRN_L1CSR0:
171 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr0); break;
bc8080cb 172 case SPRN_L1CSR1:
8e5b26b5 173 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
bc8080cb 174 case SPRN_HID0:
8e5b26b5 175 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
bc8080cb 176 case SPRN_HID1:
8e5b26b5 177 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
90d34b0e
SW		 178 case SPRN_SVR:
179 kvmppc_set_gpr(vcpu, rt, vcpu_e500->svr); break;
bc8080cb 180
b0a1835d 181 case SPRN_MMUCSR0:
8e5b26b5 182 kvmppc_set_gpr(vcpu, rt, 0); break;
b0a1835d 183
06579dd9 184 case SPRN_MMUCFG:
8e5b26b5 185 kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;
06579dd9 186
bb3a8a17
HB		 187 /* extra exceptions */
188 case SPRN_IVOR32:
8e5b26b5 189 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
bb3a8a17
HB		 190 break;
191 case SPRN_IVOR33:
8e5b26b5 192 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
bb3a8a17
HB		 193 break;
194 case SPRN_IVOR34:
8e5b26b5 195 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
bb3a8a17
HB		 196 break;
197 case SPRN_IVOR35:
8e5b26b5 198 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
bb3a8a17 199 break;
bc8080cb
HB		 200 default:
201 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
202 }
203
204 return emulated;
205}
206
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