KVM: PPC: e500: clean up arch/powerpc/kvm/e500.h
[deliverable/linux.git] / arch / powerpc / kvm / e500_tlb.c
CommitLineData
bc8080cb 1/*
49ea0695 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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3 *
4 * Author: Yu Liu, yu.liu@freescale.com
5 *
6 * Description:
7 * This file is based on arch/powerpc/kvm/44x_tlb.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
0164c0f0 15#include <linux/kernel.h>
bc8080cb 16#include <linux/types.h>
5a0e3ad6 17#include <linux/slab.h>
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18#include <linux/string.h>
19#include <linux/kvm.h>
20#include <linux/kvm_host.h>
21#include <linux/highmem.h>
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22#include <linux/log2.h>
23#include <linux/uaccess.h>
24#include <linux/sched.h>
25#include <linux/rwsem.h>
26#include <linux/vmalloc.h>
95325e6b 27#include <linux/hugetlb.h>
bc8080cb 28#include <asm/kvm_ppc.h>
bc8080cb 29
9aa4dd5e 30#include "../mm/mmu_decl.h"
29a5a6f9 31#include "e500.h"
46f43c6e 32#include "trace.h"
49ea0695 33#include "timing.h"
bc8080cb 34
0164c0f0 35#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
bc8080cb 36
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37struct id {
38 unsigned long val;
39 struct id **pentry;
40};
41
42#define NUM_TIDS 256
43
44/*
45 * This table provide mappings from:
46 * (guestAS,guestTID,guestPR) --> ID of physical cpu
47 * guestAS [0..1]
48 * guestTID [0..255]
49 * guestPR [0..1]
50 * ID [1..255]
51 * Each vcpu keeps one vcpu_id_table.
52 */
53struct vcpu_id_table {
54 struct id id[2][NUM_TIDS][2];
55};
56
57/*
58 * This table provide reversed mappings of vcpu_id_table:
59 * ID --> address of vcpu_id_table item.
60 * Each physical core has one pcpu_id_table.
61 */
62struct pcpu_id_table {
63 struct id *entry[NUM_TIDS];
64};
65
66static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);
67
68/* This variable keeps last used shadow ID on local core.
69 * The valid range of shadow ID is [1..255] */
70static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);
71
0164c0f0 72static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
bc8080cb 73
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74static struct kvm_book3e_206_tlb_entry *get_entry(
75 struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)
76{
77 int offset = vcpu_e500->gtlb_offset[tlbsel];
78 return &vcpu_e500->gtlb_arch[offset + entry];
79}
80
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81/*
82 * Allocate a free shadow id and setup a valid sid mapping in given entry.
83 * A mapping is only valid when vcpu_id_table and pcpu_id_table are match.
84 *
85 * The caller must have preemption disabled, and keep it that way until
86 * it has finished with the returned shadow id (either written into the
87 * TLB or arch.shadow_pid, or discarded).
88 */
89static inline int local_sid_setup_one(struct id *entry)
90{
91 unsigned long sid;
92 int ret = -1;
93
94 sid = ++(__get_cpu_var(pcpu_last_used_sid));
95 if (sid < NUM_TIDS) {
96 __get_cpu_var(pcpu_sids).entry[sid] = entry;
97 entry->val = sid;
98 entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid];
99 ret = sid;
100 }
101
102 /*
103 * If sid == NUM_TIDS, we've run out of sids. We return -1, and
104 * the caller will invalidate everything and start over.
105 *
106 * sid > NUM_TIDS indicates a race, which we disable preemption to
107 * avoid.
108 */
109 WARN_ON(sid > NUM_TIDS);
110
111 return ret;
112}
113
114/*
115 * Check if given entry contain a valid shadow id mapping.
116 * An ID mapping is considered valid only if
117 * both vcpu and pcpu know this mapping.
118 *
119 * The caller must have preemption disabled, and keep it that way until
120 * it has finished with the returned shadow id (either written into the
121 * TLB or arch.shadow_pid, or discarded).
122 */
123static inline int local_sid_lookup(struct id *entry)
124{
125 if (entry && entry->val != 0 &&
126 __get_cpu_var(pcpu_sids).entry[entry->val] == entry &&
127 entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val])
128 return entry->val;
129 return -1;
130}
131
90b92a6f 132/* Invalidate all id mappings on local core -- call with preempt disabled */
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133static inline void local_sid_destroy_all(void)
134{
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135 __get_cpu_var(pcpu_last_used_sid) = 0;
136 memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));
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137}
138
139static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
140{
141 vcpu_e500->idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);
142 return vcpu_e500->idt;
143}
144
145static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)
146{
147 kfree(vcpu_e500->idt);
148}
149
150/* Invalidate all mappings on vcpu */
151static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)
152{
153 memset(vcpu_e500->idt, 0, sizeof(struct vcpu_id_table));
154
155 /* Update shadow pid when mappings are changed */
156 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
157}
158
159/* Invalidate one ID mapping on vcpu */
160static inline void kvmppc_e500_id_table_reset_one(
161 struct kvmppc_vcpu_e500 *vcpu_e500,
162 int as, int pid, int pr)
163{
164 struct vcpu_id_table *idt = vcpu_e500->idt;
165
166 BUG_ON(as >= 2);
167 BUG_ON(pid >= NUM_TIDS);
168 BUG_ON(pr >= 2);
169
170 idt->id[as][pid][pr].val = 0;
171 idt->id[as][pid][pr].pentry = NULL;
172
173 /* Update shadow pid when mappings are changed */
174 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
175}
176
177/*
178 * Map guest (vcpu,AS,ID,PR) to physical core shadow id.
179 * This function first lookup if a valid mapping exists,
180 * if not, then creates a new one.
181 *
182 * The caller must have preemption disabled, and keep it that way until
183 * it has finished with the returned shadow id (either written into the
184 * TLB or arch.shadow_pid, or discarded).
185 */
186static unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
187 unsigned int as, unsigned int gid,
188 unsigned int pr, int avoid_recursion)
189{
190 struct vcpu_id_table *idt = vcpu_e500->idt;
191 int sid;
192
193 BUG_ON(as >= 2);
194 BUG_ON(gid >= NUM_TIDS);
195 BUG_ON(pr >= 2);
196
197 sid = local_sid_lookup(&idt->id[as][gid][pr]);
198
199 while (sid <= 0) {
200 /* No mapping yet */
201 sid = local_sid_setup_one(&idt->id[as][gid][pr]);
202 if (sid <= 0) {
203 _tlbil_all();
204 local_sid_destroy_all();
205 }
206
207 /* Update shadow pid when mappings are changed */
208 if (!avoid_recursion)
209 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
210 }
211
212 return sid;
213}
214
215/* Map guest pid to shadow.
216 * We use PID to keep shadow of current guest non-zero PID,
217 * and use PID1 to keep shadow of guest zero PID.
218 * So that guest tlbe with TID=0 can be accessed at any time */
219void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)
220{
221 preempt_disable();
222 vcpu_e500->vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,
223 get_cur_as(&vcpu_e500->vcpu),
224 get_cur_pid(&vcpu_e500->vcpu),
225 get_cur_pr(&vcpu_e500->vcpu), 1);
226 vcpu_e500->vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,
227 get_cur_as(&vcpu_e500->vcpu), 0,
228 get_cur_pr(&vcpu_e500->vcpu), 1);
229 preempt_enable();
230}
231
0164c0f0 232static inline unsigned int gtlb0_get_next_victim(
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233 struct kvmppc_vcpu_e500 *vcpu_e500)
234{
235 unsigned int victim;
236
08b7fa92 237 victim = vcpu_e500->gtlb_nv[0]++;
dc83b8bc 238 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways))
08b7fa92 239 vcpu_e500->gtlb_nv[0] = 0;
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240
241 return victim;
242}
243
244static inline unsigned int tlb1_max_shadow_size(void)
245{
a4cd8b23 246 /* reserve one entry for magic page */
0164c0f0 247 return host_tlb_params[1].entries - tlbcam_index - 1;
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248}
249
dc83b8bc 250static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 251{
dc83b8bc 252 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
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253}
254
255static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
256{
257 /* Mask off reserved bits. */
258 mas3 &= MAS3_ATTRIB_MASK;
259
260 if (!usermode) {
261 /* Guest is in supervisor mode,
262 * so we need to translate guest
263 * supervisor permissions into user permissions. */
264 mas3 &= ~E500_TLB_USER_PERM_MASK;
265 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
266 }
267
268 return mas3 | E500_TLB_SUPER_PERM_MASK;
269}
270
271static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
272{
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273#ifdef CONFIG_SMP
274 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
275#else
bc8080cb 276 return mas2 & MAS2_ATTRIB_MASK;
046a48b3 277#endif
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278}
279
280/*
281 * writing shadow tlb entry to host TLB
282 */
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283static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
284 uint32_t mas0)
bc8080cb 285{
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286 unsigned long flags;
287
288 local_irq_save(flags);
289 mtspr(SPRN_MAS0, mas0);
bc8080cb 290 mtspr(SPRN_MAS1, stlbe->mas1);
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291 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
292 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
293 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
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294 asm volatile("isync; tlbwe" : : : "memory");
295 local_irq_restore(flags);
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296
297 trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
298 stlbe->mas2, stlbe->mas7_3);
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299}
300
57013524
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301/*
302 * Acquire a mas0 with victim hint, as if we just took a TLB miss.
303 *
304 * We don't care about the address we're searching for, other than that it's
305 * in the right set and is not present in the TLB. Using a zero PID and a
306 * userspace address means we don't have to set and then restore MAS5, or
307 * calculate a proper MAS6 value.
308 */
309static u32 get_host_mas0(unsigned long eaddr)
310{
311 unsigned long flags;
312 u32 mas0;
313
314 local_irq_save(flags);
315 mtspr(SPRN_MAS6, 0);
316 asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
317 mas0 = mfspr(SPRN_MAS0);
318 local_irq_restore(flags);
319
320 return mas0;
321}
322
323/* sesel is for tlb1 only */
bc8080cb 324static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
57013524 325 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 326{
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327 u32 mas0;
328
bc8080cb 329 if (tlbsel == 0) {
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330 mas0 = get_host_mas0(stlbe->mas2);
331 __write_host_tlbe(stlbe, mas0);
bc8080cb 332 } else {
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333 __write_host_tlbe(stlbe,
334 MAS0_TLBSEL(1) |
57013524 335 MAS0_ESEL(to_htlb1_esel(sesel)));
bc8080cb 336 }
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337}
338
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339void kvmppc_map_magic(struct kvm_vcpu *vcpu)
340{
dd9ebf1f 341 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 342 struct kvm_book3e_206_tlb_entry magic;
a4cd8b23 343 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
dd9ebf1f 344 unsigned int stid;
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345 pfn_t pfn;
346
347 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
348 get_page(pfn_to_page(pfn));
349
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350 preempt_disable();
351 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
352
353 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
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354 MAS1_TSIZE(BOOK3E_PAGESZ_4K);
355 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
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356 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
357 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
d37b1a03 358 magic.mas8 = 0;
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359
360 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
dd9ebf1f 361 preempt_enable();
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362}
363
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364void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
365{
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366 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
367
368 /* Shadow PID may be expired on local core */
369 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
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370}
371
372void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
373{
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374}
375
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376static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,
377 int tlbsel, int esel)
dd9ebf1f 378{
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379 struct kvm_book3e_206_tlb_entry *gtlbe =
380 get_entry(vcpu_e500, tlbsel, esel);
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381 struct vcpu_id_table *idt = vcpu_e500->idt;
382 unsigned int pr, tid, ts, pid;
383 u32 val, eaddr;
384 unsigned long flags;
385
386 ts = get_tlb_ts(gtlbe);
387 tid = get_tlb_tid(gtlbe);
388
389 preempt_disable();
390
391 /* One guest ID may be mapped to two shadow IDs */
392 for (pr = 0; pr < 2; pr++) {
393 /*
394 * The shadow PID can have a valid mapping on at most one
395 * host CPU. In the common case, it will be valid on this
396 * CPU, in which case (for TLB0) we do a local invalidation
397 * of the specific address.
398 *
399 * If the shadow PID is not valid on the current host CPU, or
400 * if we're invalidating a TLB1 entry, we invalidate the
401 * entire shadow PID.
402 */
403 if (tlbsel == 1 ||
404 (pid = local_sid_lookup(&idt->id[ts][tid][pr])) <= 0) {
405 kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);
406 continue;
407 }
408
409 /*
410 * The guest is invalidating a TLB0 entry which is in a PID
411 * that has a valid shadow mapping on this host CPU. We
412 * search host TLB0 to invalidate it's shadow TLB entry,
413 * similar to __tlbil_va except that we need to look in AS1.
414 */
415 val = (pid << MAS6_SPID_SHIFT) | MAS6_SAS;
416 eaddr = get_tlb_eaddr(gtlbe);
417
418 local_irq_save(flags);
419
420 mtspr(SPRN_MAS6, val);
421 asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));
422 val = mfspr(SPRN_MAS1);
423 if (val & MAS1_VALID) {
424 mtspr(SPRN_MAS1, val & ~MAS1_VALID);
425 asm volatile("tlbwe");
426 }
427
428 local_irq_restore(flags);
429 }
430
431 preempt_enable();
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432}
433
0164c0f0
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434static int tlb0_set_base(gva_t addr, int sets, int ways)
435{
436 int set_base;
437
438 set_base = (addr >> PAGE_SHIFT) & (sets - 1);
439 set_base *= ways;
440
441 return set_base;
442}
443
444static int gtlb0_set_base(struct kvmppc_vcpu_e500 *vcpu_e500, gva_t addr)
445{
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446 return tlb0_set_base(addr, vcpu_e500->gtlb_params[0].sets,
447 vcpu_e500->gtlb_params[0].ways);
0164c0f0
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448}
449
b5904972 450static unsigned int get_tlb_esel(struct kvm_vcpu *vcpu, int tlbsel)
0164c0f0 451{
b5904972
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452 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
453 int esel = get_tlb_esel_bit(vcpu);
0164c0f0
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454
455 if (tlbsel == 0) {
dc83b8bc 456 esel &= vcpu_e500->gtlb_params[0].ways - 1;
b5904972 457 esel += gtlb0_set_base(vcpu_e500, vcpu->arch.shared->mas2);
0164c0f0 458 } else {
dc83b8bc 459 esel &= vcpu_e500->gtlb_params[tlbsel].entries - 1;
0164c0f0
SW
460 }
461
462 return esel;
463}
464
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465/* Search the guest TLB for a matching entry. */
466static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
467 gva_t eaddr, int tlbsel, unsigned int pid, int as)
468{
dc83b8bc
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469 int size = vcpu_e500->gtlb_params[tlbsel].entries;
470 unsigned int set_base, offset;
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471 int i;
472
1aee47a0 473 if (tlbsel == 0) {
0164c0f0 474 set_base = gtlb0_set_base(vcpu_e500, eaddr);
dc83b8bc 475 size = vcpu_e500->gtlb_params[0].ways;
1aee47a0
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476 } else {
477 set_base = 0;
478 }
479
dc83b8bc
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480 offset = vcpu_e500->gtlb_offset[tlbsel];
481
1aee47a0 482 for (i = 0; i < size; i++) {
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483 struct kvm_book3e_206_tlb_entry *tlbe =
484 &vcpu_e500->gtlb_arch[offset + set_base + i];
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485 unsigned int tid;
486
487 if (eaddr < get_tlb_eaddr(tlbe))
488 continue;
489
490 if (eaddr > get_tlb_end(tlbe))
491 continue;
492
493 tid = get_tlb_tid(tlbe);
494 if (tid && (tid != pid))
495 continue;
496
497 if (!get_tlb_v(tlbe))
498 continue;
499
500 if (get_tlb_ts(tlbe) != as && as != -1)
501 continue;
502
1aee47a0 503 return set_base + i;
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504 }
505
506 return -1;
507}
508
0164c0f0 509static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
dc83b8bc 510 struct kvm_book3e_206_tlb_entry *gtlbe,
0164c0f0 511 pfn_t pfn)
bc8080cb 512{
0164c0f0
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513 ref->pfn = pfn;
514 ref->flags = E500_TLB_VALID;
bc8080cb 515
08b7fa92 516 if (tlbe_is_writable(gtlbe))
0164c0f0 517 ref->flags |= E500_TLB_DIRTY;
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518}
519
0164c0f0 520static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
bc8080cb 521{
0164c0f0
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522 if (ref->flags & E500_TLB_VALID) {
523 if (ref->flags & E500_TLB_DIRTY)
524 kvm_release_pfn_dirty(ref->pfn);
08b7fa92 525 else
0164c0f0
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526 kvm_release_pfn_clean(ref->pfn);
527
528 ref->flags = 0;
529 }
530}
531
532static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
533{
534 int tlbsel = 0;
535 int i;
bc8080cb 536
dc83b8bc 537 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
0164c0f0
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538 struct tlbe_ref *ref =
539 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
540 kvmppc_e500_ref_release(ref);
08b7fa92 541 }
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542}
543
0164c0f0
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544static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
545{
546 int stlbsel = 1;
547 int i;
548
dc83b8bc
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549 kvmppc_e500_id_table_reset_all(vcpu_e500);
550
0164c0f0
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551 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
552 struct tlbe_ref *ref =
553 &vcpu_e500->tlb_refs[stlbsel][i];
554 kvmppc_e500_ref_release(ref);
555 }
556
557 clear_tlb_privs(vcpu_e500);
558}
559
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560static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
561 unsigned int eaddr, int as)
562{
563 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
564 unsigned int victim, pidsel, tsized;
565 int tlbsel;
566
fb2838d4 567 /* since we only have two TLBs, only lower bit is used. */
b5904972 568 tlbsel = (vcpu->arch.shared->mas4 >> 28) & 0x1;
0164c0f0 569 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
b5904972
SW
570 pidsel = (vcpu->arch.shared->mas4 >> 16) & 0xf;
571 tsized = (vcpu->arch.shared->mas4 >> 7) & 0x1f;
bc8080cb 572
b5904972 573 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
08b7fa92 574 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972 575 vcpu->arch.shared->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
bc8080cb
HB
576 | MAS1_TID(vcpu_e500->pid[pidsel])
577 | MAS1_TSIZE(tsized);
b5904972
SW
578 vcpu->arch.shared->mas2 = (eaddr & MAS2_EPN)
579 | (vcpu->arch.shared->mas4 & MAS2_ATTRIB_MASK);
580 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
581 vcpu->arch.shared->mas6 = (vcpu->arch.shared->mas6 & MAS6_SPID1)
bc8080cb
HB
582 | (get_cur_pid(vcpu) << 16)
583 | (as ? MAS6_SAS : 0);
bc8080cb
HB
584}
585
3bf3cdcc 586/* TID must be supplied by the caller */
dc83b8bc
SW
587static inline void kvmppc_e500_setup_stlbe(
588 struct kvmppc_vcpu_e500 *vcpu_e500,
589 struct kvm_book3e_206_tlb_entry *gtlbe,
590 int tsize, struct tlbe_ref *ref, u64 gvaddr,
591 struct kvm_book3e_206_tlb_entry *stlbe)
08b7fa92 592{
0164c0f0
SW
593 pfn_t pfn = ref->pfn;
594
595 BUG_ON(!(ref->flags & E500_TLB_VALID));
08b7fa92
LY
596
597 /* Force TS=1 IPROT=0 for all guest mappings. */
3bf3cdcc 598 stlbe->mas1 = MAS1_TSIZE(tsize) | MAS1_TS | MAS1_VALID;
08b7fa92
LY
599 stlbe->mas2 = (gvaddr & MAS2_EPN)
600 | e500_shadow_mas2_attrib(gtlbe->mas2,
601 vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
dc83b8bc
SW
602 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT)
603 | e500_shadow_mas3_attrib(gtlbe->mas7_3,
08b7fa92 604 vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
08b7fa92
LY
605}
606
bc8080cb 607static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 608 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
57013524 609 int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
dc83b8bc 610 struct tlbe_ref *ref)
bc8080cb 611{
9973d54e 612 struct kvm_memory_slot *slot;
9973d54e
SW
613 unsigned long pfn, hva;
614 int pfnmap = 0;
615 int tsize = BOOK3E_PAGESZ_4K;
bc8080cb 616
59c1f4e3
SW
617 /*
618 * Translate guest physical to true physical, acquiring
619 * a page reference if it is normal, non-reserved memory.
9973d54e
SW
620 *
621 * gfn_to_memslot() must succeed because otherwise we wouldn't
622 * have gotten this far. Eventually we should just pass the slot
623 * pointer through from the first lookup.
59c1f4e3 624 */
9973d54e
SW
625 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
626 hva = gfn_to_hva_memslot(slot, gfn);
627
628 if (tlbsel == 1) {
629 struct vm_area_struct *vma;
630 down_read(&current->mm->mmap_sem);
631
632 vma = find_vma(current->mm, hva);
633 if (vma && hva >= vma->vm_start &&
634 (vma->vm_flags & VM_PFNMAP)) {
635 /*
636 * This VMA is a physically contiguous region (e.g.
637 * /dev/mem) that bypasses normal Linux page
638 * management. Find the overlap between the
639 * vma and the memslot.
640 */
641
642 unsigned long start, end;
643 unsigned long slot_start, slot_end;
644
645 pfnmap = 1;
646
647 start = vma->vm_pgoff;
648 end = start +
649 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
650
651 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
652
653 slot_start = pfn - (gfn - slot->base_gfn);
654 slot_end = slot_start + slot->npages;
655
656 if (start < slot_start)
657 start = slot_start;
658 if (end > slot_end)
659 end = slot_end;
660
661 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
662 MAS1_TSIZE_SHIFT;
663
664 /*
665 * e500 doesn't implement the lowest tsize bit,
666 * or 1K pages.
667 */
668 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
669
670 /*
671 * Now find the largest tsize (up to what the guest
672 * requested) that will cover gfn, stay within the
673 * range, and for which gfn and pfn are mutually
674 * aligned.
675 */
676
677 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
678 unsigned long gfn_start, gfn_end, tsize_pages;
679 tsize_pages = 1 << (tsize - 2);
680
681 gfn_start = gfn & ~(tsize_pages - 1);
682 gfn_end = gfn_start + tsize_pages;
683
684 if (gfn_start + pfn - gfn < start)
685 continue;
686 if (gfn_end + pfn - gfn > end)
687 continue;
688 if ((gfn & (tsize_pages - 1)) !=
689 (pfn & (tsize_pages - 1)))
690 continue;
691
692 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
693 pfn &= ~(tsize_pages - 1);
694 break;
695 }
95325e6b
AG
696 } else if (vma && hva >= vma->vm_start &&
697 (vma->vm_flags & VM_HUGETLB)) {
698 unsigned long psize = vma_kernel_pagesize(vma);
699
700 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
701 MAS1_TSIZE_SHIFT;
702
703 /*
704 * Take the largest page size that satisfies both host
705 * and guest mapping
706 */
707 tsize = min(__ilog2(psize) - 10, tsize);
708
709 /*
710 * e500 doesn't implement the lowest tsize bit,
711 * or 1K pages.
712 */
713 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
9973d54e
SW
714 }
715
716 up_read(&current->mm->mmap_sem);
717 }
718
719 if (likely(!pfnmap)) {
95325e6b 720 unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
9973d54e
SW
721 pfn = gfn_to_pfn_memslot(vcpu_e500->vcpu.kvm, slot, gfn);
722 if (is_error_pfn(pfn)) {
723 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
724 (long)gfn);
725 kvm_release_pfn_clean(pfn);
726 return;
727 }
95325e6b
AG
728
729 /* Align guest and physical address to page map boundaries */
730 pfn &= ~(tsize_pages - 1);
731 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
bc8080cb 732 }
bc8080cb 733
0164c0f0
SW
734 /* Drop old ref and setup new one. */
735 kvmppc_e500_ref_release(ref);
736 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
bc8080cb 737
0164c0f0 738 kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, tsize, ref, gvaddr, stlbe);
bc8080cb
HB
739}
740
741/* XXX only map the one-one case, for now use TLB0 */
57013524
SW
742static void kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
743 int esel,
744 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 745{
dc83b8bc 746 struct kvm_book3e_206_tlb_entry *gtlbe;
0164c0f0 747 struct tlbe_ref *ref;
bc8080cb 748
dc83b8bc 749 gtlbe = get_entry(vcpu_e500, 0, esel);
0164c0f0
SW
750 ref = &vcpu_e500->gtlb_priv[0][esel].ref;
751
bc8080cb
HB
752 kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
753 get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
57013524 754 gtlbe, 0, stlbe, ref);
bc8080cb
HB
755}
756
757/* Caller must ensure that the specified guest TLB entry is safe to insert into
758 * the shadow TLB. */
759/* XXX for both one-one and one-to-many , for now use TLB1 */
760static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW
761 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
762 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 763{
0164c0f0 764 struct tlbe_ref *ref;
bc8080cb
HB
765 unsigned int victim;
766
0164c0f0 767 victim = vcpu_e500->host_tlb1_nv++;
bc8080cb 768
0164c0f0
SW
769 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
770 vcpu_e500->host_tlb1_nv = 0;
bc8080cb 771
0164c0f0 772 ref = &vcpu_e500->tlb_refs[1][victim];
57013524 773 kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, ref);
bc8080cb
HB
774
775 return victim;
776}
777
dd9ebf1f 778void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
bc8080cb 779{
dd9ebf1f
LY
780 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
781
782 /* Recalc shadow pid since MSR changes */
783 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
bc8080cb
HB
784}
785
08b7fa92
LY
786static inline int kvmppc_e500_gtlbe_invalidate(
787 struct kvmppc_vcpu_e500 *vcpu_e500,
788 int tlbsel, int esel)
bc8080cb 789{
dc83b8bc
SW
790 struct kvm_book3e_206_tlb_entry *gtlbe =
791 get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
792
793 if (unlikely(get_tlb_iprot(gtlbe)))
794 return -1;
795
bc8080cb
HB
796 gtlbe->mas1 = 0;
797
798 return 0;
799}
800
b0a1835d
LY
801int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
802{
803 int esel;
804
805 if (value & MMUCSR0_TLB0FI)
dc83b8bc 806 for (esel = 0; esel < vcpu_e500->gtlb_params[0].entries; esel++)
b0a1835d
LY
807 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
808 if (value & MMUCSR0_TLB1FI)
dc83b8bc 809 for (esel = 0; esel < vcpu_e500->gtlb_params[1].entries; esel++)
b0a1835d
LY
810 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
811
dd9ebf1f
LY
812 /* Invalidate all vcpu id mappings */
813 kvmppc_e500_id_table_reset_all(vcpu_e500);
b0a1835d
LY
814
815 return EMULATE_DONE;
816}
817
bc8080cb
HB
818int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
819{
820 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
821 unsigned int ia;
822 int esel, tlbsel;
823 gva_t ea;
824
8e5b26b5 825 ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
826
827 ia = (ea >> 2) & 0x1;
828
fb2838d4 829 /* since we only have two TLBs, only lower bit is used. */
bc8080cb
HB
830 tlbsel = (ea >> 3) & 0x1;
831
832 if (ia) {
833 /* invalidate all entries */
dc83b8bc
SW
834 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries;
835 esel++)
bc8080cb
HB
836 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
837 } else {
838 ea &= 0xfffff000;
839 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
840 get_cur_pid(vcpu), -1);
841 if (esel >= 0)
842 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
843 }
844
dd9ebf1f
LY
845 /* Invalidate all vcpu id mappings */
846 kvmppc_e500_id_table_reset_all(vcpu_e500);
bc8080cb
HB
847
848 return EMULATE_DONE;
849}
850
851int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
852{
853 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
854 int tlbsel, esel;
dc83b8bc 855 struct kvm_book3e_206_tlb_entry *gtlbe;
bc8080cb 856
b5904972
SW
857 tlbsel = get_tlb_tlbsel(vcpu);
858 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 859
dc83b8bc 860 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
b5904972
SW
861 vcpu->arch.shared->mas0 &= ~MAS0_NV(~0);
862 vcpu->arch.shared->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
863 vcpu->arch.shared->mas1 = gtlbe->mas1;
864 vcpu->arch.shared->mas2 = gtlbe->mas2;
865 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
866
867 return EMULATE_DONE;
868}
869
870int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
871{
872 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
b5904972
SW
873 int as = !!get_cur_sas(vcpu);
874 unsigned int pid = get_cur_spid(vcpu);
bc8080cb 875 int esel, tlbsel;
dc83b8bc 876 struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
bc8080cb
HB
877 gva_t ea;
878
8e5b26b5 879 ea = kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
880
881 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
882 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
883 if (esel >= 0) {
dc83b8bc 884 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
885 break;
886 }
887 }
888
889 if (gtlbe) {
303b7c97
SW
890 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
891
b5904972 892 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
08b7fa92 893 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
894 vcpu->arch.shared->mas1 = gtlbe->mas1;
895 vcpu->arch.shared->mas2 = gtlbe->mas2;
896 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
897 } else {
898 int victim;
899
fb2838d4 900 /* since we only have two TLBs, only lower bit is used. */
b5904972 901 tlbsel = vcpu->arch.shared->mas4 >> 28 & 0x1;
0164c0f0 902 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
bc8080cb 903
b5904972
SW
904 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel)
905 | MAS0_ESEL(victim)
08b7fa92 906 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
907 vcpu->arch.shared->mas1 =
908 (vcpu->arch.shared->mas6 & MAS6_SPID0)
909 | (vcpu->arch.shared->mas6 & (MAS6_SAS ? MAS1_TS : 0))
910 | (vcpu->arch.shared->mas4 & MAS4_TSIZED(~0));
911 vcpu->arch.shared->mas2 &= MAS2_EPN;
912 vcpu->arch.shared->mas2 |= vcpu->arch.shared->mas4 &
913 MAS2_ATTRIB_MASK;
914 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 |
915 MAS3_U2 | MAS3_U3;
bc8080cb
HB
916 }
917
49ea0695 918 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
bc8080cb
HB
919 return EMULATE_DONE;
920}
921
57013524 922/* sesel is for tlb1 only */
3bf3cdcc 923static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW
924 struct kvm_book3e_206_tlb_entry *gtlbe,
925 struct kvm_book3e_206_tlb_entry *stlbe,
3bf3cdcc
SW
926 int stlbsel, int sesel)
927{
928 int stid;
929
930 preempt_disable();
931 stid = kvmppc_e500_get_sid(vcpu_e500, get_tlb_ts(gtlbe),
932 get_tlb_tid(gtlbe),
933 get_cur_pr(&vcpu_e500->vcpu), 0);
934
935 stlbe->mas1 |= MAS1_TID(stid);
936 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
937 preempt_enable();
938}
939
bc8080cb
HB
940int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
941{
942 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 943 struct kvm_book3e_206_tlb_entry *gtlbe;
08b7fa92 944 int tlbsel, esel;
bc8080cb 945
b5904972
SW
946 tlbsel = get_tlb_tlbsel(vcpu);
947 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 948
dc83b8bc 949 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb 950
dd9ebf1f 951 if (get_tlb_v(gtlbe))
0164c0f0 952 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
bc8080cb 953
b5904972
SW
954 gtlbe->mas1 = vcpu->arch.shared->mas1;
955 gtlbe->mas2 = vcpu->arch.shared->mas2;
956 gtlbe->mas7_3 = vcpu->arch.shared->mas7_3;
bc8080cb 957
d37b1a03
LY
958 trace_kvm_booke206_gtlb_write(vcpu->arch.shared->mas0, gtlbe->mas1,
959 gtlbe->mas2, gtlbe->mas7_3);
bc8080cb
HB
960
961 /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
962 if (tlbe_is_host_safe(vcpu, gtlbe)) {
dc83b8bc 963 struct kvm_book3e_206_tlb_entry stlbe;
08b7fa92
LY
964 int stlbsel, sesel;
965 u64 eaddr;
966 u64 raddr;
967
bc8080cb
HB
968 switch (tlbsel) {
969 case 0:
970 /* TLB0 */
971 gtlbe->mas1 &= ~MAS1_TSIZE(~0);
0cfb50e5 972 gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb
HB
973
974 stlbsel = 0;
57013524
SW
975 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
976 sesel = 0; /* unused */
bc8080cb
HB
977
978 break;
979
980 case 1:
981 /* TLB1 */
982 eaddr = get_tlb_eaddr(gtlbe);
983 raddr = get_tlb_raddr(gtlbe);
984
985 /* Create a 4KB mapping on the host.
986 * If the guest wanted a large page,
987 * only the first 4KB is mapped here and the rest
988 * are mapped on the fly. */
989 stlbsel = 1;
990 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
08b7fa92 991 raddr >> PAGE_SHIFT, gtlbe, &stlbe);
bc8080cb
HB
992 break;
993
994 default:
995 BUG();
996 }
3bf3cdcc
SW
997
998 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
999 }
1000
49ea0695 1001 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
bc8080cb
HB
1002 return EMULATE_DONE;
1003}
1004
1005int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
1006{
666e7252 1007 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
1008
1009 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
1010}
1011
1012int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
1013{
666e7252 1014 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
1015
1016 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
1017}
1018
1019void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
1020{
666e7252 1021 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
1022
1023 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
1024}
1025
1026void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
1027{
666e7252 1028 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
1029
1030 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
1031}
1032
1033gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
1034 gva_t eaddr)
1035{
1036 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc
SW
1037 struct kvm_book3e_206_tlb_entry *gtlbe;
1038 u64 pgmask;
1039
1040 gtlbe = get_entry(vcpu_e500, tlbsel_of(index), esel_of(index));
1041 pgmask = get_tlb_bytes(gtlbe) - 1;
bc8080cb
HB
1042
1043 return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
1044}
1045
1046void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1047{
bc8080cb
HB
1048}
1049
1050void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
1051 unsigned int index)
1052{
1053 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
08b7fa92 1054 struct tlbe_priv *priv;
dc83b8bc 1055 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
bc8080cb
HB
1056 int tlbsel = tlbsel_of(index);
1057 int esel = esel_of(index);
1058 int stlbsel, sesel;
1059
dc83b8bc 1060 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
08b7fa92 1061
bc8080cb
HB
1062 switch (tlbsel) {
1063 case 0:
1064 stlbsel = 0;
57013524 1065 sesel = 0; /* unused */
0164c0f0 1066 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
08b7fa92
LY
1067
1068 kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, BOOK3E_PAGESZ_4K,
0164c0f0 1069 &priv->ref, eaddr, &stlbe);
bc8080cb
HB
1070 break;
1071
1072 case 1: {
1073 gfn_t gfn = gpaddr >> PAGE_SHIFT;
bc8080cb
HB
1074
1075 stlbsel = 1;
08b7fa92
LY
1076 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
1077 gtlbe, &stlbe);
bc8080cb
HB
1078 break;
1079 }
1080
1081 default:
1082 BUG();
1083 break;
1084 }
08b7fa92 1085
3bf3cdcc 1086 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
1087}
1088
1089int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
1090 gva_t eaddr, unsigned int pid, int as)
1091{
1092 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1093 int esel, tlbsel;
1094
1095 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
1096 esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
1097 if (esel >= 0)
1098 return index_of(tlbsel, esel);
1099 }
1100
1101 return -1;
1102}
1103
5ce941ee
SW
1104void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
1105{
1106 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1107
dd9ebf1f
LY
1108 if (vcpu->arch.pid != pid) {
1109 vcpu_e500->pid[0] = vcpu->arch.pid = pid;
1110 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
1111 }
5ce941ee
SW
1112}
1113
bc8080cb
HB
1114void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
1115{
dc83b8bc 1116 struct kvm_book3e_206_tlb_entry *tlbe;
bc8080cb
HB
1117
1118 /* Insert large initial mapping for guest. */
dc83b8bc 1119 tlbe = get_entry(vcpu_e500, 1, 0);
0cfb50e5 1120 tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);
bc8080cb 1121 tlbe->mas2 = 0;
dc83b8bc 1122 tlbe->mas7_3 = E500_TLB_SUPER_PERM_MASK;
bc8080cb
HB
1123
1124 /* 4K map for serial output. Used by kernel wrapper. */
dc83b8bc 1125 tlbe = get_entry(vcpu_e500, 1, 1);
0cfb50e5 1126 tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb 1127 tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
dc83b8bc
SW
1128 tlbe->mas7_3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
1129}
1130
1131static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
1132{
1133 int i;
1134
1135 clear_tlb_refs(vcpu_e500);
1136 kfree(vcpu_e500->gtlb_priv[0]);
1137 kfree(vcpu_e500->gtlb_priv[1]);
1138
1139 if (vcpu_e500->shared_tlb_pages) {
1140 vfree((void *)(round_down((uintptr_t)vcpu_e500->gtlb_arch,
1141 PAGE_SIZE)));
1142
1143 for (i = 0; i < vcpu_e500->num_shared_tlb_pages; i++) {
1144 set_page_dirty_lock(vcpu_e500->shared_tlb_pages[i]);
1145 put_page(vcpu_e500->shared_tlb_pages[i]);
1146 }
1147
1148 vcpu_e500->num_shared_tlb_pages = 0;
1149 vcpu_e500->shared_tlb_pages = NULL;
1150 } else {
1151 kfree(vcpu_e500->gtlb_arch);
1152 }
1153
1154 vcpu_e500->gtlb_arch = NULL;
1155}
1156
1157int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
1158 struct kvm_config_tlb *cfg)
1159{
1160 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1161 struct kvm_book3e_206_tlb_params params;
1162 char *virt;
1163 struct page **pages;
1164 struct tlbe_priv *privs[2] = {};
1165 size_t array_len;
1166 u32 sets;
1167 int num_pages, ret, i;
1168
1169 if (cfg->mmu_type != KVM_MMU_FSL_BOOKE_NOHV)
1170 return -EINVAL;
1171
1172 if (copy_from_user(&params, (void __user *)(uintptr_t)cfg->params,
1173 sizeof(params)))
1174 return -EFAULT;
1175
1176 if (params.tlb_sizes[1] > 64)
1177 return -EINVAL;
1178 if (params.tlb_ways[1] != params.tlb_sizes[1])
1179 return -EINVAL;
1180 if (params.tlb_sizes[2] != 0 || params.tlb_sizes[3] != 0)
1181 return -EINVAL;
1182 if (params.tlb_ways[2] != 0 || params.tlb_ways[3] != 0)
1183 return -EINVAL;
1184
1185 if (!is_power_of_2(params.tlb_ways[0]))
1186 return -EINVAL;
1187
1188 sets = params.tlb_sizes[0] >> ilog2(params.tlb_ways[0]);
1189 if (!is_power_of_2(sets))
1190 return -EINVAL;
1191
1192 array_len = params.tlb_sizes[0] + params.tlb_sizes[1];
1193 array_len *= sizeof(struct kvm_book3e_206_tlb_entry);
1194
1195 if (cfg->array_len < array_len)
1196 return -EINVAL;
1197
1198 num_pages = DIV_ROUND_UP(cfg->array + array_len - 1, PAGE_SIZE) -
1199 cfg->array / PAGE_SIZE;
1200 pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);
1201 if (!pages)
1202 return -ENOMEM;
1203
1204 ret = get_user_pages_fast(cfg->array, num_pages, 1, pages);
1205 if (ret < 0)
1206 goto err_pages;
1207
1208 if (ret != num_pages) {
1209 num_pages = ret;
1210 ret = -EFAULT;
1211 goto err_put_page;
1212 }
1213
1214 virt = vmap(pages, num_pages, VM_MAP, PAGE_KERNEL);
1215 if (!virt)
1216 goto err_put_page;
1217
1218 privs[0] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[0],
1219 GFP_KERNEL);
1220 privs[1] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[1],
1221 GFP_KERNEL);
1222
1223 if (!privs[0] || !privs[1])
1224 goto err_put_page;
1225
1226 free_gtlb(vcpu_e500);
1227
1228 vcpu_e500->gtlb_priv[0] = privs[0];
1229 vcpu_e500->gtlb_priv[1] = privs[1];
1230
1231 vcpu_e500->gtlb_arch = (struct kvm_book3e_206_tlb_entry *)
1232 (virt + (cfg->array & (PAGE_SIZE - 1)));
1233
1234 vcpu_e500->gtlb_params[0].entries = params.tlb_sizes[0];
1235 vcpu_e500->gtlb_params[1].entries = params.tlb_sizes[1];
1236
1237 vcpu_e500->gtlb_offset[0] = 0;
1238 vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
1239
7b11dc99 1240 vcpu_e500->tlb0cfg &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
dc83b8bc
SW
1241 if (params.tlb_sizes[0] <= 2048)
1242 vcpu_e500->tlb0cfg |= params.tlb_sizes[0];
7b11dc99 1243 vcpu_e500->tlb0cfg |= params.tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc 1244
7b11dc99 1245 vcpu_e500->tlb1cfg &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
dc83b8bc 1246 vcpu_e500->tlb1cfg |= params.tlb_sizes[1];
7b11dc99 1247 vcpu_e500->tlb1cfg |= params.tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc
SW
1248
1249 vcpu_e500->shared_tlb_pages = pages;
1250 vcpu_e500->num_shared_tlb_pages = num_pages;
1251
1252 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0];
1253 vcpu_e500->gtlb_params[0].sets = sets;
1254
1255 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1];
1256 vcpu_e500->gtlb_params[1].sets = 1;
1257
1258 return 0;
1259
1260err_put_page:
1261 kfree(privs[0]);
1262 kfree(privs[1]);
1263
1264 for (i = 0; i < num_pages; i++)
1265 put_page(pages[i]);
1266
1267err_pages:
1268 kfree(pages);
1269 return ret;
1270}
1271
1272int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
1273 struct kvm_dirty_tlb *dirty)
1274{
1275 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1276
1277 clear_tlb_refs(vcpu_e500);
1278 return 0;
bc8080cb
HB
1279}
1280
1281int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
1282{
dc83b8bc
SW
1283 int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);
1284 int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;
1285
0164c0f0
SW
1286 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
1287 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
1288
1289 /*
1290 * This should never happen on real e500 hardware, but is
1291 * architecturally possible -- e.g. in some weird nested
1292 * virtualization case.
1293 */
1294 if (host_tlb_params[0].entries == 0 ||
1295 host_tlb_params[1].entries == 0) {
1296 pr_err("%s: need to know host tlb size\n", __func__);
1297 return -ENODEV;
1298 }
1299
1300 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
1301 TLBnCFG_ASSOC_SHIFT;
1302 host_tlb_params[1].ways = host_tlb_params[1].entries;
1303
1304 if (!is_power_of_2(host_tlb_params[0].entries) ||
1305 !is_power_of_2(host_tlb_params[0].ways) ||
1306 host_tlb_params[0].entries < host_tlb_params[0].ways ||
1307 host_tlb_params[0].ways == 0) {
1308 pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
1309 __func__, host_tlb_params[0].entries,
1310 host_tlb_params[0].ways);
1311 return -ENODEV;
1312 }
1313
1314 host_tlb_params[0].sets =
1315 host_tlb_params[0].entries / host_tlb_params[0].ways;
1316 host_tlb_params[1].sets = 1;
bc8080cb 1317
dc83b8bc
SW
1318 vcpu_e500->gtlb_params[0].entries = KVM_E500_TLB0_SIZE;
1319 vcpu_e500->gtlb_params[1].entries = KVM_E500_TLB1_SIZE;
bc8080cb 1320
dc83b8bc
SW
1321 vcpu_e500->gtlb_params[0].ways = KVM_E500_TLB0_WAY_NUM;
1322 vcpu_e500->gtlb_params[0].sets =
1323 KVM_E500_TLB0_SIZE / KVM_E500_TLB0_WAY_NUM;
1324
1325 vcpu_e500->gtlb_params[1].ways = KVM_E500_TLB1_SIZE;
1326 vcpu_e500->gtlb_params[1].sets = 1;
1327
1328 vcpu_e500->gtlb_arch = kmalloc(entries * entry_size, GFP_KERNEL);
1329 if (!vcpu_e500->gtlb_arch)
1330 return -ENOMEM;
1331
1332 vcpu_e500->gtlb_offset[0] = 0;
1333 vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
0164c0f0
SW
1334
1335 vcpu_e500->tlb_refs[0] =
1336 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
1337 GFP_KERNEL);
1338 if (!vcpu_e500->tlb_refs[0])
1339 goto err;
1340
1341 vcpu_e500->tlb_refs[1] =
1342 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
1343 GFP_KERNEL);
1344 if (!vcpu_e500->tlb_refs[1])
1345 goto err;
1346
dc83b8bc
SW
1347 vcpu_e500->gtlb_priv[0] = kzalloc(sizeof(struct tlbe_ref) *
1348 vcpu_e500->gtlb_params[0].entries,
1349 GFP_KERNEL);
0164c0f0
SW
1350 if (!vcpu_e500->gtlb_priv[0])
1351 goto err;
1352
dc83b8bc
SW
1353 vcpu_e500->gtlb_priv[1] = kzalloc(sizeof(struct tlbe_ref) *
1354 vcpu_e500->gtlb_params[1].entries,
1355 GFP_KERNEL);
0164c0f0
SW
1356 if (!vcpu_e500->gtlb_priv[1])
1357 goto err;
bc8080cb 1358
dd9ebf1f 1359 if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)
0164c0f0 1360 goto err;
dd9ebf1f 1361
da15bf43 1362 /* Init TLB configuration register */
7b11dc99
SW
1363 vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) &
1364 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
dc83b8bc 1365 vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_params[0].entries;
7b11dc99
SW
1366 vcpu_e500->tlb0cfg |=
1367 vcpu_e500->gtlb_params[0].ways << TLBnCFG_ASSOC_SHIFT;
1368
1369 vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) &
1370 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
1371 vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_params[1].entries;
1372 vcpu_e500->tlb0cfg |=
1373 vcpu_e500->gtlb_params[1].ways << TLBnCFG_ASSOC_SHIFT;
da15bf43 1374
bc8080cb
HB
1375 return 0;
1376
0164c0f0 1377err:
dc83b8bc 1378 free_gtlb(vcpu_e500);
0164c0f0
SW
1379 kfree(vcpu_e500->tlb_refs[0]);
1380 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb
HB
1381 return -1;
1382}
1383
1384void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
1385{
dc83b8bc 1386 free_gtlb(vcpu_e500);
dd9ebf1f 1387 kvmppc_e500_id_table_free(vcpu_e500);
0164c0f0
SW
1388
1389 kfree(vcpu_e500->tlb_refs[0]);
1390 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb 1391}
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