KVM: do not treat noslot pfn as a error pfn
[deliverable/linux.git] / arch / powerpc / kvm / e500_tlb.c
CommitLineData
bc8080cb 1/*
49ea0695 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
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3 *
4 * Author: Yu Liu, yu.liu@freescale.com
73196cd3 5 * Scott Wood, scottwood@freescale.com
4f802fe9 6 * Ashish Kalra, ashish.kalra@freescale.com
73196cd3 7 * Varun Sethi, varun.sethi@freescale.com
bc8080cb
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8 *
9 * Description:
10 * This file is based on arch/powerpc/kvm/44x_tlb.c,
11 * by Hollis Blanchard <hollisb@us.ibm.com>.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License, version 2, as
15 * published by the Free Software Foundation.
16 */
17
0164c0f0 18#include <linux/kernel.h>
bc8080cb 19#include <linux/types.h>
5a0e3ad6 20#include <linux/slab.h>
bc8080cb
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21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
dc83b8bc
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25#include <linux/log2.h>
26#include <linux/uaccess.h>
27#include <linux/sched.h>
28#include <linux/rwsem.h>
29#include <linux/vmalloc.h>
95325e6b 30#include <linux/hugetlb.h>
bc8080cb 31#include <asm/kvm_ppc.h>
bc8080cb 32
29a5a6f9 33#include "e500.h"
46f43c6e 34#include "trace.h"
49ea0695 35#include "timing.h"
bc8080cb 36
0164c0f0 37#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
bc8080cb 38
0164c0f0 39static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
bc8080cb 40
0164c0f0 41static inline unsigned int gtlb0_get_next_victim(
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42 struct kvmppc_vcpu_e500 *vcpu_e500)
43{
44 unsigned int victim;
45
08b7fa92 46 victim = vcpu_e500->gtlb_nv[0]++;
dc83b8bc 47 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways))
08b7fa92 48 vcpu_e500->gtlb_nv[0] = 0;
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49
50 return victim;
51}
52
53static inline unsigned int tlb1_max_shadow_size(void)
54{
a4cd8b23 55 /* reserve one entry for magic page */
0164c0f0 56 return host_tlb_params[1].entries - tlbcam_index - 1;
bc8080cb
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57}
58
dc83b8bc 59static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 60{
dc83b8bc 61 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
bc8080cb
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62}
63
64static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
65{
66 /* Mask off reserved bits. */
67 mas3 &= MAS3_ATTRIB_MASK;
68
73196cd3 69#ifndef CONFIG_KVM_BOOKE_HV
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70 if (!usermode) {
71 /* Guest is in supervisor mode,
72 * so we need to translate guest
73 * supervisor permissions into user permissions. */
74 mas3 &= ~E500_TLB_USER_PERM_MASK;
75 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
76 }
73196cd3
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77 mas3 |= E500_TLB_SUPER_PERM_MASK;
78#endif
79 return mas3;
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80}
81
82static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
83{
046a48b3
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84#ifdef CONFIG_SMP
85 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
86#else
bc8080cb 87 return mas2 & MAS2_ATTRIB_MASK;
046a48b3 88#endif
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89}
90
91/*
92 * writing shadow tlb entry to host TLB
93 */
dc83b8bc
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94static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
95 uint32_t mas0)
bc8080cb 96{
0ef30995
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97 unsigned long flags;
98
99 local_irq_save(flags);
100 mtspr(SPRN_MAS0, mas0);
bc8080cb 101 mtspr(SPRN_MAS1, stlbe->mas1);
dc83b8bc
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102 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
103 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
104 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
73196cd3
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105#ifdef CONFIG_KVM_BOOKE_HV
106 mtspr(SPRN_MAS8, stlbe->mas8);
107#endif
0ef30995 108 asm volatile("isync; tlbwe" : : : "memory");
73196cd3
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109
110#ifdef CONFIG_KVM_BOOKE_HV
111 /* Must clear mas8 for other host tlbwe's */
112 mtspr(SPRN_MAS8, 0);
113 isync();
114#endif
0ef30995 115 local_irq_restore(flags);
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116
117 trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
118 stlbe->mas2, stlbe->mas7_3);
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119}
120
57013524
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121/*
122 * Acquire a mas0 with victim hint, as if we just took a TLB miss.
123 *
124 * We don't care about the address we're searching for, other than that it's
125 * in the right set and is not present in the TLB. Using a zero PID and a
126 * userspace address means we don't have to set and then restore MAS5, or
127 * calculate a proper MAS6 value.
128 */
129static u32 get_host_mas0(unsigned long eaddr)
130{
131 unsigned long flags;
132 u32 mas0;
133
134 local_irq_save(flags);
135 mtspr(SPRN_MAS6, 0);
136 asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
137 mas0 = mfspr(SPRN_MAS0);
138 local_irq_restore(flags);
139
140 return mas0;
141}
142
143/* sesel is for tlb1 only */
bc8080cb 144static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
57013524 145 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 146{
57013524
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147 u32 mas0;
148
bc8080cb 149 if (tlbsel == 0) {
57013524
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150 mas0 = get_host_mas0(stlbe->mas2);
151 __write_host_tlbe(stlbe, mas0);
bc8080cb 152 } else {
0ef30995
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153 __write_host_tlbe(stlbe,
154 MAS0_TLBSEL(1) |
57013524 155 MAS0_ESEL(to_htlb1_esel(sesel)));
bc8080cb 156 }
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157}
158
bf7ca4bd 159#ifdef CONFIG_KVM_E500V2
a4cd8b23
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160void kvmppc_map_magic(struct kvm_vcpu *vcpu)
161{
dd9ebf1f 162 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 163 struct kvm_book3e_206_tlb_entry magic;
a4cd8b23 164 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
dd9ebf1f 165 unsigned int stid;
a4cd8b23
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166 pfn_t pfn;
167
168 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
169 get_page(pfn_to_page(pfn));
170
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171 preempt_disable();
172 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
173
174 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
a4cd8b23
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175 MAS1_TSIZE(BOOK3E_PAGESZ_4K);
176 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
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177 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
178 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
d37b1a03 179 magic.mas8 = 0;
a4cd8b23
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180
181 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
dd9ebf1f 182 preempt_enable();
a4cd8b23 183}
8fdd21a2 184#endif
dd9ebf1f 185
0164c0f0
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186static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,
187 int tlbsel, int esel)
dd9ebf1f 188{
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189 struct kvm_book3e_206_tlb_entry *gtlbe =
190 get_entry(vcpu_e500, tlbsel, esel);
dd9ebf1f 191
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192 if (tlbsel == 1 &&
193 vcpu_e500->gtlb_priv[1][esel].ref.flags & E500_TLB_BITMAP) {
194 u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
195 int hw_tlb_indx;
196 unsigned long flags;
197
198 local_irq_save(flags);
199 while (tmp) {
200 hw_tlb_indx = __ilog2_u64(tmp & -tmp);
201 mtspr(SPRN_MAS0,
202 MAS0_TLBSEL(1) |
203 MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));
204 mtspr(SPRN_MAS1, 0);
205 asm volatile("tlbwe");
206 vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0;
207 tmp &= tmp - 1;
208 }
209 mb();
210 vcpu_e500->g2h_tlb1_map[esel] = 0;
211 vcpu_e500->gtlb_priv[1][esel].ref.flags &= ~E500_TLB_BITMAP;
212 local_irq_restore(flags);
213
8fdd21a2 214 return;
dd9ebf1f
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215 }
216
8fdd21a2
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217 /* Guest tlbe is backed by at most one host tlbe per shadow pid. */
218 kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
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219}
220
0164c0f0
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221static int tlb0_set_base(gva_t addr, int sets, int ways)
222{
223 int set_base;
224
225 set_base = (addr >> PAGE_SHIFT) & (sets - 1);
226 set_base *= ways;
227
228 return set_base;
229}
230
231static int gtlb0_set_base(struct kvmppc_vcpu_e500 *vcpu_e500, gva_t addr)
232{
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233 return tlb0_set_base(addr, vcpu_e500->gtlb_params[0].sets,
234 vcpu_e500->gtlb_params[0].ways);
0164c0f0
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235}
236
b5904972 237static unsigned int get_tlb_esel(struct kvm_vcpu *vcpu, int tlbsel)
0164c0f0 238{
b5904972
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239 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
240 int esel = get_tlb_esel_bit(vcpu);
0164c0f0
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241
242 if (tlbsel == 0) {
dc83b8bc 243 esel &= vcpu_e500->gtlb_params[0].ways - 1;
b5904972 244 esel += gtlb0_set_base(vcpu_e500, vcpu->arch.shared->mas2);
0164c0f0 245 } else {
dc83b8bc 246 esel &= vcpu_e500->gtlb_params[tlbsel].entries - 1;
0164c0f0
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247 }
248
249 return esel;
250}
251
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252/* Search the guest TLB for a matching entry. */
253static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
254 gva_t eaddr, int tlbsel, unsigned int pid, int as)
255{
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256 int size = vcpu_e500->gtlb_params[tlbsel].entries;
257 unsigned int set_base, offset;
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258 int i;
259
1aee47a0 260 if (tlbsel == 0) {
0164c0f0 261 set_base = gtlb0_set_base(vcpu_e500, eaddr);
dc83b8bc 262 size = vcpu_e500->gtlb_params[0].ways;
1aee47a0 263 } else {
cc902ad4
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264 if (eaddr < vcpu_e500->tlb1_min_eaddr ||
265 eaddr > vcpu_e500->tlb1_max_eaddr)
266 return -1;
1aee47a0
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267 set_base = 0;
268 }
269
dc83b8bc
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270 offset = vcpu_e500->gtlb_offset[tlbsel];
271
1aee47a0 272 for (i = 0; i < size; i++) {
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273 struct kvm_book3e_206_tlb_entry *tlbe =
274 &vcpu_e500->gtlb_arch[offset + set_base + i];
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275 unsigned int tid;
276
277 if (eaddr < get_tlb_eaddr(tlbe))
278 continue;
279
280 if (eaddr > get_tlb_end(tlbe))
281 continue;
282
283 tid = get_tlb_tid(tlbe);
284 if (tid && (tid != pid))
285 continue;
286
287 if (!get_tlb_v(tlbe))
288 continue;
289
290 if (get_tlb_ts(tlbe) != as && as != -1)
291 continue;
292
1aee47a0 293 return set_base + i;
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294 }
295
296 return -1;
297}
298
0164c0f0 299static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
dc83b8bc 300 struct kvm_book3e_206_tlb_entry *gtlbe,
0164c0f0 301 pfn_t pfn)
bc8080cb 302{
0164c0f0
SW
303 ref->pfn = pfn;
304 ref->flags = E500_TLB_VALID;
bc8080cb 305
430c7ff5 306 if (tlbe_is_writable(gtlbe))
862d31f7 307 kvm_set_pfn_dirty(pfn);
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308}
309
0164c0f0 310static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
bc8080cb 311{
0164c0f0 312 if (ref->flags & E500_TLB_VALID) {
6346046c 313 trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
0164c0f0
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314 ref->flags = 0;
315 }
316}
317
4f802fe9
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318static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
319{
320 if (vcpu_e500->g2h_tlb1_map)
e8143ccb
AC
321 memset(vcpu_e500->g2h_tlb1_map, 0,
322 sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
4f802fe9 323 if (vcpu_e500->h2g_tlb1_rmap)
e8143ccb
AC
324 memset(vcpu_e500->h2g_tlb1_rmap, 0,
325 sizeof(unsigned int) * host_tlb_params[1].entries);
4f802fe9
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326}
327
0164c0f0
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328static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
329{
330 int tlbsel = 0;
331 int i;
bc8080cb 332
dc83b8bc 333 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
0164c0f0
SW
334 struct tlbe_ref *ref =
335 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
336 kvmppc_e500_ref_release(ref);
08b7fa92 337 }
bc8080cb
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338}
339
0164c0f0
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340static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
341{
342 int stlbsel = 1;
343 int i;
344
8fdd21a2 345 kvmppc_e500_tlbil_all(vcpu_e500);
dc83b8bc 346
0164c0f0
SW
347 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
348 struct tlbe_ref *ref =
349 &vcpu_e500->tlb_refs[stlbsel][i];
350 kvmppc_e500_ref_release(ref);
351 }
352
353 clear_tlb_privs(vcpu_e500);
354}
355
862d31f7
AG
356void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
357{
358 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
359 clear_tlb_refs(vcpu_e500);
360 clear_tlb1_bitmap(vcpu_e500);
361}
362
bc8080cb
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363static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
364 unsigned int eaddr, int as)
365{
366 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
8fdd21a2 367 unsigned int victim, tsized;
bc8080cb
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368 int tlbsel;
369
fb2838d4 370 /* since we only have two TLBs, only lower bit is used. */
b5904972 371 tlbsel = (vcpu->arch.shared->mas4 >> 28) & 0x1;
0164c0f0 372 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
b5904972 373 tsized = (vcpu->arch.shared->mas4 >> 7) & 0x1f;
bc8080cb 374
b5904972 375 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
08b7fa92 376 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972 377 vcpu->arch.shared->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
8fdd21a2 378 | MAS1_TID(get_tlbmiss_tid(vcpu))
bc8080cb 379 | MAS1_TSIZE(tsized);
b5904972
SW
380 vcpu->arch.shared->mas2 = (eaddr & MAS2_EPN)
381 | (vcpu->arch.shared->mas4 & MAS2_ATTRIB_MASK);
382 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
383 vcpu->arch.shared->mas6 = (vcpu->arch.shared->mas6 & MAS6_SPID1)
bc8080cb
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384 | (get_cur_pid(vcpu) << 16)
385 | (as ? MAS6_SAS : 0);
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386}
387
3bf3cdcc 388/* TID must be supplied by the caller */
dc83b8bc 389static inline void kvmppc_e500_setup_stlbe(
8fdd21a2 390 struct kvm_vcpu *vcpu,
dc83b8bc
SW
391 struct kvm_book3e_206_tlb_entry *gtlbe,
392 int tsize, struct tlbe_ref *ref, u64 gvaddr,
393 struct kvm_book3e_206_tlb_entry *stlbe)
08b7fa92 394{
0164c0f0 395 pfn_t pfn = ref->pfn;
8fdd21a2 396 u32 pr = vcpu->arch.shared->msr & MSR_PR;
0164c0f0
SW
397
398 BUG_ON(!(ref->flags & E500_TLB_VALID));
08b7fa92 399
8fdd21a2
SW
400 /* Force IPROT=0 for all guest mappings. */
401 stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
402 stlbe->mas2 = (gvaddr & MAS2_EPN) |
403 e500_shadow_mas2_attrib(gtlbe->mas2, pr);
404 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
405 e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
73196cd3
SW
406
407#ifdef CONFIG_KVM_BOOKE_HV
408 stlbe->mas8 = MAS8_TGS | vcpu->kvm->arch.lpid;
409#endif
08b7fa92
LY
410}
411
bc8080cb 412static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 413 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
57013524 414 int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
dc83b8bc 415 struct tlbe_ref *ref)
bc8080cb 416{
9973d54e 417 struct kvm_memory_slot *slot;
9973d54e
SW
418 unsigned long pfn, hva;
419 int pfnmap = 0;
420 int tsize = BOOK3E_PAGESZ_4K;
bc8080cb 421
59c1f4e3
SW
422 /*
423 * Translate guest physical to true physical, acquiring
424 * a page reference if it is normal, non-reserved memory.
9973d54e
SW
425 *
426 * gfn_to_memslot() must succeed because otherwise we wouldn't
427 * have gotten this far. Eventually we should just pass the slot
428 * pointer through from the first lookup.
59c1f4e3 429 */
9973d54e
SW
430 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
431 hva = gfn_to_hva_memslot(slot, gfn);
432
433 if (tlbsel == 1) {
434 struct vm_area_struct *vma;
435 down_read(&current->mm->mmap_sem);
436
437 vma = find_vma(current->mm, hva);
438 if (vma && hva >= vma->vm_start &&
439 (vma->vm_flags & VM_PFNMAP)) {
440 /*
441 * This VMA is a physically contiguous region (e.g.
442 * /dev/mem) that bypasses normal Linux page
443 * management. Find the overlap between the
444 * vma and the memslot.
445 */
446
447 unsigned long start, end;
448 unsigned long slot_start, slot_end;
449
450 pfnmap = 1;
451
452 start = vma->vm_pgoff;
453 end = start +
454 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
455
456 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
457
458 slot_start = pfn - (gfn - slot->base_gfn);
459 slot_end = slot_start + slot->npages;
460
461 if (start < slot_start)
462 start = slot_start;
463 if (end > slot_end)
464 end = slot_end;
465
466 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
467 MAS1_TSIZE_SHIFT;
468
469 /*
470 * e500 doesn't implement the lowest tsize bit,
471 * or 1K pages.
472 */
473 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
474
475 /*
476 * Now find the largest tsize (up to what the guest
477 * requested) that will cover gfn, stay within the
478 * range, and for which gfn and pfn are mutually
479 * aligned.
480 */
481
482 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
483 unsigned long gfn_start, gfn_end, tsize_pages;
484 tsize_pages = 1 << (tsize - 2);
485
486 gfn_start = gfn & ~(tsize_pages - 1);
487 gfn_end = gfn_start + tsize_pages;
488
489 if (gfn_start + pfn - gfn < start)
490 continue;
491 if (gfn_end + pfn - gfn > end)
492 continue;
493 if ((gfn & (tsize_pages - 1)) !=
494 (pfn & (tsize_pages - 1)))
495 continue;
496
497 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
498 pfn &= ~(tsize_pages - 1);
499 break;
500 }
95325e6b
AG
501 } else if (vma && hva >= vma->vm_start &&
502 (vma->vm_flags & VM_HUGETLB)) {
503 unsigned long psize = vma_kernel_pagesize(vma);
504
505 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
506 MAS1_TSIZE_SHIFT;
507
508 /*
509 * Take the largest page size that satisfies both host
510 * and guest mapping
511 */
512 tsize = min(__ilog2(psize) - 10, tsize);
513
514 /*
515 * e500 doesn't implement the lowest tsize bit,
516 * or 1K pages.
517 */
518 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
9973d54e
SW
519 }
520
521 up_read(&current->mm->mmap_sem);
522 }
523
524 if (likely(!pfnmap)) {
95325e6b 525 unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
d5661048 526 pfn = gfn_to_pfn_memslot(slot, gfn);
81c52c56 527 if (is_error_noslot_pfn(pfn)) {
9973d54e
SW
528 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
529 (long)gfn);
9973d54e
SW
530 return;
531 }
95325e6b
AG
532
533 /* Align guest and physical address to page map boundaries */
534 pfn &= ~(tsize_pages - 1);
535 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
bc8080cb 536 }
bc8080cb 537
0164c0f0
SW
538 /* Drop old ref and setup new one. */
539 kvmppc_e500_ref_release(ref);
540 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
bc8080cb 541
8fdd21a2
SW
542 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
543 ref, gvaddr, stlbe);
249ba1ee
AG
544
545 /* Clear i-cache for new pages */
546 kvmppc_mmu_flush_icache(pfn);
862d31f7
AG
547
548 /* Drop refcount on page, so that mmu notifiers can clear it */
549 kvm_release_pfn_clean(pfn);
bc8080cb
HB
550}
551
552/* XXX only map the one-one case, for now use TLB0 */
57013524
SW
553static void kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
554 int esel,
555 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 556{
dc83b8bc 557 struct kvm_book3e_206_tlb_entry *gtlbe;
0164c0f0 558 struct tlbe_ref *ref;
bc8080cb 559
dc83b8bc 560 gtlbe = get_entry(vcpu_e500, 0, esel);
0164c0f0
SW
561 ref = &vcpu_e500->gtlb_priv[0][esel].ref;
562
bc8080cb
HB
563 kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
564 get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
57013524 565 gtlbe, 0, stlbe, ref);
bc8080cb
HB
566}
567
568/* Caller must ensure that the specified guest TLB entry is safe to insert into
569 * the shadow TLB. */
570/* XXX for both one-one and one-to-many , for now use TLB1 */
571static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 572 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
4f802fe9 573 struct kvm_book3e_206_tlb_entry *stlbe, int esel)
bc8080cb 574{
0164c0f0 575 struct tlbe_ref *ref;
bc8080cb
HB
576 unsigned int victim;
577
0164c0f0 578 victim = vcpu_e500->host_tlb1_nv++;
bc8080cb 579
0164c0f0
SW
580 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
581 vcpu_e500->host_tlb1_nv = 0;
bc8080cb 582
0164c0f0 583 ref = &vcpu_e500->tlb_refs[1][victim];
57013524 584 kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, ref);
bc8080cb 585
4f802fe9
SW
586 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << victim;
587 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
588 if (vcpu_e500->h2g_tlb1_rmap[victim]) {
589 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[victim];
590 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << victim);
591 }
592 vcpu_e500->h2g_tlb1_rmap[victim] = esel;
593
bc8080cb
HB
594 return victim;
595}
596
cc902ad4
BB
597static void kvmppc_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500)
598{
599 int size = vcpu_e500->gtlb_params[1].entries;
600 unsigned int offset;
601 gva_t eaddr;
602 int i;
603
604 vcpu_e500->tlb1_min_eaddr = ~0UL;
605 vcpu_e500->tlb1_max_eaddr = 0;
606 offset = vcpu_e500->gtlb_offset[1];
607
608 for (i = 0; i < size; i++) {
609 struct kvm_book3e_206_tlb_entry *tlbe =
610 &vcpu_e500->gtlb_arch[offset + i];
611
612 if (!get_tlb_v(tlbe))
613 continue;
614
615 eaddr = get_tlb_eaddr(tlbe);
616 vcpu_e500->tlb1_min_eaddr =
617 min(vcpu_e500->tlb1_min_eaddr, eaddr);
618
619 eaddr = get_tlb_end(tlbe);
620 vcpu_e500->tlb1_max_eaddr =
621 max(vcpu_e500->tlb1_max_eaddr, eaddr);
622 }
623}
624
625static int kvmppc_need_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500,
626 struct kvm_book3e_206_tlb_entry *gtlbe)
627{
628 unsigned long start, end, size;
629
630 size = get_tlb_bytes(gtlbe);
631 start = get_tlb_eaddr(gtlbe) & ~(size - 1);
632 end = start + size - 1;
633
634 return vcpu_e500->tlb1_min_eaddr == start ||
635 vcpu_e500->tlb1_max_eaddr == end;
636}
637
638/* This function is supposed to be called for a adding a new valid tlb entry */
639static void kvmppc_set_tlb1map_range(struct kvm_vcpu *vcpu,
640 struct kvm_book3e_206_tlb_entry *gtlbe)
641{
642 unsigned long start, end, size;
643 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
644
645 if (!get_tlb_v(gtlbe))
646 return;
647
648 size = get_tlb_bytes(gtlbe);
649 start = get_tlb_eaddr(gtlbe) & ~(size - 1);
650 end = start + size - 1;
651
652 vcpu_e500->tlb1_min_eaddr = min(vcpu_e500->tlb1_min_eaddr, start);
653 vcpu_e500->tlb1_max_eaddr = max(vcpu_e500->tlb1_max_eaddr, end);
654}
655
08b7fa92
LY
656static inline int kvmppc_e500_gtlbe_invalidate(
657 struct kvmppc_vcpu_e500 *vcpu_e500,
658 int tlbsel, int esel)
bc8080cb 659{
dc83b8bc
SW
660 struct kvm_book3e_206_tlb_entry *gtlbe =
661 get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
662
663 if (unlikely(get_tlb_iprot(gtlbe)))
664 return -1;
665
cc902ad4
BB
666 if (tlbsel == 1 && kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))
667 kvmppc_recalc_tlb1map_range(vcpu_e500);
668
bc8080cb
HB
669 gtlbe->mas1 = 0;
670
671 return 0;
672}
673
b0a1835d
LY
674int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
675{
676 int esel;
677
678 if (value & MMUCSR0_TLB0FI)
dc83b8bc 679 for (esel = 0; esel < vcpu_e500->gtlb_params[0].entries; esel++)
b0a1835d
LY
680 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
681 if (value & MMUCSR0_TLB1FI)
dc83b8bc 682 for (esel = 0; esel < vcpu_e500->gtlb_params[1].entries; esel++)
b0a1835d
LY
683 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
684
dd9ebf1f 685 /* Invalidate all vcpu id mappings */
8fdd21a2 686 kvmppc_e500_tlbil_all(vcpu_e500);
b0a1835d
LY
687
688 return EMULATE_DONE;
689}
690
bc8080cb
HB
691int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
692{
693 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
694 unsigned int ia;
695 int esel, tlbsel;
696 gva_t ea;
697
8e5b26b5 698 ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
699
700 ia = (ea >> 2) & 0x1;
701
fb2838d4 702 /* since we only have two TLBs, only lower bit is used. */
bc8080cb
HB
703 tlbsel = (ea >> 3) & 0x1;
704
705 if (ia) {
706 /* invalidate all entries */
dc83b8bc
SW
707 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries;
708 esel++)
bc8080cb
HB
709 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
710 } else {
711 ea &= 0xfffff000;
712 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
713 get_cur_pid(vcpu), -1);
714 if (esel >= 0)
715 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
716 }
717
dd9ebf1f 718 /* Invalidate all vcpu id mappings */
8fdd21a2 719 kvmppc_e500_tlbil_all(vcpu_e500);
bc8080cb
HB
720
721 return EMULATE_DONE;
722}
723
ab9fc405
SW
724static void tlbilx_all(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
725 int pid, int rt)
726{
727 struct kvm_book3e_206_tlb_entry *tlbe;
728 int tid, esel;
729
730 /* invalidate all entries */
731 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries; esel++) {
732 tlbe = get_entry(vcpu_e500, tlbsel, esel);
733 tid = get_tlb_tid(tlbe);
734 if (rt == 0 || tid == pid) {
735 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
736 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
737 }
738 }
739}
740
741static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,
742 int ra, int rb)
743{
744 int tlbsel, esel;
745 gva_t ea;
746
747 ea = kvmppc_get_gpr(&vcpu_e500->vcpu, rb);
748 if (ra)
749 ea += kvmppc_get_gpr(&vcpu_e500->vcpu, ra);
750
751 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
752 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, -1);
753 if (esel >= 0) {
754 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
755 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
756 break;
757 }
758 }
759}
760
761int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb)
762{
763 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
764 int pid = get_cur_spid(vcpu);
765
766 if (rt == 0 || rt == 1) {
767 tlbilx_all(vcpu_e500, 0, pid, rt);
768 tlbilx_all(vcpu_e500, 1, pid, rt);
769 } else if (rt == 3) {
770 tlbilx_one(vcpu_e500, pid, ra, rb);
771 }
772
773 return EMULATE_DONE;
774}
775
bc8080cb
HB
776int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
777{
778 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
779 int tlbsel, esel;
dc83b8bc 780 struct kvm_book3e_206_tlb_entry *gtlbe;
bc8080cb 781
b5904972
SW
782 tlbsel = get_tlb_tlbsel(vcpu);
783 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 784
dc83b8bc 785 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
b5904972
SW
786 vcpu->arch.shared->mas0 &= ~MAS0_NV(~0);
787 vcpu->arch.shared->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
788 vcpu->arch.shared->mas1 = gtlbe->mas1;
789 vcpu->arch.shared->mas2 = gtlbe->mas2;
790 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
791
792 return EMULATE_DONE;
793}
794
795int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
796{
797 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
b5904972
SW
798 int as = !!get_cur_sas(vcpu);
799 unsigned int pid = get_cur_spid(vcpu);
bc8080cb 800 int esel, tlbsel;
dc83b8bc 801 struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
bc8080cb
HB
802 gva_t ea;
803
8e5b26b5 804 ea = kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
805
806 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
807 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
808 if (esel >= 0) {
dc83b8bc 809 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
810 break;
811 }
812 }
813
814 if (gtlbe) {
303b7c97
SW
815 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
816
b5904972 817 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
08b7fa92 818 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
819 vcpu->arch.shared->mas1 = gtlbe->mas1;
820 vcpu->arch.shared->mas2 = gtlbe->mas2;
821 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
822 } else {
823 int victim;
824
fb2838d4 825 /* since we only have two TLBs, only lower bit is used. */
b5904972 826 tlbsel = vcpu->arch.shared->mas4 >> 28 & 0x1;
0164c0f0 827 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
bc8080cb 828
b5904972
SW
829 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel)
830 | MAS0_ESEL(victim)
08b7fa92 831 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
832 vcpu->arch.shared->mas1 =
833 (vcpu->arch.shared->mas6 & MAS6_SPID0)
834 | (vcpu->arch.shared->mas6 & (MAS6_SAS ? MAS1_TS : 0))
835 | (vcpu->arch.shared->mas4 & MAS4_TSIZED(~0));
836 vcpu->arch.shared->mas2 &= MAS2_EPN;
837 vcpu->arch.shared->mas2 |= vcpu->arch.shared->mas4 &
838 MAS2_ATTRIB_MASK;
839 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 |
840 MAS3_U2 | MAS3_U3;
bc8080cb
HB
841 }
842
49ea0695 843 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
bc8080cb
HB
844 return EMULATE_DONE;
845}
846
57013524 847/* sesel is for tlb1 only */
3bf3cdcc 848static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW
849 struct kvm_book3e_206_tlb_entry *gtlbe,
850 struct kvm_book3e_206_tlb_entry *stlbe,
3bf3cdcc
SW
851 int stlbsel, int sesel)
852{
853 int stid;
854
855 preempt_disable();
8fdd21a2 856 stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe);
3bf3cdcc
SW
857
858 stlbe->mas1 |= MAS1_TID(stid);
859 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
860 preempt_enable();
861}
862
bc8080cb
HB
863int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
864{
865 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
8fdd21a2
SW
866 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
867 int tlbsel, esel, stlbsel, sesel;
cc902ad4 868 int recal = 0;
bc8080cb 869
b5904972
SW
870 tlbsel = get_tlb_tlbsel(vcpu);
871 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 872
dc83b8bc 873 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb 874
cc902ad4 875 if (get_tlb_v(gtlbe)) {
0164c0f0 876 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
cc902ad4
BB
877 if ((tlbsel == 1) &&
878 kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))
879 recal = 1;
880 }
bc8080cb 881
b5904972
SW
882 gtlbe->mas1 = vcpu->arch.shared->mas1;
883 gtlbe->mas2 = vcpu->arch.shared->mas2;
884 gtlbe->mas7_3 = vcpu->arch.shared->mas7_3;
bc8080cb 885
d37b1a03
LY
886 trace_kvm_booke206_gtlb_write(vcpu->arch.shared->mas0, gtlbe->mas1,
887 gtlbe->mas2, gtlbe->mas7_3);
bc8080cb 888
cc902ad4
BB
889 if (tlbsel == 1) {
890 /*
891 * If a valid tlb1 entry is overwritten then recalculate the
892 * min/max TLB1 map address range otherwise no need to look
893 * in tlb1 array.
894 */
895 if (recal)
896 kvmppc_recalc_tlb1map_range(vcpu_e500);
897 else
898 kvmppc_set_tlb1map_range(vcpu, gtlbe);
899 }
900
bc8080cb
HB
901 /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
902 if (tlbe_is_host_safe(vcpu, gtlbe)) {
08b7fa92
LY
903 u64 eaddr;
904 u64 raddr;
905
bc8080cb
HB
906 switch (tlbsel) {
907 case 0:
908 /* TLB0 */
909 gtlbe->mas1 &= ~MAS1_TSIZE(~0);
0cfb50e5 910 gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb
HB
911
912 stlbsel = 0;
57013524
SW
913 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
914 sesel = 0; /* unused */
bc8080cb
HB
915
916 break;
917
918 case 1:
919 /* TLB1 */
920 eaddr = get_tlb_eaddr(gtlbe);
921 raddr = get_tlb_raddr(gtlbe);
922
923 /* Create a 4KB mapping on the host.
924 * If the guest wanted a large page,
925 * only the first 4KB is mapped here and the rest
926 * are mapped on the fly. */
927 stlbsel = 1;
928 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
4f802fe9 929 raddr >> PAGE_SHIFT, gtlbe, &stlbe, esel);
bc8080cb
HB
930 break;
931
932 default:
933 BUG();
934 }
3bf3cdcc
SW
935
936 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
937 }
938
49ea0695 939 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
bc8080cb
HB
940 return EMULATE_DONE;
941}
942
8fdd21a2
SW
943static int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
944 gva_t eaddr, unsigned int pid, int as)
945{
946 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
947 int esel, tlbsel;
948
949 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
950 esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
951 if (esel >= 0)
952 return index_of(tlbsel, esel);
953 }
954
955 return -1;
956}
957
958/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
959int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
960 struct kvm_translation *tr)
961{
962 int index;
963 gva_t eaddr;
964 u8 pid;
965 u8 as;
966
967 eaddr = tr->linear_address;
968 pid = (tr->linear_address >> 32) & 0xff;
969 as = (tr->linear_address >> 40) & 0x1;
970
971 index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);
972 if (index < 0) {
973 tr->valid = 0;
974 return 0;
975 }
976
977 tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
978 /* XXX what does "writeable" and "usermode" even mean? */
979 tr->valid = 1;
980
981 return 0;
982}
983
984
bc8080cb
HB
985int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
986{
666e7252 987 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
988
989 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
990}
991
992int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
993{
666e7252 994 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
995
996 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
997}
998
999void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
1000{
666e7252 1001 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
1002
1003 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
1004}
1005
1006void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
1007{
666e7252 1008 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
1009
1010 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
1011}
1012
1013gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
1014 gva_t eaddr)
1015{
1016 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc
SW
1017 struct kvm_book3e_206_tlb_entry *gtlbe;
1018 u64 pgmask;
1019
1020 gtlbe = get_entry(vcpu_e500, tlbsel_of(index), esel_of(index));
1021 pgmask = get_tlb_bytes(gtlbe) - 1;
bc8080cb
HB
1022
1023 return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
1024}
1025
1026void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1027{
bc8080cb
HB
1028}
1029
1030void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
1031 unsigned int index)
1032{
1033 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
08b7fa92 1034 struct tlbe_priv *priv;
dc83b8bc 1035 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
bc8080cb
HB
1036 int tlbsel = tlbsel_of(index);
1037 int esel = esel_of(index);
1038 int stlbsel, sesel;
1039
dc83b8bc 1040 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
08b7fa92 1041
bc8080cb
HB
1042 switch (tlbsel) {
1043 case 0:
1044 stlbsel = 0;
57013524 1045 sesel = 0; /* unused */
0164c0f0 1046 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
08b7fa92 1047
2bb890f5
AG
1048 /* Only triggers after clear_tlb_refs */
1049 if (unlikely(!(priv->ref.flags & E500_TLB_VALID)))
1050 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
1051 else
1052 kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
1053 &priv->ref, eaddr, &stlbe);
bc8080cb
HB
1054 break;
1055
1056 case 1: {
1057 gfn_t gfn = gpaddr >> PAGE_SHIFT;
bc8080cb
HB
1058
1059 stlbsel = 1;
08b7fa92 1060 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
4f802fe9 1061 gtlbe, &stlbe, esel);
bc8080cb
HB
1062 break;
1063 }
1064
1065 default:
1066 BUG();
1067 break;
1068 }
08b7fa92 1069
3bf3cdcc 1070 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
1071}
1072
862d31f7
AG
1073/************* MMU Notifiers *************/
1074
1075int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1076{
6346046c
AG
1077 trace_kvm_unmap_hva(hva);
1078
862d31f7
AG
1079 /*
1080 * Flush all shadow tlb entries everywhere. This is slow, but
1081 * we are 100% sure that we catch the to be unmapped page
1082 */
1083 kvm_flush_remote_tlbs(kvm);
1084
1085 return 0;
1086}
1087
1088int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
1089{
1090 /* kvm_unmap_hva flushes everything anyways */
1091 kvm_unmap_hva(kvm, start);
1092
1093 return 0;
1094}
1095
1096int kvm_age_hva(struct kvm *kvm, unsigned long hva)
1097{
1098 /* XXX could be more clever ;) */
1099 return 0;
1100}
1101
1102int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1103{
1104 /* XXX could be more clever ;) */
1105 return 0;
1106}
1107
1108void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1109{
1110 /* The page will get remapped properly on its next fault */
1111 kvm_unmap_hva(kvm, hva);
1112}
1113
1114/*****************************************/
1115
dc83b8bc
SW
1116static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
1117{
1118 int i;
1119
4f802fe9
SW
1120 clear_tlb1_bitmap(vcpu_e500);
1121 kfree(vcpu_e500->g2h_tlb1_map);
1122
dc83b8bc
SW
1123 clear_tlb_refs(vcpu_e500);
1124 kfree(vcpu_e500->gtlb_priv[0]);
1125 kfree(vcpu_e500->gtlb_priv[1]);
1126
1127 if (vcpu_e500->shared_tlb_pages) {
1128 vfree((void *)(round_down((uintptr_t)vcpu_e500->gtlb_arch,
1129 PAGE_SIZE)));
1130
1131 for (i = 0; i < vcpu_e500->num_shared_tlb_pages; i++) {
1132 set_page_dirty_lock(vcpu_e500->shared_tlb_pages[i]);
1133 put_page(vcpu_e500->shared_tlb_pages[i]);
1134 }
1135
1136 vcpu_e500->num_shared_tlb_pages = 0;
adbb48a8
SW
1137
1138 kfree(vcpu_e500->shared_tlb_pages);
dc83b8bc
SW
1139 vcpu_e500->shared_tlb_pages = NULL;
1140 } else {
1141 kfree(vcpu_e500->gtlb_arch);
1142 }
1143
1144 vcpu_e500->gtlb_arch = NULL;
1145}
1146
8fdd21a2
SW
1147void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1148{
1149 sregs->u.e.mas0 = vcpu->arch.shared->mas0;
1150 sregs->u.e.mas1 = vcpu->arch.shared->mas1;
1151 sregs->u.e.mas2 = vcpu->arch.shared->mas2;
1152 sregs->u.e.mas7_3 = vcpu->arch.shared->mas7_3;
1153 sregs->u.e.mas4 = vcpu->arch.shared->mas4;
1154 sregs->u.e.mas6 = vcpu->arch.shared->mas6;
1155
1156 sregs->u.e.mmucfg = vcpu->arch.mmucfg;
1157 sregs->u.e.tlbcfg[0] = vcpu->arch.tlbcfg[0];
1158 sregs->u.e.tlbcfg[1] = vcpu->arch.tlbcfg[1];
1159 sregs->u.e.tlbcfg[2] = 0;
1160 sregs->u.e.tlbcfg[3] = 0;
1161}
1162
1163int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1164{
1165 if (sregs->u.e.features & KVM_SREGS_E_ARCH206_MMU) {
1166 vcpu->arch.shared->mas0 = sregs->u.e.mas0;
1167 vcpu->arch.shared->mas1 = sregs->u.e.mas1;
1168 vcpu->arch.shared->mas2 = sregs->u.e.mas2;
1169 vcpu->arch.shared->mas7_3 = sregs->u.e.mas7_3;
1170 vcpu->arch.shared->mas4 = sregs->u.e.mas4;
1171 vcpu->arch.shared->mas6 = sregs->u.e.mas6;
1172 }
1173
1174 return 0;
1175}
1176
dc83b8bc
SW
1177int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
1178 struct kvm_config_tlb *cfg)
1179{
1180 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1181 struct kvm_book3e_206_tlb_params params;
1182 char *virt;
1183 struct page **pages;
1184 struct tlbe_priv *privs[2] = {};
4f802fe9 1185 u64 *g2h_bitmap = NULL;
dc83b8bc
SW
1186 size_t array_len;
1187 u32 sets;
1188 int num_pages, ret, i;
1189
1190 if (cfg->mmu_type != KVM_MMU_FSL_BOOKE_NOHV)
1191 return -EINVAL;
1192
1193 if (copy_from_user(&params, (void __user *)(uintptr_t)cfg->params,
1194 sizeof(params)))
1195 return -EFAULT;
1196
1197 if (params.tlb_sizes[1] > 64)
1198 return -EINVAL;
1199 if (params.tlb_ways[1] != params.tlb_sizes[1])
1200 return -EINVAL;
1201 if (params.tlb_sizes[2] != 0 || params.tlb_sizes[3] != 0)
1202 return -EINVAL;
1203 if (params.tlb_ways[2] != 0 || params.tlb_ways[3] != 0)
1204 return -EINVAL;
1205
1206 if (!is_power_of_2(params.tlb_ways[0]))
1207 return -EINVAL;
1208
1209 sets = params.tlb_sizes[0] >> ilog2(params.tlb_ways[0]);
1210 if (!is_power_of_2(sets))
1211 return -EINVAL;
1212
1213 array_len = params.tlb_sizes[0] + params.tlb_sizes[1];
1214 array_len *= sizeof(struct kvm_book3e_206_tlb_entry);
1215
1216 if (cfg->array_len < array_len)
1217 return -EINVAL;
1218
1219 num_pages = DIV_ROUND_UP(cfg->array + array_len - 1, PAGE_SIZE) -
1220 cfg->array / PAGE_SIZE;
1221 pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);
1222 if (!pages)
1223 return -ENOMEM;
1224
1225 ret = get_user_pages_fast(cfg->array, num_pages, 1, pages);
1226 if (ret < 0)
1227 goto err_pages;
1228
1229 if (ret != num_pages) {
1230 num_pages = ret;
1231 ret = -EFAULT;
1232 goto err_put_page;
1233 }
1234
1235 virt = vmap(pages, num_pages, VM_MAP, PAGE_KERNEL);
12ecd957
JL
1236 if (!virt) {
1237 ret = -ENOMEM;
dc83b8bc 1238 goto err_put_page;
12ecd957 1239 }
dc83b8bc
SW
1240
1241 privs[0] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[0],
1242 GFP_KERNEL);
1243 privs[1] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[1],
1244 GFP_KERNEL);
1245
12ecd957
JL
1246 if (!privs[0] || !privs[1]) {
1247 ret = -ENOMEM;
1248 goto err_privs;
1249 }
dc83b8bc 1250
4f802fe9
SW
1251 g2h_bitmap = kzalloc(sizeof(u64) * params.tlb_sizes[1],
1252 GFP_KERNEL);
12ecd957
JL
1253 if (!g2h_bitmap) {
1254 ret = -ENOMEM;
1255 goto err_privs;
1256 }
4f802fe9 1257
dc83b8bc
SW
1258 free_gtlb(vcpu_e500);
1259
1260 vcpu_e500->gtlb_priv[0] = privs[0];
1261 vcpu_e500->gtlb_priv[1] = privs[1];
4f802fe9 1262 vcpu_e500->g2h_tlb1_map = g2h_bitmap;
dc83b8bc
SW
1263
1264 vcpu_e500->gtlb_arch = (struct kvm_book3e_206_tlb_entry *)
1265 (virt + (cfg->array & (PAGE_SIZE - 1)));
1266
1267 vcpu_e500->gtlb_params[0].entries = params.tlb_sizes[0];
1268 vcpu_e500->gtlb_params[1].entries = params.tlb_sizes[1];
1269
1270 vcpu_e500->gtlb_offset[0] = 0;
1271 vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
1272
8fdd21a2
SW
1273 vcpu->arch.mmucfg = mfspr(SPRN_MMUCFG) & ~MMUCFG_LPIDSIZE;
1274
1275 vcpu->arch.tlbcfg[0] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
dc83b8bc 1276 if (params.tlb_sizes[0] <= 2048)
8fdd21a2
SW
1277 vcpu->arch.tlbcfg[0] |= params.tlb_sizes[0];
1278 vcpu->arch.tlbcfg[0] |= params.tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc 1279
8fdd21a2
SW
1280 vcpu->arch.tlbcfg[1] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
1281 vcpu->arch.tlbcfg[1] |= params.tlb_sizes[1];
1282 vcpu->arch.tlbcfg[1] |= params.tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc
SW
1283
1284 vcpu_e500->shared_tlb_pages = pages;
1285 vcpu_e500->num_shared_tlb_pages = num_pages;
1286
1287 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0];
1288 vcpu_e500->gtlb_params[0].sets = sets;
1289
1290 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1];
1291 vcpu_e500->gtlb_params[1].sets = 1;
1292
cc902ad4 1293 kvmppc_recalc_tlb1map_range(vcpu_e500);
dc83b8bc
SW
1294 return 0;
1295
12ecd957 1296err_privs:
dc83b8bc
SW
1297 kfree(privs[0]);
1298 kfree(privs[1]);
1299
12ecd957 1300err_put_page:
dc83b8bc
SW
1301 for (i = 0; i < num_pages; i++)
1302 put_page(pages[i]);
1303
1304err_pages:
1305 kfree(pages);
1306 return ret;
1307}
1308
1309int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
1310 struct kvm_dirty_tlb *dirty)
1311{
1312 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
cc902ad4 1313 kvmppc_recalc_tlb1map_range(vcpu_e500);
dc83b8bc
SW
1314 clear_tlb_refs(vcpu_e500);
1315 return 0;
bc8080cb
HB
1316}
1317
1318int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
1319{
8fdd21a2 1320 struct kvm_vcpu *vcpu = &vcpu_e500->vcpu;
dc83b8bc
SW
1321 int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);
1322 int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;
1323
0164c0f0
SW
1324 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
1325 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
1326
1327 /*
1328 * This should never happen on real e500 hardware, but is
1329 * architecturally possible -- e.g. in some weird nested
1330 * virtualization case.
1331 */
1332 if (host_tlb_params[0].entries == 0 ||
1333 host_tlb_params[1].entries == 0) {
1334 pr_err("%s: need to know host tlb size\n", __func__);
1335 return -ENODEV;
1336 }
1337
1338 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
1339 TLBnCFG_ASSOC_SHIFT;
1340 host_tlb_params[1].ways = host_tlb_params[1].entries;
1341
1342 if (!is_power_of_2(host_tlb_params[0].entries) ||
1343 !is_power_of_2(host_tlb_params[0].ways) ||
1344 host_tlb_params[0].entries < host_tlb_params[0].ways ||
1345 host_tlb_params[0].ways == 0) {
1346 pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
1347 __func__, host_tlb_params[0].entries,
1348 host_tlb_params[0].ways);
1349 return -ENODEV;
1350 }
1351
1352 host_tlb_params[0].sets =
1353 host_tlb_params[0].entries / host_tlb_params[0].ways;
1354 host_tlb_params[1].sets = 1;
bc8080cb 1355
dc83b8bc
SW
1356 vcpu_e500->gtlb_params[0].entries = KVM_E500_TLB0_SIZE;
1357 vcpu_e500->gtlb_params[1].entries = KVM_E500_TLB1_SIZE;
bc8080cb 1358
dc83b8bc
SW
1359 vcpu_e500->gtlb_params[0].ways = KVM_E500_TLB0_WAY_NUM;
1360 vcpu_e500->gtlb_params[0].sets =
1361 KVM_E500_TLB0_SIZE / KVM_E500_TLB0_WAY_NUM;
1362
1363 vcpu_e500->gtlb_params[1].ways = KVM_E500_TLB1_SIZE;
1364 vcpu_e500->gtlb_params[1].sets = 1;
1365
1366 vcpu_e500->gtlb_arch = kmalloc(entries * entry_size, GFP_KERNEL);
1367 if (!vcpu_e500->gtlb_arch)
1368 return -ENOMEM;
1369
1370 vcpu_e500->gtlb_offset[0] = 0;
1371 vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
0164c0f0
SW
1372
1373 vcpu_e500->tlb_refs[0] =
1374 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
1375 GFP_KERNEL);
1376 if (!vcpu_e500->tlb_refs[0])
1377 goto err;
1378
1379 vcpu_e500->tlb_refs[1] =
1380 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
1381 GFP_KERNEL);
1382 if (!vcpu_e500->tlb_refs[1])
1383 goto err;
1384
dc83b8bc
SW
1385 vcpu_e500->gtlb_priv[0] = kzalloc(sizeof(struct tlbe_ref) *
1386 vcpu_e500->gtlb_params[0].entries,
1387 GFP_KERNEL);
0164c0f0
SW
1388 if (!vcpu_e500->gtlb_priv[0])
1389 goto err;
1390
dc83b8bc
SW
1391 vcpu_e500->gtlb_priv[1] = kzalloc(sizeof(struct tlbe_ref) *
1392 vcpu_e500->gtlb_params[1].entries,
1393 GFP_KERNEL);
0164c0f0
SW
1394 if (!vcpu_e500->gtlb_priv[1])
1395 goto err;
bc8080cb 1396
e400e72f 1397 vcpu_e500->g2h_tlb1_map = kzalloc(sizeof(u64) *
4f802fe9
SW
1398 vcpu_e500->gtlb_params[1].entries,
1399 GFP_KERNEL);
1400 if (!vcpu_e500->g2h_tlb1_map)
1401 goto err;
1402
1403 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
1404 host_tlb_params[1].entries,
1405 GFP_KERNEL);
1406 if (!vcpu_e500->h2g_tlb1_rmap)
1407 goto err;
1408
da15bf43 1409 /* Init TLB configuration register */
8fdd21a2 1410 vcpu->arch.tlbcfg[0] = mfspr(SPRN_TLB0CFG) &
7b11dc99 1411 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
8fdd21a2
SW
1412 vcpu->arch.tlbcfg[0] |= vcpu_e500->gtlb_params[0].entries;
1413 vcpu->arch.tlbcfg[0] |=
7b11dc99
SW
1414 vcpu_e500->gtlb_params[0].ways << TLBnCFG_ASSOC_SHIFT;
1415
8fdd21a2 1416 vcpu->arch.tlbcfg[1] = mfspr(SPRN_TLB1CFG) &
7b11dc99 1417 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
c6b3733b
AG
1418 vcpu->arch.tlbcfg[1] |= vcpu_e500->gtlb_params[1].entries;
1419 vcpu->arch.tlbcfg[1] |=
7b11dc99 1420 vcpu_e500->gtlb_params[1].ways << TLBnCFG_ASSOC_SHIFT;
da15bf43 1421
cc902ad4 1422 kvmppc_recalc_tlb1map_range(vcpu_e500);
bc8080cb
HB
1423 return 0;
1424
0164c0f0 1425err:
dc83b8bc 1426 free_gtlb(vcpu_e500);
0164c0f0
SW
1427 kfree(vcpu_e500->tlb_refs[0]);
1428 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb
HB
1429 return -1;
1430}
1431
1432void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
1433{
dc83b8bc 1434 free_gtlb(vcpu_e500);
4f802fe9 1435 kfree(vcpu_e500->h2g_tlb1_rmap);
0164c0f0
SW
1436 kfree(vcpu_e500->tlb_refs[0]);
1437 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb 1438}
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