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KVM: PPC: e500: Don't hardcode PIR=0
[deliverable/linux.git] / arch / powerpc / kvm / e500_tlb.c
CommitLineData
bc8080cb 1/*
49ea0695 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
HB		 3 *
4 * Author: Yu Liu, yu.liu@freescale.com
5 *
6 * Description:
7 * This file is based on arch/powerpc/kvm/44x_tlb.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
0164c0f0 15#include <linux/kernel.h>
bc8080cb 16#include <linux/types.h>
5a0e3ad6 17#include <linux/slab.h>
bc8080cb
HB		 18#include <linux/string.h>
19#include <linux/kvm.h>
20#include <linux/kvm_host.h>
21#include <linux/highmem.h>
dc83b8bc
SW		 22#include <linux/log2.h>
23#include <linux/uaccess.h>
24#include <linux/sched.h>
25#include <linux/rwsem.h>
26#include <linux/vmalloc.h>
bc8080cb
HB		 27#include <asm/kvm_ppc.h>
28#include <asm/kvm_e500.h>
29
9aa4dd5e 30#include "../mm/mmu_decl.h"
bc8080cb 31#include "e500_tlb.h"
46f43c6e 32#include "trace.h"
49ea0695 33#include "timing.h"
bc8080cb 34
0164c0f0 35#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
bc8080cb 36
dd9ebf1f
LY		 37struct id {
38 unsigned long val;
39 struct id **pentry;
40};
41
42#define NUM_TIDS 256
43
44/*
45 * This table provide mappings from:
46 * (guestAS,guestTID,guestPR) --> ID of physical cpu
47 * guestAS [0..1]
48 * guestTID [0..255]
49 * guestPR [0..1]
50 * ID [1..255]
51 * Each vcpu keeps one vcpu_id_table.
52 */
53struct vcpu_id_table {
54 struct id id[2][NUM_TIDS][2];
55};
56
57/*
58 * This table provide reversed mappings of vcpu_id_table:
59 * ID --> address of vcpu_id_table item.
60 * Each physical core has one pcpu_id_table.
61 */
62struct pcpu_id_table {
63 struct id *entry[NUM_TIDS];
64};
65
66static DEFINE_PER_CPU(struct pcpu_id_table, pcpu_sids);
67
68/* This variable keeps last used shadow ID on local core.
69 * The valid range of shadow ID is [1..255] */
70static DEFINE_PER_CPU(unsigned long, pcpu_last_used_sid);
71
0164c0f0 72static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
bc8080cb 73
dc83b8bc
SW		 74static struct kvm_book3e_206_tlb_entry *get_entry(
75 struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)
76{
77 int offset = vcpu_e500->gtlb_offset[tlbsel];
78 return &vcpu_e500->gtlb_arch[offset + entry];
79}
80
dd9ebf1f
LY		 81/*
82 * Allocate a free shadow id and setup a valid sid mapping in given entry.
83 * A mapping is only valid when vcpu_id_table and pcpu_id_table are match.
84 *
85 * The caller must have preemption disabled, and keep it that way until
86 * it has finished with the returned shadow id (either written into the
87 * TLB or arch.shadow_pid, or discarded).
88 */
89static inline int local_sid_setup_one(struct id *entry)
90{
91 unsigned long sid;
92 int ret = -1;
93
94 sid = ++(__get_cpu_var(pcpu_last_used_sid));
95 if (sid < NUM_TIDS) {
96 __get_cpu_var(pcpu_sids).entry[sid] = entry;
97 entry->val = sid;
98 entry->pentry = &__get_cpu_var(pcpu_sids).entry[sid];
99 ret = sid;
100 }
101
102 /*
103 * If sid == NUM_TIDS, we've run out of sids. We return -1, and
104 * the caller will invalidate everything and start over.
105 *
106 * sid > NUM_TIDS indicates a race, which we disable preemption to
107 * avoid.
108 */
109 WARN_ON(sid > NUM_TIDS);
110
111 return ret;
112}
113
114/*
115 * Check if given entry contain a valid shadow id mapping.
116 * An ID mapping is considered valid only if
117 * both vcpu and pcpu know this mapping.
118 *
119 * The caller must have preemption disabled, and keep it that way until
120 * it has finished with the returned shadow id (either written into the
121 * TLB or arch.shadow_pid, or discarded).
122 */
123static inline int local_sid_lookup(struct id *entry)
124{
125 if (entry && entry->val != 0 &&
126 __get_cpu_var(pcpu_sids).entry[entry->val] == entry &&
127 entry->pentry == &__get_cpu_var(pcpu_sids).entry[entry->val])
128 return entry->val;
129 return -1;
130}
131
90b92a6f 132/* Invalidate all id mappings on local core -- call with preempt disabled */
dd9ebf1f
LY		 133static inline void local_sid_destroy_all(void)
134{
dd9ebf1f
LY		 135 __get_cpu_var(pcpu_last_used_sid) = 0;
136 memset(&__get_cpu_var(pcpu_sids), 0, sizeof(__get_cpu_var(pcpu_sids)));
dd9ebf1f
LY		 137}
138
139static void *kvmppc_e500_id_table_alloc(struct kvmppc_vcpu_e500 *vcpu_e500)
140{
141 vcpu_e500->idt = kzalloc(sizeof(struct vcpu_id_table), GFP_KERNEL);
142 return vcpu_e500->idt;
143}
144
145static void kvmppc_e500_id_table_free(struct kvmppc_vcpu_e500 *vcpu_e500)
146{
147 kfree(vcpu_e500->idt);
148}
149
150/* Invalidate all mappings on vcpu */
151static void kvmppc_e500_id_table_reset_all(struct kvmppc_vcpu_e500 *vcpu_e500)
152{
153 memset(vcpu_e500->idt, 0, sizeof(struct vcpu_id_table));
154
155 /* Update shadow pid when mappings are changed */
156 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
157}
158
159/* Invalidate one ID mapping on vcpu */
160static inline void kvmppc_e500_id_table_reset_one(
161 struct kvmppc_vcpu_e500 *vcpu_e500,
162 int as, int pid, int pr)
163{
164 struct vcpu_id_table *idt = vcpu_e500->idt;
165
166 BUG_ON(as >= 2);
167 BUG_ON(pid >= NUM_TIDS);
168 BUG_ON(pr >= 2);
169
170 idt->id[as][pid][pr].val = 0;
171 idt->id[as][pid][pr].pentry = NULL;
172
173 /* Update shadow pid when mappings are changed */
174 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
175}
176
177/*
178 * Map guest (vcpu,AS,ID,PR) to physical core shadow id.
179 * This function first lookup if a valid mapping exists,
180 * if not, then creates a new one.
181 *
182 * The caller must have preemption disabled, and keep it that way until
183 * it has finished with the returned shadow id (either written into the
184 * TLB or arch.shadow_pid, or discarded).
185 */
186static unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
187 unsigned int as, unsigned int gid,
188 unsigned int pr, int avoid_recursion)
189{
190 struct vcpu_id_table *idt = vcpu_e500->idt;
191 int sid;
192
193 BUG_ON(as >= 2);
194 BUG_ON(gid >= NUM_TIDS);
195 BUG_ON(pr >= 2);
196
197 sid = local_sid_lookup(&idt->id[as][gid][pr]);
198
199 while (sid <= 0) {
200 /* No mapping yet */
201 sid = local_sid_setup_one(&idt->id[as][gid][pr]);
202 if (sid <= 0) {
203 _tlbil_all();
204 local_sid_destroy_all();
205 }
206
207 /* Update shadow pid when mappings are changed */
208 if (!avoid_recursion)
209 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
210 }
211
212 return sid;
213}
214
215/* Map guest pid to shadow.
216 * We use PID to keep shadow of current guest non-zero PID,
217 * and use PID1 to keep shadow of guest zero PID.
218 * So that guest tlbe with TID=0 can be accessed at any time */
219void kvmppc_e500_recalc_shadow_pid(struct kvmppc_vcpu_e500 *vcpu_e500)
220{
221 preempt_disable();
222 vcpu_e500->vcpu.arch.shadow_pid = kvmppc_e500_get_sid(vcpu_e500,
223 get_cur_as(&vcpu_e500->vcpu),
224 get_cur_pid(&vcpu_e500->vcpu),
225 get_cur_pr(&vcpu_e500->vcpu), 1);
226 vcpu_e500->vcpu.arch.shadow_pid1 = kvmppc_e500_get_sid(vcpu_e500,
227 get_cur_as(&vcpu_e500->vcpu), 0,
228 get_cur_pr(&vcpu_e500->vcpu), 1);
229 preempt_enable();
230}
231
0164c0f0 232static inline unsigned int gtlb0_get_next_victim(
bc8080cb
HB		 233 struct kvmppc_vcpu_e500 *vcpu_e500)
234{
235 unsigned int victim;
236
08b7fa92 237 victim = vcpu_e500->gtlb_nv[0]++;
dc83b8bc 238 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways))
08b7fa92 239 vcpu_e500->gtlb_nv[0] = 0;
bc8080cb
HB		 240
241 return victim;
242}
243
244static inline unsigned int tlb1_max_shadow_size(void)
245{
a4cd8b23 246 /* reserve one entry for magic page */
0164c0f0 247 return host_tlb_params[1].entries - tlbcam_index - 1;
bc8080cb
HB		 248}
249
dc83b8bc 250static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 251{
dc83b8bc 252 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
bc8080cb
HB		 253}
254
255static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
256{
257 /* Mask off reserved bits. */
258 mas3 &= MAS3_ATTRIB_MASK;
259
260 if (!usermode) {
261 /* Guest is in supervisor mode,
262 * so we need to translate guest
263 * supervisor permissions into user permissions. */
264 mas3 &= ~E500_TLB_USER_PERM_MASK;
265 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
266 }
267
268 return mas3 | E500_TLB_SUPER_PERM_MASK;
269}
270
271static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
272{
046a48b3
LY		 273#ifdef CONFIG_SMP
274 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
275#else
bc8080cb 276 return mas2 & MAS2_ATTRIB_MASK;
046a48b3 277#endif
bc8080cb
HB		 278}
279
280/*
281 * writing shadow tlb entry to host TLB
282 */
dc83b8bc
SW		 283static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
284 uint32_t mas0)
bc8080cb 285{
0ef30995
SW		 286 unsigned long flags;
287
288 local_irq_save(flags);
289 mtspr(SPRN_MAS0, mas0);
bc8080cb 290 mtspr(SPRN_MAS1, stlbe->mas1);
dc83b8bc
SW		 291 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
292 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
293 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
0ef30995
SW		 294 asm volatile("isync; tlbwe" : : : "memory");
295 local_irq_restore(flags);
bc8080cb
HB		 296}
297
0164c0f0 298/* esel is index into set, not whole array */
bc8080cb 299static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 300 int tlbsel, int esel, struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 301{
bc8080cb 302 if (tlbsel == 0) {
dc83b8bc
SW		 303 int way = esel & (vcpu_e500->gtlb_params[0].ways - 1);
304 __write_host_tlbe(stlbe, MAS0_TLBSEL(0) | MAS0_ESEL(way));
bc8080cb 305 } else {
0ef30995
SW		 306 __write_host_tlbe(stlbe,
307 MAS0_TLBSEL(1) |
308 MAS0_ESEL(to_htlb1_esel(esel)));
bc8080cb 309 }
08b7fa92 310 trace_kvm_stlb_write(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
dc83b8bc 311 (u32)stlbe->mas7_3, (u32)(stlbe->mas7_3 >> 32));
bc8080cb
HB		 312}
313
a4cd8b23
SW		 314void kvmppc_map_magic(struct kvm_vcpu *vcpu)
315{
dd9ebf1f 316 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 317 struct kvm_book3e_206_tlb_entry magic;
a4cd8b23 318 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
dd9ebf1f 319 unsigned int stid;
a4cd8b23
SW		 320 pfn_t pfn;
321
322 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
323 get_page(pfn_to_page(pfn));
324
dd9ebf1f
LY		 325 preempt_disable();
326 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
327
328 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
a4cd8b23
SW		 329 MAS1_TSIZE(BOOK3E_PAGESZ_4K);
330 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
dc83b8bc
SW		 331 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
332 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
a4cd8b23
SW		 333
334 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
dd9ebf1f 335 preempt_enable();
a4cd8b23
SW		 336}
337
bc8080cb
HB		 338void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
339{
dd9ebf1f
LY		 340 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
341
342 /* Shadow PID may be expired on local core */
343 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
bc8080cb
HB		 344}
345
346void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
347{
dd9ebf1f
LY		 348}
349
0164c0f0
SW		 350static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,
351 int tlbsel, int esel)
dd9ebf1f 352{
dc83b8bc
SW		 353 struct kvm_book3e_206_tlb_entry *gtlbe =
354 get_entry(vcpu_e500, tlbsel, esel);
dd9ebf1f
LY		 355 struct vcpu_id_table *idt = vcpu_e500->idt;
356 unsigned int pr, tid, ts, pid;
357 u32 val, eaddr;
358 unsigned long flags;
359
360 ts = get_tlb_ts(gtlbe);
361 tid = get_tlb_tid(gtlbe);
362
363 preempt_disable();
364
365 /* One guest ID may be mapped to two shadow IDs */
366 for (pr = 0; pr < 2; pr++) {
367 /*
368 * The shadow PID can have a valid mapping on at most one
369 * host CPU. In the common case, it will be valid on this
370 * CPU, in which case (for TLB0) we do a local invalidation
371 * of the specific address.
372 *
373 * If the shadow PID is not valid on the current host CPU, or
374 * if we're invalidating a TLB1 entry, we invalidate the
375 * entire shadow PID.
376 */
377 if (tlbsel == 1 ||
378 (pid = local_sid_lookup(&idt->id[ts][tid][pr])) <= 0) {
379 kvmppc_e500_id_table_reset_one(vcpu_e500, ts, tid, pr);
380 continue;
381 }
382
383 /*
384 * The guest is invalidating a TLB0 entry which is in a PID
385 * that has a valid shadow mapping on this host CPU. We
386 * search host TLB0 to invalidate it's shadow TLB entry,
387 * similar to __tlbil_va except that we need to look in AS1.
388 */
389 val = (pid << MAS6_SPID_SHIFT) | MAS6_SAS;
390 eaddr = get_tlb_eaddr(gtlbe);
391
392 local_irq_save(flags);
393
394 mtspr(SPRN_MAS6, val);
395 asm volatile("tlbsx 0, %[eaddr]" : : [eaddr] "r" (eaddr));
396 val = mfspr(SPRN_MAS1);
397 if (val & MAS1_VALID) {
398 mtspr(SPRN_MAS1, val & ~MAS1_VALID);
399 asm volatile("tlbwe");
400 }
401
402 local_irq_restore(flags);
403 }
404
405 preempt_enable();
bc8080cb
HB		 406}
407
0164c0f0
SW		 408static int tlb0_set_base(gva_t addr, int sets, int ways)
409{
410 int set_base;
411
412 set_base = (addr >> PAGE_SHIFT) & (sets - 1);
413 set_base *= ways;
414
415 return set_base;
416}
417
418static int gtlb0_set_base(struct kvmppc_vcpu_e500 *vcpu_e500, gva_t addr)
419{
dc83b8bc
SW		 420 return tlb0_set_base(addr, vcpu_e500->gtlb_params[0].sets,
421 vcpu_e500->gtlb_params[0].ways);
0164c0f0
SW		 422}
423
424static int htlb0_set_base(gva_t addr)
425{
426 return tlb0_set_base(addr, host_tlb_params[0].sets,
427 host_tlb_params[0].ways);
428}
429
430static unsigned int get_tlb_esel(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel)
431{
432 unsigned int esel = get_tlb_esel_bit(vcpu_e500);
433
434 if (tlbsel == 0) {
dc83b8bc 435 esel &= vcpu_e500->gtlb_params[0].ways - 1;
0164c0f0
SW		 436 esel += gtlb0_set_base(vcpu_e500, vcpu_e500->mas2);
437 } else {
dc83b8bc 438 esel &= vcpu_e500->gtlb_params[tlbsel].entries - 1;
0164c0f0
SW		 439 }
440
441 return esel;
442}
443
bc8080cb
HB		 444/* Search the guest TLB for a matching entry. */
445static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
446 gva_t eaddr, int tlbsel, unsigned int pid, int as)
447{
dc83b8bc
SW		 448 int size = vcpu_e500->gtlb_params[tlbsel].entries;
449 unsigned int set_base, offset;
bc8080cb
HB		 450 int i;
451
1aee47a0 452 if (tlbsel == 0) {
0164c0f0 453 set_base = gtlb0_set_base(vcpu_e500, eaddr);
dc83b8bc 454 size = vcpu_e500->gtlb_params[0].ways;
1aee47a0
SW		 455 } else {
456 set_base = 0;
457 }
458
dc83b8bc
SW		 459 offset = vcpu_e500->gtlb_offset[tlbsel];
460
1aee47a0 461 for (i = 0; i < size; i++) {
dc83b8bc
SW		 462 struct kvm_book3e_206_tlb_entry *tlbe =
463 &vcpu_e500->gtlb_arch[offset + set_base + i];
bc8080cb
HB		 464 unsigned int tid;
465
466 if (eaddr < get_tlb_eaddr(tlbe))
467 continue;
468
469 if (eaddr > get_tlb_end(tlbe))
470 continue;
471
472 tid = get_tlb_tid(tlbe);
473 if (tid && (tid != pid))
474 continue;
475
476 if (!get_tlb_v(tlbe))
477 continue;
478
479 if (get_tlb_ts(tlbe) != as && as != -1)
480 continue;
481
1aee47a0 482 return set_base + i;
bc8080cb
HB		 483 }
484
485 return -1;
486}
487
0164c0f0 488static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
dc83b8bc 489 struct kvm_book3e_206_tlb_entry *gtlbe,
0164c0f0 490 pfn_t pfn)
bc8080cb 491{
0164c0f0
SW		 492 ref->pfn = pfn;
493 ref->flags = E500_TLB_VALID;
bc8080cb 494
08b7fa92 495 if (tlbe_is_writable(gtlbe))
0164c0f0 496 ref->flags |= E500_TLB_DIRTY;
bc8080cb
HB		 497}
498
0164c0f0 499static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
bc8080cb 500{
0164c0f0
SW		 501 if (ref->flags & E500_TLB_VALID) {
502 if (ref->flags & E500_TLB_DIRTY)
503 kvm_release_pfn_dirty(ref->pfn);
08b7fa92 504 else
0164c0f0
SW		 505 kvm_release_pfn_clean(ref->pfn);
506
507 ref->flags = 0;
508 }
509}
510
511static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
512{
513 int tlbsel = 0;
514 int i;
bc8080cb 515
dc83b8bc 516 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
0164c0f0
SW		 517 struct tlbe_ref *ref =
518 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
519 kvmppc_e500_ref_release(ref);
08b7fa92 520 }
bc8080cb
HB		 521}
522
0164c0f0
SW		 523static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
524{
525 int stlbsel = 1;
526 int i;
527
dc83b8bc
SW		 528 kvmppc_e500_id_table_reset_all(vcpu_e500);
529
0164c0f0
SW		 530 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
531 struct tlbe_ref *ref =
532 &vcpu_e500->tlb_refs[stlbsel][i];
533 kvmppc_e500_ref_release(ref);
534 }
535
536 clear_tlb_privs(vcpu_e500);
537}
538
bc8080cb
HB		 539static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
540 unsigned int eaddr, int as)
541{
542 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
543 unsigned int victim, pidsel, tsized;
544 int tlbsel;
545
fb2838d4 546 /* since we only have two TLBs, only lower bit is used. */
bc8080cb 547 tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
0164c0f0 548 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
bc8080cb 549 pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
0cfb50e5 550 tsized = (vcpu_e500->mas4 >> 7) & 0x1f;
bc8080cb
HB		 551
552 vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
08b7fa92 553 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
bc8080cb
HB		 554 vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
555 | MAS1_TID(vcpu_e500->pid[pidsel])
556 | MAS1_TSIZE(tsized);
557 vcpu_e500->mas2 = (eaddr & MAS2_EPN)
558 | (vcpu_e500->mas4 & MAS2_ATTRIB_MASK);
dc83b8bc 559 vcpu_e500->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
bc8080cb
HB		 560 vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1)
561 | (get_cur_pid(vcpu) << 16)
562 | (as ? MAS6_SAS : 0);
bc8080cb
HB		 563}
564
3bf3cdcc 565/* TID must be supplied by the caller */
dc83b8bc
SW		 566static inline void kvmppc_e500_setup_stlbe(
567 struct kvmppc_vcpu_e500 *vcpu_e500,
568 struct kvm_book3e_206_tlb_entry *gtlbe,
569 int tsize, struct tlbe_ref *ref, u64 gvaddr,
570 struct kvm_book3e_206_tlb_entry *stlbe)
08b7fa92 571{
0164c0f0
SW		 572 pfn_t pfn = ref->pfn;
573
574 BUG_ON(!(ref->flags & E500_TLB_VALID));
08b7fa92
LY		 575
576 /* Force TS=1 IPROT=0 for all guest mappings. */
3bf3cdcc 577 stlbe->mas1 = MAS1_TSIZE(tsize) | MAS1_TS | MAS1_VALID;
08b7fa92
LY		 578 stlbe->mas2 = (gvaddr & MAS2_EPN)
579 | e500_shadow_mas2_attrib(gtlbe->mas2,
580 vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
dc83b8bc
SW		 581 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT)
582 | e500_shadow_mas3_attrib(gtlbe->mas7_3,
08b7fa92 583 vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
08b7fa92
LY		 584}
585
0164c0f0 586/* sesel is an index into the entire array, not just the set */
bc8080cb 587static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW		 588 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
589 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe,
590 struct tlbe_ref *ref)
bc8080cb 591{
9973d54e 592 struct kvm_memory_slot *slot;
9973d54e
SW		 593 unsigned long pfn, hva;
594 int pfnmap = 0;
595 int tsize = BOOK3E_PAGESZ_4K;
bc8080cb 596
59c1f4e3
SW		 597 /*
598 * Translate guest physical to true physical, acquiring
599 * a page reference if it is normal, non-reserved memory.
9973d54e
SW		 600 *
601 * gfn_to_memslot() must succeed because otherwise we wouldn't
602 * have gotten this far. Eventually we should just pass the slot
603 * pointer through from the first lookup.
59c1f4e3 604 */
9973d54e
SW		 605 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
606 hva = gfn_to_hva_memslot(slot, gfn);
607
608 if (tlbsel == 1) {
609 struct vm_area_struct *vma;
610 down_read(&current->mm->mmap_sem);
611
612 vma = find_vma(current->mm, hva);
613 if (vma && hva >= vma->vm_start &&
614 (vma->vm_flags & VM_PFNMAP)) {
615 /*
616 * This VMA is a physically contiguous region (e.g.
617 * /dev/mem) that bypasses normal Linux page
618 * management. Find the overlap between the
619 * vma and the memslot.
620 */
621
622 unsigned long start, end;
623 unsigned long slot_start, slot_end;
624
625 pfnmap = 1;
626
627 start = vma->vm_pgoff;
628 end = start +
629 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
630
631 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
632
633 slot_start = pfn - (gfn - slot->base_gfn);
634 slot_end = slot_start + slot->npages;
635
636 if (start < slot_start)
637 start = slot_start;
638 if (end > slot_end)
639 end = slot_end;
640
641 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
642 MAS1_TSIZE_SHIFT;
643
644 /*
645 * e500 doesn't implement the lowest tsize bit,
646 * or 1K pages.
647 */
648 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
649
650 /*
651 * Now find the largest tsize (up to what the guest
652 * requested) that will cover gfn, stay within the
653 * range, and for which gfn and pfn are mutually
654 * aligned.
655 */
656
657 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
658 unsigned long gfn_start, gfn_end, tsize_pages;
659 tsize_pages = 1 << (tsize - 2);
660
661 gfn_start = gfn & ~(tsize_pages - 1);
662 gfn_end = gfn_start + tsize_pages;
663
664 if (gfn_start + pfn - gfn < start)
665 continue;
666 if (gfn_end + pfn - gfn > end)
667 continue;
668 if ((gfn & (tsize_pages - 1)) !=
669 (pfn & (tsize_pages - 1)))
670 continue;
671
672 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
673 pfn &= ~(tsize_pages - 1);
674 break;
675 }
676 }
677
678 up_read(&current->mm->mmap_sem);
679 }
680
681 if (likely(!pfnmap)) {
682 pfn = gfn_to_pfn_memslot(vcpu_e500->vcpu.kvm, slot, gfn);
683 if (is_error_pfn(pfn)) {
684 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
685 (long)gfn);
686 kvm_release_pfn_clean(pfn);
687 return;
688 }
bc8080cb 689 }
bc8080cb 690
0164c0f0
SW		 691 /* Drop old ref and setup new one. */
692 kvmppc_e500_ref_release(ref);
693 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
bc8080cb 694
0164c0f0 695 kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, tsize, ref, gvaddr, stlbe);
bc8080cb
HB		 696}
697
698/* XXX only map the one-one case, for now use TLB0 */
08b7fa92 699static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW		 700 int esel,
701 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 702{
dc83b8bc 703 struct kvm_book3e_206_tlb_entry *gtlbe;
0164c0f0
SW		 704 struct tlbe_ref *ref;
705 int sesel = esel & (host_tlb_params[0].ways - 1);
706 int sesel_base;
707 gva_t ea;
bc8080cb 708
dc83b8bc 709 gtlbe = get_entry(vcpu_e500, 0, esel);
0164c0f0
SW		 710 ref = &vcpu_e500->gtlb_priv[0][esel].ref;
711
712 ea = get_tlb_eaddr(gtlbe);
713 sesel_base = htlb0_set_base(ea);
bc8080cb
HB		 714
715 kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
716 get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
0164c0f0 717 gtlbe, 0, sesel_base + sesel, stlbe, ref);
bc8080cb 718
0164c0f0 719 return sesel;
bc8080cb
HB		 720}
721
722/* Caller must ensure that the specified guest TLB entry is safe to insert into
723 * the shadow TLB. */
724/* XXX for both one-one and one-to-many , for now use TLB1 */
725static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW		 726 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
727 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 728{
0164c0f0 729 struct tlbe_ref *ref;
bc8080cb
HB		 730 unsigned int victim;
731
0164c0f0 732 victim = vcpu_e500->host_tlb1_nv++;
bc8080cb 733
0164c0f0
SW		 734 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
735 vcpu_e500->host_tlb1_nv = 0;
bc8080cb 736
0164c0f0
SW		 737 ref = &vcpu_e500->tlb_refs[1][victim];
738 kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1,
739 victim, stlbe, ref);
bc8080cb
HB		 740
741 return victim;
742}
743
dd9ebf1f 744void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
bc8080cb 745{
dd9ebf1f
LY		 746 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
747
748 /* Recalc shadow pid since MSR changes */
749 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
bc8080cb
HB		 750}
751
08b7fa92
LY		 752static inline int kvmppc_e500_gtlbe_invalidate(
753 struct kvmppc_vcpu_e500 *vcpu_e500,
754 int tlbsel, int esel)
bc8080cb 755{
dc83b8bc
SW		 756 struct kvm_book3e_206_tlb_entry *gtlbe =
757 get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB		 758
759 if (unlikely(get_tlb_iprot(gtlbe)))
760 return -1;
761
bc8080cb
HB		 762 gtlbe->mas1 = 0;
763
764 return 0;
765}
766
b0a1835d
LY		 767int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
768{
769 int esel;
770
771 if (value & MMUCSR0_TLB0FI)
dc83b8bc 772 for (esel = 0; esel < vcpu_e500->gtlb_params[0].entries; esel++)
b0a1835d
LY		 773 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
774 if (value & MMUCSR0_TLB1FI)
dc83b8bc 775 for (esel = 0; esel < vcpu_e500->gtlb_params[1].entries; esel++)
b0a1835d
LY		 776 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
777
dd9ebf1f
LY		 778 /* Invalidate all vcpu id mappings */
779 kvmppc_e500_id_table_reset_all(vcpu_e500);
b0a1835d
LY		 780
781 return EMULATE_DONE;
782}
783
bc8080cb
HB		 784int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
785{
786 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
787 unsigned int ia;
788 int esel, tlbsel;
789 gva_t ea;
790
8e5b26b5 791 ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB		 792
793 ia = (ea >> 2) & 0x1;
794
fb2838d4 795 /* since we only have two TLBs, only lower bit is used. */
bc8080cb
HB		 796 tlbsel = (ea >> 3) & 0x1;
797
798 if (ia) {
799 /* invalidate all entries */
dc83b8bc
SW		 800 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries;
801 esel++)
bc8080cb
HB		 802 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
803 } else {
804 ea &= 0xfffff000;
805 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
806 get_cur_pid(vcpu), -1);
807 if (esel >= 0)
808 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
809 }
810
dd9ebf1f
LY		 811 /* Invalidate all vcpu id mappings */
812 kvmppc_e500_id_table_reset_all(vcpu_e500);
bc8080cb
HB		 813
814 return EMULATE_DONE;
815}
816
817int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
818{
819 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
820 int tlbsel, esel;
dc83b8bc 821 struct kvm_book3e_206_tlb_entry *gtlbe;
bc8080cb
HB		 822
823 tlbsel = get_tlb_tlbsel(vcpu_e500);
824 esel = get_tlb_esel(vcpu_e500, tlbsel);
825
dc83b8bc 826 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc35cbc8 827 vcpu_e500->mas0 &= ~MAS0_NV(~0);
08b7fa92 828 vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
bc8080cb
HB		 829 vcpu_e500->mas1 = gtlbe->mas1;
830 vcpu_e500->mas2 = gtlbe->mas2;
dc83b8bc 831 vcpu_e500->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB		 832
833 return EMULATE_DONE;
834}
835
836int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
837{
838 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
839 int as = !!get_cur_sas(vcpu_e500);
840 unsigned int pid = get_cur_spid(vcpu_e500);
841 int esel, tlbsel;
dc83b8bc 842 struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
bc8080cb
HB		 843 gva_t ea;
844
8e5b26b5 845 ea = kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB		 846
847 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
848 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
849 if (esel >= 0) {
dc83b8bc 850 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB		 851 break;
852 }
853 }
854
855 if (gtlbe) {
303b7c97
SW		 856 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
857
bc8080cb 858 vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
08b7fa92 859 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
bc8080cb
HB		 860 vcpu_e500->mas1 = gtlbe->mas1;
861 vcpu_e500->mas2 = gtlbe->mas2;
dc83b8bc 862 vcpu_e500->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB		 863 } else {
864 int victim;
865
fb2838d4 866 /* since we only have two TLBs, only lower bit is used. */
bc8080cb 867 tlbsel = vcpu_e500->mas4 >> 28 & 0x1;
0164c0f0 868 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
bc8080cb
HB		 869
870 vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
08b7fa92 871 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
bc8080cb
HB		 872 vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0)
873 | (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0))
874 | (vcpu_e500->mas4 & MAS4_TSIZED(~0));
875 vcpu_e500->mas2 &= MAS2_EPN;
876 vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK;
dc83b8bc 877 vcpu_e500->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
bc8080cb
HB		 878 }
879
49ea0695 880 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
bc8080cb
HB		 881 return EMULATE_DONE;
882}
883
3bf3cdcc
SW		 884/* sesel is index into the set, not the whole array */
885static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW		 886 struct kvm_book3e_206_tlb_entry *gtlbe,
887 struct kvm_book3e_206_tlb_entry *stlbe,
3bf3cdcc
SW		 888 int stlbsel, int sesel)
889{
890 int stid;
891
892 preempt_disable();
893 stid = kvmppc_e500_get_sid(vcpu_e500, get_tlb_ts(gtlbe),
894 get_tlb_tid(gtlbe),
895 get_cur_pr(&vcpu_e500->vcpu), 0);
896
897 stlbe->mas1 |= MAS1_TID(stid);
898 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
899 preempt_enable();
900}
901
bc8080cb
HB		 902int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
903{
904 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 905 struct kvm_book3e_206_tlb_entry *gtlbe;
08b7fa92 906 int tlbsel, esel;
bc8080cb
HB		 907
908 tlbsel = get_tlb_tlbsel(vcpu_e500);
909 esel = get_tlb_esel(vcpu_e500, tlbsel);
910
dc83b8bc 911 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb 912
dd9ebf1f 913 if (get_tlb_v(gtlbe))
0164c0f0 914 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
bc8080cb
HB		 915
916 gtlbe->mas1 = vcpu_e500->mas1;
917 gtlbe->mas2 = vcpu_e500->mas2;
dc83b8bc 918 gtlbe->mas7_3 = vcpu_e500->mas7_3;
bc8080cb 919
46f43c6e 920 trace_kvm_gtlb_write(vcpu_e500->mas0, gtlbe->mas1, gtlbe->mas2,
dc83b8bc 921 (u32)gtlbe->mas7_3, (u32)(gtlbe->mas7_3 >> 32));
bc8080cb
HB		 922
923 /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
924 if (tlbe_is_host_safe(vcpu, gtlbe)) {
dc83b8bc 925 struct kvm_book3e_206_tlb_entry stlbe;
08b7fa92
LY		 926 int stlbsel, sesel;
927 u64 eaddr;
928 u64 raddr;
929
bc8080cb
HB		 930 switch (tlbsel) {
931 case 0:
932 /* TLB0 */
933 gtlbe->mas1 &= ~MAS1_TSIZE(~0);
0cfb50e5 934 gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb
HB		 935
936 stlbsel = 0;
08b7fa92 937 sesel = kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
bc8080cb
HB		 938
939 break;
940
941 case 1:
942 /* TLB1 */
943 eaddr = get_tlb_eaddr(gtlbe);
944 raddr = get_tlb_raddr(gtlbe);
945
946 /* Create a 4KB mapping on the host.
947 * If the guest wanted a large page,
948 * only the first 4KB is mapped here and the rest
949 * are mapped on the fly. */
950 stlbsel = 1;
951 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
08b7fa92 952 raddr >> PAGE_SHIFT, gtlbe, &stlbe);
bc8080cb
HB		 953 break;
954
955 default:
956 BUG();
957 }
3bf3cdcc
SW		 958
959 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB		 960 }
961
49ea0695 962 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
bc8080cb
HB		 963 return EMULATE_DONE;
964}
965
966int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
967{
666e7252 968 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB		 969
970 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
971}
972
973int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
974{
666e7252 975 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB		 976
977 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
978}
979
980void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
981{
666e7252 982 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB		 983
984 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
985}
986
987void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
988{
666e7252 989 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB		 990
991 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
992}
993
994gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
995 gva_t eaddr)
996{
997 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc
SW		 998 struct kvm_book3e_206_tlb_entry *gtlbe;
999 u64 pgmask;
1000
1001 gtlbe = get_entry(vcpu_e500, tlbsel_of(index), esel_of(index));
1002 pgmask = get_tlb_bytes(gtlbe) - 1;
bc8080cb
HB		 1003
1004 return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
1005}
1006
1007void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1008{
bc8080cb
HB		 1009}
1010
1011void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
1012 unsigned int index)
1013{
1014 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
08b7fa92 1015 struct tlbe_priv *priv;
dc83b8bc 1016 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
bc8080cb
HB		 1017 int tlbsel = tlbsel_of(index);
1018 int esel = esel_of(index);
1019 int stlbsel, sesel;
1020
dc83b8bc 1021 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
08b7fa92 1022
bc8080cb
HB		 1023 switch (tlbsel) {
1024 case 0:
1025 stlbsel = 0;
0164c0f0
SW		 1026 sesel = esel & (host_tlb_params[0].ways - 1);
1027 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
08b7fa92
LY		 1028
1029 kvmppc_e500_setup_stlbe(vcpu_e500, gtlbe, BOOK3E_PAGESZ_4K,
0164c0f0 1030 &priv->ref, eaddr, &stlbe);
bc8080cb
HB		 1031 break;
1032
1033 case 1: {
1034 gfn_t gfn = gpaddr >> PAGE_SHIFT;
bc8080cb
HB		 1035
1036 stlbsel = 1;
08b7fa92
LY		 1037 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
1038 gtlbe, &stlbe);
bc8080cb
HB		 1039 break;
1040 }
1041
1042 default:
1043 BUG();
1044 break;
1045 }
08b7fa92 1046
3bf3cdcc 1047 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB		 1048}
1049
1050int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
1051 gva_t eaddr, unsigned int pid, int as)
1052{
1053 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1054 int esel, tlbsel;
1055
1056 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
1057 esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
1058 if (esel >= 0)
1059 return index_of(tlbsel, esel);
1060 }
1061
1062 return -1;
1063}
1064
5ce941ee
SW		 1065void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
1066{
1067 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1068
dd9ebf1f
LY		 1069 if (vcpu->arch.pid != pid) {
1070 vcpu_e500->pid[0] = vcpu->arch.pid = pid;
1071 kvmppc_e500_recalc_shadow_pid(vcpu_e500);
1072 }
5ce941ee
SW		 1073}
1074
bc8080cb
HB		 1075void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
1076{
dc83b8bc 1077 struct kvm_book3e_206_tlb_entry *tlbe;
bc8080cb
HB		 1078
1079 /* Insert large initial mapping for guest. */
dc83b8bc 1080 tlbe = get_entry(vcpu_e500, 1, 0);
0cfb50e5 1081 tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_256M);
bc8080cb 1082 tlbe->mas2 = 0;
dc83b8bc 1083 tlbe->mas7_3 = E500_TLB_SUPER_PERM_MASK;
bc8080cb
HB		 1084
1085 /* 4K map for serial output. Used by kernel wrapper. */
dc83b8bc 1086 tlbe = get_entry(vcpu_e500, 1, 1);
0cfb50e5 1087 tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb 1088 tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
dc83b8bc
SW		 1089 tlbe->mas7_3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
1090}
1091
1092static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
1093{
1094 int i;
1095
1096 clear_tlb_refs(vcpu_e500);
1097 kfree(vcpu_e500->gtlb_priv[0]);
1098 kfree(vcpu_e500->gtlb_priv[1]);
1099
1100 if (vcpu_e500->shared_tlb_pages) {
1101 vfree((void *)(round_down((uintptr_t)vcpu_e500->gtlb_arch,
1102 PAGE_SIZE)));
1103
1104 for (i = 0; i < vcpu_e500->num_shared_tlb_pages; i++) {
1105 set_page_dirty_lock(vcpu_e500->shared_tlb_pages[i]);
1106 put_page(vcpu_e500->shared_tlb_pages[i]);
1107 }
1108
1109 vcpu_e500->num_shared_tlb_pages = 0;
1110 vcpu_e500->shared_tlb_pages = NULL;
1111 } else {
1112 kfree(vcpu_e500->gtlb_arch);
1113 }
1114
1115 vcpu_e500->gtlb_arch = NULL;
1116}
1117
1118int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
1119 struct kvm_config_tlb *cfg)
1120{
1121 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1122 struct kvm_book3e_206_tlb_params params;
1123 char *virt;
1124 struct page **pages;
1125 struct tlbe_priv *privs[2] = {};
1126 size_t array_len;
1127 u32 sets;
1128 int num_pages, ret, i;
1129
1130 if (cfg->mmu_type != KVM_MMU_FSL_BOOKE_NOHV)
1131 return -EINVAL;
1132
1133 if (copy_from_user(&params, (void __user *)(uintptr_t)cfg->params,
1134 sizeof(params)))
1135 return -EFAULT;
1136
1137 if (params.tlb_sizes[1] > 64)
1138 return -EINVAL;
1139 if (params.tlb_ways[1] != params.tlb_sizes[1])
1140 return -EINVAL;
1141 if (params.tlb_sizes[2] != 0 || params.tlb_sizes[3] != 0)
1142 return -EINVAL;
1143 if (params.tlb_ways[2] != 0 || params.tlb_ways[3] != 0)
1144 return -EINVAL;
1145
1146 if (!is_power_of_2(params.tlb_ways[0]))
1147 return -EINVAL;
1148
1149 sets = params.tlb_sizes[0] >> ilog2(params.tlb_ways[0]);
1150 if (!is_power_of_2(sets))
1151 return -EINVAL;
1152
1153 array_len = params.tlb_sizes[0] + params.tlb_sizes[1];
1154 array_len *= sizeof(struct kvm_book3e_206_tlb_entry);
1155
1156 if (cfg->array_len < array_len)
1157 return -EINVAL;
1158
1159 num_pages = DIV_ROUND_UP(cfg->array + array_len - 1, PAGE_SIZE) -
1160 cfg->array / PAGE_SIZE;
1161 pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);
1162 if (!pages)
1163 return -ENOMEM;
1164
1165 ret = get_user_pages_fast(cfg->array, num_pages, 1, pages);
1166 if (ret < 0)
1167 goto err_pages;
1168
1169 if (ret != num_pages) {
1170 num_pages = ret;
1171 ret = -EFAULT;
1172 goto err_put_page;
1173 }
1174
1175 virt = vmap(pages, num_pages, VM_MAP, PAGE_KERNEL);
1176 if (!virt)
1177 goto err_put_page;
1178
1179 privs[0] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[0],
1180 GFP_KERNEL);
1181 privs[1] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[1],
1182 GFP_KERNEL);
1183
1184 if (!privs[0] || !privs[1])
1185 goto err_put_page;
1186
1187 free_gtlb(vcpu_e500);
1188
1189 vcpu_e500->gtlb_priv[0] = privs[0];
1190 vcpu_e500->gtlb_priv[1] = privs[1];
1191
1192 vcpu_e500->gtlb_arch = (struct kvm_book3e_206_tlb_entry *)
1193 (virt + (cfg->array & (PAGE_SIZE - 1)));
1194
1195 vcpu_e500->gtlb_params[0].entries = params.tlb_sizes[0];
1196 vcpu_e500->gtlb_params[1].entries = params.tlb_sizes[1];
1197
1198 vcpu_e500->gtlb_offset[0] = 0;
1199 vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
1200
1201 vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) & ~0xfffUL;
1202 if (params.tlb_sizes[0] <= 2048)
1203 vcpu_e500->tlb0cfg |= params.tlb_sizes[0];
1204
1205 vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) & ~0xfffUL;
1206 vcpu_e500->tlb1cfg |= params.tlb_sizes[1];
1207
1208 vcpu_e500->shared_tlb_pages = pages;
1209 vcpu_e500->num_shared_tlb_pages = num_pages;
1210
1211 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0];
1212 vcpu_e500->gtlb_params[0].sets = sets;
1213
1214 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1];
1215 vcpu_e500->gtlb_params[1].sets = 1;
1216
1217 return 0;
1218
1219err_put_page:
1220 kfree(privs[0]);
1221 kfree(privs[1]);
1222
1223 for (i = 0; i < num_pages; i++)
1224 put_page(pages[i]);
1225
1226err_pages:
1227 kfree(pages);
1228 return ret;
1229}
1230
1231int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
1232 struct kvm_dirty_tlb *dirty)
1233{
1234 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1235
1236 clear_tlb_refs(vcpu_e500);
1237 return 0;
bc8080cb
HB		 1238}
1239
1240int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
1241{
dc83b8bc
SW		 1242 int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);
1243 int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;
1244
0164c0f0
SW		 1245 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
1246 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
1247
1248 /*
1249 * This should never happen on real e500 hardware, but is
1250 * architecturally possible -- e.g. in some weird nested
1251 * virtualization case.
1252 */
1253 if (host_tlb_params[0].entries == 0 ||
1254 host_tlb_params[1].entries == 0) {
1255 pr_err("%s: need to know host tlb size\n", __func__);
1256 return -ENODEV;
1257 }
1258
1259 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
1260 TLBnCFG_ASSOC_SHIFT;
1261 host_tlb_params[1].ways = host_tlb_params[1].entries;
1262
1263 if (!is_power_of_2(host_tlb_params[0].entries) ||
1264 !is_power_of_2(host_tlb_params[0].ways) ||
1265 host_tlb_params[0].entries < host_tlb_params[0].ways ||
1266 host_tlb_params[0].ways == 0) {
1267 pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
1268 __func__, host_tlb_params[0].entries,
1269 host_tlb_params[0].ways);
1270 return -ENODEV;
1271 }
1272
1273 host_tlb_params[0].sets =
1274 host_tlb_params[0].entries / host_tlb_params[0].ways;
1275 host_tlb_params[1].sets = 1;
bc8080cb 1276
dc83b8bc
SW		 1277 vcpu_e500->gtlb_params[0].entries = KVM_E500_TLB0_SIZE;
1278 vcpu_e500->gtlb_params[1].entries = KVM_E500_TLB1_SIZE;
bc8080cb 1279
dc83b8bc
SW		 1280 vcpu_e500->gtlb_params[0].ways = KVM_E500_TLB0_WAY_NUM;
1281 vcpu_e500->gtlb_params[0].sets =
1282 KVM_E500_TLB0_SIZE / KVM_E500_TLB0_WAY_NUM;
1283
1284 vcpu_e500->gtlb_params[1].ways = KVM_E500_TLB1_SIZE;
1285 vcpu_e500->gtlb_params[1].sets = 1;
1286
1287 vcpu_e500->gtlb_arch = kmalloc(entries * entry_size, GFP_KERNEL);
1288 if (!vcpu_e500->gtlb_arch)
1289 return -ENOMEM;
1290
1291 vcpu_e500->gtlb_offset[0] = 0;
1292 vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
0164c0f0
SW		 1293
1294 vcpu_e500->tlb_refs[0] =
1295 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
1296 GFP_KERNEL);
1297 if (!vcpu_e500->tlb_refs[0])
1298 goto err;
1299
1300 vcpu_e500->tlb_refs[1] =
1301 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
1302 GFP_KERNEL);
1303 if (!vcpu_e500->tlb_refs[1])
1304 goto err;
1305
dc83b8bc
SW		 1306 vcpu_e500->gtlb_priv[0] = kzalloc(sizeof(struct tlbe_ref) *
1307 vcpu_e500->gtlb_params[0].entries,
1308 GFP_KERNEL);
0164c0f0
SW		 1309 if (!vcpu_e500->gtlb_priv[0])
1310 goto err;
1311
dc83b8bc
SW		 1312 vcpu_e500->gtlb_priv[1] = kzalloc(sizeof(struct tlbe_ref) *
1313 vcpu_e500->gtlb_params[1].entries,
1314 GFP_KERNEL);
0164c0f0
SW		 1315 if (!vcpu_e500->gtlb_priv[1])
1316 goto err;
bc8080cb 1317
dd9ebf1f 1318 if (kvmppc_e500_id_table_alloc(vcpu_e500) == NULL)
0164c0f0 1319 goto err;
dd9ebf1f 1320
da15bf43
LY		 1321 /* Init TLB configuration register */
1322 vcpu_e500->tlb0cfg = mfspr(SPRN_TLB0CFG) & ~0xfffUL;
dc83b8bc 1323 vcpu_e500->tlb0cfg |= vcpu_e500->gtlb_params[0].entries;
da15bf43 1324 vcpu_e500->tlb1cfg = mfspr(SPRN_TLB1CFG) & ~0xfffUL;
dc83b8bc 1325 vcpu_e500->tlb1cfg |= vcpu_e500->gtlb_params[1].entries;
da15bf43 1326
bc8080cb
HB		 1327 return 0;
1328
0164c0f0 1329err:
dc83b8bc 1330 free_gtlb(vcpu_e500);
0164c0f0
SW		 1331 kfree(vcpu_e500->tlb_refs[0]);
1332 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb
HB		 1333 return -1;
1334}
1335
1336void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
1337{
dc83b8bc 1338 free_gtlb(vcpu_e500);
dd9ebf1f 1339 kvmppc_e500_id_table_free(vcpu_e500);
0164c0f0
SW		 1340
1341 kfree(vcpu_e500->tlb_refs[0]);
1342 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb 1343}
Linux kernel - Deliverables
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