KVM: PPC: BookE: Expose remote TLB flushes in debugfs
[deliverable/linux.git] / arch / powerpc / kvm / e500_tlb.c
CommitLineData
bc8080cb 1/*
49ea0695 2 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
bc8080cb
HB
3 *
4 * Author: Yu Liu, yu.liu@freescale.com
73196cd3 5 * Scott Wood, scottwood@freescale.com
4f802fe9 6 * Ashish Kalra, ashish.kalra@freescale.com
73196cd3 7 * Varun Sethi, varun.sethi@freescale.com
bc8080cb
HB
8 *
9 * Description:
10 * This file is based on arch/powerpc/kvm/44x_tlb.c,
11 * by Hollis Blanchard <hollisb@us.ibm.com>.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License, version 2, as
15 * published by the Free Software Foundation.
16 */
17
0164c0f0 18#include <linux/kernel.h>
bc8080cb 19#include <linux/types.h>
5a0e3ad6 20#include <linux/slab.h>
bc8080cb
HB
21#include <linux/string.h>
22#include <linux/kvm.h>
23#include <linux/kvm_host.h>
24#include <linux/highmem.h>
dc83b8bc
SW
25#include <linux/log2.h>
26#include <linux/uaccess.h>
27#include <linux/sched.h>
28#include <linux/rwsem.h>
29#include <linux/vmalloc.h>
95325e6b 30#include <linux/hugetlb.h>
bc8080cb 31#include <asm/kvm_ppc.h>
bc8080cb 32
29a5a6f9 33#include "e500.h"
46f43c6e 34#include "trace.h"
49ea0695 35#include "timing.h"
bc8080cb 36
0164c0f0 37#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
bc8080cb 38
0164c0f0 39static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
bc8080cb 40
0164c0f0 41static inline unsigned int gtlb0_get_next_victim(
bc8080cb
HB
42 struct kvmppc_vcpu_e500 *vcpu_e500)
43{
44 unsigned int victim;
45
08b7fa92 46 victim = vcpu_e500->gtlb_nv[0]++;
dc83b8bc 47 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways))
08b7fa92 48 vcpu_e500->gtlb_nv[0] = 0;
bc8080cb
HB
49
50 return victim;
51}
52
53static inline unsigned int tlb1_max_shadow_size(void)
54{
a4cd8b23 55 /* reserve one entry for magic page */
0164c0f0 56 return host_tlb_params[1].entries - tlbcam_index - 1;
bc8080cb
HB
57}
58
dc83b8bc 59static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
bc8080cb 60{
dc83b8bc 61 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
bc8080cb
HB
62}
63
64static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
65{
66 /* Mask off reserved bits. */
67 mas3 &= MAS3_ATTRIB_MASK;
68
73196cd3 69#ifndef CONFIG_KVM_BOOKE_HV
bc8080cb
HB
70 if (!usermode) {
71 /* Guest is in supervisor mode,
72 * so we need to translate guest
73 * supervisor permissions into user permissions. */
74 mas3 &= ~E500_TLB_USER_PERM_MASK;
75 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
76 }
73196cd3
SW
77 mas3 |= E500_TLB_SUPER_PERM_MASK;
78#endif
79 return mas3;
bc8080cb
HB
80}
81
82static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
83{
046a48b3
LY
84#ifdef CONFIG_SMP
85 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
86#else
bc8080cb 87 return mas2 & MAS2_ATTRIB_MASK;
046a48b3 88#endif
bc8080cb
HB
89}
90
91/*
92 * writing shadow tlb entry to host TLB
93 */
dc83b8bc
SW
94static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
95 uint32_t mas0)
bc8080cb 96{
0ef30995
SW
97 unsigned long flags;
98
99 local_irq_save(flags);
100 mtspr(SPRN_MAS0, mas0);
bc8080cb 101 mtspr(SPRN_MAS1, stlbe->mas1);
dc83b8bc
SW
102 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
103 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
104 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
73196cd3
SW
105#ifdef CONFIG_KVM_BOOKE_HV
106 mtspr(SPRN_MAS8, stlbe->mas8);
107#endif
0ef30995 108 asm volatile("isync; tlbwe" : : : "memory");
73196cd3
SW
109
110#ifdef CONFIG_KVM_BOOKE_HV
111 /* Must clear mas8 for other host tlbwe's */
112 mtspr(SPRN_MAS8, 0);
113 isync();
114#endif
0ef30995 115 local_irq_restore(flags);
d37b1a03
LY
116
117 trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
118 stlbe->mas2, stlbe->mas7_3);
bc8080cb
HB
119}
120
57013524
SW
121/*
122 * Acquire a mas0 with victim hint, as if we just took a TLB miss.
123 *
124 * We don't care about the address we're searching for, other than that it's
125 * in the right set and is not present in the TLB. Using a zero PID and a
126 * userspace address means we don't have to set and then restore MAS5, or
127 * calculate a proper MAS6 value.
128 */
129static u32 get_host_mas0(unsigned long eaddr)
130{
131 unsigned long flags;
132 u32 mas0;
133
134 local_irq_save(flags);
135 mtspr(SPRN_MAS6, 0);
136 asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
137 mas0 = mfspr(SPRN_MAS0);
138 local_irq_restore(flags);
139
140 return mas0;
141}
142
143/* sesel is for tlb1 only */
bc8080cb 144static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
57013524 145 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 146{
57013524
SW
147 u32 mas0;
148
bc8080cb 149 if (tlbsel == 0) {
57013524
SW
150 mas0 = get_host_mas0(stlbe->mas2);
151 __write_host_tlbe(stlbe, mas0);
bc8080cb 152 } else {
0ef30995
SW
153 __write_host_tlbe(stlbe,
154 MAS0_TLBSEL(1) |
57013524 155 MAS0_ESEL(to_htlb1_esel(sesel)));
bc8080cb 156 }
bc8080cb
HB
157}
158
bf7ca4bd 159#ifdef CONFIG_KVM_E500V2
a4cd8b23
SW
160void kvmppc_map_magic(struct kvm_vcpu *vcpu)
161{
dd9ebf1f 162 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc 163 struct kvm_book3e_206_tlb_entry magic;
a4cd8b23 164 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
dd9ebf1f 165 unsigned int stid;
a4cd8b23
SW
166 pfn_t pfn;
167
168 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
169 get_page(pfn_to_page(pfn));
170
dd9ebf1f
LY
171 preempt_disable();
172 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
173
174 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
a4cd8b23
SW
175 MAS1_TSIZE(BOOK3E_PAGESZ_4K);
176 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
dc83b8bc
SW
177 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
178 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
d37b1a03 179 magic.mas8 = 0;
a4cd8b23
SW
180
181 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index));
dd9ebf1f 182 preempt_enable();
a4cd8b23 183}
8fdd21a2 184#endif
dd9ebf1f 185
0164c0f0
SW
186static void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500,
187 int tlbsel, int esel)
dd9ebf1f 188{
dc83b8bc
SW
189 struct kvm_book3e_206_tlb_entry *gtlbe =
190 get_entry(vcpu_e500, tlbsel, esel);
dd9ebf1f 191
4f802fe9
SW
192 if (tlbsel == 1 &&
193 vcpu_e500->gtlb_priv[1][esel].ref.flags & E500_TLB_BITMAP) {
194 u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
195 int hw_tlb_indx;
196 unsigned long flags;
197
198 local_irq_save(flags);
199 while (tmp) {
200 hw_tlb_indx = __ilog2_u64(tmp & -tmp);
201 mtspr(SPRN_MAS0,
202 MAS0_TLBSEL(1) |
203 MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));
204 mtspr(SPRN_MAS1, 0);
205 asm volatile("tlbwe");
206 vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0;
207 tmp &= tmp - 1;
208 }
209 mb();
210 vcpu_e500->g2h_tlb1_map[esel] = 0;
211 vcpu_e500->gtlb_priv[1][esel].ref.flags &= ~E500_TLB_BITMAP;
212 local_irq_restore(flags);
213
8fdd21a2 214 return;
dd9ebf1f
LY
215 }
216
8fdd21a2
SW
217 /* Guest tlbe is backed by at most one host tlbe per shadow pid. */
218 kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
bc8080cb
HB
219}
220
0164c0f0
SW
221static int tlb0_set_base(gva_t addr, int sets, int ways)
222{
223 int set_base;
224
225 set_base = (addr >> PAGE_SHIFT) & (sets - 1);
226 set_base *= ways;
227
228 return set_base;
229}
230
231static int gtlb0_set_base(struct kvmppc_vcpu_e500 *vcpu_e500, gva_t addr)
232{
dc83b8bc
SW
233 return tlb0_set_base(addr, vcpu_e500->gtlb_params[0].sets,
234 vcpu_e500->gtlb_params[0].ways);
0164c0f0
SW
235}
236
b5904972 237static unsigned int get_tlb_esel(struct kvm_vcpu *vcpu, int tlbsel)
0164c0f0 238{
b5904972
SW
239 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
240 int esel = get_tlb_esel_bit(vcpu);
0164c0f0
SW
241
242 if (tlbsel == 0) {
dc83b8bc 243 esel &= vcpu_e500->gtlb_params[0].ways - 1;
b5904972 244 esel += gtlb0_set_base(vcpu_e500, vcpu->arch.shared->mas2);
0164c0f0 245 } else {
dc83b8bc 246 esel &= vcpu_e500->gtlb_params[tlbsel].entries - 1;
0164c0f0
SW
247 }
248
249 return esel;
250}
251
bc8080cb
HB
252/* Search the guest TLB for a matching entry. */
253static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
254 gva_t eaddr, int tlbsel, unsigned int pid, int as)
255{
dc83b8bc
SW
256 int size = vcpu_e500->gtlb_params[tlbsel].entries;
257 unsigned int set_base, offset;
bc8080cb
HB
258 int i;
259
1aee47a0 260 if (tlbsel == 0) {
0164c0f0 261 set_base = gtlb0_set_base(vcpu_e500, eaddr);
dc83b8bc 262 size = vcpu_e500->gtlb_params[0].ways;
1aee47a0 263 } else {
cc902ad4
BB
264 if (eaddr < vcpu_e500->tlb1_min_eaddr ||
265 eaddr > vcpu_e500->tlb1_max_eaddr)
266 return -1;
1aee47a0
SW
267 set_base = 0;
268 }
269
dc83b8bc
SW
270 offset = vcpu_e500->gtlb_offset[tlbsel];
271
1aee47a0 272 for (i = 0; i < size; i++) {
dc83b8bc
SW
273 struct kvm_book3e_206_tlb_entry *tlbe =
274 &vcpu_e500->gtlb_arch[offset + set_base + i];
bc8080cb
HB
275 unsigned int tid;
276
277 if (eaddr < get_tlb_eaddr(tlbe))
278 continue;
279
280 if (eaddr > get_tlb_end(tlbe))
281 continue;
282
283 tid = get_tlb_tid(tlbe);
284 if (tid && (tid != pid))
285 continue;
286
287 if (!get_tlb_v(tlbe))
288 continue;
289
290 if (get_tlb_ts(tlbe) != as && as != -1)
291 continue;
292
1aee47a0 293 return set_base + i;
bc8080cb
HB
294 }
295
296 return -1;
297}
298
0164c0f0 299static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
dc83b8bc 300 struct kvm_book3e_206_tlb_entry *gtlbe,
0164c0f0 301 pfn_t pfn)
bc8080cb 302{
0164c0f0
SW
303 ref->pfn = pfn;
304 ref->flags = E500_TLB_VALID;
bc8080cb 305
08b7fa92 306 if (tlbe_is_writable(gtlbe))
0164c0f0 307 ref->flags |= E500_TLB_DIRTY;
bc8080cb
HB
308}
309
0164c0f0 310static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
bc8080cb 311{
0164c0f0
SW
312 if (ref->flags & E500_TLB_VALID) {
313 if (ref->flags & E500_TLB_DIRTY)
314 kvm_release_pfn_dirty(ref->pfn);
08b7fa92 315 else
0164c0f0
SW
316 kvm_release_pfn_clean(ref->pfn);
317
318 ref->flags = 0;
319 }
320}
321
4f802fe9
SW
322static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
323{
324 if (vcpu_e500->g2h_tlb1_map)
e8143ccb
AC
325 memset(vcpu_e500->g2h_tlb1_map, 0,
326 sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
4f802fe9 327 if (vcpu_e500->h2g_tlb1_rmap)
e8143ccb
AC
328 memset(vcpu_e500->h2g_tlb1_rmap, 0,
329 sizeof(unsigned int) * host_tlb_params[1].entries);
4f802fe9
SW
330}
331
0164c0f0
SW
332static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
333{
334 int tlbsel = 0;
335 int i;
bc8080cb 336
dc83b8bc 337 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
0164c0f0
SW
338 struct tlbe_ref *ref =
339 &vcpu_e500->gtlb_priv[tlbsel][i].ref;
340 kvmppc_e500_ref_release(ref);
08b7fa92 341 }
bc8080cb
HB
342}
343
0164c0f0
SW
344static void clear_tlb_refs(struct kvmppc_vcpu_e500 *vcpu_e500)
345{
346 int stlbsel = 1;
347 int i;
348
8fdd21a2 349 kvmppc_e500_tlbil_all(vcpu_e500);
dc83b8bc 350
0164c0f0
SW
351 for (i = 0; i < host_tlb_params[stlbsel].entries; i++) {
352 struct tlbe_ref *ref =
353 &vcpu_e500->tlb_refs[stlbsel][i];
354 kvmppc_e500_ref_release(ref);
355 }
356
357 clear_tlb_privs(vcpu_e500);
358}
359
bc8080cb
HB
360static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
361 unsigned int eaddr, int as)
362{
363 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
8fdd21a2 364 unsigned int victim, tsized;
bc8080cb
HB
365 int tlbsel;
366
fb2838d4 367 /* since we only have two TLBs, only lower bit is used. */
b5904972 368 tlbsel = (vcpu->arch.shared->mas4 >> 28) & 0x1;
0164c0f0 369 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
b5904972 370 tsized = (vcpu->arch.shared->mas4 >> 7) & 0x1f;
bc8080cb 371
b5904972 372 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
08b7fa92 373 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972 374 vcpu->arch.shared->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
8fdd21a2 375 | MAS1_TID(get_tlbmiss_tid(vcpu))
bc8080cb 376 | MAS1_TSIZE(tsized);
b5904972
SW
377 vcpu->arch.shared->mas2 = (eaddr & MAS2_EPN)
378 | (vcpu->arch.shared->mas4 & MAS2_ATTRIB_MASK);
379 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
380 vcpu->arch.shared->mas6 = (vcpu->arch.shared->mas6 & MAS6_SPID1)
bc8080cb
HB
381 | (get_cur_pid(vcpu) << 16)
382 | (as ? MAS6_SAS : 0);
bc8080cb
HB
383}
384
3bf3cdcc 385/* TID must be supplied by the caller */
dc83b8bc 386static inline void kvmppc_e500_setup_stlbe(
8fdd21a2 387 struct kvm_vcpu *vcpu,
dc83b8bc
SW
388 struct kvm_book3e_206_tlb_entry *gtlbe,
389 int tsize, struct tlbe_ref *ref, u64 gvaddr,
390 struct kvm_book3e_206_tlb_entry *stlbe)
08b7fa92 391{
0164c0f0 392 pfn_t pfn = ref->pfn;
8fdd21a2 393 u32 pr = vcpu->arch.shared->msr & MSR_PR;
0164c0f0
SW
394
395 BUG_ON(!(ref->flags & E500_TLB_VALID));
08b7fa92 396
8fdd21a2
SW
397 /* Force IPROT=0 for all guest mappings. */
398 stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
399 stlbe->mas2 = (gvaddr & MAS2_EPN) |
400 e500_shadow_mas2_attrib(gtlbe->mas2, pr);
401 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
402 e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
73196cd3
SW
403
404#ifdef CONFIG_KVM_BOOKE_HV
405 stlbe->mas8 = MAS8_TGS | vcpu->kvm->arch.lpid;
406#endif
08b7fa92
LY
407}
408
bc8080cb 409static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 410 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
57013524 411 int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
dc83b8bc 412 struct tlbe_ref *ref)
bc8080cb 413{
9973d54e 414 struct kvm_memory_slot *slot;
9973d54e
SW
415 unsigned long pfn, hva;
416 int pfnmap = 0;
417 int tsize = BOOK3E_PAGESZ_4K;
bc8080cb 418
59c1f4e3
SW
419 /*
420 * Translate guest physical to true physical, acquiring
421 * a page reference if it is normal, non-reserved memory.
9973d54e
SW
422 *
423 * gfn_to_memslot() must succeed because otherwise we wouldn't
424 * have gotten this far. Eventually we should just pass the slot
425 * pointer through from the first lookup.
59c1f4e3 426 */
9973d54e
SW
427 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
428 hva = gfn_to_hva_memslot(slot, gfn);
429
430 if (tlbsel == 1) {
431 struct vm_area_struct *vma;
432 down_read(&current->mm->mmap_sem);
433
434 vma = find_vma(current->mm, hva);
435 if (vma && hva >= vma->vm_start &&
436 (vma->vm_flags & VM_PFNMAP)) {
437 /*
438 * This VMA is a physically contiguous region (e.g.
439 * /dev/mem) that bypasses normal Linux page
440 * management. Find the overlap between the
441 * vma and the memslot.
442 */
443
444 unsigned long start, end;
445 unsigned long slot_start, slot_end;
446
447 pfnmap = 1;
448
449 start = vma->vm_pgoff;
450 end = start +
451 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
452
453 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
454
455 slot_start = pfn - (gfn - slot->base_gfn);
456 slot_end = slot_start + slot->npages;
457
458 if (start < slot_start)
459 start = slot_start;
460 if (end > slot_end)
461 end = slot_end;
462
463 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
464 MAS1_TSIZE_SHIFT;
465
466 /*
467 * e500 doesn't implement the lowest tsize bit,
468 * or 1K pages.
469 */
470 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
471
472 /*
473 * Now find the largest tsize (up to what the guest
474 * requested) that will cover gfn, stay within the
475 * range, and for which gfn and pfn are mutually
476 * aligned.
477 */
478
479 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
480 unsigned long gfn_start, gfn_end, tsize_pages;
481 tsize_pages = 1 << (tsize - 2);
482
483 gfn_start = gfn & ~(tsize_pages - 1);
484 gfn_end = gfn_start + tsize_pages;
485
486 if (gfn_start + pfn - gfn < start)
487 continue;
488 if (gfn_end + pfn - gfn > end)
489 continue;
490 if ((gfn & (tsize_pages - 1)) !=
491 (pfn & (tsize_pages - 1)))
492 continue;
493
494 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
495 pfn &= ~(tsize_pages - 1);
496 break;
497 }
95325e6b
AG
498 } else if (vma && hva >= vma->vm_start &&
499 (vma->vm_flags & VM_HUGETLB)) {
500 unsigned long psize = vma_kernel_pagesize(vma);
501
502 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
503 MAS1_TSIZE_SHIFT;
504
505 /*
506 * Take the largest page size that satisfies both host
507 * and guest mapping
508 */
509 tsize = min(__ilog2(psize) - 10, tsize);
510
511 /*
512 * e500 doesn't implement the lowest tsize bit,
513 * or 1K pages.
514 */
515 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
9973d54e
SW
516 }
517
518 up_read(&current->mm->mmap_sem);
519 }
520
521 if (likely(!pfnmap)) {
95325e6b 522 unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
d5661048 523 pfn = gfn_to_pfn_memslot(slot, gfn);
9973d54e
SW
524 if (is_error_pfn(pfn)) {
525 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n",
526 (long)gfn);
9973d54e
SW
527 return;
528 }
95325e6b
AG
529
530 /* Align guest and physical address to page map boundaries */
531 pfn &= ~(tsize_pages - 1);
532 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
bc8080cb 533 }
bc8080cb 534
0164c0f0
SW
535 /* Drop old ref and setup new one. */
536 kvmppc_e500_ref_release(ref);
537 kvmppc_e500_ref_setup(ref, gtlbe, pfn);
bc8080cb 538
8fdd21a2
SW
539 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
540 ref, gvaddr, stlbe);
249ba1ee
AG
541
542 /* Clear i-cache for new pages */
543 kvmppc_mmu_flush_icache(pfn);
bc8080cb
HB
544}
545
546/* XXX only map the one-one case, for now use TLB0 */
57013524
SW
547static void kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500,
548 int esel,
549 struct kvm_book3e_206_tlb_entry *stlbe)
bc8080cb 550{
dc83b8bc 551 struct kvm_book3e_206_tlb_entry *gtlbe;
0164c0f0 552 struct tlbe_ref *ref;
bc8080cb 553
dc83b8bc 554 gtlbe = get_entry(vcpu_e500, 0, esel);
0164c0f0
SW
555 ref = &vcpu_e500->gtlb_priv[0][esel].ref;
556
bc8080cb
HB
557 kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
558 get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
57013524 559 gtlbe, 0, stlbe, ref);
bc8080cb
HB
560}
561
562/* Caller must ensure that the specified guest TLB entry is safe to insert into
563 * the shadow TLB. */
564/* XXX for both one-one and one-to-many , for now use TLB1 */
565static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc 566 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
4f802fe9 567 struct kvm_book3e_206_tlb_entry *stlbe, int esel)
bc8080cb 568{
0164c0f0 569 struct tlbe_ref *ref;
bc8080cb
HB
570 unsigned int victim;
571
0164c0f0 572 victim = vcpu_e500->host_tlb1_nv++;
bc8080cb 573
0164c0f0
SW
574 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
575 vcpu_e500->host_tlb1_nv = 0;
bc8080cb 576
0164c0f0 577 ref = &vcpu_e500->tlb_refs[1][victim];
57013524 578 kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, ref);
bc8080cb 579
4f802fe9
SW
580 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << victim;
581 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
582 if (vcpu_e500->h2g_tlb1_rmap[victim]) {
583 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[victim];
584 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << victim);
585 }
586 vcpu_e500->h2g_tlb1_rmap[victim] = esel;
587
bc8080cb
HB
588 return victim;
589}
590
cc902ad4
BB
591static void kvmppc_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500)
592{
593 int size = vcpu_e500->gtlb_params[1].entries;
594 unsigned int offset;
595 gva_t eaddr;
596 int i;
597
598 vcpu_e500->tlb1_min_eaddr = ~0UL;
599 vcpu_e500->tlb1_max_eaddr = 0;
600 offset = vcpu_e500->gtlb_offset[1];
601
602 for (i = 0; i < size; i++) {
603 struct kvm_book3e_206_tlb_entry *tlbe =
604 &vcpu_e500->gtlb_arch[offset + i];
605
606 if (!get_tlb_v(tlbe))
607 continue;
608
609 eaddr = get_tlb_eaddr(tlbe);
610 vcpu_e500->tlb1_min_eaddr =
611 min(vcpu_e500->tlb1_min_eaddr, eaddr);
612
613 eaddr = get_tlb_end(tlbe);
614 vcpu_e500->tlb1_max_eaddr =
615 max(vcpu_e500->tlb1_max_eaddr, eaddr);
616 }
617}
618
619static int kvmppc_need_recalc_tlb1map_range(struct kvmppc_vcpu_e500 *vcpu_e500,
620 struct kvm_book3e_206_tlb_entry *gtlbe)
621{
622 unsigned long start, end, size;
623
624 size = get_tlb_bytes(gtlbe);
625 start = get_tlb_eaddr(gtlbe) & ~(size - 1);
626 end = start + size - 1;
627
628 return vcpu_e500->tlb1_min_eaddr == start ||
629 vcpu_e500->tlb1_max_eaddr == end;
630}
631
632/* This function is supposed to be called for a adding a new valid tlb entry */
633static void kvmppc_set_tlb1map_range(struct kvm_vcpu *vcpu,
634 struct kvm_book3e_206_tlb_entry *gtlbe)
635{
636 unsigned long start, end, size;
637 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
638
639 if (!get_tlb_v(gtlbe))
640 return;
641
642 size = get_tlb_bytes(gtlbe);
643 start = get_tlb_eaddr(gtlbe) & ~(size - 1);
644 end = start + size - 1;
645
646 vcpu_e500->tlb1_min_eaddr = min(vcpu_e500->tlb1_min_eaddr, start);
647 vcpu_e500->tlb1_max_eaddr = max(vcpu_e500->tlb1_max_eaddr, end);
648}
649
08b7fa92
LY
650static inline int kvmppc_e500_gtlbe_invalidate(
651 struct kvmppc_vcpu_e500 *vcpu_e500,
652 int tlbsel, int esel)
bc8080cb 653{
dc83b8bc
SW
654 struct kvm_book3e_206_tlb_entry *gtlbe =
655 get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
656
657 if (unlikely(get_tlb_iprot(gtlbe)))
658 return -1;
659
cc902ad4
BB
660 if (tlbsel == 1 && kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))
661 kvmppc_recalc_tlb1map_range(vcpu_e500);
662
bc8080cb
HB
663 gtlbe->mas1 = 0;
664
665 return 0;
666}
667
b0a1835d
LY
668int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
669{
670 int esel;
671
672 if (value & MMUCSR0_TLB0FI)
dc83b8bc 673 for (esel = 0; esel < vcpu_e500->gtlb_params[0].entries; esel++)
b0a1835d
LY
674 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
675 if (value & MMUCSR0_TLB1FI)
dc83b8bc 676 for (esel = 0; esel < vcpu_e500->gtlb_params[1].entries; esel++)
b0a1835d
LY
677 kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
678
dd9ebf1f 679 /* Invalidate all vcpu id mappings */
8fdd21a2 680 kvmppc_e500_tlbil_all(vcpu_e500);
b0a1835d
LY
681
682 return EMULATE_DONE;
683}
684
bc8080cb
HB
685int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
686{
687 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
688 unsigned int ia;
689 int esel, tlbsel;
690 gva_t ea;
691
8e5b26b5 692 ea = ((ra) ? kvmppc_get_gpr(vcpu, ra) : 0) + kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
693
694 ia = (ea >> 2) & 0x1;
695
fb2838d4 696 /* since we only have two TLBs, only lower bit is used. */
bc8080cb
HB
697 tlbsel = (ea >> 3) & 0x1;
698
699 if (ia) {
700 /* invalidate all entries */
dc83b8bc
SW
701 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries;
702 esel++)
bc8080cb
HB
703 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
704 } else {
705 ea &= 0xfffff000;
706 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
707 get_cur_pid(vcpu), -1);
708 if (esel >= 0)
709 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
710 }
711
dd9ebf1f 712 /* Invalidate all vcpu id mappings */
8fdd21a2 713 kvmppc_e500_tlbil_all(vcpu_e500);
bc8080cb
HB
714
715 return EMULATE_DONE;
716}
717
ab9fc405
SW
718static void tlbilx_all(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
719 int pid, int rt)
720{
721 struct kvm_book3e_206_tlb_entry *tlbe;
722 int tid, esel;
723
724 /* invalidate all entries */
725 for (esel = 0; esel < vcpu_e500->gtlb_params[tlbsel].entries; esel++) {
726 tlbe = get_entry(vcpu_e500, tlbsel, esel);
727 tid = get_tlb_tid(tlbe);
728 if (rt == 0 || tid == pid) {
729 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
730 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
731 }
732 }
733}
734
735static void tlbilx_one(struct kvmppc_vcpu_e500 *vcpu_e500, int pid,
736 int ra, int rb)
737{
738 int tlbsel, esel;
739 gva_t ea;
740
741 ea = kvmppc_get_gpr(&vcpu_e500->vcpu, rb);
742 if (ra)
743 ea += kvmppc_get_gpr(&vcpu_e500->vcpu, ra);
744
745 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
746 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, -1);
747 if (esel >= 0) {
748 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
749 kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
750 break;
751 }
752 }
753}
754
755int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int rt, int ra, int rb)
756{
757 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
758 int pid = get_cur_spid(vcpu);
759
760 if (rt == 0 || rt == 1) {
761 tlbilx_all(vcpu_e500, 0, pid, rt);
762 tlbilx_all(vcpu_e500, 1, pid, rt);
763 } else if (rt == 3) {
764 tlbilx_one(vcpu_e500, pid, ra, rb);
765 }
766
767 return EMULATE_DONE;
768}
769
bc8080cb
HB
770int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
771{
772 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
773 int tlbsel, esel;
dc83b8bc 774 struct kvm_book3e_206_tlb_entry *gtlbe;
bc8080cb 775
b5904972
SW
776 tlbsel = get_tlb_tlbsel(vcpu);
777 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 778
dc83b8bc 779 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
b5904972
SW
780 vcpu->arch.shared->mas0 &= ~MAS0_NV(~0);
781 vcpu->arch.shared->mas0 |= MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
782 vcpu->arch.shared->mas1 = gtlbe->mas1;
783 vcpu->arch.shared->mas2 = gtlbe->mas2;
784 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
785
786 return EMULATE_DONE;
787}
788
789int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
790{
791 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
b5904972
SW
792 int as = !!get_cur_sas(vcpu);
793 unsigned int pid = get_cur_spid(vcpu);
bc8080cb 794 int esel, tlbsel;
dc83b8bc 795 struct kvm_book3e_206_tlb_entry *gtlbe = NULL;
bc8080cb
HB
796 gva_t ea;
797
8e5b26b5 798 ea = kvmppc_get_gpr(vcpu, rb);
bc8080cb
HB
799
800 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
801 esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
802 if (esel >= 0) {
dc83b8bc 803 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb
HB
804 break;
805 }
806 }
807
808 if (gtlbe) {
303b7c97
SW
809 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1;
810
b5904972 811 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
08b7fa92 812 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
813 vcpu->arch.shared->mas1 = gtlbe->mas1;
814 vcpu->arch.shared->mas2 = gtlbe->mas2;
815 vcpu->arch.shared->mas7_3 = gtlbe->mas7_3;
bc8080cb
HB
816 } else {
817 int victim;
818
fb2838d4 819 /* since we only have two TLBs, only lower bit is used. */
b5904972 820 tlbsel = vcpu->arch.shared->mas4 >> 28 & 0x1;
0164c0f0 821 victim = (tlbsel == 0) ? gtlb0_get_next_victim(vcpu_e500) : 0;
bc8080cb 822
b5904972
SW
823 vcpu->arch.shared->mas0 = MAS0_TLBSEL(tlbsel)
824 | MAS0_ESEL(victim)
08b7fa92 825 | MAS0_NV(vcpu_e500->gtlb_nv[tlbsel]);
b5904972
SW
826 vcpu->arch.shared->mas1 =
827 (vcpu->arch.shared->mas6 & MAS6_SPID0)
828 | (vcpu->arch.shared->mas6 & (MAS6_SAS ? MAS1_TS : 0))
829 | (vcpu->arch.shared->mas4 & MAS4_TSIZED(~0));
830 vcpu->arch.shared->mas2 &= MAS2_EPN;
831 vcpu->arch.shared->mas2 |= vcpu->arch.shared->mas4 &
832 MAS2_ATTRIB_MASK;
833 vcpu->arch.shared->mas7_3 &= MAS3_U0 | MAS3_U1 |
834 MAS3_U2 | MAS3_U3;
bc8080cb
HB
835 }
836
49ea0695 837 kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
bc8080cb
HB
838 return EMULATE_DONE;
839}
840
57013524 841/* sesel is for tlb1 only */
3bf3cdcc 842static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
dc83b8bc
SW
843 struct kvm_book3e_206_tlb_entry *gtlbe,
844 struct kvm_book3e_206_tlb_entry *stlbe,
3bf3cdcc
SW
845 int stlbsel, int sesel)
846{
847 int stid;
848
849 preempt_disable();
8fdd21a2 850 stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe);
3bf3cdcc
SW
851
852 stlbe->mas1 |= MAS1_TID(stid);
853 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
854 preempt_enable();
855}
856
bc8080cb
HB
857int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
858{
859 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
8fdd21a2
SW
860 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
861 int tlbsel, esel, stlbsel, sesel;
cc902ad4 862 int recal = 0;
bc8080cb 863
b5904972
SW
864 tlbsel = get_tlb_tlbsel(vcpu);
865 esel = get_tlb_esel(vcpu, tlbsel);
bc8080cb 866
dc83b8bc 867 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
bc8080cb 868
cc902ad4 869 if (get_tlb_v(gtlbe)) {
0164c0f0 870 inval_gtlbe_on_host(vcpu_e500, tlbsel, esel);
cc902ad4
BB
871 if ((tlbsel == 1) &&
872 kvmppc_need_recalc_tlb1map_range(vcpu_e500, gtlbe))
873 recal = 1;
874 }
bc8080cb 875
b5904972
SW
876 gtlbe->mas1 = vcpu->arch.shared->mas1;
877 gtlbe->mas2 = vcpu->arch.shared->mas2;
878 gtlbe->mas7_3 = vcpu->arch.shared->mas7_3;
bc8080cb 879
d37b1a03
LY
880 trace_kvm_booke206_gtlb_write(vcpu->arch.shared->mas0, gtlbe->mas1,
881 gtlbe->mas2, gtlbe->mas7_3);
bc8080cb 882
cc902ad4
BB
883 if (tlbsel == 1) {
884 /*
885 * If a valid tlb1 entry is overwritten then recalculate the
886 * min/max TLB1 map address range otherwise no need to look
887 * in tlb1 array.
888 */
889 if (recal)
890 kvmppc_recalc_tlb1map_range(vcpu_e500);
891 else
892 kvmppc_set_tlb1map_range(vcpu, gtlbe);
893 }
894
bc8080cb
HB
895 /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
896 if (tlbe_is_host_safe(vcpu, gtlbe)) {
08b7fa92
LY
897 u64 eaddr;
898 u64 raddr;
899
bc8080cb
HB
900 switch (tlbsel) {
901 case 0:
902 /* TLB0 */
903 gtlbe->mas1 &= ~MAS1_TSIZE(~0);
0cfb50e5 904 gtlbe->mas1 |= MAS1_TSIZE(BOOK3E_PAGESZ_4K);
bc8080cb
HB
905
906 stlbsel = 0;
57013524
SW
907 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
908 sesel = 0; /* unused */
bc8080cb
HB
909
910 break;
911
912 case 1:
913 /* TLB1 */
914 eaddr = get_tlb_eaddr(gtlbe);
915 raddr = get_tlb_raddr(gtlbe);
916
917 /* Create a 4KB mapping on the host.
918 * If the guest wanted a large page,
919 * only the first 4KB is mapped here and the rest
920 * are mapped on the fly. */
921 stlbsel = 1;
922 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
4f802fe9 923 raddr >> PAGE_SHIFT, gtlbe, &stlbe, esel);
bc8080cb
HB
924 break;
925
926 default:
927 BUG();
928 }
3bf3cdcc
SW
929
930 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
931 }
932
49ea0695 933 kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
bc8080cb
HB
934 return EMULATE_DONE;
935}
936
8fdd21a2
SW
937static int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
938 gva_t eaddr, unsigned int pid, int as)
939{
940 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
941 int esel, tlbsel;
942
943 for (tlbsel = 0; tlbsel < 2; tlbsel++) {
944 esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
945 if (esel >= 0)
946 return index_of(tlbsel, esel);
947 }
948
949 return -1;
950}
951
952/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
953int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
954 struct kvm_translation *tr)
955{
956 int index;
957 gva_t eaddr;
958 u8 pid;
959 u8 as;
960
961 eaddr = tr->linear_address;
962 pid = (tr->linear_address >> 32) & 0xff;
963 as = (tr->linear_address >> 40) & 0x1;
964
965 index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);
966 if (index < 0) {
967 tr->valid = 0;
968 return 0;
969 }
970
971 tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
972 /* XXX what does "writeable" and "usermode" even mean? */
973 tr->valid = 1;
974
975 return 0;
976}
977
978
bc8080cb
HB
979int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
980{
666e7252 981 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
982
983 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
984}
985
986int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
987{
666e7252 988 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
989
990 return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
991}
992
993void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
994{
666e7252 995 unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
bc8080cb
HB
996
997 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
998}
999
1000void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
1001{
666e7252 1002 unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
bc8080cb
HB
1003
1004 kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
1005}
1006
1007gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
1008 gva_t eaddr)
1009{
1010 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
dc83b8bc
SW
1011 struct kvm_book3e_206_tlb_entry *gtlbe;
1012 u64 pgmask;
1013
1014 gtlbe = get_entry(vcpu_e500, tlbsel_of(index), esel_of(index));
1015 pgmask = get_tlb_bytes(gtlbe) - 1;
bc8080cb
HB
1016
1017 return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
1018}
1019
1020void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
1021{
bc8080cb
HB
1022}
1023
1024void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
1025 unsigned int index)
1026{
1027 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
08b7fa92 1028 struct tlbe_priv *priv;
dc83b8bc 1029 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
bc8080cb
HB
1030 int tlbsel = tlbsel_of(index);
1031 int esel = esel_of(index);
1032 int stlbsel, sesel;
1033
dc83b8bc 1034 gtlbe = get_entry(vcpu_e500, tlbsel, esel);
08b7fa92 1035
bc8080cb
HB
1036 switch (tlbsel) {
1037 case 0:
1038 stlbsel = 0;
57013524 1039 sesel = 0; /* unused */
0164c0f0 1040 priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
08b7fa92 1041
8fdd21a2 1042 kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
0164c0f0 1043 &priv->ref, eaddr, &stlbe);
bc8080cb
HB
1044 break;
1045
1046 case 1: {
1047 gfn_t gfn = gpaddr >> PAGE_SHIFT;
bc8080cb
HB
1048
1049 stlbsel = 1;
08b7fa92 1050 sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn,
4f802fe9 1051 gtlbe, &stlbe, esel);
bc8080cb
HB
1052 break;
1053 }
1054
1055 default:
1056 BUG();
1057 break;
1058 }
08b7fa92 1059
3bf3cdcc 1060 write_stlbe(vcpu_e500, gtlbe, &stlbe, stlbsel, sesel);
bc8080cb
HB
1061}
1062
dc83b8bc
SW
1063static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
1064{
1065 int i;
1066
4f802fe9
SW
1067 clear_tlb1_bitmap(vcpu_e500);
1068 kfree(vcpu_e500->g2h_tlb1_map);
1069
dc83b8bc
SW
1070 clear_tlb_refs(vcpu_e500);
1071 kfree(vcpu_e500->gtlb_priv[0]);
1072 kfree(vcpu_e500->gtlb_priv[1]);
1073
1074 if (vcpu_e500->shared_tlb_pages) {
1075 vfree((void *)(round_down((uintptr_t)vcpu_e500->gtlb_arch,
1076 PAGE_SIZE)));
1077
1078 for (i = 0; i < vcpu_e500->num_shared_tlb_pages; i++) {
1079 set_page_dirty_lock(vcpu_e500->shared_tlb_pages[i]);
1080 put_page(vcpu_e500->shared_tlb_pages[i]);
1081 }
1082
1083 vcpu_e500->num_shared_tlb_pages = 0;
1084 vcpu_e500->shared_tlb_pages = NULL;
1085 } else {
1086 kfree(vcpu_e500->gtlb_arch);
1087 }
1088
1089 vcpu_e500->gtlb_arch = NULL;
1090}
1091
8fdd21a2
SW
1092void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1093{
1094 sregs->u.e.mas0 = vcpu->arch.shared->mas0;
1095 sregs->u.e.mas1 = vcpu->arch.shared->mas1;
1096 sregs->u.e.mas2 = vcpu->arch.shared->mas2;
1097 sregs->u.e.mas7_3 = vcpu->arch.shared->mas7_3;
1098 sregs->u.e.mas4 = vcpu->arch.shared->mas4;
1099 sregs->u.e.mas6 = vcpu->arch.shared->mas6;
1100
1101 sregs->u.e.mmucfg = vcpu->arch.mmucfg;
1102 sregs->u.e.tlbcfg[0] = vcpu->arch.tlbcfg[0];
1103 sregs->u.e.tlbcfg[1] = vcpu->arch.tlbcfg[1];
1104 sregs->u.e.tlbcfg[2] = 0;
1105 sregs->u.e.tlbcfg[3] = 0;
1106}
1107
1108int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1109{
1110 if (sregs->u.e.features & KVM_SREGS_E_ARCH206_MMU) {
1111 vcpu->arch.shared->mas0 = sregs->u.e.mas0;
1112 vcpu->arch.shared->mas1 = sregs->u.e.mas1;
1113 vcpu->arch.shared->mas2 = sregs->u.e.mas2;
1114 vcpu->arch.shared->mas7_3 = sregs->u.e.mas7_3;
1115 vcpu->arch.shared->mas4 = sregs->u.e.mas4;
1116 vcpu->arch.shared->mas6 = sregs->u.e.mas6;
1117 }
1118
1119 return 0;
1120}
1121
dc83b8bc
SW
1122int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
1123 struct kvm_config_tlb *cfg)
1124{
1125 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
1126 struct kvm_book3e_206_tlb_params params;
1127 char *virt;
1128 struct page **pages;
1129 struct tlbe_priv *privs[2] = {};
4f802fe9 1130 u64 *g2h_bitmap = NULL;
dc83b8bc
SW
1131 size_t array_len;
1132 u32 sets;
1133 int num_pages, ret, i;
1134
1135 if (cfg->mmu_type != KVM_MMU_FSL_BOOKE_NOHV)
1136 return -EINVAL;
1137
1138 if (copy_from_user(&params, (void __user *)(uintptr_t)cfg->params,
1139 sizeof(params)))
1140 return -EFAULT;
1141
1142 if (params.tlb_sizes[1] > 64)
1143 return -EINVAL;
1144 if (params.tlb_ways[1] != params.tlb_sizes[1])
1145 return -EINVAL;
1146 if (params.tlb_sizes[2] != 0 || params.tlb_sizes[3] != 0)
1147 return -EINVAL;
1148 if (params.tlb_ways[2] != 0 || params.tlb_ways[3] != 0)
1149 return -EINVAL;
1150
1151 if (!is_power_of_2(params.tlb_ways[0]))
1152 return -EINVAL;
1153
1154 sets = params.tlb_sizes[0] >> ilog2(params.tlb_ways[0]);
1155 if (!is_power_of_2(sets))
1156 return -EINVAL;
1157
1158 array_len = params.tlb_sizes[0] + params.tlb_sizes[1];
1159 array_len *= sizeof(struct kvm_book3e_206_tlb_entry);
1160
1161 if (cfg->array_len < array_len)
1162 return -EINVAL;
1163
1164 num_pages = DIV_ROUND_UP(cfg->array + array_len - 1, PAGE_SIZE) -
1165 cfg->array / PAGE_SIZE;
1166 pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL);
1167 if (!pages)
1168 return -ENOMEM;
1169
1170 ret = get_user_pages_fast(cfg->array, num_pages, 1, pages);
1171 if (ret < 0)
1172 goto err_pages;
1173
1174 if (ret != num_pages) {
1175 num_pages = ret;
1176 ret = -EFAULT;
1177 goto err_put_page;
1178 }
1179
1180 virt = vmap(pages, num_pages, VM_MAP, PAGE_KERNEL);
1181 if (!virt)
1182 goto err_put_page;
1183
1184 privs[0] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[0],
1185 GFP_KERNEL);
1186 privs[1] = kzalloc(sizeof(struct tlbe_priv) * params.tlb_sizes[1],
1187 GFP_KERNEL);
1188
1189 if (!privs[0] || !privs[1])
1190 goto err_put_page;
1191
4f802fe9
SW
1192 g2h_bitmap = kzalloc(sizeof(u64) * params.tlb_sizes[1],
1193 GFP_KERNEL);
1194 if (!g2h_bitmap)
1195 goto err_put_page;
1196
dc83b8bc
SW
1197 free_gtlb(vcpu_e500);
1198
1199 vcpu_e500->gtlb_priv[0] = privs[0];
1200 vcpu_e500->gtlb_priv[1] = privs[1];
4f802fe9 1201 vcpu_e500->g2h_tlb1_map = g2h_bitmap;
dc83b8bc
SW
1202
1203 vcpu_e500->gtlb_arch = (struct kvm_book3e_206_tlb_entry *)
1204 (virt + (cfg->array & (PAGE_SIZE - 1)));
1205
1206 vcpu_e500->gtlb_params[0].entries = params.tlb_sizes[0];
1207 vcpu_e500->gtlb_params[1].entries = params.tlb_sizes[1];
1208
1209 vcpu_e500->gtlb_offset[0] = 0;
1210 vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
1211
8fdd21a2
SW
1212 vcpu->arch.mmucfg = mfspr(SPRN_MMUCFG) & ~MMUCFG_LPIDSIZE;
1213
1214 vcpu->arch.tlbcfg[0] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
dc83b8bc 1215 if (params.tlb_sizes[0] <= 2048)
8fdd21a2
SW
1216 vcpu->arch.tlbcfg[0] |= params.tlb_sizes[0];
1217 vcpu->arch.tlbcfg[0] |= params.tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc 1218
8fdd21a2
SW
1219 vcpu->arch.tlbcfg[1] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
1220 vcpu->arch.tlbcfg[1] |= params.tlb_sizes[1];
1221 vcpu->arch.tlbcfg[1] |= params.tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
dc83b8bc
SW
1222
1223 vcpu_e500->shared_tlb_pages = pages;
1224 vcpu_e500->num_shared_tlb_pages = num_pages;
1225
1226 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0];
1227 vcpu_e500->gtlb_params[0].sets = sets;
1228
1229 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1];
1230 vcpu_e500->gtlb_params[1].sets = 1;
1231
cc902ad4 1232 kvmppc_recalc_tlb1map_range(vcpu_e500);
dc83b8bc
SW
1233 return 0;
1234
1235err_put_page:
1236 kfree(privs[0]);
1237 kfree(privs[1]);
1238
1239 for (i = 0; i < num_pages; i++)
1240 put_page(pages[i]);
1241
1242err_pages:
1243 kfree(pages);
1244 return ret;
1245}
1246
1247int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
1248 struct kvm_dirty_tlb *dirty)
1249{
1250 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
cc902ad4 1251 kvmppc_recalc_tlb1map_range(vcpu_e500);
dc83b8bc
SW
1252 clear_tlb_refs(vcpu_e500);
1253 return 0;
bc8080cb
HB
1254}
1255
1256int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
1257{
8fdd21a2 1258 struct kvm_vcpu *vcpu = &vcpu_e500->vcpu;
dc83b8bc
SW
1259 int entry_size = sizeof(struct kvm_book3e_206_tlb_entry);
1260 int entries = KVM_E500_TLB0_SIZE + KVM_E500_TLB1_SIZE;
1261
0164c0f0
SW
1262 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
1263 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
1264
1265 /*
1266 * This should never happen on real e500 hardware, but is
1267 * architecturally possible -- e.g. in some weird nested
1268 * virtualization case.
1269 */
1270 if (host_tlb_params[0].entries == 0 ||
1271 host_tlb_params[1].entries == 0) {
1272 pr_err("%s: need to know host tlb size\n", __func__);
1273 return -ENODEV;
1274 }
1275
1276 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
1277 TLBnCFG_ASSOC_SHIFT;
1278 host_tlb_params[1].ways = host_tlb_params[1].entries;
1279
1280 if (!is_power_of_2(host_tlb_params[0].entries) ||
1281 !is_power_of_2(host_tlb_params[0].ways) ||
1282 host_tlb_params[0].entries < host_tlb_params[0].ways ||
1283 host_tlb_params[0].ways == 0) {
1284 pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
1285 __func__, host_tlb_params[0].entries,
1286 host_tlb_params[0].ways);
1287 return -ENODEV;
1288 }
1289
1290 host_tlb_params[0].sets =
1291 host_tlb_params[0].entries / host_tlb_params[0].ways;
1292 host_tlb_params[1].sets = 1;
bc8080cb 1293
dc83b8bc
SW
1294 vcpu_e500->gtlb_params[0].entries = KVM_E500_TLB0_SIZE;
1295 vcpu_e500->gtlb_params[1].entries = KVM_E500_TLB1_SIZE;
bc8080cb 1296
dc83b8bc
SW
1297 vcpu_e500->gtlb_params[0].ways = KVM_E500_TLB0_WAY_NUM;
1298 vcpu_e500->gtlb_params[0].sets =
1299 KVM_E500_TLB0_SIZE / KVM_E500_TLB0_WAY_NUM;
1300
1301 vcpu_e500->gtlb_params[1].ways = KVM_E500_TLB1_SIZE;
1302 vcpu_e500->gtlb_params[1].sets = 1;
1303
1304 vcpu_e500->gtlb_arch = kmalloc(entries * entry_size, GFP_KERNEL);
1305 if (!vcpu_e500->gtlb_arch)
1306 return -ENOMEM;
1307
1308 vcpu_e500->gtlb_offset[0] = 0;
1309 vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
0164c0f0
SW
1310
1311 vcpu_e500->tlb_refs[0] =
1312 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[0].entries,
1313 GFP_KERNEL);
1314 if (!vcpu_e500->tlb_refs[0])
1315 goto err;
1316
1317 vcpu_e500->tlb_refs[1] =
1318 kzalloc(sizeof(struct tlbe_ref) * host_tlb_params[1].entries,
1319 GFP_KERNEL);
1320 if (!vcpu_e500->tlb_refs[1])
1321 goto err;
1322
dc83b8bc
SW
1323 vcpu_e500->gtlb_priv[0] = kzalloc(sizeof(struct tlbe_ref) *
1324 vcpu_e500->gtlb_params[0].entries,
1325 GFP_KERNEL);
0164c0f0
SW
1326 if (!vcpu_e500->gtlb_priv[0])
1327 goto err;
1328
dc83b8bc
SW
1329 vcpu_e500->gtlb_priv[1] = kzalloc(sizeof(struct tlbe_ref) *
1330 vcpu_e500->gtlb_params[1].entries,
1331 GFP_KERNEL);
0164c0f0
SW
1332 if (!vcpu_e500->gtlb_priv[1])
1333 goto err;
bc8080cb 1334
4f802fe9
SW
1335 vcpu_e500->g2h_tlb1_map = kzalloc(sizeof(unsigned int) *
1336 vcpu_e500->gtlb_params[1].entries,
1337 GFP_KERNEL);
1338 if (!vcpu_e500->g2h_tlb1_map)
1339 goto err;
1340
1341 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
1342 host_tlb_params[1].entries,
1343 GFP_KERNEL);
1344 if (!vcpu_e500->h2g_tlb1_rmap)
1345 goto err;
1346
da15bf43 1347 /* Init TLB configuration register */
8fdd21a2 1348 vcpu->arch.tlbcfg[0] = mfspr(SPRN_TLB0CFG) &
7b11dc99 1349 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
8fdd21a2
SW
1350 vcpu->arch.tlbcfg[0] |= vcpu_e500->gtlb_params[0].entries;
1351 vcpu->arch.tlbcfg[0] |=
7b11dc99
SW
1352 vcpu_e500->gtlb_params[0].ways << TLBnCFG_ASSOC_SHIFT;
1353
8fdd21a2 1354 vcpu->arch.tlbcfg[1] = mfspr(SPRN_TLB1CFG) &
7b11dc99 1355 ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
c6b3733b
AG
1356 vcpu->arch.tlbcfg[1] |= vcpu_e500->gtlb_params[1].entries;
1357 vcpu->arch.tlbcfg[1] |=
7b11dc99 1358 vcpu_e500->gtlb_params[1].ways << TLBnCFG_ASSOC_SHIFT;
da15bf43 1359
cc902ad4 1360 kvmppc_recalc_tlb1map_range(vcpu_e500);
bc8080cb
HB
1361 return 0;
1362
0164c0f0 1363err:
dc83b8bc 1364 free_gtlb(vcpu_e500);
0164c0f0
SW
1365 kfree(vcpu_e500->tlb_refs[0]);
1366 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb
HB
1367 return -1;
1368}
1369
1370void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
1371{
dc83b8bc 1372 free_gtlb(vcpu_e500);
4f802fe9 1373 kfree(vcpu_e500->h2g_tlb1_rmap);
0164c0f0
SW
1374 kfree(vcpu_e500->tlb_refs[0]);
1375 kfree(vcpu_e500->tlb_refs[1]);
bc8080cb 1376}
This page took 0.281604 seconds and 5 git commands to generate.