[deliverable/linux.git] / arch / powerpc / kvm / emulate.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * Copyright IBM Corp. 2007
 * Copyright 2011 Freescale Semiconductor, Inc.
 *
 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
 */

#include <linux/jiffies.h>
#include <linux/hrtimer.h>
#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm_host.h>
#include <linux/clockchips.h>

#include <asm/reg.h>
#include <asm/time.h>
#include <asm/byteorder.h>
#include <asm/kvm_ppc.h>
#include <asm/disassemble.h>
#include <asm/ppc-opcode.h>
#include "timing.h"
#include "trace.h"

void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
{
	unsigned long dec_nsec;
	unsigned long long dec_time;

	pr_debug("mtDEC: %x\n", vcpu->arch.dec);
	hrtimer_try_to_cancel(&vcpu->arch.dec_timer);

#ifdef CONFIG_PPC_BOOK3S
	/* mtdec lowers the interrupt line when positive. */
	kvmppc_core_dequeue_dec(vcpu);

	/* POWER4+ triggers a dec interrupt if the value is < 0 */
	if (vcpu->arch.dec & 0x80000000) {
		kvmppc_core_queue_dec(vcpu);
		return;
	}
#endif

#ifdef CONFIG_BOOKE
	/* On BOOKE, DEC = 0 is as good as decrementer not enabled */
	if (vcpu->arch.dec == 0)
		return;
#endif

	/*
	 * The decrementer ticks at the same rate as the timebase, so
	 * that's how we convert the guest DEC value to the number of
	 * host ticks.
	 */

	dec_time = vcpu->arch.dec;
	/*
	 * Guest timebase ticks at the same frequency as host decrementer.
	 * So use the host decrementer calculations for decrementer emulation.
	 */
	dec_time = dec_time << decrementer_clockevent.shift;
	do_div(dec_time, decrementer_clockevent.mult);
	dec_nsec = do_div(dec_time, NSEC_PER_SEC);
	hrtimer_start(&vcpu->arch.dec_timer,
		ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
	vcpu->arch.dec_jiffies = get_tb();
}

u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
{
	u64 jd = tb - vcpu->arch.dec_jiffies;

#ifdef CONFIG_BOOKE
	if (vcpu->arch.dec < jd)
		return 0;
#endif

	return vcpu->arch.dec - jd;
}

static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
{
	enum emulation_result emulated = EMULATE_DONE;
	ulong spr_val = kvmppc_get_gpr(vcpu, rs);

	switch (sprn) {
	case SPRN_SRR0:
		kvmppc_set_srr0(vcpu, spr_val);
		break;
	case SPRN_SRR1:
		kvmppc_set_srr1(vcpu, spr_val);
		break;

	/* XXX We need to context-switch the timebase for
	 * watchdog and FIT. */
	case SPRN_TBWL: break;
	case SPRN_TBWU: break;

	case SPRN_DEC:
		vcpu->arch.dec = spr_val;
		kvmppc_emulate_dec(vcpu);
		break;

	case SPRN_SPRG0:
		kvmppc_set_sprg0(vcpu, spr_val);
		break;
	case SPRN_SPRG1:
		kvmppc_set_sprg1(vcpu, spr_val);
		break;
	case SPRN_SPRG2:
		kvmppc_set_sprg2(vcpu, spr_val);
		break;
	case SPRN_SPRG3:
		kvmppc_set_sprg3(vcpu, spr_val);
		break;

	/* PIR can legally be written, but we ignore it */
	case SPRN_PIR: break;

	default:
		emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn,
								  spr_val);
		if (emulated == EMULATE_FAIL)
			printk(KERN_INFO "mtspr: unknown spr "
				"0x%x\n", sprn);
		break;
	}

	kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);

	return emulated;
}

static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
{
	enum emulation_result emulated = EMULATE_DONE;
	ulong spr_val = 0;

	switch (sprn) {
	case SPRN_SRR0:
		spr_val = kvmppc_get_srr0(vcpu);
		break;
	case SPRN_SRR1:
		spr_val = kvmppc_get_srr1(vcpu);
		break;
	case SPRN_PVR:
		spr_val = vcpu->arch.pvr;
		break;
	case SPRN_PIR:
		spr_val = vcpu->vcpu_id;
		break;

	/* Note: mftb and TBRL/TBWL are user-accessible, so
	 * the guest can always access the real TB anyways.
	 * In fact, we probably will never see these traps. */
	case SPRN_TBWL:
		spr_val = get_tb() >> 32;
		break;
	case SPRN_TBWU:
		spr_val = get_tb();
		break;

	case SPRN_SPRG0:
		spr_val = kvmppc_get_sprg0(vcpu);
		break;
	case SPRN_SPRG1:
		spr_val = kvmppc_get_sprg1(vcpu);
		break;
	case SPRN_SPRG2:
		spr_val = kvmppc_get_sprg2(vcpu);
		break;
	case SPRN_SPRG3:
		spr_val = kvmppc_get_sprg3(vcpu);
		break;
	/* Note: SPRG4-7 are user-readable, so we don't get
	 * a trap. */

	case SPRN_DEC:
		spr_val = kvmppc_get_dec(vcpu, get_tb());
		break;
	default:
		emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn,
								  &spr_val);
		if (unlikely(emulated == EMULATE_FAIL)) {
			printk(KERN_INFO "mfspr: unknown spr "
				"0x%x\n", sprn);
		}
		break;
	}

	if (emulated == EMULATE_DONE)
		kvmppc_set_gpr(vcpu, rt, spr_val);
	kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);

	return emulated;
}

/* XXX Should probably auto-generate instruction decoding for a particular core
 * from opcode tables in the future. */
int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
{
	u32 inst;
	int rs, rt, sprn;
	enum emulation_result emulated;
	int advance = 1;

	/* this default type might be overwritten by subcategories */
	kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);

	emulated = kvmppc_get_last_inst(vcpu, false, &inst);
	if (emulated != EMULATE_DONE)
		return emulated;

	pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));

	rs = get_rs(inst);
	rt = get_rt(inst);
	sprn = get_sprn(inst);

	switch (get_op(inst)) {
	case OP_TRAP:
#ifdef CONFIG_PPC_BOOK3S
	case OP_TRAP_64:
		kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
#else
		kvmppc_core_queue_program(vcpu,
					  vcpu->arch.shared->esr | ESR_PTR);
#endif
		advance = 0;
		break;

	case 31:
		switch (get_xop(inst)) {

		case OP_31_XOP_TRAP:
#ifdef CONFIG_64BIT
		case OP_31_XOP_TRAP_64:
#endif
#ifdef CONFIG_PPC_BOOK3S
			kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
#else
			kvmppc_core_queue_program(vcpu,
					vcpu->arch.shared->esr | ESR_PTR);
#endif
			advance = 0;
			break;

		case OP_31_XOP_MFSPR:
			emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
			break;

		case OP_31_XOP_MTSPR:
			emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
			break;

		case OP_31_XOP_TLBSYNC:
			break;

		default:
			/* Attempt core-specific emulation below. */
			emulated = EMULATE_FAIL;
		}
		break;

	default:
		emulated = EMULATE_FAIL;
	}

	if (emulated == EMULATE_FAIL) {
		emulated = vcpu->kvm->arch.kvm_ops->emulate_op(run, vcpu, inst,
							       &advance);
		if (emulated == EMULATE_AGAIN) {
			advance = 0;
		} else if (emulated == EMULATE_FAIL) {
			advance = 0;
			printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
			       "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
			kvmppc_core_queue_program(vcpu, 0);
		}
	}

	trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);

	/* Advance past emulated instruction. */
	if (advance)
		kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);

	return emulated;
}
EXPORT_SYMBOL_GPL(kvmppc_emulate_instruction);
Commit	Line	Data
bbf45ba5 HB	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License, version 2, as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program; if not, write to the Free Software
	13	* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
	14	*
	15	* Copyright IBM Corp. 2007
dfd4d47e	16	* Copyright 2011 Freescale Semiconductor, Inc.
bbf45ba5 HB	17	*
	18	* Authors: Hollis Blanchard <hollisb@us.ibm.com>
	19	*/
	20
	21	#include <linux/jiffies.h>
544c6761	22	#include <linux/hrtimer.h>
bbf45ba5 HB	23	#include <linux/types.h>
	24	#include <linux/string.h>
	25	#include <linux/kvm_host.h>
6e35994d	26	#include <linux/clockchips.h>
bbf45ba5	27
75f74f0d	28	#include <asm/reg.h>
bbf45ba5 HB	29	#include <asm/time.h>
	30	#include <asm/byteorder.h>
	31	#include <asm/kvm_ppc.h>
c381a043	32	#include <asm/disassemble.h>
9123c5ed	33	#include <asm/ppc-opcode.h>
73e75b41	34	#include "timing.h"
46f43c6e	35	#include "trace.h"
bbf45ba5	36
75f74f0d	37	void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
bbf45ba5	38	{
544c6761	39	unsigned long dec_nsec;
dc2babfe	40	unsigned long long dec_time;
9a7a9b09	41
544c6761	42	pr_debug("mtDEC: %x\n", vcpu->arch.dec);
dfd4d47e SW	43	hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
dfd4d47e SW	44
00c3a37c	45	#ifdef CONFIG_PPC_BOOK3S
7706664d AG	46	/* mtdec lowers the interrupt line when positive. */
	47	kvmppc_core_dequeue_dec(vcpu);
	48
513579e3 AG	49	/* POWER4+ triggers a dec interrupt if the value is < 0 */
513579e3 AG	50	if (vcpu->arch.dec & 0x80000000) {
513579e3 AG	51	kvmppc_core_queue_dec(vcpu);
	52	return;
	53	}
	54	#endif
dfd4d47e SW	55
	56	#ifdef CONFIG_BOOKE
	57	/* On BOOKE, DEC = 0 is as good as decrementer not enabled */
	58	if (vcpu->arch.dec == 0)
	59	return;
	60	#endif
	61
	62	/*
	63	* The decrementer ticks at the same rate as the timebase, so
	64	* that's how we convert the guest DEC value to the number of
	65	* host ticks.
	66	*/
	67
	68	dec_time = vcpu->arch.dec;
6e35994d BB	69	/*
	70	* Guest timebase ticks at the same frequency as host decrementer.
	71	* So use the host decrementer calculations for decrementer emulation.
	72	*/
	73	dec_time = dec_time << decrementer_clockevent.shift;
	74	do_div(dec_time, decrementer_clockevent.mult);
dfd4d47e SW	75	dec_nsec = do_div(dec_time, NSEC_PER_SEC);
	76	hrtimer_start(&vcpu->arch.dec_timer,
	77	ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
	78	vcpu->arch.dec_jiffies = get_tb();
bbf45ba5 HB	79	}
bbf45ba5 HB	80
5ce941ee SW	81	u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
	82	{
	83	u64 jd = tb - vcpu->arch.dec_jiffies;
dfd4d47e SW	84
	85	#ifdef CONFIG_BOOKE
	86	if (vcpu->arch.dec < jd)
	87	return 0;
	88	#endif
	89
5ce941ee SW	90	return vcpu->arch.dec - jd;
	91	}
	92
388cf9ee AG	93	static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
	94	{
	95	enum emulation_result emulated = EMULATE_DONE;
	96	ulong spr_val = kvmppc_get_gpr(vcpu, rs);
	97
	98	switch (sprn) {
	99	case SPRN_SRR0:
5deb8e7a	100	kvmppc_set_srr0(vcpu, spr_val);
388cf9ee AG	101	break;
388cf9ee AG	102	case SPRN_SRR1:
5deb8e7a	103	kvmppc_set_srr1(vcpu, spr_val);
388cf9ee AG	104	break;
	105
	106	/* XXX We need to context-switch the timebase for
	107	* watchdog and FIT. */
	108	case SPRN_TBWL: break;
	109	case SPRN_TBWU: break;
	110
388cf9ee AG	111	case SPRN_DEC:
	112	vcpu->arch.dec = spr_val;
	113	kvmppc_emulate_dec(vcpu);
	114	break;
	115
	116	case SPRN_SPRG0:
5deb8e7a	117	kvmppc_set_sprg0(vcpu, spr_val);
388cf9ee AG	118	break;
388cf9ee AG	119	case SPRN_SPRG1:
5deb8e7a	120	kvmppc_set_sprg1(vcpu, spr_val);
388cf9ee AG	121	break;
388cf9ee AG	122	case SPRN_SPRG2:
5deb8e7a	123	kvmppc_set_sprg2(vcpu, spr_val);
388cf9ee AG	124	break;
388cf9ee AG	125	case SPRN_SPRG3:
5deb8e7a	126	kvmppc_set_sprg3(vcpu, spr_val);
388cf9ee AG	127	break;
388cf9ee AG	128
a3ff5fbc AG	129	/* PIR can legally be written, but we ignore it */
	130	case SPRN_PIR: break;
	131
388cf9ee	132	default:
cbbc58d4 AK	133	emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn,
cbbc58d4 AK	134	spr_val);
388cf9ee AG	135	if (emulated == EMULATE_FAIL)
	136	printk(KERN_INFO "mtspr: unknown spr "
	137	"0x%x\n", sprn);
	138	break;
	139	}
	140
	141	kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
	142
	143	return emulated;
	144	}
	145
	146	static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
	147	{
	148	enum emulation_result emulated = EMULATE_DONE;
	149	ulong spr_val = 0;
	150
	151	switch (sprn) {
	152	case SPRN_SRR0:
5deb8e7a	153	spr_val = kvmppc_get_srr0(vcpu);
388cf9ee AG	154	break;
388cf9ee AG	155	case SPRN_SRR1:
5deb8e7a	156	spr_val = kvmppc_get_srr1(vcpu);
388cf9ee AG	157	break;
	158	case SPRN_PVR:
	159	spr_val = vcpu->arch.pvr;
	160	break;
	161	case SPRN_PIR:
	162	spr_val = vcpu->vcpu_id;
	163	break;
388cf9ee AG	164
	165	/* Note: mftb and TBRL/TBWL are user-accessible, so
	166	* the guest can always access the real TB anyways.
	167	* In fact, we probably will never see these traps. */
	168	case SPRN_TBWL:
	169	spr_val = get_tb() >> 32;
	170	break;
	171	case SPRN_TBWU:
	172	spr_val = get_tb();
	173	break;
	174
	175	case SPRN_SPRG0:
5deb8e7a	176	spr_val = kvmppc_get_sprg0(vcpu);
388cf9ee AG	177	break;
388cf9ee AG	178	case SPRN_SPRG1:
5deb8e7a	179	spr_val = kvmppc_get_sprg1(vcpu);
388cf9ee AG	180	break;
388cf9ee AG	181	case SPRN_SPRG2:
5deb8e7a	182	spr_val = kvmppc_get_sprg2(vcpu);
388cf9ee AG	183	break;
388cf9ee AG	184	case SPRN_SPRG3:
5deb8e7a	185	spr_val = kvmppc_get_sprg3(vcpu);
388cf9ee AG	186	break;
	187	/* Note: SPRG4-7 are user-readable, so we don't get
	188	* a trap. */
	189
	190	case SPRN_DEC:
	191	spr_val = kvmppc_get_dec(vcpu, get_tb());
	192	break;
	193	default:
cbbc58d4 AK	194	emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn,
cbbc58d4 AK	195	&spr_val);
388cf9ee AG	196	if (unlikely(emulated == EMULATE_FAIL)) {
	197	printk(KERN_INFO "mfspr: unknown spr "
	198	"0x%x\n", sprn);
	199	}
	200	break;
	201	}
	202
	203	if (emulated == EMULATE_DONE)
	204	kvmppc_set_gpr(vcpu, rt, spr_val);
	205	kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
	206
	207	return emulated;
	208	}
	209
75f74f0d HB	210	/* XXX Should probably auto-generate instruction decoding for a particular core
75f74f0d HB	211	* from opcode tables in the future. */
bbf45ba5 HB	212	int kvmppc_emulate_instruction(struct kvm_run run, struct kvm_vcpu vcpu)
bbf45ba5 HB	213	{
51f04726	214	u32 inst;
d69614a2	215	int rs, rt, sprn;
51f04726	216	enum emulation_result emulated;
bbf45ba5 HB	217	int advance = 1;
bbf45ba5 HB	218
73e75b41 HB	219	/* this default type might be overwritten by subcategories */
	220	kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
	221
51f04726 MC	222	emulated = kvmppc_get_last_inst(vcpu, false, &inst);
	223	if (emulated != EMULATE_DONE)
	224	return emulated;
	225
689fd14a	226	pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
513579e3	227
51f04726 MC	228	rs = get_rs(inst);
	229	rt = get_rt(inst);
	230	sprn = get_sprn(inst);
	231
bbf45ba5	232	switch (get_op(inst)) {
cea5d8c9	233	case OP_TRAP:
00c3a37c	234	#ifdef CONFIG_PPC_BOOK3S
513579e3	235	case OP_TRAP_64:
daf5e271	236	kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
513579e3	237	#else
b5904972 SW	238	kvmppc_core_queue_program(vcpu,
b5904972 SW	239	vcpu->arch.shared->esr \| ESR_PTR);
513579e3	240	#endif
bbf45ba5 HB	241	advance = 0;
	242	break;
	243
bbf45ba5 HB	244	case 31:
	245	switch (get_xop(inst)) {
	246
6df79df5 AG	247	case OP_31_XOP_TRAP:
	248	#ifdef CONFIG_64BIT
	249	case OP_31_XOP_TRAP_64:
	250	#endif
	251	#ifdef CONFIG_PPC_BOOK3S
	252	kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
	253	#else
	254	kvmppc_core_queue_program(vcpu,
	255	vcpu->arch.shared->esr \| ESR_PTR);
	256	#endif
	257	advance = 0;
	258	break;
bbf45ba5	259
cea5d8c9	260	case OP_31_XOP_MFSPR:
388cf9ee	261	emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
bbf45ba5 HB	262	break;
bbf45ba5 HB	263
cea5d8c9	264	case OP_31_XOP_MTSPR:
388cf9ee	265	emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
bbf45ba5 HB	266	break;
bbf45ba5 HB	267
cea5d8c9	268	case OP_31_XOP_TLBSYNC:
bbf45ba5 HB	269	break;
bbf45ba5 HB	270
bbf45ba5	271	default:
75f74f0d	272	/* Attempt core-specific emulation below. */
bbf45ba5	273	emulated = EMULATE_FAIL;
bbf45ba5 HB	274	}
	275	break;
	276
bbf45ba5	277	default:
bbf45ba5	278	emulated = EMULATE_FAIL;
75f74f0d HB	279	}
	280
	281	if (emulated == EMULATE_FAIL) {
cbbc58d4 AK	282	emulated = vcpu->kvm->arch.kvm_ops->emulate_op(run, vcpu, inst,
cbbc58d4 AK	283	&advance);
37f5bca6 AG	284	if (emulated == EMULATE_AGAIN) {
	285	advance = 0;
	286	} else if (emulated == EMULATE_FAIL) {
75f74f0d HB	287	advance = 0;
	288	printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
	289	"(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
5f2b105a	290	kvmppc_core_queue_program(vcpu, 0);
75f74f0d	291	}
bbf45ba5 HB	292	}
bbf45ba5 HB	293
c7f38f46	294	trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
3b4bd796	295
c7f38f46	296	/* Advance past emulated instruction. */
bbf45ba5	297	if (advance)
c7f38f46	298	kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
bbf45ba5 HB	299
	300	return emulated;
	301	}
2ba9f0d8	302	EXPORT_SYMBOL_GPL(kvmppc_emulate_instruction);