Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / arch / powerpc / mm / fault.c
CommitLineData
14cf11af 1/*
14cf11af
PM
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/i386/mm/fault.c"
6 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
7 *
8 * Modified by Cort Dougan and Paul Mackerras.
9 *
10 * Modified for PPC64 by Dave Engebretsen (engebret@ibm.com)
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
14cf11af
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18#include <linux/signal.h>
19#include <linux/sched.h>
20#include <linux/kernel.h>
21#include <linux/errno.h>
22#include <linux/string.h>
23#include <linux/types.h>
24#include <linux/ptrace.h>
25#include <linux/mman.h>
26#include <linux/mm.h>
27#include <linux/interrupt.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
30#include <linux/kprobes.h>
1eeb66a1 31#include <linux/kdebug.h>
cdd6c482 32#include <linux/perf_event.h>
76462232 33#include <linux/ratelimit.h>
ba12eede 34#include <linux/context_tracking.h>
9d57472f 35#include <linux/hugetlb.h>
14cf11af 36
40900194 37#include <asm/firmware.h>
14cf11af
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38#include <asm/page.h>
39#include <asm/pgtable.h>
40#include <asm/mmu.h>
41#include <asm/mmu_context.h>
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42#include <asm/uaccess.h>
43#include <asm/tlbflush.h>
14cf11af 44#include <asm/siginfo.h>
ae3a197e 45#include <asm/debug.h>
4f9e87c0 46
c3dcf53a
JX
47#include "icswx.h"
48
9f90b997
CH
49#ifdef CONFIG_KPROBES
50static inline int notify_page_fault(struct pt_regs *regs)
4f9e87c0 51{
9f90b997
CH
52 int ret = 0;
53
54 /* kprobe_running() needs smp_processor_id() */
55 if (!user_mode(regs)) {
56 preempt_disable();
57 if (kprobe_running() && kprobe_fault_handler(regs, 11))
58 ret = 1;
59 preempt_enable();
60 }
4f9e87c0 61
9f90b997 62 return ret;
4f9e87c0
AK
63}
64#else
9f90b997 65static inline int notify_page_fault(struct pt_regs *regs)
4f9e87c0 66{
9f90b997 67 return 0;
4f9e87c0
AK
68}
69#endif
70
14cf11af
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71/*
72 * Check whether the instruction at regs->nip is a store using
73 * an update addressing form which will update r1.
74 */
75static int store_updates_sp(struct pt_regs *regs)
76{
77 unsigned int inst;
78
79 if (get_user(inst, (unsigned int __user *)regs->nip))
80 return 0;
81 /* check for 1 in the rA field */
82 if (((inst >> 16) & 0x1f) != 1)
83 return 0;
84 /* check major opcode */
85 switch (inst >> 26) {
86 case 37: /* stwu */
87 case 39: /* stbu */
88 case 45: /* sthu */
89 case 53: /* stfsu */
90 case 55: /* stfdu */
91 return 1;
92 case 62: /* std or stdu */
93 return (inst & 3) == 1;
94 case 31:
95 /* check minor opcode */
96 switch ((inst >> 1) & 0x3ff) {
97 case 181: /* stdux */
98 case 183: /* stwux */
99 case 247: /* stbux */
100 case 439: /* sthux */
101 case 695: /* stfsux */
102 case 759: /* stfdux */
103 return 1;
104 }
105 }
106 return 0;
107}
9be72573
BH
108/*
109 * do_page_fault error handling helpers
110 */
111
112#define MM_FAULT_RETURN 0
113#define MM_FAULT_CONTINUE -1
114#define MM_FAULT_ERR(sig) (sig)
115
3913fdd7
AB
116static int do_sigbus(struct pt_regs *regs, unsigned long address,
117 unsigned int fault)
9be72573
BH
118{
119 siginfo_t info;
9d57472f 120 unsigned int lsb = 0;
9be72573
BH
121
122 up_read(&current->mm->mmap_sem);
123
63af5262
AB
124 if (!user_mode(regs))
125 return MM_FAULT_ERR(SIGBUS);
126
127 current->thread.trap_nr = BUS_ADRERR;
128 info.si_signo = SIGBUS;
129 info.si_errno = 0;
130 info.si_code = BUS_ADRERR;
131 info.si_addr = (void __user *)address;
3913fdd7
AB
132#ifdef CONFIG_MEMORY_FAILURE
133 if (fault & (VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE)) {
134 pr_err("MCE: Killing %s:%d due to hardware memory corruption fault at %lx\n",
135 current->comm, current->pid, address);
136 info.si_code = BUS_MCEERR_AR;
137 }
9d57472f
AB
138
139 if (fault & VM_FAULT_HWPOISON_LARGE)
140 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
141 if (fault & VM_FAULT_HWPOISON)
142 lsb = PAGE_SHIFT;
3913fdd7 143#endif
9d57472f 144 info.si_addr_lsb = lsb;
63af5262
AB
145 force_sig_info(SIGBUS, &info, current);
146 return MM_FAULT_RETURN;
9be72573
BH
147}
148
149static int mm_fault_error(struct pt_regs *regs, unsigned long addr, int fault)
150{
151 /*
152 * Pagefault was interrupted by SIGKILL. We have no reason to
153 * continue the pagefault.
154 */
155 if (fatal_signal_pending(current)) {
156 /*
157 * If we have retry set, the mmap semaphore will have
158 * alrady been released in __lock_page_or_retry(). Else
159 * we release it now.
160 */
161 if (!(fault & VM_FAULT_RETRY))
162 up_read(&current->mm->mmap_sem);
163 /* Coming from kernel, we need to deal with uaccess fixups */
164 if (user_mode(regs))
165 return MM_FAULT_RETURN;
166 return MM_FAULT_ERR(SIGKILL);
167 }
168
169 /* No fault: be happy */
170 if (!(fault & VM_FAULT_ERROR))
171 return MM_FAULT_CONTINUE;
172
173 /* Out of memory */
c2d23f91
DR
174 if (fault & VM_FAULT_OOM) {
175 up_read(&current->mm->mmap_sem);
176
177 /*
178 * We ran out of memory, or some other thing happened to us that
179 * made us unable to handle the page fault gracefully.
180 */
181 if (!user_mode(regs))
182 return MM_FAULT_ERR(SIGKILL);
183 pagefault_out_of_memory();
184 return MM_FAULT_RETURN;
185 }
9be72573 186
3913fdd7
AB
187 if (fault & (VM_FAULT_SIGBUS|VM_FAULT_HWPOISON|VM_FAULT_HWPOISON_LARGE))
188 return do_sigbus(regs, addr, fault);
9be72573
BH
189
190 /* We don't understand the fault code, this is fatal */
191 BUG();
192 return MM_FAULT_CONTINUE;
193}
14cf11af 194
14cf11af
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195/*
196 * For 600- and 800-family processors, the error_code parameter is DSISR
197 * for a data fault, SRR1 for an instruction fault. For 400-family processors
198 * the error_code parameter is ESR for a data fault, 0 for an instruction
199 * fault.
200 * For 64-bit processors, the error_code parameter is
201 * - DSISR for a non-SLB data access fault,
202 * - SRR1 & 0x08000000 for a non-SLB instruction access fault
203 * - 0 any SLB fault.
204 *
205 * The return value is 0 if the fault was handled, or the signal
206 * number if this is a kernel fault that can't be handled here.
207 */
208int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
209 unsigned long error_code)
210{
ba12eede 211 enum ctx_state prev_state = exception_enter();
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212 struct vm_area_struct * vma;
213 struct mm_struct *mm = current->mm;
9be72573 214 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
14cf11af 215 int code = SEGV_MAPERR;
9be72573 216 int is_write = 0;
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PM
217 int trap = TRAP(regs);
218 int is_exec = trap == 0x400;
9be72573 219 int fault;
69e044dd 220 int rc = 0, store_update_sp = 0;
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221
222#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
223 /*
224 * Fortunately the bit assignments in SRR1 for an instruction
225 * fault and DSISR for a data fault are mostly the same for the
226 * bits we are interested in. But there are some bits which
227 * indicate errors in DSISR but can validly be set in SRR1.
228 */
229 if (trap == 0x400)
230 error_code &= 0x48200000;
231 else
232 is_write = error_code & DSISR_ISSTORE;
233#else
234 is_write = error_code & ESR_DST;
235#endif /* CONFIG_4xx || CONFIG_BOOKE */
236
c3dcf53a
JX
237#ifdef CONFIG_PPC_ICSWX
238 /*
239 * we need to do this early because this "data storage
240 * interrupt" does not update the DAR/DEAR so we don't want to
241 * look at it
242 */
243 if (error_code & ICSWX_DSI_UCT) {
ba12eede 244 rc = acop_handle_fault(regs, address, error_code);
9be72573 245 if (rc)
ba12eede 246 goto bail;
c3dcf53a 247 }
9be72573 248#endif /* CONFIG_PPC_ICSWX */
c3dcf53a 249
9f90b997 250 if (notify_page_fault(regs))
ba12eede 251 goto bail;
14cf11af 252
c3b75bd7 253 if (unlikely(debugger_fault_handler(regs)))
ba12eede 254 goto bail;
14cf11af
PM
255
256 /* On a kernel SLB miss we can only check for a valid exception entry */
ba12eede
LZ
257 if (!user_mode(regs) && (address >= TASK_SIZE)) {
258 rc = SIGSEGV;
259 goto bail;
260 }
14cf11af 261
9c7cc234
P
262#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE) || \
263 defined(CONFIG_PPC_BOOK3S_64))
14cf11af 264 if (error_code & DSISR_DABRMATCH) {
9422de3e
MN
265 /* breakpoint match */
266 do_break(regs, address, error_code);
ba12eede 267 goto bail;
14cf11af 268 }
9c7cc234 269#endif
14cf11af 270
a546498f
BH
271 /* We restore the interrupt state now */
272 if (!arch_irq_disabled_regs(regs))
273 local_irq_enable();
274
14cf11af 275 if (in_atomic() || mm == NULL) {
ba12eede
LZ
276 if (!user_mode(regs)) {
277 rc = SIGSEGV;
278 goto bail;
279 }
14cf11af
PM
280 /* in_atomic() in user mode is really bad,
281 as is current->mm == NULL. */
df3c9019 282 printk(KERN_EMERG "Page fault in user mode with "
14cf11af
PM
283 "in_atomic() = %d mm = %p\n", in_atomic(), mm);
284 printk(KERN_EMERG "NIP = %lx MSR = %lx\n",
285 regs->nip, regs->msr);
286 die("Weird page fault", regs, SIGSEGV);
287 }
288
a8b0ca17 289 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
7dd1fcc2 290
69e044dd
AK
291 /*
292 * We want to do this outside mmap_sem, because reading code around nip
293 * can result in fault, which will cause a deadlock when called with
294 * mmap_sem held
295 */
296 if (user_mode(regs))
297 store_update_sp = store_updates_sp(regs);
298
759496ba
JW
299 if (user_mode(regs))
300 flags |= FAULT_FLAG_USER;
301
14cf11af
PM
302 /* When running in the kernel we expect faults to occur only to
303 * addresses in user space. All other faults represent errors in the
fc5266ea
AB
304 * kernel and should generate an OOPS. Unfortunately, in the case of an
305 * erroneous fault occurring in a code path which already holds mmap_sem
14cf11af
PM
306 * we will deadlock attempting to validate the fault against the
307 * address space. Luckily the kernel only validly references user
308 * space from well defined areas of code, which are listed in the
309 * exceptions table.
310 *
311 * As the vast majority of faults will be valid we will only perform
fc5266ea 312 * the source reference check when there is a possibility of a deadlock.
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313 * Attempt to lock the address space, if we cannot we then validate the
314 * source. If this is invalid we can skip the address space check,
315 * thus avoiding the deadlock.
316 */
317 if (!down_read_trylock(&mm->mmap_sem)) {
318 if (!user_mode(regs) && !search_exception_tables(regs->nip))
319 goto bad_area_nosemaphore;
320
9be72573 321retry:
14cf11af 322 down_read(&mm->mmap_sem);
a546498f
BH
323 } else {
324 /*
325 * The above down_read_trylock() might have succeeded in
326 * which case we'll have missed the might_sleep() from
327 * down_read():
328 */
329 might_sleep();
14cf11af
PM
330 }
331
332 vma = find_vma(mm, address);
333 if (!vma)
334 goto bad_area;
335 if (vma->vm_start <= address)
336 goto good_area;
337 if (!(vma->vm_flags & VM_GROWSDOWN))
338 goto bad_area;
339
340 /*
341 * N.B. The POWER/Open ABI allows programs to access up to
342 * 288 bytes below the stack pointer.
343 * The kernel signal delivery code writes up to about 1.5kB
344 * below the stack pointer (r1) before decrementing it.
345 * The exec code can write slightly over 640kB to the stack
346 * before setting the user r1. Thus we allow the stack to
347 * expand to 1MB without further checks.
348 */
349 if (address + 0x100000 < vma->vm_end) {
350 /* get user regs even if this fault is in kernel mode */
351 struct pt_regs *uregs = current->thread.regs;
352 if (uregs == NULL)
353 goto bad_area;
354
355 /*
356 * A user-mode access to an address a long way below
357 * the stack pointer is only valid if the instruction
358 * is one which would update the stack pointer to the
359 * address accessed if the instruction completed,
360 * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
361 * (or the byte, halfword, float or double forms).
362 *
363 * If we don't check this then any write to the area
364 * between the last mapped region and the stack will
365 * expand the stack rather than segfaulting.
366 */
69e044dd 367 if (address + 2048 < uregs->gpr[1] && !store_update_sp)
14cf11af
PM
368 goto bad_area;
369 }
370 if (expand_stack(vma, address))
371 goto bad_area;
372
373good_area:
374 code = SEGV_ACCERR;
375#if defined(CONFIG_6xx)
376 if (error_code & 0x95700000)
377 /* an error such as lwarx to I/O controller space,
378 address matching DABR, eciwx, etc. */
379 goto bad_area;
380#endif /* CONFIG_6xx */
381#if defined(CONFIG_8xx)
382 /* The MPC8xx seems to always set 0x80000000, which is
383 * "undefined". Of those that can be set, this is the only
384 * one which seems bad.
385 */
386 if (error_code & 0x10000000)
387 /* Guarded storage error. */
388 goto bad_area;
389#endif /* CONFIG_8xx */
390
391 if (is_exec) {
8d30c14c
BH
392#ifdef CONFIG_PPC_STD_MMU
393 /* Protection fault on exec go straight to failure on
394 * Hash based MMUs as they either don't support per-page
395 * execute permission, or if they do, it's handled already
396 * at the hash level. This test would probably have to
397 * be removed if we change the way this works to make hash
398 * processors use the same I/D cache coherency mechanism
399 * as embedded.
400 */
14cf11af
PM
401 if (error_code & DSISR_PROTFAULT)
402 goto bad_area;
8d30c14c
BH
403#endif /* CONFIG_PPC_STD_MMU */
404
08ae6cc1
PM
405 /*
406 * Allow execution from readable areas if the MMU does not
407 * provide separate controls over reading and executing.
8d30c14c
BH
408 *
409 * Note: That code used to not be enabled for 4xx/BookE.
410 * It is now as I/D cache coherency for these is done at
411 * set_pte_at() time and I see no reason why the test
412 * below wouldn't be valid on those processors. This -may-
413 * break programs compiled with a really old ABI though.
08ae6cc1
PM
414 */
415 if (!(vma->vm_flags & VM_EXEC) &&
416 (cpu_has_feature(CPU_FTR_NOEXECUTE) ||
417 !(vma->vm_flags & (VM_READ | VM_WRITE))))
14cf11af 418 goto bad_area;
14cf11af
PM
419 /* a write */
420 } else if (is_write) {
421 if (!(vma->vm_flags & VM_WRITE))
422 goto bad_area;
759496ba 423 flags |= FAULT_FLAG_WRITE;
14cf11af
PM
424 /* a read */
425 } else {
426 /* protection fault */
427 if (error_code & 0x08000000)
428 goto bad_area;
df67b3da 429 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
14cf11af
PM
430 goto bad_area;
431 }
432
433 /*
434 * If for any reason at all we couldn't handle the fault,
435 * make sure we exit gracefully rather than endlessly redo
436 * the fault.
437 */
9be72573
BH
438 fault = handle_mm_fault(mm, vma, address, flags);
439 if (unlikely(fault & (VM_FAULT_RETRY|VM_FAULT_ERROR))) {
ba12eede 440 rc = mm_fault_error(regs, address, fault);
9be72573 441 if (rc >= MM_FAULT_RETURN)
ba12eede
LZ
442 goto bail;
443 else
444 rc = 0;
14cf11af 445 }
9be72573
BH
446
447 /*
448 * Major/minor page fault accounting is only done on the
449 * initial attempt. If we go through a retry, it is extremely
450 * likely that the page will be found in page cache at that point.
451 */
452 if (flags & FAULT_FLAG_ALLOW_RETRY) {
453 if (fault & VM_FAULT_MAJOR) {
454 current->maj_flt++;
455 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
456 regs, address);
40900194 457#ifdef CONFIG_PPC_SMLPAR
9be72573 458 if (firmware_has_feature(FW_FEATURE_CMO)) {
7ffcf8ec
AB
459 u32 page_ins;
460
9be72573 461 preempt_disable();
7ffcf8ec
AB
462 page_ins = be32_to_cpu(get_lppaca()->page_ins);
463 page_ins += 1 << PAGE_FACTOR;
464 get_lppaca()->page_ins = cpu_to_be32(page_ins);
9be72573
BH
465 preempt_enable();
466 }
467#endif /* CONFIG_PPC_SMLPAR */
468 } else {
469 current->min_flt++;
470 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
471 regs, address);
472 }
473 if (fault & VM_FAULT_RETRY) {
474 /* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
475 * of starvation. */
476 flags &= ~FAULT_FLAG_ALLOW_RETRY;
45cac65b 477 flags |= FAULT_FLAG_TRIED;
9be72573 478 goto retry;
40900194 479 }
ac17dc8e 480 }
9be72573 481
14cf11af 482 up_read(&mm->mmap_sem);
ba12eede 483 goto bail;
14cf11af
PM
484
485bad_area:
486 up_read(&mm->mmap_sem);
487
488bad_area_nosemaphore:
489 /* User mode accesses cause a SIGSEGV */
490 if (user_mode(regs)) {
491 _exception(SIGSEGV, regs, code, address);
ba12eede 492 goto bail;
14cf11af
PM
493 }
494
76462232
CD
495 if (is_exec && (error_code & DSISR_PROTFAULT))
496 printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
497 " page (%lx) - exploit attempt? (uid: %d)\n",
9e184e0a 498 address, from_kuid(&init_user_ns, current_uid()));
14cf11af 499
ba12eede
LZ
500 rc = SIGSEGV;
501
502bail:
503 exception_exit(prev_state);
504 return rc;
14cf11af 505
14cf11af
PM
506}
507
508/*
509 * bad_page_fault is called when we have a bad access from the kernel.
510 * It is called from the DSI and ISI handlers in head.S and from some
511 * of the procedures in traps.c.
512 */
513void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
514{
515 const struct exception_table_entry *entry;
516
517 /* Are we prepared to handle this fault? */
518 if ((entry = search_exception_tables(regs->nip)) != NULL) {
519 regs->nip = entry->fixup;
520 return;
521 }
522
523 /* kernel has accessed a bad area */
723925b7 524
723925b7 525 switch (regs->trap) {
a416dd8d
ME
526 case 0x300:
527 case 0x380:
528 printk(KERN_ALERT "Unable to handle kernel paging request for "
529 "data at address 0x%08lx\n", regs->dar);
530 break;
531 case 0x400:
532 case 0x480:
533 printk(KERN_ALERT "Unable to handle kernel paging request for "
534 "instruction fetch\n");
535 break;
536 default:
537 printk(KERN_ALERT "Unable to handle kernel paging request for "
538 "unknown fault\n");
539 break;
723925b7
OJ
540 }
541 printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
542 regs->nip);
543
a70857e4 544 if (task_stack_end_corrupted(current))
28b54990
AB
545 printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
546
14cf11af
PM
547 die("Kernel access of bad area", regs, sig);
548}
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