[deliverable/linux.git] / arch / powerpc / mm / fsl_booke_mmu.c

/*
 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
 * E500 Book E processors.
 *
 * Copyright 2004,2010 Freescale Semiconductor, Inc.
 *
 * This file contains the routines for initializing the MMU
 * on the 4xx series of chips.
 *  -- paulus
 *
 *  Derived from arch/ppc/mm/init.c:
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/highmem.h>
#include <linux/memblock.h>

#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/setup.h>
#include <asm/paca.h>

#include "mmu_decl.h"

unsigned int tlbcam_index;

#define NUM_TLBCAMS	(64)
struct tlbcam TLBCAM[NUM_TLBCAMS];

struct tlbcamrange {
	unsigned long start;
	unsigned long limit;
	phys_addr_t phys;
} tlbcam_addrs[NUM_TLBCAMS];

unsigned long tlbcam_sz(int idx)
{
	return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
}

#ifdef CONFIG_FSL_BOOKE
/*
 * Return PA for this VA if it is mapped by a CAM, or 0
 */
phys_addr_t v_block_mapped(unsigned long va)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
			return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	return 0;
}

/*
 * Return VA for a given PA or 0 if not mapped
 */
unsigned long p_block_mapped(phys_addr_t pa)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (pa >= tlbcam_addrs[b].phys
			&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
		              +tlbcam_addrs[b].phys)
			return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	return 0;
}
#endif

/*
 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
 * in particular size must be a power of 4 between 4k and the max supported by
 * an implementation; max may further be limited by what can be represented in
 * an unsigned long (for example, 32-bit implementations cannot support a 4GB
 * size).
 */
static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
		unsigned long size, unsigned long flags, unsigned int pid)
{
	unsigned int tsize;

	tsize = __ilog2(size) - 10;

#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
	if ((flags & _PAGE_NO_CACHE) == 0)
		flags |= _PAGE_COHERENT;
#endif

	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
	TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
	TLBCAM[index].MAS2 = virt & PAGE_MASK;

	TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;

	TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
	if (mmu_has_feature(MMU_FTR_BIG_PHYS))
		TLBCAM[index].MAS7 = (u64)phys >> 32;

	/* Below is unlikely -- only for large user pages or similar */
	if (pte_user(flags)) {
	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	}

	tlbcam_addrs[index].start = virt;
	tlbcam_addrs[index].limit = virt + size - 1;
	tlbcam_addrs[index].phys = phys;
}

unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
			  phys_addr_t phys)
{
	unsigned int camsize = __ilog2(ram);
	unsigned int align = __ffs(virt | phys);
	unsigned long max_cam;

	if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
		/* Convert (4^max) kB to (2^max) bytes */
		max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
		camsize &= ~1U;
		align &= ~1U;
	} else {
		/* Convert (2^max) kB to (2^max) bytes */
		max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
	}

	if (camsize > align)
		camsize = align;
	if (camsize > max_cam)
		camsize = max_cam;

	return 1UL << camsize;
}

static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
					unsigned long ram, int max_cam_idx,
					bool dryrun)
{
	int i;
	unsigned long amount_mapped = 0;

	/* Calculate CAM values */
	for (i = 0; ram && i < max_cam_idx; i++) {
		unsigned long cam_sz;

		cam_sz = calc_cam_sz(ram, virt, phys);
		if (!dryrun)
			settlbcam(i, virt, phys, cam_sz,
				  pgprot_val(PAGE_KERNEL_X), 0);

		ram -= cam_sz;
		amount_mapped += cam_sz;
		virt += cam_sz;
		phys += cam_sz;
	}

	if (dryrun)
		return amount_mapped;

	loadcam_multi(0, i, max_cam_idx);
	tlbcam_index = i;

#ifdef CONFIG_PPC64
	get_paca()->tcd.esel_next = i;
	get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
	get_paca()->tcd.esel_first = i;
#endif

	return amount_mapped;
}

unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun)
{
	unsigned long virt = PAGE_OFFSET;
	phys_addr_t phys = memstart_addr;

	return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun);
}

#ifdef CONFIG_PPC32

#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
#endif

unsigned long __init mmu_mapin_ram(unsigned long top)
{
	return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
}

/*
 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 */
void __init MMU_init_hw(void)
{
	flush_instruction_cache();
}

void __init adjust_total_lowmem(void)
{
	unsigned long ram;
	int i;

	/* adjust lowmem size to __max_low_memory */
	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);

	i = switch_to_as1();
	__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false);
	restore_to_as0(i, 0, 0, 1);

	pr_info("Memory CAM mapping: ");
	for (i = 0; i < tlbcam_index - 1; i++)
		pr_cont("%lu/", tlbcam_sz(i) >> 20);
	pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
	        (unsigned int)((total_lowmem - __max_low_memory) >> 20));

	memblock_set_current_limit(memstart_addr + __max_low_memory);
}

void setup_initial_memory_limit(phys_addr_t first_memblock_base,
				phys_addr_t first_memblock_size)
{
	phys_addr_t limit = first_memblock_base + first_memblock_size;

	/* 64M mapped initially according to head_fsl_booke.S */
	memblock_set_current_limit(min_t(u64, limit, 0x04000000));
}

#ifdef CONFIG_RELOCATABLE
int __initdata is_second_reloc;
notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
{
	unsigned long base = KERNELBASE;

	kernstart_addr = start;
	if (is_second_reloc) {
		virt_phys_offset = PAGE_OFFSET - memstart_addr;
		return;
	}

	/*
	 * Relocatable kernel support based on processing of dynamic
	 * relocation entries. Before we get the real memstart_addr,
	 * We will compute the virt_phys_offset like this:
	 * virt_phys_offset = stext.run - kernstart_addr
	 *
	 * stext.run = (KERNELBASE & ~0x3ffffff) +
	 *				(kernstart_addr & 0x3ffffff)
	 * When we relocate, we have :
	 *
	 *	(kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff)
	 *
	 * hence:
	 *  virt_phys_offset = (KERNELBASE & ~0x3ffffff) -
	 *                              (kernstart_addr & ~0x3ffffff)
	 *
	 */
	start &= ~0x3ffffff;
	base &= ~0x3ffffff;
	virt_phys_offset = base - start;
	early_get_first_memblock_info(__va(dt_ptr), NULL);
	/*
	 * We now get the memstart_addr, then we should check if this
	 * address is the same as what the PAGE_OFFSET map to now. If
	 * not we have to change the map of PAGE_OFFSET to memstart_addr
	 * and do a second relocation.
	 */
	if (start != memstart_addr) {
		int n;
		long offset = start - memstart_addr;

		is_second_reloc = 1;
		n = switch_to_as1();
		/* map a 64M area for the second relocation */
		if (memstart_addr > start)
			map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM,
					false);
		else
			map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
					0x4000000, CONFIG_LOWMEM_CAM_NUM,
					false);
		restore_to_as0(n, offset, __va(dt_ptr), 1);
		/* We should never reach here */
		panic("Relocation error");
	}
}
#endif
#endif
Commit	Line	Data
14cf11af	1	/*
4c8d3d99	2	* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af PM	3	* E500 Book E processors.
14cf11af PM	4	*
78f62237	5	* Copyright 2004,2010 Freescale Semiconductor, Inc.
14cf11af PM	6	*
	7	* This file contains the routines for initializing the MMU
	8	* on the 4xx series of chips.
	9	* -- paulus
	10	*
	11	* Derived from arch/ppc/mm/init.c:
	12	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	13	*
	14	* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
	15	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	16	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	17	*
	18	* Derived from "arch/i386/mm/init.c"
	19	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*
	26	*/
	27
14cf11af PM	28	#include <linux/signal.h>
	29	#include <linux/sched.h>
	30	#include <linux/kernel.h>
	31	#include <linux/errno.h>
	32	#include <linux/string.h>
	33	#include <linux/types.h>
	34	#include <linux/ptrace.h>
	35	#include <linux/mman.h>
	36	#include <linux/mm.h>
	37	#include <linux/swap.h>
	38	#include <linux/stddef.h>
	39	#include <linux/vmalloc.h>
	40	#include <linux/init.h>
	41	#include <linux/delay.h>
	42	#include <linux/highmem.h>
e63075a3	43	#include <linux/memblock.h>
14cf11af PM	44
	45	#include <asm/pgalloc.h>
	46	#include <asm/prom.h>
	47	#include <asm/io.h>
	48	#include <asm/mmu_context.h>
	49	#include <asm/pgtable.h>
	50	#include <asm/mmu.h>
	51	#include <asm/uaccess.h>
	52	#include <asm/smp.h>
14cf11af PM	53	#include <asm/machdep.h>
14cf11af PM	54	#include <asm/setup.h>
28efc35f	55	#include <asm/paca.h>
14cf11af	56
99c62dd7 KG	57	#include "mmu_decl.h"
99c62dd7 KG	58
14cf11af	59	unsigned int tlbcam_index;
14cf11af	60
78f62237 KG	61	#define NUM_TLBCAMS (64)
78f62237 KG	62	struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af PM	63
14cf11af PM	64	struct tlbcamrange {
8b27f0b6	65	unsigned long start;
14cf11af PM	66	unsigned long limit;
	67	phys_addr_t phys;
	68	} tlbcam_addrs[NUM_TLBCAMS];
	69
8b27f0b6 KG	70	unsigned long tlbcam_sz(int idx)
	71	{
	72	return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
	73	}
	74
3084cdb7	75	#ifdef CONFIG_FSL_BOOKE
14cf11af PM	76	/*
	77	* Return PA for this VA if it is mapped by a CAM, or 0
	78	*/
3084cdb7	79	phys_addr_t v_block_mapped(unsigned long va)
14cf11af PM	80	{
	81	int b;
	82	for (b = 0; b < tlbcam_index; ++b)
	83	if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
	84	return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	85	return 0;
	86	}
	87
	88	/*
	89	* Return VA for a given PA or 0 if not mapped
	90	*/
3084cdb7	91	unsigned long p_block_mapped(phys_addr_t pa)
14cf11af PM	92	{
	93	int b;
	94	for (b = 0; b < tlbcam_index; ++b)
	95	if (pa >= tlbcam_addrs[b].phys
8b27f0b6	96	&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
14cf11af PM	97	+tlbcam_addrs[b].phys)
	98	return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	99	return 0;
	100	}
3084cdb7	101	#endif
14cf11af PM	102
14cf11af PM	103	/*
d10ac373	104	* Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
4559424a BB	105	* in particular size must be a power of 4 between 4k and the max supported by
	106	* an implementation; max may further be limited by what can be represented in
	107	* an unsigned long (for example, 32-bit implementations cannot support a 4GB
	108	* size).
14cf11af	109	*/
8b27f0b6 KG	110	static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
8b27f0b6 KG	111	unsigned long size, unsigned long flags, unsigned int pid)
14cf11af	112	{
4559424a	113	unsigned int tsize;
14cf11af	114
4559424a	115	tsize = __ilog2(size) - 10;
14cf11af	116
c6023202	117	#if defined(CONFIG_SMP) \|\| defined(CONFIG_PPC_E500MC)
14cf11af PM	118	if ((flags & _PAGE_NO_CACHE) == 0)
	119	flags \|= _PAGE_COHERENT;
	120	#endif
	121
	122	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index) \| MAS0_NV(index+1);
	123	TLBCAM[index].MAS1 = MAS1_VALID \| MAS1_IPROT \| MAS1_TSIZE(tsize) \| MAS1_TID(pid);
	124	TLBCAM[index].MAS2 = virt & PAGE_MASK;
	125
	126	TLBCAM[index].MAS2 \|= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	127	TLBCAM[index].MAS2 \|= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	128	TLBCAM[index].MAS2 \|= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	129	TLBCAM[index].MAS2 \|= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	130	TLBCAM[index].MAS2 \|= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
	131
8b27f0b6	132	TLBCAM[index].MAS3 = (phys & MAS3_RPN) \| MAS3_SX \| MAS3_SR;
14cf11af	133	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_SW : 0);
e8137341	134	if (mmu_has_feature(MMU_FTR_BIG_PHYS))
8b27f0b6	135	TLBCAM[index].MAS7 = (u64)phys >> 32;
14cf11af	136
92437d41 PG	137	/* Below is unlikely -- only for large user pages or similar */
92437d41 PG	138	if (pte_user(flags)) {
14cf11af PM	139	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
	140	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	141	}
14cf11af PM	142
	143	tlbcam_addrs[index].start = virt;
	144	tlbcam_addrs[index].limit = virt + size - 1;
	145	tlbcam_addrs[index].phys = phys;
14cf11af PM	146	}
14cf11af PM	147
1dc91c3e KG	148	unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
	149	phys_addr_t phys)
	150	{
f0b8b341 KG	151	unsigned int camsize = __ilog2(ram);
	152	unsigned int align = __ffs(virt \| phys);
	153	unsigned long max_cam;
	154
	155	if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
	156	/* Convert (4^max) kB to (2^max) bytes */
	157	max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
	158	camsize &= ~1U;
	159	align &= ~1U;
	160	} else {
	161	/* Convert (2^max) kB to (2^max) bytes */
	162	max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
	163	}
1dc91c3e KG	164
	165	if (camsize > align)
	166	camsize = align;
	167	if (camsize > max_cam)
	168	camsize = max_cam;
	169
	170	return 1UL << camsize;
	171	}
	172
813125d8	173	static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
eba5de8d SW	174	unsigned long ram, int max_cam_idx,
eba5de8d SW	175	bool dryrun)
14cf11af	176	{
8b27f0b6	177	int i;
8b27f0b6	178	unsigned long amount_mapped = 0;
f88747e7	179
8b27f0b6 KG	180	/* Calculate CAM values */
8b27f0b6 KG	181	for (i = 0; ram && i < max_cam_idx; i++) {
8b27f0b6 KG	182	unsigned long cam_sz;
8b27f0b6 KG	183
1dc91c3e	184	cam_sz = calc_cam_sz(ram, virt, phys);
eba5de8d SW	185	if (!dryrun)
	186	settlbcam(i, virt, phys, cam_sz,
	187	pgprot_val(PAGE_KERNEL_X), 0);
8b27f0b6 KG	188
	189	ram -= cam_sz;
	190	amount_mapped += cam_sz;
	191	virt += cam_sz;
	192	phys += cam_sz;
14cf11af	193	}
d9e1831a	194
eba5de8d SW	195	if (dryrun)
	196	return amount_mapped;
	197
d9e1831a	198	loadcam_multi(0, i, max_cam_idx);
8b27f0b6 KG	199	tlbcam_index = i;
8b27f0b6 KG	200
28efc35f SW	201	#ifdef CONFIG_PPC64
	202	get_paca()->tcd.esel_next = i;
	203	get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
	204	get_paca()->tcd.esel_first = i;
	205	#endif
	206
8b27f0b6 KG	207	return amount_mapped;
8b27f0b6 KG	208	}
f88747e7	209
eba5de8d	210	unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun)
813125d8 KH	211	{
	212	unsigned long virt = PAGE_OFFSET;
	213	phys_addr_t phys = memstart_addr;
	214
eba5de8d	215	return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun);
813125d8 KH	216	}
813125d8 KH	217
55fd766b KG	218	#ifdef CONFIG_PPC32
	219
	220	#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
	221	#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
	222	#endif
	223
a73611b6	224	unsigned long __init mmu_mapin_ram(unsigned long top)
8b27f0b6 KG	225	{
8b27f0b6 KG	226	return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
14cf11af PM	227	}
	228
	229	/*
	230	* MMU_init_hw does the chip-specific initialization of the MMU hardware.
	231	*/
	232	void __init MMU_init_hw(void)
	233	{
	234	flush_instruction_cache();
	235	}
	236
8b27f0b6	237	void __init adjust_total_lowmem(void)
14cf11af	238	{
8b27f0b6	239	unsigned long ram;
f88747e7	240	int i;
14cf11af	241
f88747e7 TP	242	/* adjust lowmem size to __max_low_memory */
f88747e7 TP	243	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
14cf11af	244
78a235ef	245	i = switch_to_as1();
eba5de8d	246	__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false);
0be7d969	247	restore_to_as0(i, 0, 0, 1);
c8f3570b	248
8b27f0b6 KG	249	pr_info("Memory CAM mapping: ");
	250	for (i = 0; i < tlbcam_index - 1; i++)
	251	pr_cont("%lu/", tlbcam_sz(i) >> 20);
	252	pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
96a8bac5	253	(unsigned int)((total_lowmem - __max_low_memory) >> 20));
8b27f0b6	254
e63075a3	255	memblock_set_current_limit(memstart_addr + __max_low_memory);
14cf11af	256	}
cd3db0c4 BH	257
	258	void setup_initial_memory_limit(phys_addr_t first_memblock_base,
	259	phys_addr_t first_memblock_size)
	260	{
	261	phys_addr_t limit = first_memblock_base + first_memblock_size;
	262
	263	/* 64M mapped initially according to head_fsl_booke.S */
	264	memblock_set_current_limit(min_t(u64, limit, 0x04000000));
	265	}
dd189692 KH	266
dd189692 KH	267	#ifdef CONFIG_RELOCATABLE
7d2471f9 KH	268	int __initdata is_second_reloc;
7d2471f9 KH	269	notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
dd189692 KH	270	{
	271	unsigned long base = KERNELBASE;
	272
7d2471f9 KH	273	kernstart_addr = start;
	274	if (is_second_reloc) {
	275	virt_phys_offset = PAGE_OFFSET - memstart_addr;
	276	return;
	277	}
	278
dd189692 KH	279	/*
dd189692 KH	280	* Relocatable kernel support based on processing of dynamic
7d2471f9 KH	281	* relocation entries. Before we get the real memstart_addr,
7d2471f9 KH	282	* We will compute the virt_phys_offset like this:
dd189692 KH	283	* virt_phys_offset = stext.run - kernstart_addr
dd189692 KH	284	*
7d2471f9 KH	285	* stext.run = (KERNELBASE & ~0x3ffffff) +
7d2471f9 KH	286	* (kernstart_addr & 0x3ffffff)
dd189692 KH	287	* When we relocate, we have :
	288	*
	289	* (kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff)
	290	*
	291	* hence:
	292	* virt_phys_offset = (KERNELBASE & ~0x3ffffff) -
	293	* (kernstart_addr & ~0x3ffffff)
	294	*
	295	*/
dd189692 KH	296	start &= ~0x3ffffff;
	297	base &= ~0x3ffffff;
	298	virt_phys_offset = base - start;
7d2471f9 KH	299	early_get_first_memblock_info(__va(dt_ptr), NULL);
	300	/*
	301	* We now get the memstart_addr, then we should check if this
	302	* address is the same as what the PAGE_OFFSET map to now. If
	303	* not we have to change the map of PAGE_OFFSET to memstart_addr
	304	* and do a second relocation.
	305	*/
	306	if (start != memstart_addr) {
	307	int n;
	308	long offset = start - memstart_addr;
	309
	310	is_second_reloc = 1;
	311	n = switch_to_as1();
	312	/* map a 64M area for the second relocation */
	313	if (memstart_addr > start)
eba5de8d SW	314	map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM,
eba5de8d SW	315	false);
7d2471f9 KH	316	else
7d2471f9 KH	317	map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
eba5de8d SW	318	0x4000000, CONFIG_LOWMEM_CAM_NUM,
eba5de8d SW	319	false);
0be7d969	320	restore_to_as0(n, offset, __va(dt_ptr), 1);
7d2471f9 KH	321	/* We should never reach here */
	322	panic("Relocation error");
	323	}
dd189692 KH	324	}
dd189692 KH	325	#endif
55fd766b	326	#endif