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powerpc/fsl-booke: Allow larger CAM sizes than 256 MB
[deliverable/linux.git] / arch / powerpc / mm / fsl_booke_mmu.c
CommitLineData
14cf11af 1/*
4c8d3d99 2 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af
PM		 3 * E500 Book E processors.
4 *
5 * Copyright 2004 Freescale Semiconductor, Inc
6 *
7 * This file contains the routines for initializing the MMU
8 * on the 4xx series of chips.
9 * -- paulus
10 *
11 * Derived from arch/ppc/mm/init.c:
12 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
13 *
14 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
15 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
16 * Copyright (C) 1996 Paul Mackerras
14cf11af
PM		 17 *
18 * Derived from "arch/i386/mm/init.c"
19 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
20 *
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
25 *
26 */
27
14cf11af
PM		 28#include <linux/signal.h>
29#include <linux/sched.h>
30#include <linux/kernel.h>
31#include <linux/errno.h>
32#include <linux/string.h>
33#include <linux/types.h>
34#include <linux/ptrace.h>
35#include <linux/mman.h>
36#include <linux/mm.h>
37#include <linux/swap.h>
38#include <linux/stddef.h>
39#include <linux/vmalloc.h>
40#include <linux/init.h>
41#include <linux/delay.h>
42#include <linux/highmem.h>
43
44#include <asm/pgalloc.h>
45#include <asm/prom.h>
46#include <asm/io.h>
47#include <asm/mmu_context.h>
48#include <asm/pgtable.h>
49#include <asm/mmu.h>
50#include <asm/uaccess.h>
51#include <asm/smp.h>
14cf11af
PM		 52#include <asm/machdep.h>
53#include <asm/setup.h>
54
99c62dd7
KG		 55#include "mmu_decl.h"
56
14cf11af
PM		 57extern void loadcam_entry(unsigned int index);
58unsigned int tlbcam_index;
f88747e7 59static unsigned long cam[3];
14cf11af
PM		 60
61#define NUM_TLBCAMS (16)
62
19f5465e 63struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af
PM		 64
65struct tlbcamrange {
66 unsigned long start;
67 unsigned long limit;
68 phys_addr_t phys;
69} tlbcam_addrs[NUM_TLBCAMS];
70
71extern unsigned int tlbcam_index;
72
73/*
74 * Return PA for this VA if it is mapped by a CAM, or 0
75 */
76unsigned long v_mapped_by_tlbcam(unsigned long va)
77{
78 int b;
79 for (b = 0; b < tlbcam_index; ++b)
80 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
81 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
82 return 0;
83}
84
85/*
86 * Return VA for a given PA or 0 if not mapped
87 */
88unsigned long p_mapped_by_tlbcam(unsigned long pa)
89{
90 int b;
91 for (b = 0; b < tlbcam_index; ++b)
92 if (pa >= tlbcam_addrs[b].phys
93 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
94 +tlbcam_addrs[b].phys)
95 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
96 return 0;
97}
98
99/*
100 * Set up one of the I/D BAT (block address translation) register pairs.
101 * The parameters are not checked; in particular size must be a power
102 * of 4 between 4k and 256M.
103 */
104void settlbcam(int index, unsigned long virt, phys_addr_t phys,
105 unsigned int size, int flags, unsigned int pid)
106{
107 unsigned int tsize, lz;
108
109 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
110 tsize = (21 - lz) / 2;
111
112#ifdef CONFIG_SMP
113 if ((flags & _PAGE_NO_CACHE) == 0)
114 flags |= _PAGE_COHERENT;
115#endif
116
117 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
118 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
119 TLBCAM[index].MAS2 = virt & PAGE_MASK;
120
121 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
122 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
123 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
124 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
125 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
126
127 TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
128 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
129
130#ifndef CONFIG_KGDB /* want user access for breakpoints */
131 if (flags & _PAGE_USER) {
132 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
133 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
134 }
135#else
136 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
137 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
138#endif
139
140 tlbcam_addrs[index].start = virt;
141 tlbcam_addrs[index].limit = virt + size - 1;
142 tlbcam_addrs[index].phys = phys;
143
144 loadcam_entry(index);
145}
146
147void invalidate_tlbcam_entry(int index)
148{
149 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
150 TLBCAM[index].MAS1 = ~MAS1_VALID;
151
152 loadcam_entry(index);
153}
154
f88747e7 155unsigned long __init mmu_mapin_ram(void)
14cf11af 156{
f88747e7
TP		 157 unsigned long virt = PAGE_OFFSET;
158 phys_addr_t phys = memstart_addr;
159
160 while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
161 settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
162 virt += cam[tlbcam_index];
163 phys += cam[tlbcam_index];
14cf11af 164 tlbcam_index++;
14cf11af 165 }
f88747e7
TP		 166
167 return virt - PAGE_OFFSET;
14cf11af
PM		 168}
169
170/*
171 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
172 */
173void __init MMU_init_hw(void)
174{
175 flush_instruction_cache();
176}
177
14cf11af
PM		 178void __init
179adjust_total_lowmem(void)
180{
0aef996b 181 phys_addr_t ram;
c8f3570b 182 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
f88747e7
TP		 183 char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
184 int i;
c8f3570b
TP		 185 unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
186 unsigned long phys = memstart_addr & 0xffffffffUL;
187
188 /* Convert (4^max) kB to (2^max) bytes */
189 max_cam = max_cam * 2 + 10;
14cf11af 190
f88747e7
TP		 191 /* adjust lowmem size to __max_low_memory */
192 ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
14cf11af
PM		 193
194 /* Calculate CAM values */
f88747e7
TP		 195 __max_low_memory = 0;
196 for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
197 unsigned int camsize = __ilog2(ram) & ~1U;
c8f3570b
TP		 198 unsigned int align = __ffs(virt | phys) & ~1U;
199
200 if (camsize > align)
201 camsize = align;
f88747e7
TP		 202 if (camsize > max_cam)
203 camsize = max_cam;
c8f3570b 204
f88747e7
TP		 205 cam[i] = 1UL << camsize;
206 ram -= cam[i];
207 __max_low_memory += cam[i];
c8f3570b
TP		 208 virt += cam[i];
209 phys += cam[i];
f88747e7
TP		 210
211 p += sprintf(p, "%lu/", cam[i] >> 20);
14cf11af 212 }
f88747e7
TP		 213 for (; i < ARRAY_SIZE(cam); i++)
214 p += sprintf(p, "0/");
215 p[-1] = '\0';
14cf11af 216
f88747e7
TP		 217 pr_info("Memory CAM mapping: %s Mb, residual: %ldMb\n", buf,
218 (total_lowmem - __max_low_memory) >> 20);
09b5e63f 219 __initial_memory_limit_addr = memstart_addr + __max_low_memory;
14cf11af 220}
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