[deliverable/linux.git] / arch / powerpc / mm / fsl_booke_mmu.c

/*
 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
 * E500 Book E processors.
 *
 * Copyright 2004 Freescale Semiconductor, Inc
 *
 * This file contains the routines for initializing the MMU
 * on the 4xx series of chips.
 *  -- paulus
 *
 *  Derived from arch/ppc/mm/init.c:
 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
 *
 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
 *    Copyright (C) 1996 Paul Mackerras
 *
 *  Derived from "arch/i386/mm/init.c"
 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 */

#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/stddef.h>
#include <linux/vmalloc.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/highmem.h>

#include <asm/pgalloc.h>
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/mmu_context.h>
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
#include <asm/machdep.h>
#include <asm/setup.h>

#include "mmu_decl.h"

extern void loadcam_entry(unsigned int index);
unsigned int tlbcam_index;
static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];

#define NUM_TLBCAMS	(16)

#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
#endif

struct tlbcam TLBCAM[NUM_TLBCAMS];

struct tlbcamrange {
   	unsigned long start;
	unsigned long limit;
	phys_addr_t phys;
} tlbcam_addrs[NUM_TLBCAMS];

extern unsigned int tlbcam_index;

/*
 * Return PA for this VA if it is mapped by a CAM, or 0
 */
phys_addr_t v_mapped_by_tlbcam(unsigned long va)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
			return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	return 0;
}

/*
 * Return VA for a given PA or 0 if not mapped
 */
unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
{
	int b;
	for (b = 0; b < tlbcam_index; ++b)
		if (pa >= tlbcam_addrs[b].phys
	    	    && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
		              +tlbcam_addrs[b].phys)
			return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	return 0;
}

/*
 * Set up one of the I/D BAT (block address translation) register pairs.
 * The parameters are not checked; in particular size must be a power
 * of 4 between 4k and 256M.
 */
void settlbcam(int index, unsigned long virt, phys_addr_t phys,
		unsigned int size, int flags, unsigned int pid)
{
	unsigned int tsize, lz;

	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
	tsize = 21 - lz;

#ifdef CONFIG_SMP
	if ((flags & _PAGE_NO_CACHE) == 0)
		flags |= _PAGE_COHERENT;
#endif

	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
	TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
	TLBCAM[index].MAS2 = virt & PAGE_MASK;

	TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;

	TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);

#ifndef CONFIG_KGDB /* want user access for breakpoints */
	if (flags & _PAGE_USER) {
	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	}
#else
	TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
#endif

	tlbcam_addrs[index].start = virt;
	tlbcam_addrs[index].limit = virt + size - 1;
	tlbcam_addrs[index].phys = phys;

	loadcam_entry(index);
}

void invalidate_tlbcam_entry(int index)
{
	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
	TLBCAM[index].MAS1 = ~MAS1_VALID;

	loadcam_entry(index);
}

unsigned long __init mmu_mapin_ram(void)
{
	unsigned long virt = PAGE_OFFSET;
	phys_addr_t phys = memstart_addr;

	while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
		settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
		virt += cam[tlbcam_index];
		phys += cam[tlbcam_index];
		tlbcam_index++;
	}

	return virt - PAGE_OFFSET;
}

/*
 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
 */
void __init MMU_init_hw(void)
{
	flush_instruction_cache();
}

void __init
adjust_total_lowmem(void)
{
	phys_addr_t ram;
	unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
	char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
	int i;
	unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
	unsigned long phys = memstart_addr & 0xffffffffUL;

	/* Convert (4^max) kB to (2^max) bytes */
	max_cam = max_cam * 2 + 10;

	/* adjust lowmem size to __max_low_memory */
	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);

	/* Calculate CAM values */
	__max_low_memory = 0;
	for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
		unsigned int camsize = __ilog2(ram) & ~1U;
		unsigned int align = __ffs(virt | phys) & ~1U;

		if (camsize > align)
			camsize = align;
		if (camsize > max_cam)
			camsize = max_cam;

		cam[i] = 1UL << camsize;
		ram -= cam[i];
		__max_low_memory += cam[i];
		virt += cam[i];
		phys += cam[i];

		p += sprintf(p, "%lu/", cam[i] >> 20);
	}
	for (; i < ARRAY_SIZE(cam); i++)
		p += sprintf(p, "0/");
	p[-1] = '\0';

	pr_info("Memory CAM mapping: %s Mb, residual: %ldMb\n", buf,
	        (total_lowmem - __max_low_memory) >> 20);
	__initial_memory_limit_addr = memstart_addr + __max_low_memory;
}
Commit	Line	Data
14cf11af	1	/*
4c8d3d99	2	* Modifications by Kumar Gala (galak@kernel.crashing.org) to support
14cf11af PM	3	* E500 Book E processors.
	4	*
	5	* Copyright 2004 Freescale Semiconductor, Inc
	6	*
	7	* This file contains the routines for initializing the MMU
	8	* on the 4xx series of chips.
	9	* -- paulus
	10	*
	11	* Derived from arch/ppc/mm/init.c:
	12	* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
	13	*
	14	* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
	15	* and Cort Dougan (PReP) (cort@cs.nmt.edu)
	16	* Copyright (C) 1996 Paul Mackerras
14cf11af PM	17	*
	18	* Derived from "arch/i386/mm/init.c"
	19	* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
	20	*
	21	* This program is free software; you can redistribute it and/or
	22	* modify it under the terms of the GNU General Public License
	23	* as published by the Free Software Foundation; either version
	24	* 2 of the License, or (at your option) any later version.
	25	*
	26	*/
	27
14cf11af PM	28	#include <linux/signal.h>
	29	#include <linux/sched.h>
	30	#include <linux/kernel.h>
	31	#include <linux/errno.h>
	32	#include <linux/string.h>
	33	#include <linux/types.h>
	34	#include <linux/ptrace.h>
	35	#include <linux/mman.h>
	36	#include <linux/mm.h>
	37	#include <linux/swap.h>
	38	#include <linux/stddef.h>
	39	#include <linux/vmalloc.h>
	40	#include <linux/init.h>
	41	#include <linux/delay.h>
	42	#include <linux/highmem.h>
	43
	44	#include <asm/pgalloc.h>
	45	#include <asm/prom.h>
	46	#include <asm/io.h>
	47	#include <asm/mmu_context.h>
	48	#include <asm/pgtable.h>
	49	#include <asm/mmu.h>
	50	#include <asm/uaccess.h>
	51	#include <asm/smp.h>
14cf11af PM	52	#include <asm/machdep.h>
	53	#include <asm/setup.h>
	54
99c62dd7 KG	55	#include "mmu_decl.h"
99c62dd7 KG	56
14cf11af PM	57	extern void loadcam_entry(unsigned int index);
14cf11af PM	58	unsigned int tlbcam_index;
96051465	59	static unsigned long cam[CONFIG_LOWMEM_CAM_NUM];
14cf11af PM	60
	61	#define NUM_TLBCAMS (16)
	62
96051465 TP	63	#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
	64	#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
	65	#endif
	66
19f5465e	67	struct tlbcam TLBCAM[NUM_TLBCAMS];
14cf11af PM	68
	69	struct tlbcamrange {
	70	unsigned long start;
	71	unsigned long limit;
	72	phys_addr_t phys;
	73	} tlbcam_addrs[NUM_TLBCAMS];
	74
	75	extern unsigned int tlbcam_index;
	76
	77	/*
	78	* Return PA for this VA if it is mapped by a CAM, or 0
	79	*/
6c24b174	80	phys_addr_t v_mapped_by_tlbcam(unsigned long va)
14cf11af PM	81	{
	82	int b;
	83	for (b = 0; b < tlbcam_index; ++b)
	84	if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
	85	return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
	86	return 0;
	87	}
	88
	89	/*
	90	* Return VA for a given PA or 0 if not mapped
	91	*/
6c24b174	92	unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
14cf11af PM	93	{
	94	int b;
	95	for (b = 0; b < tlbcam_index; ++b)
	96	if (pa >= tlbcam_addrs[b].phys
	97	&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
	98	+tlbcam_addrs[b].phys)
	99	return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
	100	return 0;
	101	}
	102
	103	/*
	104	* Set up one of the I/D BAT (block address translation) register pairs.
	105	* The parameters are not checked; in particular size must be a power
	106	* of 4 between 4k and 256M.
	107	*/
	108	void settlbcam(int index, unsigned long virt, phys_addr_t phys,
	109	unsigned int size, int flags, unsigned int pid)
	110	{
	111	unsigned int tsize, lz;
	112
	113	asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
d66c82ea	114	tsize = 21 - lz;
14cf11af PM	115
	116	#ifdef CONFIG_SMP
	117	if ((flags & _PAGE_NO_CACHE) == 0)
	118	flags \|= _PAGE_COHERENT;
	119	#endif
	120
	121	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index) \| MAS0_NV(index+1);
	122	TLBCAM[index].MAS1 = MAS1_VALID \| MAS1_IPROT \| MAS1_TSIZE(tsize) \| MAS1_TID(pid);
	123	TLBCAM[index].MAS2 = virt & PAGE_MASK;
	124
	125	TLBCAM[index].MAS2 \|= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
	126	TLBCAM[index].MAS2 \|= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
	127	TLBCAM[index].MAS2 \|= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
	128	TLBCAM[index].MAS2 \|= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
	129	TLBCAM[index].MAS2 \|= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
	130
	131	TLBCAM[index].MAS3 = (phys & PAGE_MASK) \| MAS3_SX \| MAS3_SR;
	132	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_SW : 0);
	133
	134	#ifndef CONFIG_KGDB /* want user access for breakpoints */
	135	if (flags & _PAGE_USER) {
	136	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
	137	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	138	}
	139	#else
	140	TLBCAM[index].MAS3 \|= MAS3_UX \| MAS3_UR;
	141	TLBCAM[index].MAS3 \|= ((flags & _PAGE_RW) ? MAS3_UW : 0);
	142	#endif
	143
	144	tlbcam_addrs[index].start = virt;
	145	tlbcam_addrs[index].limit = virt + size - 1;
	146	tlbcam_addrs[index].phys = phys;
	147
	148	loadcam_entry(index);
	149	}
	150
	151	void invalidate_tlbcam_entry(int index)
	152	{
	153	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) \| MAS0_ESEL(index);
	154	TLBCAM[index].MAS1 = ~MAS1_VALID;
	155
	156	loadcam_entry(index);
	157	}
	158
f88747e7	159	unsigned long __init mmu_mapin_ram(void)
14cf11af	160	{
f88747e7 TP	161	unsigned long virt = PAGE_OFFSET;
	162	phys_addr_t phys = memstart_addr;
	163
	164	while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) {
	165	settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], _PAGE_KERNEL, 0);
	166	virt += cam[tlbcam_index];
	167	phys += cam[tlbcam_index];
14cf11af	168	tlbcam_index++;
14cf11af	169	}
f88747e7 TP	170
f88747e7 TP	171	return virt - PAGE_OFFSET;
14cf11af PM	172	}
	173
	174	/*
	175	* MMU_init_hw does the chip-specific initialization of the MMU hardware.
	176	*/
	177	void __init MMU_init_hw(void)
	178	{
	179	flush_instruction_cache();
	180	}
	181
14cf11af PM	182	void __init
	183	adjust_total_lowmem(void)
	184	{
0aef996b	185	phys_addr_t ram;
c8f3570b	186	unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
f88747e7 TP	187	char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf;
f88747e7 TP	188	int i;
c8f3570b TP	189	unsigned long virt = PAGE_OFFSET & 0xffffffffUL;
c8f3570b TP	190	unsigned long phys = memstart_addr & 0xffffffffUL;
14cf11af	191
c8f3570b TP	192	/* Convert (4^max) kB to (2^max) bytes */
c8f3570b TP	193	max_cam = max_cam * 2 + 10;
14cf11af	194
f88747e7 TP	195	/* adjust lowmem size to __max_low_memory */
f88747e7 TP	196	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
14cf11af PM	197
14cf11af PM	198	/* Calculate CAM values */
f88747e7 TP	199	__max_low_memory = 0;
	200	for (i = 0; ram && i < ARRAY_SIZE(cam); i++) {
	201	unsigned int camsize = __ilog2(ram) & ~1U;
c8f3570b TP	202	unsigned int align = __ffs(virt \| phys) & ~1U;
	203
	204	if (camsize > align)
	205	camsize = align;
f88747e7 TP	206	if (camsize > max_cam)
f88747e7 TP	207	camsize = max_cam;
c8f3570b	208
f88747e7 TP	209	cam[i] = 1UL << camsize;
	210	ram -= cam[i];
	211	__max_low_memory += cam[i];
c8f3570b TP	212	virt += cam[i];
c8f3570b TP	213	phys += cam[i];
f88747e7 TP	214
f88747e7 TP	215	p += sprintf(p, "%lu/", cam[i] >> 20);
14cf11af	216	}
f88747e7 TP	217	for (; i < ARRAY_SIZE(cam); i++)
	218	p += sprintf(p, "0/");
	219	p[-1] = '\0';
14cf11af	220
f88747e7 TP	221	pr_info("Memory CAM mapping: %s Mb, residual: %ldMb\n", buf,
f88747e7 TP	222	(total_lowmem - __max_low_memory) >> 20);
09b5e63f	223	__initial_memory_limit_addr = memstart_addr + __max_low_memory;
14cf11af	224	}