Merge branch 'for-2.6.24' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerp...
[deliverable/linux.git] / arch / powerpc / mm / mem.c
CommitLineData
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1/*
2 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
6 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
7 * Copyright (C) 1996 Paul Mackerras
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8 * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
9 *
10 * Derived from "arch/i386/mm/init.c"
11 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 *
18 */
19
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20#include <linux/module.h>
21#include <linux/sched.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/init.h>
29#include <linux/bootmem.h>
30#include <linux/highmem.h>
31#include <linux/initrd.h>
32#include <linux/pagemap.h>
4e8ad3e8 33#include <linux/suspend.h>
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34
35#include <asm/pgalloc.h>
36#include <asm/prom.h>
37#include <asm/io.h>
38#include <asm/mmu_context.h>
39#include <asm/pgtable.h>
40#include <asm/mmu.h>
41#include <asm/smp.h>
42#include <asm/machdep.h>
43#include <asm/btext.h>
44#include <asm/tlb.h>
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45#include <asm/lmb.h>
46#include <asm/sections.h>
ab1f9dac 47#include <asm/vdso.h>
14cf11af 48
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49#include "mmu_decl.h"
50
51#ifndef CPU_FTR_COHERENT_ICACHE
52#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */
53#define CPU_FTR_NOEXECUTE 0
54#endif
55
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56int init_bootmem_done;
57int mem_init_done;
cf00a8d1 58unsigned long memory_limit;
7c8c6b97 59
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60int page_is_ram(unsigned long pfn)
61{
62 unsigned long paddr = (pfn << PAGE_SHIFT);
63
64#ifndef CONFIG_PPC64 /* XXX for now */
65 return paddr < __pa(high_memory);
66#else
67 int i;
68 for (i=0; i < lmb.memory.cnt; i++) {
69 unsigned long base;
70
71 base = lmb.memory.region[i].base;
72
73 if ((paddr >= base) &&
74 (paddr < (base + lmb.memory.region[i].size))) {
75 return 1;
76 }
77 }
78
79 return 0;
80#endif
81}
14cf11af 82
8b150478 83pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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84 unsigned long size, pgprot_t vma_prot)
85{
86 if (ppc_md.phys_mem_access_prot)
8b150478 87 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
14cf11af 88
8b150478 89 if (!page_is_ram(pfn))
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90 vma_prot = __pgprot(pgprot_val(vma_prot)
91 | _PAGE_GUARDED | _PAGE_NO_CACHE);
92 return vma_prot;
93}
94EXPORT_SYMBOL(phys_mem_access_prot);
95
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96#ifdef CONFIG_MEMORY_HOTPLUG
97
98void online_page(struct page *page)
99{
100 ClearPageReserved(page);
7835e98b 101 init_page_count(page);
70dc991d 102 __free_page(page);
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103 totalram_pages++;
104 num_physpages++;
105}
106
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107#ifdef CONFIG_NUMA
108int memory_add_physaddr_to_nid(u64 start)
109{
110 return hot_add_scn_to_nid(start);
111}
112#endif
113
114int __devinit arch_add_memory(int nid, u64 start, u64 size)
23fd0775 115{
237a0989 116 struct pglist_data *pgdata;
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117 struct zone *zone;
118 unsigned long start_pfn = start >> PAGE_SHIFT;
119 unsigned long nr_pages = size >> PAGE_SHIFT;
120
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121 pgdata = NODE_DATA(nid);
122
2d0eee14 123 start = (unsigned long)__va(start);
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124 create_section_mapping(start, start + size);
125
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126 /* this should work for most non-highmem platforms */
127 zone = pgdata->node_zones;
128
129 return __add_pages(zone, start_pfn, nr_pages);
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130}
131
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132#endif /* CONFIG_MEMORY_HOTPLUG */
133
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134void show_mem(void)
135{
136 unsigned long total = 0, reserved = 0;
137 unsigned long shared = 0, cached = 0;
138 unsigned long highmem = 0;
139 struct page *page;
140 pg_data_t *pgdat;
141 unsigned long i;
142
143 printk("Mem-info:\n");
144 show_free_areas();
145 printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
ec936fc5 146 for_each_online_pgdat(pgdat) {
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147 unsigned long flags;
148 pgdat_resize_lock(pgdat, &flags);
14cf11af 149 for (i = 0; i < pgdat->node_spanned_pages; i++) {
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150 if (!pfn_valid(pgdat->node_start_pfn + i))
151 continue;
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152 page = pgdat_page_nr(pgdat, i);
153 total++;
154 if (PageHighMem(page))
155 highmem++;
156 if (PageReserved(page))
157 reserved++;
158 else if (PageSwapCache(page))
159 cached++;
160 else if (page_count(page))
161 shared += page_count(page) - 1;
162 }
23fd0775 163 pgdat_resize_unlock(pgdat, &flags);
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164 }
165 printk("%ld pages of RAM\n", total);
166#ifdef CONFIG_HIGHMEM
167 printk("%ld pages of HIGHMEM\n", highmem);
168#endif
169 printk("%ld reserved pages\n", reserved);
170 printk("%ld pages shared\n", shared);
171 printk("%ld pages swap cached\n", cached);
172}
173
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174/*
175 * Initialize the bootmem system and give it all the memory we
176 * have available. If we are using highmem, we only put the
177 * lowmem into the bootmem system.
178 */
179#ifndef CONFIG_NEED_MULTIPLE_NODES
180void __init do_init_bootmem(void)
181{
182 unsigned long i;
183 unsigned long start, bootmap_pages;
184 unsigned long total_pages;
185 int boot_mapsize;
186
187 max_pfn = total_pages = lmb_end_of_DRAM() >> PAGE_SHIFT;
188#ifdef CONFIG_HIGHMEM
189 total_pages = total_lowmem >> PAGE_SHIFT;
190#endif
191
192 /*
193 * Find an area to use for the bootmem bitmap. Calculate the size of
194 * bitmap required as (Total Memory) / PAGE_SIZE / BITS_PER_BYTE.
195 * Add 1 additional page in case the address isn't page-aligned.
196 */
197 bootmap_pages = bootmem_bootmap_pages(total_pages);
198
199 start = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
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200
201 boot_mapsize = init_bootmem(start >> PAGE_SHIFT, total_pages);
202
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203 /* Add active regions with valid PFNs */
204 for (i = 0; i < lmb.memory.cnt; i++) {
205 unsigned long start_pfn, end_pfn;
206 start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
207 end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
208 add_active_range(0, start_pfn, end_pfn);
209 }
210
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211 /* Add all physical memory to the bootmem map, mark each area
212 * present.
213 */
7c8c6b97 214#ifdef CONFIG_HIGHMEM
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215 free_bootmem_with_active_regions(0, total_lowmem >> PAGE_SHIFT);
216#else
217 free_bootmem_with_active_regions(0, max_pfn);
7c8c6b97 218#endif
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219
220 /* reserve the sections we're already using */
221 for (i = 0; i < lmb.reserved.cnt; i++)
222 reserve_bootmem(lmb.reserved.region[i].base,
223 lmb_size_bytes(&lmb.reserved, i));
224
225 /* XXX need to clip this if using highmem? */
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226 sparse_memory_present_with_active_regions(0);
227
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228 init_bootmem_done = 1;
229}
230
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231/* mark pages that don't exist as nosave */
232static int __init mark_nonram_nosave(void)
233{
234 unsigned long lmb_next_region_start_pfn,
235 lmb_region_max_pfn;
236 int i;
237
238 for (i = 0; i < lmb.memory.cnt - 1; i++) {
239 lmb_region_max_pfn =
240 (lmb.memory.region[i].base >> PAGE_SHIFT) +
241 (lmb.memory.region[i].size >> PAGE_SHIFT);
242 lmb_next_region_start_pfn =
243 lmb.memory.region[i+1].base >> PAGE_SHIFT;
244
245 if (lmb_region_max_pfn < lmb_next_region_start_pfn)
246 register_nosave_region(lmb_region_max_pfn,
247 lmb_next_region_start_pfn);
248 }
249
250 return 0;
251}
252
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253/*
254 * paging_init() sets up the page tables - in fact we've already done this.
255 */
256void __init paging_init(void)
257{
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258 unsigned long total_ram = lmb_phys_mem_size();
259 unsigned long top_of_ram = lmb_end_of_DRAM();
c67c3cb4 260 unsigned long max_zone_pfns[MAX_NR_ZONES];
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261
262#ifdef CONFIG_HIGHMEM
263 map_page(PKMAP_BASE, 0, 0); /* XXX gross */
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264 pkmap_page_table = pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k
265 (PKMAP_BASE), PKMAP_BASE), PKMAP_BASE), PKMAP_BASE);
7c8c6b97 266 map_page(KMAP_FIX_BEGIN, 0, 0); /* XXX gross */
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267 kmap_pte = pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k
268 (KMAP_FIX_BEGIN), KMAP_FIX_BEGIN), KMAP_FIX_BEGIN),
269 KMAP_FIX_BEGIN);
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270 kmap_prot = PAGE_KERNEL;
271#endif /* CONFIG_HIGHMEM */
272
e110b281 273 printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
7c8c6b97 274 top_of_ram, total_ram);
e110b281 275 printk(KERN_DEBUG "Memory hole size: %ldMB\n",
7c8c6b97 276 (top_of_ram - total_ram) >> 20);
6391af17 277 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
7c8c6b97 278#ifdef CONFIG_HIGHMEM
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279 max_zone_pfns[ZONE_DMA] = total_lowmem >> PAGE_SHIFT;
280 max_zone_pfns[ZONE_HIGHMEM] = top_of_ram >> PAGE_SHIFT;
7c8c6b97 281#else
6391af17 282 max_zone_pfns[ZONE_DMA] = top_of_ram >> PAGE_SHIFT;
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283#endif
284 free_area_init_nodes(max_zone_pfns);
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285
286 mark_nonram_nosave();
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287}
288#endif /* ! CONFIG_NEED_MULTIPLE_NODES */
289
290void __init mem_init(void)
291{
292#ifdef CONFIG_NEED_MULTIPLE_NODES
293 int nid;
294#endif
295 pg_data_t *pgdat;
296 unsigned long i;
297 struct page *page;
298 unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
299
fb6d73d3 300 num_physpages = lmb.memory.size >> PAGE_SHIFT;
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301 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
302
303#ifdef CONFIG_NEED_MULTIPLE_NODES
304 for_each_online_node(nid) {
305 if (NODE_DATA(nid)->node_spanned_pages != 0) {
c258dd40 306 printk("freeing bootmem node %d\n", nid);
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307 totalram_pages +=
308 free_all_bootmem_node(NODE_DATA(nid));
309 }
310 }
311#else
fb6d73d3 312 max_mapnr = max_pfn;
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313 totalram_pages += free_all_bootmem();
314#endif
ec936fc5 315 for_each_online_pgdat(pgdat) {
7c8c6b97 316 for (i = 0; i < pgdat->node_spanned_pages; i++) {
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317 if (!pfn_valid(pgdat->node_start_pfn + i))
318 continue;
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319 page = pgdat_page_nr(pgdat, i);
320 if (PageReserved(page))
321 reservedpages++;
322 }
323 }
324
325 codesize = (unsigned long)&_sdata - (unsigned long)&_stext;
bcb35576 326 datasize = (unsigned long)&_edata - (unsigned long)&_sdata;
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327 initsize = (unsigned long)&__init_end - (unsigned long)&__init_begin;
328 bsssize = (unsigned long)&__bss_stop - (unsigned long)&__bss_start;
329
330#ifdef CONFIG_HIGHMEM
331 {
332 unsigned long pfn, highmem_mapnr;
333
334 highmem_mapnr = total_lowmem >> PAGE_SHIFT;
335 for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
336 struct page *page = pfn_to_page(pfn);
337
338 ClearPageReserved(page);
7835e98b 339 init_page_count(page);
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340 __free_page(page);
341 totalhigh_pages++;
342 }
343 totalram_pages += totalhigh_pages;
e110b281 344 printk(KERN_DEBUG "High memory: %luk\n",
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345 totalhigh_pages << (PAGE_SHIFT-10));
346 }
347#endif /* CONFIG_HIGHMEM */
348
349 printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, "
350 "%luk reserved, %luk data, %luk bss, %luk init)\n",
351 (unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
352 num_physpages << (PAGE_SHIFT-10),
353 codesize >> 10,
354 reservedpages << (PAGE_SHIFT-10),
355 datasize >> 10,
356 bsssize >> 10,
357 initsize >> 10);
358
359 mem_init_done = 1;
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360}
361
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362/*
363 * This is called when a page has been modified by the kernel.
364 * It just marks the page as not i-cache clean. We do the i-cache
365 * flush later when the page is given to a user process, if necessary.
366 */
367void flush_dcache_page(struct page *page)
368{
369 if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
370 return;
371 /* avoid an atomic op if possible */
372 if (test_bit(PG_arch_1, &page->flags))
373 clear_bit(PG_arch_1, &page->flags);
374}
375EXPORT_SYMBOL(flush_dcache_page);
376
377void flush_dcache_icache_page(struct page *page)
378{
379#ifdef CONFIG_BOOKE
380 void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE);
381 __flush_dcache_icache(start);
382 kunmap_atomic(start, KM_PPC_SYNC_ICACHE);
ab1f9dac 383#elif defined(CONFIG_8xx) || defined(CONFIG_PPC64)
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384 /* On 8xx there is no need to kmap since highmem is not supported */
385 __flush_dcache_icache(page_address(page));
386#else
387 __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
388#endif
389
390}
391void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
392{
393 clear_page(page);
394
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395 /*
396 * We shouldnt have to do this, but some versions of glibc
397 * require it (ld.so assumes zero filled pages are icache clean)
398 * - Anton
399 */
09f5dc44 400 flush_dcache_page(pg);
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401}
402EXPORT_SYMBOL(clear_user_page);
403
404void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
405 struct page *pg)
406{
407 copy_page(vto, vfrom);
408
409 /*
410 * We should be able to use the following optimisation, however
411 * there are two problems.
412 * Firstly a bug in some versions of binutils meant PLT sections
413 * were not marked executable.
414 * Secondly the first word in the GOT section is blrl, used
415 * to establish the GOT address. Until recently the GOT was
416 * not marked executable.
417 * - Anton
418 */
419#if 0
420 if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
421 return;
422#endif
423
09f5dc44 424 flush_dcache_page(pg);
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425}
426
427void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
428 unsigned long addr, int len)
429{
430 unsigned long maddr;
431
432 maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
433 flush_icache_range(maddr, maddr + len);
434 kunmap(page);
435}
436EXPORT_SYMBOL(flush_icache_user_range);
437
438/*
439 * This is called at the end of handling a user page fault, when the
440 * fault has been handled by updating a PTE in the linux page tables.
441 * We use it to preload an HPTE into the hash table corresponding to
442 * the updated linux PTE.
443 *
01edcd89 444 * This must always be called with the pte lock held.
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445 */
446void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
447 pte_t pte)
448{
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449#ifdef CONFIG_PPC_STD_MMU
450 unsigned long access = 0, trap;
14cf11af 451#endif
3c726f8d 452 unsigned long pfn = pte_pfn(pte);
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453
454 /* handle i-cache coherency */
455 if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) &&
456 !cpu_has_feature(CPU_FTR_NOEXECUTE) &&
457 pfn_valid(pfn)) {
458 struct page *page = pfn_to_page(pfn);
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459#ifdef CONFIG_8xx
460 /* On 8xx, cache control instructions (particularly
461 * "dcbst" from flush_dcache_icache) fault as write
462 * operation if there is an unpopulated TLB entry
463 * for the address in question. To workaround that,
464 * we invalidate the TLB here, thus avoiding dcbst
465 * misbehaviour.
466 */
467 _tlbie(address);
468#endif
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469 if (!PageReserved(page)
470 && !test_bit(PG_arch_1, &page->flags)) {
471 if (vma->vm_mm == current->active_mm) {
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472 __flush_dcache_icache((void *) address);
473 } else
474 flush_dcache_icache_page(page);
475 set_bit(PG_arch_1, &page->flags);
476 }
477 }
478
479#ifdef CONFIG_PPC_STD_MMU
480 /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
481 if (!pte_young(pte) || address >= TASK_SIZE)
482 return;
14cf11af 483
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484 /* We try to figure out if we are coming from an instruction
485 * access fault and pass that down to __hash_page so we avoid
486 * double-faulting on execution of fresh text. We have to test
487 * for regs NULL since init will get here first thing at boot
488 *
489 * We also avoid filling the hash if not coming from a fault
490 */
491 if (current->thread.regs == NULL)
14cf11af 492 return;
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493 trap = TRAP(current->thread.regs);
494 if (trap == 0x400)
495 access |= _PAGE_EXEC;
496 else if (trap != 0x300)
497 return;
498 hash_preload(vma->vm_mm, address, access, trap);
499#endif /* CONFIG_PPC_STD_MMU */
14cf11af 500}
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