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14cf11af PM |
1 | /* |
2 | * Declarations of procedures and variables shared between files | |
3 | * in arch/ppc/mm/. | |
4 | * | |
5 | * Derived from arch/ppc/mm/init.c: | |
6 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
7 | * | |
8 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | |
9 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | |
10 | * Copyright (C) 1996 Paul Mackerras | |
11 | * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). | |
12 | * | |
13 | * Derived from "arch/i386/mm/init.c" | |
14 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or | |
17 | * modify it under the terms of the GNU General Public License | |
18 | * as published by the Free Software Foundation; either version | |
19 | * 2 of the License, or (at your option) any later version. | |
20 | * | |
21 | */ | |
22 | #include <asm/tlbflush.h> | |
23 | #include <asm/mmu.h> | |
24 | ||
ab1f9dac | 25 | #ifdef CONFIG_PPC32 |
14cf11af PM |
26 | extern void mapin_ram(void); |
27 | extern int map_page(unsigned long va, phys_addr_t pa, int flags); | |
28 | extern void setbat(int index, unsigned long virt, unsigned long phys, | |
29 | unsigned int size, int flags); | |
14cf11af PM |
30 | extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, |
31 | unsigned int size, int flags, unsigned int pid); | |
32 | extern void invalidate_tlbcam_entry(int index); | |
33 | ||
34 | extern int __map_without_bats; | |
35 | extern unsigned long ioremap_base; | |
14cf11af PM |
36 | extern unsigned int rtas_data, rtas_size; |
37 | ||
14cf11af PM |
38 | extern PTE *Hash, *Hash_end; |
39 | extern unsigned long Hash_size, Hash_mask; | |
40 | ||
41 | extern unsigned int num_tlbcam_entries; | |
ab1f9dac PM |
42 | #endif |
43 | ||
800fc3ee | 44 | extern unsigned long ioremap_bot; |
ab1f9dac PM |
45 | extern unsigned long __max_low_memory; |
46 | extern unsigned long __initial_memory_limit; | |
47 | extern unsigned long total_memory; | |
48 | extern unsigned long total_lowmem; | |
14cf11af PM |
49 | |
50 | /* ...and now those things that may be slightly different between processor | |
51 | * architectures. -- Dan | |
52 | */ | |
53 | #if defined(CONFIG_8xx) | |
54 | #define flush_HPTE(X, va, pg) _tlbie(va) | |
55 | #define MMU_init_hw() do { } while(0) | |
56 | #define mmu_mapin_ram() (0UL) | |
57 | ||
58 | #elif defined(CONFIG_4xx) | |
59 | #define flush_HPTE(X, va, pg) _tlbie(va) | |
60 | extern void MMU_init_hw(void); | |
61 | extern unsigned long mmu_mapin_ram(void); | |
62 | ||
63 | #elif defined(CONFIG_FSL_BOOKE) | |
64 | #define flush_HPTE(X, va, pg) _tlbie(va) | |
65 | extern void MMU_init_hw(void); | |
66 | extern unsigned long mmu_mapin_ram(void); | |
67 | extern void adjust_total_lowmem(void); | |
68 | ||
ab1f9dac PM |
69 | #elif defined(CONFIG_PPC32) |
70 | /* anything 32-bit except 4xx or 8xx */ | |
14cf11af PM |
71 | extern void MMU_init_hw(void); |
72 | extern unsigned long mmu_mapin_ram(void); | |
73 | ||
74 | /* Be careful....this needs to be updated if we ever encounter 603 SMPs, | |
75 | * which includes all new 82xx processors. We need tlbie/tlbsync here | |
76 | * in that case (I think). -- Dan. | |
77 | */ | |
78 | static inline void flush_HPTE(unsigned context, unsigned long va, | |
79 | unsigned long pdval) | |
80 | { | |
81 | if ((Hash != 0) && | |
82 | cpu_has_feature(CPU_FTR_HPTE_TABLE)) | |
83 | flush_hash_pages(0, va, pdval, 1); | |
84 | else | |
85 | _tlbie(va); | |
86 | } | |
800fc3ee DG |
87 | #else /* CONFIG_PPC64 */ |
88 | /* imalloc region types */ | |
89 | #define IM_REGION_UNUSED 0x1 | |
90 | #define IM_REGION_SUBSET 0x2 | |
91 | #define IM_REGION_EXISTS 0x4 | |
92 | #define IM_REGION_OVERLAP 0x8 | |
93 | #define IM_REGION_SUPERSET 0x10 | |
94 | ||
95 | extern struct vm_struct * im_get_free_area(unsigned long size); | |
96 | extern struct vm_struct * im_get_area(unsigned long v_addr, unsigned long size, | |
97 | int region_type); | |
98 | extern void im_free(void *addr); | |
14cf11af | 99 | #endif |