Merge tag 'stable/for-linus-3.14-rc2-tag' of git://git.kernel.org/pub/scm/linux/kerne...
[deliverable/linux.git] / arch / powerpc / mm / pgtable_64.c
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1/*
2 * This file contains ioremap and related functions for 64-bit machines.
3 *
4 * Derived from arch/ppc64/mm/init.c
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Modifications by Paul Mackerras (PowerMac) (paulus@samba.org)
8 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
9 * Copyright (C) 1996 Paul Mackerras
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10 *
11 * Derived from "arch/i386/mm/init.c"
12 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
13 *
14 * Dave Engebretsen <engebret@us.ibm.com>
15 * Rework for PPC64 port.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 *
22 */
23
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24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/kernel.h>
27#include <linux/errno.h>
28#include <linux/string.h>
66b15db6 29#include <linux/export.h>
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30#include <linux/types.h>
31#include <linux/mman.h>
32#include <linux/mm.h>
33#include <linux/swap.h>
34#include <linux/stddef.h>
35#include <linux/vmalloc.h>
a245067e 36#include <linux/bootmem.h>
95f72d1e 37#include <linux/memblock.h>
5a0e3ad6 38#include <linux/slab.h>
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39
40#include <asm/pgalloc.h>
41#include <asm/page.h>
42#include <asm/prom.h>
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43#include <asm/io.h>
44#include <asm/mmu_context.h>
45#include <asm/pgtable.h>
46#include <asm/mmu.h>
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47#include <asm/smp.h>
48#include <asm/machdep.h>
49#include <asm/tlb.h>
14cf11af 50#include <asm/processor.h>
14cf11af 51#include <asm/cputable.h>
14cf11af 52#include <asm/sections.h>
5e203d68 53#include <asm/firmware.h>
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54
55#include "mmu_decl.h"
14cf11af 56
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57/* Some sanity checking */
58#if TASK_SIZE_USER64 > PGTABLE_RANGE
59#error TASK_SIZE_USER64 exceeds pagetable range
60#endif
61
62#ifdef CONFIG_PPC_STD_MMU_64
af81d787 63#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT))
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64#error TASK_SIZE_USER64 exceeds user VSID range
65#endif
66#endif
14cf11af 67
78f1dbde 68unsigned long ioremap_bot = IOREMAP_BASE;
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69
70#ifdef CONFIG_PPC_MMU_NOHASH
71static void *early_alloc_pgtable(unsigned long size)
72{
73 void *pt;
74
75 if (init_bootmem_done)
76 pt = __alloc_bootmem(size, size, __pa(MAX_DMA_ADDRESS));
77 else
95f72d1e 78 pt = __va(memblock_alloc_base(size, size,
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79 __pa(MAX_DMA_ADDRESS)));
80 memset(pt, 0, size);
81
82 return pt;
83}
84#endif /* CONFIG_PPC_MMU_NOHASH */
85
14cf11af 86/*
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87 * map_kernel_page currently only called by __ioremap
88 * map_kernel_page adds an entry to the ioremap page table
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89 * and adds an entry to the HPT, possibly bolting it
90 */
32a74949 91int map_kernel_page(unsigned long ea, unsigned long pa, int flags)
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92{
93 pgd_t *pgdp;
94 pud_t *pudp;
95 pmd_t *pmdp;
96 pte_t *ptep;
14cf11af 97
a245067e 98 if (slab_is_available()) {
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99 pgdp = pgd_offset_k(ea);
100 pudp = pud_alloc(&init_mm, pgdp, ea);
101 if (!pudp)
102 return -ENOMEM;
103 pmdp = pmd_alloc(&init_mm, pudp, ea);
104 if (!pmdp)
105 return -ENOMEM;
23fd0775 106 ptep = pte_alloc_kernel(pmdp, ea);
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107 if (!ptep)
108 return -ENOMEM;
109 set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
110 __pgprot(flags)));
14cf11af 111 } else {
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112#ifdef CONFIG_PPC_MMU_NOHASH
113 /* Warning ! This will blow up if bootmem is not initialized
114 * which our ppc64 code is keen to do that, we'll need to
115 * fix it and/or be more careful
116 */
117 pgdp = pgd_offset_k(ea);
118#ifdef PUD_TABLE_SIZE
119 if (pgd_none(*pgdp)) {
120 pudp = early_alloc_pgtable(PUD_TABLE_SIZE);
121 BUG_ON(pudp == NULL);
122 pgd_populate(&init_mm, pgdp, pudp);
123 }
124#endif /* PUD_TABLE_SIZE */
125 pudp = pud_offset(pgdp, ea);
126 if (pud_none(*pudp)) {
127 pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);
128 BUG_ON(pmdp == NULL);
129 pud_populate(&init_mm, pudp, pmdp);
130 }
131 pmdp = pmd_offset(pudp, ea);
132 if (!pmd_present(*pmdp)) {
133 ptep = early_alloc_pgtable(PAGE_SIZE);
134 BUG_ON(ptep == NULL);
135 pmd_populate_kernel(&init_mm, pmdp, ptep);
136 }
137 ptep = pte_offset_kernel(pmdp, ea);
138 set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT,
139 __pgprot(flags)));
140#else /* CONFIG_PPC_MMU_NOHASH */
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141 /*
142 * If the mm subsystem is not fully up, we cannot create a
143 * linux page table entry for this mapping. Simply bolt an
144 * entry in the hardware page table.
3c726f8d 145 *
14cf11af 146 */
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147 if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
148 mmu_io_psize, mmu_kernel_ssize)) {
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149 printk(KERN_ERR "Failed to do bolted mapping IO "
150 "memory at %016lx !\n", pa);
151 return -ENOMEM;
152 }
a245067e 153#endif /* !CONFIG_PPC_MMU_NOHASH */
14cf11af 154 }
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155
156#ifdef CONFIG_PPC_BOOK3E_64
157 /*
158 * With hardware tablewalk, a sync is needed to ensure that
159 * subsequent accesses see the PTE we just wrote. Unlike userspace
160 * mappings, we can't tolerate spurious faults, so make sure
161 * the new PTE will be seen the first time.
162 */
163 mb();
164#else
165 smp_wmb();
166#endif
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167 return 0;
168}
169
170
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171/**
172 * __ioremap_at - Low level function to establish the page tables
173 * for an IO mapping
174 */
175void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size,
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176 unsigned long flags)
177{
178 unsigned long i;
179
a1f242ff 180 /* Make sure we have the base flags */
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181 if ((flags & _PAGE_PRESENT) == 0)
182 flags |= pgprot_val(PAGE_KERNEL);
183
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184 /* Non-cacheable page cannot be coherent */
185 if (flags & _PAGE_NO_CACHE)
186 flags &= ~_PAGE_COHERENT;
187
188 /* We don't support the 4K PFN hack with ioremap */
189 if (flags & _PAGE_4K_PFN)
190 return NULL;
191
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192 WARN_ON(pa & ~PAGE_MASK);
193 WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
194 WARN_ON(size & ~PAGE_MASK);
195
14cf11af 196 for (i = 0; i < size; i += PAGE_SIZE)
a245067e 197 if (map_kernel_page((unsigned long)ea+i, pa+i, flags))
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198 return NULL;
199
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200 return (void __iomem *)ea;
201}
202
203/**
204 * __iounmap_from - Low level function to tear down the page tables
205 * for an IO mapping. This is used for mappings that
206 * are manipulated manually, like partial unmapping of
207 * PCI IOs or ISA space.
208 */
209void __iounmap_at(void *ea, unsigned long size)
210{
211 WARN_ON(((unsigned long)ea) & ~PAGE_MASK);
212 WARN_ON(size & ~PAGE_MASK);
213
214 unmap_kernel_range((unsigned long)ea, size);
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215}
216
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217void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
218 unsigned long flags, void *caller)
14cf11af 219{
3d5134ee 220 phys_addr_t paligned;
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221 void __iomem *ret;
222
223 /*
224 * Choose an address to map it to.
225 * Once the imalloc system is running, we use it.
226 * Before that, we map using addresses going
227 * up from ioremap_bot. imalloc will use
228 * the addresses from ioremap_bot through
229 * IMALLOC_END
230 *
231 */
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232 paligned = addr & PAGE_MASK;
233 size = PAGE_ALIGN(addr + size) - paligned;
14cf11af 234
3d5134ee 235 if ((size == 0) || (paligned == 0))
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236 return NULL;
237
238 if (mem_init_done) {
239 struct vm_struct *area;
3d5134ee 240
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241 area = __get_vm_area_caller(size, VM_IOREMAP,
242 ioremap_bot, IOREMAP_END,
243 caller);
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244 if (area == NULL)
245 return NULL;
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246
247 area->phys_addr = paligned;
3d5134ee 248 ret = __ioremap_at(paligned, area->addr, size, flags);
14cf11af 249 if (!ret)
3d5134ee 250 vunmap(area->addr);
14cf11af 251 } else {
3d5134ee 252 ret = __ioremap_at(paligned, (void *)ioremap_bot, size, flags);
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253 if (ret)
254 ioremap_bot += size;
255 }
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256
257 if (ret)
258 ret += addr & ~PAGE_MASK;
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259 return ret;
260}
261
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262void __iomem * __ioremap(phys_addr_t addr, unsigned long size,
263 unsigned long flags)
264{
265 return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
266}
4cb3cee0 267
68a64357 268void __iomem * ioremap(phys_addr_t addr, unsigned long size)
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269{
270 unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED;
1cdab55d 271 void *caller = __builtin_return_address(0);
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272
273 if (ppc_md.ioremap)
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274 return ppc_md.ioremap(addr, size, flags, caller);
275 return __ioremap_caller(addr, size, flags, caller);
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276}
277
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278void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
279{
280 unsigned long flags = _PAGE_NO_CACHE;
281 void *caller = __builtin_return_address(0);
282
283 if (ppc_md.ioremap)
284 return ppc_md.ioremap(addr, size, flags, caller);
285 return __ioremap_caller(addr, size, flags, caller);
286}
287
40f1ce7f 288void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
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289 unsigned long flags)
290{
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291 void *caller = __builtin_return_address(0);
292
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293 /* writeable implies dirty for kernel addresses */
294 if (flags & _PAGE_RW)
295 flags |= _PAGE_DIRTY;
296
297 /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */
298 flags &= ~(_PAGE_USER | _PAGE_EXEC);
299
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300#ifdef _PAGE_BAP_SR
301 /* _PAGE_USER contains _PAGE_BAP_SR on BookE using the new PTE format
302 * which means that we just cleared supervisor access... oops ;-) This
303 * restores it
304 */
305 flags |= _PAGE_BAP_SR;
306#endif
307
4cb3cee0 308 if (ppc_md.ioremap)
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309 return ppc_md.ioremap(addr, size, flags, caller);
310 return __ioremap_caller(addr, size, flags, caller);
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311}
312
313
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314/*
315 * Unmap an IO region and remove it from imalloc'd list.
316 * Access to IO memory should be serialized by driver.
14cf11af 317 */
68a64357 318void __iounmap(volatile void __iomem *token)
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319{
320 void *addr;
321
322 if (!mem_init_done)
323 return;
324
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325 addr = (void *) ((unsigned long __force)
326 PCI_FIX_ADDR(token) & PAGE_MASK);
327 if ((unsigned long)addr < ioremap_bot) {
328 printk(KERN_WARNING "Attempt to iounmap early bolted mapping"
329 " at 0x%p\n", addr);
330 return;
331 }
332 vunmap(addr);
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333}
334
68a64357 335void iounmap(volatile void __iomem *token)
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336{
337 if (ppc_md.iounmap)
338 ppc_md.iounmap(token);
339 else
340 __iounmap(token);
341}
342
14cf11af 343EXPORT_SYMBOL(ioremap);
be135f40 344EXPORT_SYMBOL(ioremap_wc);
40f1ce7f 345EXPORT_SYMBOL(ioremap_prot);
14cf11af 346EXPORT_SYMBOL(__ioremap);
a302cb9d 347EXPORT_SYMBOL(__ioremap_at);
14cf11af 348EXPORT_SYMBOL(iounmap);
4cb3cee0 349EXPORT_SYMBOL(__iounmap);
a302cb9d 350EXPORT_SYMBOL(__iounmap_at);
5c1f6ee9 351
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352/*
353 * For hugepage we have pfn in the pmd, we use PTE_RPN_SHIFT bits for flags
354 * For PTE page, we have a PTE_FRAG_SIZE (4K) aligned virtual address.
355 */
356struct page *pmd_page(pmd_t pmd)
357{
358#ifdef CONFIG_TRANSPARENT_HUGEPAGE
359 if (pmd_trans_huge(pmd))
360 return pfn_to_page(pmd_pfn(pmd));
361#endif
362 return virt_to_page(pmd_page_vaddr(pmd));
363}
364
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365#ifdef CONFIG_PPC_64K_PAGES
366static pte_t *get_from_cache(struct mm_struct *mm)
367{
368 void *pte_frag, *ret;
369
370 spin_lock(&mm->page_table_lock);
371 ret = mm->context.pte_frag;
372 if (ret) {
373 pte_frag = ret + PTE_FRAG_SIZE;
374 /*
375 * If we have taken up all the fragments mark PTE page NULL
376 */
377 if (((unsigned long)pte_frag & ~PAGE_MASK) == 0)
378 pte_frag = NULL;
379 mm->context.pte_frag = pte_frag;
380 }
381 spin_unlock(&mm->page_table_lock);
382 return (pte_t *)ret;
383}
384
385static pte_t *__alloc_for_cache(struct mm_struct *mm, int kernel)
386{
387 void *ret = NULL;
388 struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
389 __GFP_REPEAT | __GFP_ZERO);
390 if (!page)
391 return NULL;
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392 if (!kernel && !pgtable_page_ctor(page)) {
393 __free_page(page);
394 return NULL;
395 }
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396
397 ret = page_address(page);
398 spin_lock(&mm->page_table_lock);
399 /*
400 * If we find pgtable_page set, we return
401 * the allocated page with single fragement
402 * count.
403 */
404 if (likely(!mm->context.pte_frag)) {
405 atomic_set(&page->_count, PTE_FRAG_NR);
406 mm->context.pte_frag = ret + PTE_FRAG_SIZE;
407 }
408 spin_unlock(&mm->page_table_lock);
409
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410 return (pte_t *)ret;
411}
412
413pte_t *page_table_alloc(struct mm_struct *mm, unsigned long vmaddr, int kernel)
414{
415 pte_t *pte;
416
417 pte = get_from_cache(mm);
418 if (pte)
419 return pte;
420
421 return __alloc_for_cache(mm, kernel);
422}
423
424void page_table_free(struct mm_struct *mm, unsigned long *table, int kernel)
425{
426 struct page *page = virt_to_page(table);
427 if (put_page_testzero(page)) {
428 if (!kernel)
429 pgtable_page_dtor(page);
430 free_hot_cold_page(page, 0);
431 }
432}
433
434#ifdef CONFIG_SMP
435static void page_table_free_rcu(void *table)
436{
437 struct page *page = virt_to_page(table);
438 if (put_page_testzero(page)) {
439 pgtable_page_dtor(page);
440 free_hot_cold_page(page, 0);
441 }
442}
443
444void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
445{
446 unsigned long pgf = (unsigned long)table;
447
448 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
449 pgf |= shift;
450 tlb_remove_table(tlb, (void *)pgf);
451}
452
453void __tlb_remove_table(void *_table)
454{
455 void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
456 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
457
458 if (!shift)
459 /* PTE page needs special handling */
460 page_table_free_rcu(table);
461 else {
462 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
463 kmem_cache_free(PGT_CACHE(shift), table);
464 }
465}
466#else
467void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
468{
469 if (!shift) {
470 /* PTE page needs special handling */
471 struct page *page = virt_to_page(table);
472 if (put_page_testzero(page)) {
473 pgtable_page_dtor(page);
474 free_hot_cold_page(page, 0);
475 }
476 } else {
477 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
478 kmem_cache_free(PGT_CACHE(shift), table);
479 }
480}
481#endif
482#endif /* CONFIG_PPC_64K_PAGES */
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483
484#ifdef CONFIG_TRANSPARENT_HUGEPAGE
485
486/*
487 * This is called when relaxing access to a hugepage. It's also called in the page
488 * fault path when we don't hit any of the major fault cases, ie, a minor
489 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
490 * handled those two for us, we additionally deal with missing execute
491 * permission here on some processors
492 */
493int pmdp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
494 pmd_t *pmdp, pmd_t entry, int dirty)
495{
496 int changed;
497#ifdef CONFIG_DEBUG_VM
498 WARN_ON(!pmd_trans_huge(*pmdp));
499 assert_spin_locked(&vma->vm_mm->page_table_lock);
500#endif
501 changed = !pmd_same(*(pmdp), entry);
502 if (changed) {
503 __ptep_set_access_flags(pmdp_ptep(pmdp), pmd_pte(entry));
504 /*
505 * Since we are not supporting SW TLB systems, we don't
506 * have any thing similar to flush_tlb_page_nohash()
507 */
508 }
509 return changed;
510}
511
512unsigned long pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
513 pmd_t *pmdp, unsigned long clr)
514{
515
516 unsigned long old, tmp;
517
518#ifdef CONFIG_DEBUG_VM
519 WARN_ON(!pmd_trans_huge(*pmdp));
520 assert_spin_locked(&mm->page_table_lock);
521#endif
522
523#ifdef PTE_ATOMIC_UPDATES
524 __asm__ __volatile__(
525 "1: ldarx %0,0,%3\n\
526 andi. %1,%0,%6\n\
527 bne- 1b \n\
528 andc %1,%0,%4 \n\
529 stdcx. %1,0,%3 \n\
530 bne- 1b"
531 : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
532 : "r" (pmdp), "r" (clr), "m" (*pmdp), "i" (_PAGE_BUSY)
533 : "cc" );
534#else
535 old = pmd_val(*pmdp);
536 *pmdp = __pmd(old & ~clr);
537#endif
538 if (old & _PAGE_HASHPTE)
539 hpte_do_hugepage_flush(mm, addr, pmdp);
540 return old;
541}
542
543pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
544 pmd_t *pmdp)
545{
546 pmd_t pmd;
547
548 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
549 if (pmd_trans_huge(*pmdp)) {
550 pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp);
551 } else {
552 /*
553 * khugepaged calls this for normal pmd
554 */
555 pmd = *pmdp;
556 pmd_clear(pmdp);
557 /*
558 * Wait for all pending hash_page to finish. This is needed
559 * in case of subpage collapse. When we collapse normal pages
560 * to hugepage, we first clear the pmd, then invalidate all
561 * the PTE entries. The assumption here is that any low level
562 * page fault will see a none pmd and take the slow path that
563 * will wait on mmap_sem. But we could very well be in a
564 * hash_page with local ptep pointer value. Such a hash page
565 * can result in adding new HPTE entries for normal subpages.
566 * That means we could be modifying the page content as we
567 * copy them to a huge page. So wait for parallel hash_page
568 * to finish before invalidating HPTE entries. We can do this
569 * by sending an IPI to all the cpus and executing a dummy
570 * function there.
571 */
572 kick_all_cpus_sync();
573 /*
574 * Now invalidate the hpte entries in the range
575 * covered by pmd. This make sure we take a
576 * fault and will find the pmd as none, which will
577 * result in a major fault which takes mmap_sem and
578 * hence wait for collapse to complete. Without this
579 * the __collapse_huge_page_copy can result in copying
580 * the old content.
581 */
582 flush_tlb_pmd_range(vma->vm_mm, &pmd, address);
583 }
584 return pmd;
585}
586
587int pmdp_test_and_clear_young(struct vm_area_struct *vma,
588 unsigned long address, pmd_t *pmdp)
589{
590 return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
591}
592
593/*
594 * We currently remove entries from the hashtable regardless of whether
595 * the entry was young or dirty. The generic routines only flush if the
596 * entry was young or dirty which is not good enough.
597 *
598 * We should be more intelligent about this but for the moment we override
599 * these functions and force a tlb flush unconditionally
600 */
601int pmdp_clear_flush_young(struct vm_area_struct *vma,
602 unsigned long address, pmd_t *pmdp)
603{
604 return __pmdp_test_and_clear_young(vma->vm_mm, address, pmdp);
605}
606
607/*
608 * We mark the pmd splitting and invalidate all the hpte
609 * entries for this hugepage.
610 */
611void pmdp_splitting_flush(struct vm_area_struct *vma,
612 unsigned long address, pmd_t *pmdp)
613{
614 unsigned long old, tmp;
615
616 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
617
618#ifdef CONFIG_DEBUG_VM
619 WARN_ON(!pmd_trans_huge(*pmdp));
620 assert_spin_locked(&vma->vm_mm->page_table_lock);
621#endif
622
623#ifdef PTE_ATOMIC_UPDATES
624
625 __asm__ __volatile__(
626 "1: ldarx %0,0,%3\n\
627 andi. %1,%0,%6\n\
628 bne- 1b \n\
629 ori %1,%0,%4 \n\
630 stdcx. %1,0,%3 \n\
631 bne- 1b"
632 : "=&r" (old), "=&r" (tmp), "=m" (*pmdp)
633 : "r" (pmdp), "i" (_PAGE_SPLITTING), "m" (*pmdp), "i" (_PAGE_BUSY)
634 : "cc" );
635#else
636 old = pmd_val(*pmdp);
637 *pmdp = __pmd(old | _PAGE_SPLITTING);
638#endif
639 /*
640 * If we didn't had the splitting flag set, go and flush the
641 * HPTE entries.
642 */
643 if (!(old & _PAGE_SPLITTING)) {
644 /* We need to flush the hpte */
645 if (old & _PAGE_HASHPTE)
646 hpte_do_hugepage_flush(vma->vm_mm, address, pmdp);
647 }
648}
649
650/*
651 * We want to put the pgtable in pmd and use pgtable for tracking
652 * the base page size hptes
653 */
654void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
655 pgtable_t pgtable)
656{
657 pgtable_t *pgtable_slot;
658 assert_spin_locked(&mm->page_table_lock);
659 /*
660 * we store the pgtable in the second half of PMD
661 */
662 pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
663 *pgtable_slot = pgtable;
664 /*
665 * expose the deposited pgtable to other cpus.
666 * before we set the hugepage PTE at pmd level
667 * hash fault code looks at the deposted pgtable
668 * to store hash index values.
669 */
670 smp_wmb();
671}
672
673pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp)
674{
675 pgtable_t pgtable;
676 pgtable_t *pgtable_slot;
677
678 assert_spin_locked(&mm->page_table_lock);
679 pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
680 pgtable = *pgtable_slot;
681 /*
682 * Once we withdraw, mark the entry NULL.
683 */
684 *pgtable_slot = NULL;
685 /*
686 * We store HPTE information in the deposited PTE fragment.
687 * zero out the content on withdraw.
688 */
689 memset(pgtable, 0, PTE_FRAG_SIZE);
690 return pgtable;
691}
692
693/*
694 * set a new huge pmd. We should not be called for updating
695 * an existing pmd entry. That should go via pmd_hugepage_update.
696 */
697void set_pmd_at(struct mm_struct *mm, unsigned long addr,
698 pmd_t *pmdp, pmd_t pmd)
699{
700#ifdef CONFIG_DEBUG_VM
8937ba48 701 WARN_ON(pmd_val(*pmdp) & _PAGE_PRESENT);
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702 assert_spin_locked(&mm->page_table_lock);
703 WARN_ON(!pmd_trans_huge(pmd));
704#endif
705 return set_pte_at(mm, addr, pmdp_ptep(pmdp), pmd_pte(pmd));
706}
707
708void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
709 pmd_t *pmdp)
710{
711 pmd_hugepage_update(vma->vm_mm, address, pmdp, _PAGE_PRESENT);
712}
713
714/*
715 * A linux hugepage PMD was changed and the corresponding hash table entries
716 * neesd to be flushed.
717 */
718void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
719 pmd_t *pmdp)
720{
721 int ssize, i;
722 unsigned long s_addr;
1a527286 723 int max_hpte_count;
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724 unsigned int psize, valid;
725 unsigned char *hpte_slot_array;
726 unsigned long hidx, vpn, vsid, hash, shift, slot;
727
728 /*
729 * Flush all the hptes mapping this hugepage
730 */
731 s_addr = addr & HPAGE_PMD_MASK;
732 hpte_slot_array = get_hpte_slot_array(pmdp);
733 /*
734 * IF we try to do a HUGE PTE update after a withdraw is done.
735 * we will find the below NULL. This happens when we do
736 * split_huge_page_pmd
737 */
738 if (!hpte_slot_array)
739 return;
740
741 /* get the base page size */
742 psize = get_slice_psize(mm, s_addr);
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744 if (ppc_md.hugepage_invalidate)
745 return ppc_md.hugepage_invalidate(mm, hpte_slot_array,
746 s_addr, psize);
747 /*
748 * No bluk hpte removal support, invalidate each entry
749 */
750 shift = mmu_psize_defs[psize].shift;
751 max_hpte_count = HPAGE_PMD_SIZE >> shift;
752 for (i = 0; i < max_hpte_count; i++) {
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753 /*
754 * 8 bits per each hpte entries
755 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
756 */
757 valid = hpte_valid(hpte_slot_array, i);
758 if (!valid)
759 continue;
760 hidx = hpte_hash_index(hpte_slot_array, i);
761
762 /* get the vpn */
763 addr = s_addr + (i * (1ul << shift));
764 if (!is_kernel_addr(addr)) {
765 ssize = user_segment_size(addr);
766 vsid = get_vsid(mm->context.id, addr, ssize);
767 WARN_ON(vsid == 0);
768 } else {
769 vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
770 ssize = mmu_kernel_ssize;
771 }
772
773 vpn = hpt_vpn(addr, vsid, ssize);
774 hash = hpt_hash(vpn, shift, ssize);
775 if (hidx & _PTEIDX_SECONDARY)
776 hash = ~hash;
777
778 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
779 slot += hidx & _PTEIDX_GROUP_IX;
780 ppc_md.hpte_invalidate(slot, vpn, psize,
781 MMU_PAGE_16M, ssize, 0);
782 }
783}
784
785static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot)
786{
787 pmd_val(pmd) |= pgprot_val(pgprot);
788 return pmd;
789}
790
791pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
792{
793 pmd_t pmd;
794 /*
795 * For a valid pte, we would have _PAGE_PRESENT or _PAGE_FILE always
796 * set. We use this to check THP page at pmd level.
797 * leaf pte for huge page, bottom two bits != 00
798 */
799 pmd_val(pmd) = pfn << PTE_RPN_SHIFT;
800 pmd_val(pmd) |= _PAGE_THP_HUGE;
801 pmd = pmd_set_protbits(pmd, pgprot);
802 return pmd;
803}
804
805pmd_t mk_pmd(struct page *page, pgprot_t pgprot)
806{
807 return pfn_pmd(page_to_pfn(page), pgprot);
808}
809
810pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
811{
812
813 pmd_val(pmd) &= _HPAGE_CHG_MASK;
814 pmd = pmd_set_protbits(pmd, newprot);
815 return pmd;
816}
817
818/*
819 * This is called at the end of handling a user page fault, when the
820 * fault has been handled by updating a HUGE PMD entry in the linux page tables.
821 * We use it to preload an HPTE into the hash table corresponding to
822 * the updated linux HUGE PMD entry.
823 */
824void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
825 pmd_t *pmd)
826{
827 return;
828}
829
830pmd_t pmdp_get_and_clear(struct mm_struct *mm,
831 unsigned long addr, pmd_t *pmdp)
832{
833 pmd_t old_pmd;
834 pgtable_t pgtable;
835 unsigned long old;
836 pgtable_t *pgtable_slot;
837
838 old = pmd_hugepage_update(mm, addr, pmdp, ~0UL);
839 old_pmd = __pmd(old);
840 /*
841 * We have pmd == none and we are holding page_table_lock.
842 * So we can safely go and clear the pgtable hash
843 * index info.
844 */
845 pgtable_slot = (pgtable_t *)pmdp + PTRS_PER_PMD;
846 pgtable = *pgtable_slot;
847 /*
848 * Let's zero out old valid and hash index details
849 * hash fault look at them.
850 */
851 memset(pgtable, 0, PTE_FRAG_SIZE);
852 return old_pmd;
853}
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854
855int has_transparent_hugepage(void)
856{
857 if (!mmu_has_feature(MMU_FTR_16M_PAGE))
858 return 0;
859 /*
860 * We support THP only if PMD_SIZE is 16MB.
861 */
862 if (mmu_psize_defs[MMU_PAGE_16M].shift != PMD_SHIFT)
863 return 0;
864 /*
865 * We need to make sure that we support 16MB hugepage in a segement
866 * with base page size 64K or 4K. We only enable THP with a PAGE_SIZE
867 * of 64K.
868 */
869 /*
870 * If we have 64K HPTE, we will be using that by default
871 */
872 if (mmu_psize_defs[MMU_PAGE_64K].shift &&
873 (mmu_psize_defs[MMU_PAGE_64K].penc[MMU_PAGE_16M] == -1))
874 return 0;
875 /*
876 * Ok we only have 4K HPTE
877 */
878 if (mmu_psize_defs[MMU_PAGE_4K].penc[MMU_PAGE_16M] == -1)
879 return 0;
880
881 return 1;
882}
074c2eae 883#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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